mediatek/mt8192/mt8192-afe-common.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * mt8192-afe-common.h  --  Mediatek 8192 audio driver definitions
0004  *
0005  * Copyright (c) 2020 MediaTek Inc.
0006  * Author: Shane Chien <shane.chien@mediatek.com>
0007  */
0008
0009 #ifndef _MT_8192_AFE_COMMON_H_
0010 #define _MT_8192_AFE_COMMON_H_
0011
0012 #include <linux/list.h>
0013 #include <linux/regmap.h>
0014 #include <sound/soc.h>
0015
0016 #include "../common/mtk-base-afe.h"
0017 #include "mt8192-reg.h"
0018
0019 enum {
0020     MT8192_MEMIF_DL1,
0021     MT8192_MEMIF_DL12,
0022     MT8192_MEMIF_DL2,
0023     MT8192_MEMIF_DL3,
0024     MT8192_MEMIF_DL4,
0025     MT8192_MEMIF_DL5,
0026     MT8192_MEMIF_DL6,
0027     MT8192_MEMIF_DL7,
0028     MT8192_MEMIF_DL8,
0029     MT8192_MEMIF_DL9,
0030     MT8192_MEMIF_DAI,
0031     MT8192_MEMIF_DAI2,
0032     MT8192_MEMIF_MOD_DAI,
0033     MT8192_MEMIF_VUL12,
0034     MT8192_MEMIF_VUL2,
0035     MT8192_MEMIF_VUL3,
0036     MT8192_MEMIF_VUL4,
0037     MT8192_MEMIF_VUL5,
0038     MT8192_MEMIF_VUL6,
0039     MT8192_MEMIF_AWB,
0040     MT8192_MEMIF_AWB2,
0041     MT8192_MEMIF_HDMI,
0042     MT8192_MEMIF_NUM,
0043     MT8192_DAI_ADDA = MT8192_MEMIF_NUM,
0044     MT8192_DAI_ADDA_CH34,
0045     MT8192_DAI_AP_DMIC,
0046     MT8192_DAI_AP_DMIC_CH34,
0047     MT8192_DAI_VOW,
0048     MT8192_DAI_CONNSYS_I2S,
0049     MT8192_DAI_I2S_0,
0050     MT8192_DAI_I2S_1,
0051     MT8192_DAI_I2S_2,
0052     MT8192_DAI_I2S_3,
0053     MT8192_DAI_I2S_5,
0054     MT8192_DAI_I2S_6,
0055     MT8192_DAI_I2S_7,
0056     MT8192_DAI_I2S_8,
0057     MT8192_DAI_I2S_9,
0058     MT8192_DAI_HW_GAIN_1,
0059     MT8192_DAI_HW_GAIN_2,
0060     MT8192_DAI_SRC_1,
0061     MT8192_DAI_SRC_2,
0062     MT8192_DAI_PCM_1,
0063     MT8192_DAI_PCM_2,
0064     MT8192_DAI_TDM,
0065     MT8192_DAI_NUM,
0066 };
0067
0068 enum {
0069     MT8192_IRQ_0,
0070     MT8192_IRQ_1,
0071     MT8192_IRQ_2,
0072     MT8192_IRQ_3,
0073     MT8192_IRQ_4,
0074     MT8192_IRQ_5,
0075     MT8192_IRQ_6,
0076     MT8192_IRQ_7,
0077     MT8192_IRQ_8,
0078     MT8192_IRQ_9,
0079     MT8192_IRQ_10,
0080     MT8192_IRQ_11,
0081     MT8192_IRQ_12,
0082     MT8192_IRQ_13,
0083     MT8192_IRQ_14,
0084     MT8192_IRQ_15,
0085     MT8192_IRQ_16,
0086     MT8192_IRQ_17,
0087     MT8192_IRQ_18,
0088     MT8192_IRQ_19,
0089     MT8192_IRQ_20,
0090     MT8192_IRQ_21,
0091     MT8192_IRQ_22,
0092     MT8192_IRQ_23,
0093     MT8192_IRQ_24,
0094     MT8192_IRQ_25,
0095     MT8192_IRQ_26,
0096     MT8192_IRQ_31,  /* used only for TDM */
0097     MT8192_IRQ_NUM,
0098 };
0099
0100 enum {
0101     MTKAIF_PROTOCOL_1 = 0,
0102     MTKAIF_PROTOCOL_2,
0103     MTKAIF_PROTOCOL_2_CLK_P2,
0104 };
0105
0106 enum {
0107     MTK_AFE_ADDA_DL_GAIN_MUTE = 0,
0108     MTK_AFE_ADDA_DL_GAIN_NORMAL = 0xf74f,
0109     /* SA suggest apply -0.3db to audio/speech path */
0110 };
0111
0112 /* MCLK */
0113 enum {
0114     MT8192_I2S0_MCK = 0,
0115     MT8192_I2S1_MCK,
0116     MT8192_I2S2_MCK,
0117     MT8192_I2S3_MCK,
0118     MT8192_I2S4_MCK,
0119     MT8192_I2S4_BCK,
0120     MT8192_I2S5_MCK,
0121     MT8192_I2S6_MCK,
0122     MT8192_I2S7_MCK,
0123     MT8192_I2S8_MCK,
0124     MT8192_I2S9_MCK,
0125     MT8192_MCK_NUM,
0126 };
0127
0128 struct clk;
0129
0130 struct mt8192_afe_private {
0131     struct clk **clk;
0132     struct regmap *topckgen;
0133     struct regmap *apmixedsys;
0134     struct regmap *infracfg;
0135     int stf_positive_gain_db;
0136     int pm_runtime_bypass_reg_ctl;
0137
0138     /* dai */
0139     bool dai_on[MT8192_DAI_NUM];
0140     void *dai_priv[MT8192_DAI_NUM];
0141
0142     /* adda */
0143     int mtkaif_protocol;
0144     int mtkaif_chosen_phase[4];
0145     int mtkaif_phase_cycle[4];
0146     int mtkaif_calibration_num_phase;
0147     int mtkaif_dmic;
0148     int mtkaif_dmic_ch34;
0149     int mtkaif_adda6_only;
0150
0151     /* mck */
0152     int mck_rate[MT8192_MCK_NUM];
0153 };
0154
0155 int mt8192_dai_adda_register(struct mtk_base_afe *afe);
0156 int mt8192_dai_i2s_register(struct mtk_base_afe *afe);
0157 int mt8192_dai_hw_gain_register(struct mtk_base_afe *afe);
0158 int mt8192_dai_src_register(struct mtk_base_afe *afe);
0159 int mt8192_dai_pcm_register(struct mtk_base_afe *afe);
0160 int mt8192_dai_tdm_register(struct mtk_base_afe *afe);
0161
0162 unsigned int mt8192_general_rate_transform(struct device *dev,
0163                        unsigned int rate);
0164 unsigned int mt8192_rate_transform(struct device *dev,
0165                    unsigned int rate, int aud_blk);
0166
0167 int mt8192_dai_set_priv(struct mtk_base_afe *afe, int id,
0168             int priv_size, const void *priv_data);
0169
0170 #endif