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0001 // SPDX-License-Identifier: GPL-2.0
0002 //
0003 // MediaTek ALSA SoC Audio DAI TDM Control
0004 //
0005 // Copyright (c) 2022 MediaTek Inc.
0006 // Author: Jiaxin Yu <jiaxin.yu@mediatek.com>
0007 
0008 #include <linux/regmap.h>
0009 #include <sound/pcm_params.h>
0010 
0011 #include "mt8186-afe-clk.h"
0012 #include "mt8186-afe-common.h"
0013 #include "mt8186-afe-gpio.h"
0014 #include "mt8186-interconnection.h"
0015 
0016 #define TDM_HD_EN_W_NAME "TDM_HD_EN"
0017 #define TDM_MCLK_EN_W_NAME "TDM_MCLK_EN"
0018 #define MTK_AFE_TDM_KCONTROL_NAME "TDM_HD_Mux"
0019 
0020 struct mtk_afe_tdm_priv {
0021     unsigned int id;
0022     unsigned int rate; /* for determine which apll to use */
0023     unsigned int bck_invert;
0024     unsigned int lck_invert;
0025     unsigned int lrck_width;
0026     unsigned int mclk_id;
0027     unsigned int mclk_multiple; /* according to sample rate */
0028     unsigned int mclk_rate;
0029     unsigned int mclk_apll;
0030     unsigned int tdm_mode;
0031     unsigned int data_mode;
0032     unsigned int slave_mode;
0033     unsigned int low_jitter_en;
0034 };
0035 
0036 enum {
0037     TDM_IN_I2S = 0,
0038     TDM_IN_LJ = 1,
0039     TDM_IN_RJ = 2,
0040     TDM_IN_DSP_A = 4,
0041     TDM_IN_DSP_B = 5,
0042 };
0043 
0044 enum {
0045     TDM_DATA_ONE_PIN = 0,
0046     TDM_DATA_MULTI_PIN,
0047 };
0048 
0049 enum {
0050     TDM_BCK_NON_INV = 0,
0051     TDM_BCK_INV = 1,
0052 };
0053 
0054 enum {
0055     TDM_LCK_NON_INV = 0,
0056     TDM_LCK_INV = 1,
0057 };
0058 
0059 static unsigned int get_tdm_lrck_width(snd_pcm_format_t format,
0060                        unsigned int mode)
0061 {
0062     if (mode == TDM_IN_DSP_A || mode == TDM_IN_DSP_B)
0063         return 0;
0064 
0065     return snd_pcm_format_physical_width(format) - 1;
0066 }
0067 
0068 static unsigned int get_tdm_ch_fixup(unsigned int channels)
0069 {
0070     if (channels > 4)
0071         return 8;
0072     else if (channels > 2)
0073         return 4;
0074 
0075     return 2;
0076 }
0077 
0078 static unsigned int get_tdm_ch_per_sdata(unsigned int mode,
0079                      unsigned int channels)
0080 {
0081     if (mode == TDM_IN_DSP_A || mode == TDM_IN_DSP_B)
0082         return get_tdm_ch_fixup(channels);
0083 
0084     return 2;
0085 }
0086 
0087 enum {
0088     SUPPLY_SEQ_APLL,
0089     SUPPLY_SEQ_TDM_MCK_EN,
0090     SUPPLY_SEQ_TDM_HD_EN,
0091     SUPPLY_SEQ_TDM_EN,
0092 };
0093 
0094 static int get_tdm_id_by_name(const char *name)
0095 {
0096     return MT8186_DAI_TDM_IN;
0097 }
0098 
0099 static int mtk_tdm_en_event(struct snd_soc_dapm_widget *w,
0100                 struct snd_kcontrol *kcontrol,
0101                 int event)
0102 {
0103     struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);
0104     struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
0105     struct mt8186_afe_private *afe_priv = afe->platform_priv;
0106     int dai_id = get_tdm_id_by_name(w->name);
0107     struct mtk_afe_tdm_priv *tdm_priv = afe_priv->dai_priv[dai_id];
0108 
0109     dev_dbg(cmpnt->dev, "%s(), name %s, event 0x%x\n",
0110         __func__, w->name, event);
0111 
0112     switch (event) {
0113     case SND_SOC_DAPM_PRE_PMU:
0114         mt8186_afe_gpio_request(afe->dev, true, tdm_priv->id, 0);
0115         break;
0116     case SND_SOC_DAPM_POST_PMD:
0117         mt8186_afe_gpio_request(afe->dev, false, tdm_priv->id, 0);
0118         break;
0119     default:
0120         break;
0121     }
0122 
0123     return 0;
0124 }
0125 
0126 static int mtk_tdm_mck_en_event(struct snd_soc_dapm_widget *w,
0127                 struct snd_kcontrol *kcontrol,
0128                 int event)
0129 {
0130     struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);
0131     struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
0132     struct mt8186_afe_private *afe_priv = afe->platform_priv;
0133     int dai_id = get_tdm_id_by_name(w->name);
0134     struct mtk_afe_tdm_priv *tdm_priv = afe_priv->dai_priv[dai_id];
0135 
0136     dev_dbg(cmpnt->dev, "%s(), name %s, event 0x%x, dai_id %d\n",
0137         __func__, w->name, event, dai_id);
0138 
0139     switch (event) {
0140     case SND_SOC_DAPM_PRE_PMU:
0141         mt8186_mck_enable(afe, tdm_priv->mclk_id, tdm_priv->mclk_rate);
0142         break;
0143     case SND_SOC_DAPM_POST_PMD:
0144         tdm_priv->mclk_rate = 0;
0145         mt8186_mck_disable(afe, tdm_priv->mclk_id);
0146         break;
0147     default:
0148         break;
0149     }
0150 
0151     return 0;
0152 }
0153 
0154 /* dai component */
0155 /* tdm virtual mux to output widget */
0156 static const char * const tdm_mux_map[] = {
0157     "Normal", "Dummy_Widget",
0158 };
0159 
0160 static int tdm_mux_map_value[] = {
0161     0, 1,
0162 };
0163 
0164 static SOC_VALUE_ENUM_SINGLE_AUTODISABLE_DECL(tdm_mux_map_enum,
0165                           SND_SOC_NOPM,
0166                           0,
0167                           1,
0168                           tdm_mux_map,
0169                           tdm_mux_map_value);
0170 
0171 static const struct snd_kcontrol_new tdm_in_mux_control =
0172     SOC_DAPM_ENUM("TDM In Select", tdm_mux_map_enum);
0173 
0174 static const struct snd_soc_dapm_widget mtk_dai_tdm_widgets[] = {
0175     SND_SOC_DAPM_CLOCK_SUPPLY("aud_tdm_clk"),
0176 
0177     SND_SOC_DAPM_SUPPLY_S("TDM_EN", SUPPLY_SEQ_TDM_EN,
0178                   ETDM_IN1_CON0, ETDM_IN1_CON0_REG_ETDM_IN_EN_SFT,
0179                   0, mtk_tdm_en_event,
0180                   SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
0181     /* tdm hd en */
0182     SND_SOC_DAPM_SUPPLY_S(TDM_HD_EN_W_NAME, SUPPLY_SEQ_TDM_HD_EN,
0183                   ETDM_IN1_CON2, ETDM_IN1_CON2_REG_CLOCK_SOURCE_SEL_SFT,
0184                   0, NULL,
0185                   SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
0186 
0187     SND_SOC_DAPM_SUPPLY_S(TDM_MCLK_EN_W_NAME, SUPPLY_SEQ_TDM_MCK_EN,
0188                   SND_SOC_NOPM, 0, 0,
0189                   mtk_tdm_mck_en_event,
0190                   SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
0191 
0192     SND_SOC_DAPM_INPUT("TDM_DUMMY_IN"),
0193 
0194     SND_SOC_DAPM_MUX("TDM_In_Mux",
0195              SND_SOC_NOPM, 0, 0, &tdm_in_mux_control),
0196 };
0197 
0198 static int mtk_afe_tdm_mclk_connect(struct snd_soc_dapm_widget *source,
0199                     struct snd_soc_dapm_widget *sink)
0200 {
0201     struct snd_soc_dapm_widget *w = sink;
0202     struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);
0203     struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
0204     struct mt8186_afe_private *afe_priv = afe->platform_priv;
0205     int dai_id = get_tdm_id_by_name(w->name);
0206     struct mtk_afe_tdm_priv *tdm_priv = afe_priv->dai_priv[dai_id];
0207 
0208     return (tdm_priv->mclk_rate > 0) ? 1 : 0;
0209 }
0210 
0211 static int mtk_afe_tdm_mclk_apll_connect(struct snd_soc_dapm_widget *source,
0212                      struct snd_soc_dapm_widget *sink)
0213 {
0214     struct snd_soc_dapm_widget *w = sink;
0215     struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);
0216     struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
0217     struct mt8186_afe_private *afe_priv = afe->platform_priv;
0218     int dai_id = get_tdm_id_by_name(w->name);
0219     struct mtk_afe_tdm_priv *tdm_priv = afe_priv->dai_priv[dai_id];
0220     int cur_apll;
0221 
0222     /* which apll */
0223     cur_apll = mt8186_get_apll_by_name(afe, source->name);
0224 
0225     return (tdm_priv->mclk_apll == cur_apll) ? 1 : 0;
0226 }
0227 
0228 static int mtk_afe_tdm_hd_connect(struct snd_soc_dapm_widget *source,
0229                   struct snd_soc_dapm_widget *sink)
0230 {
0231     struct snd_soc_dapm_widget *w = sink;
0232     struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);
0233     struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
0234     struct mt8186_afe_private *afe_priv = afe->platform_priv;
0235     int dai_id = get_tdm_id_by_name(w->name);
0236     struct mtk_afe_tdm_priv *tdm_priv = afe_priv->dai_priv[dai_id];
0237 
0238     return tdm_priv->low_jitter_en;
0239 }
0240 
0241 static int mtk_afe_tdm_apll_connect(struct snd_soc_dapm_widget *source,
0242                     struct snd_soc_dapm_widget *sink)
0243 {
0244     struct snd_soc_dapm_widget *w = sink;
0245     struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);
0246     struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
0247     struct mt8186_afe_private *afe_priv = afe->platform_priv;
0248     int dai_id = get_tdm_id_by_name(w->name);
0249     struct mtk_afe_tdm_priv *tdm_priv = afe_priv->dai_priv[dai_id];
0250     int cur_apll;
0251     int tdm_need_apll;
0252 
0253     /* which apll */
0254     cur_apll = mt8186_get_apll_by_name(afe, source->name);
0255 
0256     /* choose APLL from tdm rate */
0257     tdm_need_apll = mt8186_get_apll_by_rate(afe, tdm_priv->rate);
0258 
0259     return (tdm_need_apll == cur_apll) ? 1 : 0;
0260 }
0261 
0262 /* low jitter control */
0263 static const char * const mt8186_tdm_hd_str[] = {
0264     "Normal", "Low_Jitter"
0265 };
0266 
0267 static const struct soc_enum mt8186_tdm_enum[] = {
0268     SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(mt8186_tdm_hd_str),
0269                 mt8186_tdm_hd_str),
0270 };
0271 
0272 static int mt8186_tdm_hd_get(struct snd_kcontrol *kcontrol,
0273                  struct snd_ctl_elem_value *ucontrol)
0274 {
0275     struct snd_soc_component *cmpnt = snd_soc_kcontrol_component(kcontrol);
0276     struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
0277     struct mt8186_afe_private *afe_priv = afe->platform_priv;
0278     int dai_id = get_tdm_id_by_name(kcontrol->id.name);
0279     struct mtk_afe_tdm_priv *tdm_priv = afe_priv->dai_priv[dai_id];
0280 
0281     ucontrol->value.integer.value[0] = tdm_priv->low_jitter_en;
0282 
0283     return 0;
0284 }
0285 
0286 static int mt8186_tdm_hd_set(struct snd_kcontrol *kcontrol,
0287                  struct snd_ctl_elem_value *ucontrol)
0288 {
0289     struct snd_soc_component *cmpnt = snd_soc_kcontrol_component(kcontrol);
0290     struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
0291     struct mt8186_afe_private *afe_priv = afe->platform_priv;
0292     int dai_id = get_tdm_id_by_name(kcontrol->id.name);
0293     struct mtk_afe_tdm_priv *tdm_priv = afe_priv->dai_priv[dai_id];
0294     struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
0295     int hd_en;
0296 
0297     if (ucontrol->value.enumerated.item[0] >= e->items)
0298         return -EINVAL;
0299 
0300     hd_en = ucontrol->value.integer.value[0];
0301 
0302     dev_dbg(afe->dev, "%s(), kcontrol name %s, hd_en %d\n",
0303         __func__, kcontrol->id.name, hd_en);
0304 
0305     if (tdm_priv->low_jitter_en == hd_en)
0306         return 0;
0307 
0308     tdm_priv->low_jitter_en = hd_en;
0309 
0310     return 1;
0311 }
0312 
0313 static const struct snd_kcontrol_new mtk_dai_tdm_controls[] = {
0314     SOC_ENUM_EXT(MTK_AFE_TDM_KCONTROL_NAME, mt8186_tdm_enum[0],
0315              mt8186_tdm_hd_get, mt8186_tdm_hd_set),
0316 };
0317 
0318 static const struct snd_soc_dapm_route mtk_dai_tdm_routes[] = {
0319     {"TDM IN", NULL, "aud_tdm_clk"},
0320     {"TDM IN", NULL, "TDM_EN"},
0321     {"TDM IN", NULL, TDM_HD_EN_W_NAME, mtk_afe_tdm_hd_connect},
0322     {TDM_HD_EN_W_NAME, NULL, APLL1_W_NAME, mtk_afe_tdm_apll_connect},
0323     {TDM_HD_EN_W_NAME, NULL, APLL2_W_NAME, mtk_afe_tdm_apll_connect},
0324 
0325     {"TDM IN", NULL, TDM_MCLK_EN_W_NAME, mtk_afe_tdm_mclk_connect},
0326     {TDM_MCLK_EN_W_NAME, NULL, APLL1_W_NAME, mtk_afe_tdm_mclk_apll_connect},
0327     {TDM_MCLK_EN_W_NAME, NULL, APLL2_W_NAME, mtk_afe_tdm_mclk_apll_connect},
0328 
0329     /* allow tdm on without codec on */
0330     {"TDM IN", NULL, "TDM_In_Mux"},
0331     {"TDM_In_Mux", "Dummy_Widget", "TDM_DUMMY_IN"},
0332 };
0333 
0334 /* dai ops */
0335 static int mtk_dai_tdm_cal_mclk(struct mtk_base_afe *afe,
0336                 struct mtk_afe_tdm_priv *tdm_priv,
0337                 int freq)
0338 {
0339     int apll;
0340     int apll_rate;
0341 
0342     apll = mt8186_get_apll_by_rate(afe, freq);
0343     apll_rate = mt8186_get_apll_rate(afe, apll);
0344 
0345     if (!freq || freq > apll_rate) {
0346         dev_err(afe->dev,
0347             "%s(), freq(%d Hz) invalid\n", __func__, freq);
0348         return -EINVAL;
0349     }
0350 
0351     if (apll_rate % freq != 0) {
0352         dev_err(afe->dev,
0353             "%s(), APLL cannot generate %d Hz", __func__, freq);
0354         return -EINVAL;
0355     }
0356 
0357     tdm_priv->mclk_rate = freq;
0358     tdm_priv->mclk_apll = apll;
0359 
0360     return 0;
0361 }
0362 
0363 static int mtk_dai_tdm_hw_params(struct snd_pcm_substream *substream,
0364                  struct snd_pcm_hw_params *params,
0365                  struct snd_soc_dai *dai)
0366 {
0367     struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai);
0368     struct mt8186_afe_private *afe_priv = afe->platform_priv;
0369     int tdm_id = dai->id;
0370     struct mtk_afe_tdm_priv *tdm_priv = afe_priv->dai_priv[tdm_id];
0371     unsigned int tdm_mode = tdm_priv->tdm_mode;
0372     unsigned int data_mode = tdm_priv->data_mode;
0373     unsigned int rate = params_rate(params);
0374     unsigned int channels = params_channels(params);
0375     snd_pcm_format_t format = params_format(params);
0376     unsigned int bit_width =
0377         snd_pcm_format_physical_width(format);
0378     unsigned int tdm_channels = (data_mode == TDM_DATA_ONE_PIN) ?
0379         get_tdm_ch_per_sdata(tdm_mode, channels) : 2;
0380     unsigned int lrck_width =
0381         get_tdm_lrck_width(format, tdm_mode);
0382     unsigned int tdm_con = 0;
0383     bool slave_mode = tdm_priv->slave_mode;
0384     bool lrck_inv = tdm_priv->lck_invert;
0385     bool bck_inv = tdm_priv->bck_invert;
0386     unsigned int tran_rate;
0387     unsigned int tran_relatch_rate;
0388 
0389     tdm_priv->rate = rate;
0390     tran_rate = mt8186_rate_transform(afe->dev, rate, dai->id);
0391     tran_relatch_rate = mt8186_tdm_relatch_rate_transform(afe->dev, rate);
0392 
0393     /* calculate mclk_rate, if not set explicitly */
0394     if (!tdm_priv->mclk_rate) {
0395         tdm_priv->mclk_rate = rate * tdm_priv->mclk_multiple;
0396         mtk_dai_tdm_cal_mclk(afe, tdm_priv, tdm_priv->mclk_rate);
0397     }
0398 
0399     /* ETDM_IN1_CON0 */
0400     tdm_con |= slave_mode << ETDM_IN1_CON0_REG_SLAVE_MODE_SFT;
0401     tdm_con |= tdm_mode << ETDM_IN1_CON0_REG_FMT_SFT;
0402     tdm_con |= (bit_width - 1) << ETDM_IN1_CON0_REG_BIT_LENGTH_SFT;
0403     tdm_con |= (bit_width - 1) << ETDM_IN1_CON0_REG_WORD_LENGTH_SFT;
0404     tdm_con |= (tdm_channels - 1) << ETDM_IN1_CON0_REG_CH_NUM_SFT;
0405     /* need to disable sync mode otherwise this may cause latch data error */
0406     tdm_con |= 0 << ETDM_IN1_CON0_REG_SYNC_MODE_SFT;
0407     /* relatch 1x en clock fix to h26m */
0408     tdm_con |= 0 << ETDM_IN1_CON0_REG_RELATCH_1X_EN_SEL_DOMAIN_SFT;
0409     regmap_update_bits(afe->regmap, ETDM_IN1_CON0, ETDM_IN_CON0_CTRL_MASK, tdm_con);
0410 
0411     /* ETDM_IN1_CON1 */
0412     tdm_con = 0;
0413     tdm_con |= 0 << ETDM_IN1_CON1_REG_LRCK_AUTO_MODE_SFT;
0414     tdm_con |= 1 << ETDM_IN1_CON1_PINMUX_MCLK_CTRL_OE_SFT;
0415     tdm_con |= (lrck_width - 1) << ETDM_IN1_CON1_REG_LRCK_WIDTH_SFT;
0416     regmap_update_bits(afe->regmap, ETDM_IN1_CON1, ETDM_IN_CON1_CTRL_MASK, tdm_con);
0417 
0418     /* ETDM_IN1_CON3 */
0419     tdm_con = 0;
0420     tdm_con = ETDM_IN_CON3_FS(tran_rate);
0421     regmap_update_bits(afe->regmap, ETDM_IN1_CON3, ETDM_IN_CON3_CTRL_MASK, tdm_con);
0422 
0423     /* ETDM_IN1_CON4 */
0424     tdm_con = 0;
0425     tdm_con = ETDM_IN_CON4_FS(tran_relatch_rate);
0426     if (slave_mode) {
0427         if (lrck_inv)
0428             tdm_con |= ETDM_IN_CON4_CON0_SLAVE_LRCK_INV;
0429         if (bck_inv)
0430             tdm_con |= ETDM_IN_CON4_CON0_SLAVE_BCK_INV;
0431     } else {
0432         if (lrck_inv)
0433             tdm_con |= ETDM_IN_CON4_CON0_MASTER_LRCK_INV;
0434         if (bck_inv)
0435             tdm_con |= ETDM_IN_CON4_CON0_MASTER_BCK_INV;
0436     }
0437     regmap_update_bits(afe->regmap, ETDM_IN1_CON4, ETDM_IN_CON4_CTRL_MASK, tdm_con);
0438 
0439     /* ETDM_IN1_CON2 */
0440     tdm_con = 0;
0441     if (data_mode == TDM_DATA_MULTI_PIN) {
0442         tdm_con |= ETDM_IN_CON2_MULTI_IP_2CH_MODE;
0443         tdm_con |= ETDM_IN_CON2_MULTI_IP_CH(channels);
0444     }
0445     regmap_update_bits(afe->regmap, ETDM_IN1_CON2, ETDM_IN_CON2_CTRL_MASK, tdm_con);
0446 
0447     /* ETDM_IN1_CON8 */
0448     tdm_con = 0;
0449     if (slave_mode) {
0450         tdm_con |= 1 << ETDM_IN1_CON8_REG_ETDM_USE_AFIFO_SFT;
0451         tdm_con |= 0 << ETDM_IN1_CON8_REG_AFIFO_CLOCK_DOMAIN_SEL_SFT;
0452         tdm_con |= ETDM_IN_CON8_FS(tran_relatch_rate);
0453     } else {
0454         tdm_con |= 0 << ETDM_IN1_CON8_REG_ETDM_USE_AFIFO_SFT;
0455     }
0456     regmap_update_bits(afe->regmap, ETDM_IN1_CON8, ETDM_IN_CON8_CTRL_MASK, tdm_con);
0457 
0458     return 0;
0459 }
0460 
0461 static int mtk_dai_tdm_set_sysclk(struct snd_soc_dai *dai,
0462                   int clk_id, unsigned int freq, int dir)
0463 {
0464     struct mtk_base_afe *afe = dev_get_drvdata(dai->dev);
0465     struct mt8186_afe_private *afe_priv = afe->platform_priv;
0466     struct mtk_afe_tdm_priv *tdm_priv = afe_priv->dai_priv[dai->id];
0467 
0468     if (dir != SND_SOC_CLOCK_IN) {
0469         dev_err(afe->dev, "%s(), dir != SND_SOC_CLOCK_OUT", __func__);
0470         return -EINVAL;
0471     }
0472 
0473     dev_dbg(afe->dev, "%s(), freq %d\n", __func__, freq);
0474 
0475     return mtk_dai_tdm_cal_mclk(afe, tdm_priv, freq);
0476 }
0477 
0478 static int mtk_dai_tdm_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
0479 {
0480     struct mtk_base_afe *afe = dev_get_drvdata(dai->dev);
0481     struct mt8186_afe_private *afe_priv = afe->platform_priv;
0482     struct mtk_afe_tdm_priv *tdm_priv = afe_priv->dai_priv[dai->id];
0483 
0484     /* DAI mode*/
0485     switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
0486     case SND_SOC_DAIFMT_I2S:
0487         tdm_priv->tdm_mode = TDM_IN_I2S;
0488         tdm_priv->data_mode = TDM_DATA_MULTI_PIN;
0489         break;
0490     case SND_SOC_DAIFMT_LEFT_J:
0491         tdm_priv->tdm_mode = TDM_IN_LJ;
0492         tdm_priv->data_mode = TDM_DATA_MULTI_PIN;
0493         break;
0494     case SND_SOC_DAIFMT_RIGHT_J:
0495         tdm_priv->tdm_mode = TDM_IN_RJ;
0496         tdm_priv->data_mode = TDM_DATA_MULTI_PIN;
0497         break;
0498     case SND_SOC_DAIFMT_DSP_A:
0499         tdm_priv->tdm_mode = TDM_IN_DSP_A;
0500         tdm_priv->data_mode = TDM_DATA_ONE_PIN;
0501         break;
0502     case SND_SOC_DAIFMT_DSP_B:
0503         tdm_priv->tdm_mode = TDM_IN_DSP_B;
0504         tdm_priv->data_mode = TDM_DATA_ONE_PIN;
0505         break;
0506     default:
0507         dev_err(afe->dev, "%s(), invalid DAIFMT_FORMAT_MASK", __func__);
0508         return -EINVAL;
0509     }
0510 
0511     /* DAI clock inversion*/
0512     switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
0513     case SND_SOC_DAIFMT_NB_NF:
0514         tdm_priv->bck_invert = TDM_BCK_NON_INV;
0515         tdm_priv->lck_invert = TDM_LCK_NON_INV;
0516         break;
0517     case SND_SOC_DAIFMT_NB_IF:
0518         tdm_priv->bck_invert = TDM_BCK_NON_INV;
0519         tdm_priv->lck_invert = TDM_LCK_INV;
0520         break;
0521     case SND_SOC_DAIFMT_IB_NF:
0522         tdm_priv->bck_invert = TDM_BCK_INV;
0523         tdm_priv->lck_invert = TDM_LCK_NON_INV;
0524         break;
0525     case SND_SOC_DAIFMT_IB_IF:
0526         tdm_priv->bck_invert = TDM_BCK_INV;
0527         tdm_priv->lck_invert = TDM_LCK_INV;
0528         break;
0529     default:
0530         dev_err(afe->dev, "%s(), invalid DAIFMT_INV_MASK", __func__);
0531         return -EINVAL;
0532     }
0533 
0534     switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
0535     case SND_SOC_DAIFMT_BP_FP:
0536         tdm_priv->slave_mode = false;
0537         break;
0538     case SND_SOC_DAIFMT_BC_FC:
0539         tdm_priv->slave_mode = true;
0540         break;
0541     default:
0542         dev_err(afe->dev, "%s(), invalid DAIFMT_CLOCK_PROVIDER_MASK",
0543             __func__);
0544         return -EINVAL;
0545     }
0546 
0547     return 0;
0548 }
0549 
0550 static int mtk_dai_tdm_set_tdm_slot(struct snd_soc_dai *dai,
0551                     unsigned int tx_mask,
0552                     unsigned int rx_mask,
0553                     int slots,
0554                     int slot_width)
0555 {
0556     struct mtk_base_afe *afe = dev_get_drvdata(dai->dev);
0557     struct mt8186_afe_private *afe_priv = afe->platform_priv;
0558     struct mtk_afe_tdm_priv *tdm_priv = afe_priv->dai_priv[dai->id];
0559 
0560     dev_dbg(dai->dev, "%s %d slot_width %d\n", __func__, dai->id, slot_width);
0561 
0562     tdm_priv->lrck_width = slot_width;
0563 
0564     return 0;
0565 }
0566 
0567 static const struct snd_soc_dai_ops mtk_dai_tdm_ops = {
0568     .hw_params = mtk_dai_tdm_hw_params,
0569     .set_sysclk = mtk_dai_tdm_set_sysclk,
0570     .set_fmt = mtk_dai_tdm_set_fmt,
0571     .set_tdm_slot = mtk_dai_tdm_set_tdm_slot,
0572 };
0573 
0574 /* dai driver */
0575 #define MTK_TDM_RATES (SNDRV_PCM_RATE_8000_48000 |\
0576                SNDRV_PCM_RATE_88200 |\
0577                SNDRV_PCM_RATE_96000 |\
0578                SNDRV_PCM_RATE_176400 |\
0579                SNDRV_PCM_RATE_192000)
0580 
0581 #define MTK_TDM_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
0582              SNDRV_PCM_FMTBIT_S24_LE |\
0583              SNDRV_PCM_FMTBIT_S32_LE)
0584 
0585 static struct snd_soc_dai_driver mtk_dai_tdm_driver[] = {
0586     {
0587         .name = "TDM IN",
0588         .id = MT8186_DAI_TDM_IN,
0589         .capture = {
0590             .stream_name = "TDM IN",
0591             .channels_min = 2,
0592             .channels_max = 8,
0593             .rates = MTK_TDM_RATES,
0594             .formats = MTK_TDM_FORMATS,
0595         },
0596         .ops = &mtk_dai_tdm_ops,
0597     },
0598 };
0599 
0600 static struct mtk_afe_tdm_priv *init_tdm_priv_data(struct mtk_base_afe *afe)
0601 {
0602     struct mtk_afe_tdm_priv *tdm_priv;
0603 
0604     tdm_priv = devm_kzalloc(afe->dev, sizeof(struct mtk_afe_tdm_priv),
0605                 GFP_KERNEL);
0606     if (!tdm_priv)
0607         return NULL;
0608 
0609     tdm_priv->mclk_multiple = 512;
0610     tdm_priv->mclk_id = MT8186_TDM_MCK;
0611     tdm_priv->id = MT8186_DAI_TDM_IN;
0612 
0613     return tdm_priv;
0614 }
0615 
0616 int mt8186_dai_tdm_register(struct mtk_base_afe *afe)
0617 {
0618     struct mt8186_afe_private *afe_priv = afe->platform_priv;
0619     struct mtk_afe_tdm_priv *tdm_priv;
0620     struct mtk_base_afe_dai *dai;
0621 
0622     dai = devm_kzalloc(afe->dev, sizeof(*dai), GFP_KERNEL);
0623     if (!dai)
0624         return -ENOMEM;
0625 
0626     list_add(&dai->list, &afe->sub_dais);
0627 
0628     dai->dai_drivers = mtk_dai_tdm_driver;
0629     dai->num_dai_drivers = ARRAY_SIZE(mtk_dai_tdm_driver);
0630 
0631     dai->controls = mtk_dai_tdm_controls;
0632     dai->num_controls = ARRAY_SIZE(mtk_dai_tdm_controls);
0633     dai->dapm_widgets = mtk_dai_tdm_widgets;
0634     dai->num_dapm_widgets = ARRAY_SIZE(mtk_dai_tdm_widgets);
0635     dai->dapm_routes = mtk_dai_tdm_routes;
0636     dai->num_dapm_routes = ARRAY_SIZE(mtk_dai_tdm_routes);
0637 
0638     tdm_priv = init_tdm_priv_data(afe);
0639     if (!tdm_priv)
0640         return -ENOMEM;
0641 
0642     afe_priv->dai_priv[MT8186_DAI_TDM_IN] = tdm_priv;
0643 
0644     return 0;
0645 }
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