0001
0002
0003
0004
0005
0006
0007
0008
0009 #ifndef _MTK_BASE_AFE_H_
0010 #define _MTK_BASE_AFE_H_
0011
0012 #define MTK_STREAM_NUM (SNDRV_PCM_STREAM_LAST + 1)
0013
0014 struct mtk_base_memif_data {
0015 int id;
0016 const char *name;
0017 int reg_ofs_base;
0018 int reg_ofs_cur;
0019 int reg_ofs_end;
0020 int reg_ofs_base_msb;
0021 int reg_ofs_cur_msb;
0022 int reg_ofs_end_msb;
0023 int fs_reg;
0024 int fs_shift;
0025 int fs_maskbit;
0026 int mono_reg;
0027 int mono_shift;
0028 int mono_invert;
0029 int quad_ch_reg;
0030 int quad_ch_mask;
0031 int quad_ch_shift;
0032 int int_odd_flag_reg;
0033 int int_odd_flag_shift;
0034 int enable_reg;
0035 int enable_shift;
0036 int hd_reg;
0037 int hd_shift;
0038 int hd_align_reg;
0039 int hd_align_mshift;
0040 int msb_reg;
0041 int msb_shift;
0042 int msb_end_reg;
0043 int msb_end_shift;
0044 int agent_disable_reg;
0045 int agent_disable_shift;
0046 int ch_num_reg;
0047 int ch_num_shift;
0048 int ch_num_maskbit;
0049
0050 int pbuf_reg;
0051 int pbuf_mask;
0052 int pbuf_shift;
0053 int minlen_reg;
0054 int minlen_mask;
0055 int minlen_shift;
0056 };
0057
0058 struct mtk_base_irq_data {
0059 int id;
0060 int irq_cnt_reg;
0061 int irq_cnt_shift;
0062 int irq_cnt_maskbit;
0063 int irq_fs_reg;
0064 int irq_fs_shift;
0065 int irq_fs_maskbit;
0066 int irq_en_reg;
0067 int irq_en_shift;
0068 int irq_clr_reg;
0069 int irq_clr_shift;
0070 int irq_status_shift;
0071 };
0072
0073 struct device;
0074 struct list_head;
0075 struct mtk_base_afe_memif;
0076 struct mtk_base_afe_irq;
0077 struct mtk_base_afe_dai;
0078 struct regmap;
0079 struct snd_pcm_substream;
0080 struct snd_soc_dai;
0081
0082 struct mtk_base_afe {
0083 void __iomem *base_addr;
0084 struct device *dev;
0085 struct regmap *regmap;
0086 struct mutex irq_alloc_lock;
0087
0088 unsigned int const *reg_back_up_list;
0089 unsigned int *reg_back_up;
0090 unsigned int reg_back_up_list_num;
0091
0092 int (*runtime_suspend)(struct device *dev);
0093 int (*runtime_resume)(struct device *dev);
0094 bool suspended;
0095
0096 struct mtk_base_afe_memif *memif;
0097 int memif_size;
0098 struct mtk_base_afe_irq *irqs;
0099 int irqs_size;
0100 int memif_32bit_supported;
0101
0102 struct list_head sub_dais;
0103 struct snd_soc_dai_driver *dai_drivers;
0104 unsigned int num_dai_drivers;
0105
0106 const struct snd_pcm_hardware *mtk_afe_hardware;
0107 int (*memif_fs)(struct snd_pcm_substream *substream,
0108 unsigned int rate);
0109 int (*irq_fs)(struct snd_pcm_substream *substream,
0110 unsigned int rate);
0111 int (*get_dai_fs)(struct mtk_base_afe *afe,
0112 int dai_id, unsigned int rate);
0113 int (*get_memif_pbuf_size)(struct snd_pcm_substream *substream);
0114
0115 int (*request_dram_resource)(struct device *dev);
0116 int (*release_dram_resource)(struct device *dev);
0117
0118 void *platform_priv;
0119 };
0120
0121 struct mtk_base_afe_memif {
0122 unsigned int phys_buf_addr;
0123 int buffer_size;
0124 struct snd_pcm_substream *substream;
0125 const struct mtk_base_memif_data *data;
0126 int irq_usage;
0127 int const_irq;
0128 unsigned char *dma_area;
0129 dma_addr_t dma_addr;
0130 size_t dma_bytes;
0131 };
0132
0133 struct mtk_base_afe_irq {
0134 const struct mtk_base_irq_data *irq_data;
0135 int irq_occupyed;
0136 };
0137
0138 struct mtk_base_afe_dai {
0139 struct snd_soc_dai_driver *dai_drivers;
0140 unsigned int num_dai_drivers;
0141
0142 const struct snd_kcontrol_new *controls;
0143 unsigned int num_controls;
0144 const struct snd_soc_dapm_widget *dapm_widgets;
0145 unsigned int num_dapm_widgets;
0146 const struct snd_soc_dapm_route *dapm_routes;
0147 unsigned int num_dapm_routes;
0148
0149 struct list_head list;
0150 };
0151
0152 #endif
0153