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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  *  skl-message.c - HDA DSP interface for FW registration, Pipe and Module
0004  *  configurations
0005  *
0006  *  Copyright (C) 2015 Intel Corp
0007  *  Author:Rafal Redzimski <rafal.f.redzimski@intel.com>
0008  *     Jeeja KP <jeeja.kp@intel.com>
0009  *  ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
0010  */
0011 
0012 #include <linux/slab.h>
0013 #include <linux/pci.h>
0014 #include <sound/core.h>
0015 #include <sound/pcm.h>
0016 #include <uapi/sound/skl-tplg-interface.h>
0017 #include "skl-sst-dsp.h"
0018 #include "cnl-sst-dsp.h"
0019 #include "skl-sst-ipc.h"
0020 #include "skl.h"
0021 #include "../common/sst-dsp.h"
0022 #include "../common/sst-dsp-priv.h"
0023 #include "skl-topology.h"
0024 
0025 static int skl_alloc_dma_buf(struct device *dev,
0026         struct snd_dma_buffer *dmab, size_t size)
0027 {
0028     return snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, dev, size, dmab);
0029 }
0030 
0031 static int skl_free_dma_buf(struct device *dev, struct snd_dma_buffer *dmab)
0032 {
0033     snd_dma_free_pages(dmab);
0034     return 0;
0035 }
0036 
0037 #define SKL_ASTATE_PARAM_ID 4
0038 
0039 void skl_dsp_set_astate_cfg(struct skl_dev *skl, u32 cnt, void *data)
0040 {
0041     struct skl_ipc_large_config_msg msg = {0};
0042 
0043     msg.large_param_id = SKL_ASTATE_PARAM_ID;
0044     msg.param_data_size = (cnt * sizeof(struct skl_astate_param) +
0045                 sizeof(cnt));
0046 
0047     skl_ipc_set_large_config(&skl->ipc, &msg, data);
0048 }
0049 
0050 static int skl_dsp_setup_spib(struct device *dev, unsigned int size,
0051                 int stream_tag, int enable)
0052 {
0053     struct hdac_bus *bus = dev_get_drvdata(dev);
0054     struct hdac_stream *stream = snd_hdac_get_stream(bus,
0055             SNDRV_PCM_STREAM_PLAYBACK, stream_tag);
0056     struct hdac_ext_stream *estream;
0057 
0058     if (!stream)
0059         return -EINVAL;
0060 
0061     estream = stream_to_hdac_ext_stream(stream);
0062     /* enable/disable SPIB for this hdac stream */
0063     snd_hdac_ext_stream_spbcap_enable(bus, enable, stream->index);
0064 
0065     /* set the spib value */
0066     snd_hdac_ext_stream_set_spib(bus, estream, size);
0067 
0068     return 0;
0069 }
0070 
0071 static int skl_dsp_prepare(struct device *dev, unsigned int format,
0072             unsigned int size, struct snd_dma_buffer *dmab)
0073 {
0074     struct hdac_bus *bus = dev_get_drvdata(dev);
0075     struct hdac_ext_stream *estream;
0076     struct hdac_stream *stream;
0077     struct snd_pcm_substream substream;
0078     int ret;
0079 
0080     if (!bus)
0081         return -ENODEV;
0082 
0083     memset(&substream, 0, sizeof(substream));
0084     substream.stream = SNDRV_PCM_STREAM_PLAYBACK;
0085 
0086     estream = snd_hdac_ext_stream_assign(bus, &substream,
0087                     HDAC_EXT_STREAM_TYPE_HOST);
0088     if (!estream)
0089         return -ENODEV;
0090 
0091     stream = hdac_stream(estream);
0092 
0093     /* assign decouple host dma channel */
0094     ret = snd_hdac_dsp_prepare(stream, format, size, dmab);
0095     if (ret < 0)
0096         return ret;
0097 
0098     skl_dsp_setup_spib(dev, size, stream->stream_tag, true);
0099 
0100     return stream->stream_tag;
0101 }
0102 
0103 static int skl_dsp_trigger(struct device *dev, bool start, int stream_tag)
0104 {
0105     struct hdac_bus *bus = dev_get_drvdata(dev);
0106     struct hdac_stream *stream;
0107 
0108     if (!bus)
0109         return -ENODEV;
0110 
0111     stream = snd_hdac_get_stream(bus,
0112         SNDRV_PCM_STREAM_PLAYBACK, stream_tag);
0113     if (!stream)
0114         return -EINVAL;
0115 
0116     snd_hdac_dsp_trigger(stream, start);
0117 
0118     return 0;
0119 }
0120 
0121 static int skl_dsp_cleanup(struct device *dev,
0122         struct snd_dma_buffer *dmab, int stream_tag)
0123 {
0124     struct hdac_bus *bus = dev_get_drvdata(dev);
0125     struct hdac_stream *stream;
0126     struct hdac_ext_stream *estream;
0127 
0128     if (!bus)
0129         return -ENODEV;
0130 
0131     stream = snd_hdac_get_stream(bus,
0132         SNDRV_PCM_STREAM_PLAYBACK, stream_tag);
0133     if (!stream)
0134         return -EINVAL;
0135 
0136     estream = stream_to_hdac_ext_stream(stream);
0137     skl_dsp_setup_spib(dev, 0, stream_tag, false);
0138     snd_hdac_ext_stream_release(estream, HDAC_EXT_STREAM_TYPE_HOST);
0139 
0140     snd_hdac_dsp_cleanup(stream, dmab);
0141 
0142     return 0;
0143 }
0144 
0145 static struct skl_dsp_loader_ops skl_get_loader_ops(void)
0146 {
0147     struct skl_dsp_loader_ops loader_ops;
0148 
0149     memset(&loader_ops, 0, sizeof(struct skl_dsp_loader_ops));
0150 
0151     loader_ops.alloc_dma_buf = skl_alloc_dma_buf;
0152     loader_ops.free_dma_buf = skl_free_dma_buf;
0153 
0154     return loader_ops;
0155 };
0156 
0157 static struct skl_dsp_loader_ops bxt_get_loader_ops(void)
0158 {
0159     struct skl_dsp_loader_ops loader_ops;
0160 
0161     memset(&loader_ops, 0, sizeof(loader_ops));
0162 
0163     loader_ops.alloc_dma_buf = skl_alloc_dma_buf;
0164     loader_ops.free_dma_buf = skl_free_dma_buf;
0165     loader_ops.prepare = skl_dsp_prepare;
0166     loader_ops.trigger = skl_dsp_trigger;
0167     loader_ops.cleanup = skl_dsp_cleanup;
0168 
0169     return loader_ops;
0170 };
0171 
0172 static const struct skl_dsp_ops dsp_ops[] = {
0173     {
0174         .id = 0x9d70,
0175         .num_cores = 2,
0176         .loader_ops = skl_get_loader_ops,
0177         .init = skl_sst_dsp_init,
0178         .init_fw = skl_sst_init_fw,
0179         .cleanup = skl_sst_dsp_cleanup
0180     },
0181     {
0182         .id = 0x9d71,
0183         .num_cores = 2,
0184         .loader_ops = skl_get_loader_ops,
0185         .init = skl_sst_dsp_init,
0186         .init_fw = skl_sst_init_fw,
0187         .cleanup = skl_sst_dsp_cleanup
0188     },
0189     {
0190         .id = 0x5a98,
0191         .num_cores = 2,
0192         .loader_ops = bxt_get_loader_ops,
0193         .init = bxt_sst_dsp_init,
0194         .init_fw = bxt_sst_init_fw,
0195         .cleanup = bxt_sst_dsp_cleanup
0196     },
0197     {
0198         .id = 0x3198,
0199         .num_cores = 2,
0200         .loader_ops = bxt_get_loader_ops,
0201         .init = bxt_sst_dsp_init,
0202         .init_fw = bxt_sst_init_fw,
0203         .cleanup = bxt_sst_dsp_cleanup
0204     },
0205     {
0206         .id = 0x9dc8,
0207         .num_cores = 4,
0208         .loader_ops = bxt_get_loader_ops,
0209         .init = cnl_sst_dsp_init,
0210         .init_fw = cnl_sst_init_fw,
0211         .cleanup = cnl_sst_dsp_cleanup
0212     },
0213     {
0214         .id = 0xa348,
0215         .num_cores = 4,
0216         .loader_ops = bxt_get_loader_ops,
0217         .init = cnl_sst_dsp_init,
0218         .init_fw = cnl_sst_init_fw,
0219         .cleanup = cnl_sst_dsp_cleanup
0220     },
0221     {
0222         .id = 0x02c8,
0223         .num_cores = 4,
0224         .loader_ops = bxt_get_loader_ops,
0225         .init = cnl_sst_dsp_init,
0226         .init_fw = cnl_sst_init_fw,
0227         .cleanup = cnl_sst_dsp_cleanup
0228     },
0229     {
0230         .id = 0x06c8,
0231         .num_cores = 4,
0232         .loader_ops = bxt_get_loader_ops,
0233         .init = cnl_sst_dsp_init,
0234         .init_fw = cnl_sst_init_fw,
0235         .cleanup = cnl_sst_dsp_cleanup
0236     },
0237 };
0238 
0239 const struct skl_dsp_ops *skl_get_dsp_ops(int pci_id)
0240 {
0241     int i;
0242 
0243     for (i = 0; i < ARRAY_SIZE(dsp_ops); i++) {
0244         if (dsp_ops[i].id == pci_id)
0245             return &dsp_ops[i];
0246     }
0247 
0248     return NULL;
0249 }
0250 
0251 int skl_init_dsp(struct skl_dev *skl)
0252 {
0253     void __iomem *mmio_base;
0254     struct hdac_bus *bus = skl_to_bus(skl);
0255     struct skl_dsp_loader_ops loader_ops;
0256     int irq = bus->irq;
0257     const struct skl_dsp_ops *ops;
0258     struct skl_dsp_cores *cores;
0259     int ret;
0260 
0261     /* enable ppcap interrupt */
0262     snd_hdac_ext_bus_ppcap_enable(bus, true);
0263     snd_hdac_ext_bus_ppcap_int_enable(bus, true);
0264 
0265     /* read the BAR of the ADSP MMIO */
0266     mmio_base = pci_ioremap_bar(skl->pci, 4);
0267     if (mmio_base == NULL) {
0268         dev_err(bus->dev, "ioremap error\n");
0269         return -ENXIO;
0270     }
0271 
0272     ops = skl_get_dsp_ops(skl->pci->device);
0273     if (!ops) {
0274         ret = -EIO;
0275         goto unmap_mmio;
0276     }
0277 
0278     loader_ops = ops->loader_ops();
0279     ret = ops->init(bus->dev, mmio_base, irq,
0280                 skl->fw_name, loader_ops,
0281                 &skl);
0282 
0283     if (ret < 0)
0284         goto unmap_mmio;
0285 
0286     skl->dsp_ops = ops;
0287     cores = &skl->cores;
0288     cores->count = ops->num_cores;
0289 
0290     cores->state = kcalloc(cores->count, sizeof(*cores->state), GFP_KERNEL);
0291     if (!cores->state) {
0292         ret = -ENOMEM;
0293         goto unmap_mmio;
0294     }
0295 
0296     cores->usage_count = kcalloc(cores->count, sizeof(*cores->usage_count),
0297                      GFP_KERNEL);
0298     if (!cores->usage_count) {
0299         ret = -ENOMEM;
0300         goto free_core_state;
0301     }
0302 
0303     dev_dbg(bus->dev, "dsp registration status=%d\n", ret);
0304 
0305     return 0;
0306 
0307 free_core_state:
0308     kfree(cores->state);
0309 
0310 unmap_mmio:
0311     iounmap(mmio_base);
0312 
0313     return ret;
0314 }
0315 
0316 int skl_free_dsp(struct skl_dev *skl)
0317 {
0318     struct hdac_bus *bus = skl_to_bus(skl);
0319 
0320     /* disable  ppcap interrupt */
0321     snd_hdac_ext_bus_ppcap_int_enable(bus, false);
0322 
0323     skl->dsp_ops->cleanup(bus->dev, skl);
0324 
0325     kfree(skl->cores.state);
0326     kfree(skl->cores.usage_count);
0327 
0328     if (skl->dsp->addr.lpe)
0329         iounmap(skl->dsp->addr.lpe);
0330 
0331     return 0;
0332 }
0333 
0334 /*
0335  * In the case of "suspend_active" i.e, the Audio IP being active
0336  * during system suspend, immediately excecute any pending D0i3 work
0337  * before suspending. This is needed for the IP to work in low power
0338  * mode during system suspend. In the case of normal suspend, cancel
0339  * any pending D0i3 work.
0340  */
0341 int skl_suspend_late_dsp(struct skl_dev *skl)
0342 {
0343     struct delayed_work *dwork;
0344 
0345     if (!skl)
0346         return 0;
0347 
0348     dwork = &skl->d0i3.work;
0349 
0350     if (dwork->work.func) {
0351         if (skl->supend_active)
0352             flush_delayed_work(dwork);
0353         else
0354             cancel_delayed_work_sync(dwork);
0355     }
0356 
0357     return 0;
0358 }
0359 
0360 int skl_suspend_dsp(struct skl_dev *skl)
0361 {
0362     struct hdac_bus *bus = skl_to_bus(skl);
0363     int ret;
0364 
0365     /* if ppcap is not supported return 0 */
0366     if (!bus->ppcap)
0367         return 0;
0368 
0369     ret = skl_dsp_sleep(skl->dsp);
0370     if (ret < 0)
0371         return ret;
0372 
0373     /* disable ppcap interrupt */
0374     snd_hdac_ext_bus_ppcap_int_enable(bus, false);
0375     snd_hdac_ext_bus_ppcap_enable(bus, false);
0376 
0377     return 0;
0378 }
0379 
0380 int skl_resume_dsp(struct skl_dev *skl)
0381 {
0382     struct hdac_bus *bus = skl_to_bus(skl);
0383     int ret;
0384 
0385     /* if ppcap is not supported return 0 */
0386     if (!bus->ppcap)
0387         return 0;
0388 
0389     /* enable ppcap interrupt */
0390     snd_hdac_ext_bus_ppcap_enable(bus, true);
0391     snd_hdac_ext_bus_ppcap_int_enable(bus, true);
0392 
0393     /* check if DSP 1st boot is done */
0394     if (skl->is_first_boot)
0395         return 0;
0396 
0397     /*
0398      * Disable dynamic clock and power gating during firmware
0399      * and library download
0400      */
0401     skl->enable_miscbdcge(skl->dev, false);
0402     skl->clock_power_gating(skl->dev, false);
0403 
0404     ret = skl_dsp_wake(skl->dsp);
0405     skl->enable_miscbdcge(skl->dev, true);
0406     skl->clock_power_gating(skl->dev, true);
0407     if (ret < 0)
0408         return ret;
0409 
0410     if (skl->cfg.astate_cfg != NULL) {
0411         skl_dsp_set_astate_cfg(skl, skl->cfg.astate_cfg->count,
0412                     skl->cfg.astate_cfg);
0413     }
0414     return ret;
0415 }
0416 
0417 enum skl_bitdepth skl_get_bit_depth(int params)
0418 {
0419     switch (params) {
0420     case 8:
0421         return SKL_DEPTH_8BIT;
0422 
0423     case 16:
0424         return SKL_DEPTH_16BIT;
0425 
0426     case 24:
0427         return SKL_DEPTH_24BIT;
0428 
0429     case 32:
0430         return SKL_DEPTH_32BIT;
0431 
0432     default:
0433         return SKL_DEPTH_INVALID;
0434 
0435     }
0436 }
0437 
0438 /*
0439  * Each module in DSP expects a base module configuration, which consists of
0440  * PCM format information, which we calculate in driver and resource values
0441  * which are read from widget information passed through topology binary
0442  * This is send when we create a module with INIT_INSTANCE IPC msg
0443  */
0444 static void skl_set_base_module_format(struct skl_dev *skl,
0445             struct skl_module_cfg *mconfig,
0446             struct skl_base_cfg *base_cfg)
0447 {
0448     struct skl_module *module = mconfig->module;
0449     struct skl_module_res *res = &module->resources[mconfig->res_idx];
0450     struct skl_module_iface *fmt = &module->formats[mconfig->fmt_idx];
0451     struct skl_module_fmt *format = &fmt->inputs[0].fmt;
0452 
0453     base_cfg->audio_fmt.number_of_channels = format->channels;
0454 
0455     base_cfg->audio_fmt.s_freq = format->s_freq;
0456     base_cfg->audio_fmt.bit_depth = format->bit_depth;
0457     base_cfg->audio_fmt.valid_bit_depth = format->valid_bit_depth;
0458     base_cfg->audio_fmt.ch_cfg = format->ch_cfg;
0459     base_cfg->audio_fmt.sample_type = format->sample_type;
0460 
0461     dev_dbg(skl->dev, "bit_depth=%x valid_bd=%x ch_config=%x\n",
0462             format->bit_depth, format->valid_bit_depth,
0463             format->ch_cfg);
0464 
0465     base_cfg->audio_fmt.channel_map = format->ch_map;
0466 
0467     base_cfg->audio_fmt.interleaving = format->interleaving_style;
0468 
0469     base_cfg->cpc = res->cpc;
0470     base_cfg->ibs = res->ibs;
0471     base_cfg->obs = res->obs;
0472     base_cfg->is_pages = res->is_pages;
0473 }
0474 
0475 static void fill_pin_params(struct skl_audio_data_format *pin_fmt,
0476                 struct skl_module_fmt *format)
0477 {
0478     pin_fmt->number_of_channels = format->channels;
0479     pin_fmt->s_freq = format->s_freq;
0480     pin_fmt->bit_depth = format->bit_depth;
0481     pin_fmt->valid_bit_depth = format->valid_bit_depth;
0482     pin_fmt->ch_cfg = format->ch_cfg;
0483     pin_fmt->sample_type = format->sample_type;
0484     pin_fmt->channel_map = format->ch_map;
0485     pin_fmt->interleaving = format->interleaving_style;
0486 }
0487 
0488 /*
0489  * Any module configuration begins with a base module configuration but
0490  * can be followed by a generic extension containing audio format for all
0491  * module's pins that are in use.
0492  */
0493 static void skl_set_base_ext_module_format(struct skl_dev *skl,
0494                        struct skl_module_cfg *mconfig,
0495                        struct skl_base_cfg_ext *base_cfg_ext)
0496 {
0497     struct skl_module *module = mconfig->module;
0498     struct skl_module_pin_resources *pin_res;
0499     struct skl_module_iface *fmt = &module->formats[mconfig->fmt_idx];
0500     struct skl_module_res *res = &module->resources[mconfig->res_idx];
0501     struct skl_module_fmt *format;
0502     struct skl_pin_format *pin_fmt;
0503     char *params;
0504     int i;
0505 
0506     base_cfg_ext->nr_input_pins = res->nr_input_pins;
0507     base_cfg_ext->nr_output_pins = res->nr_output_pins;
0508     base_cfg_ext->priv_param_length =
0509         mconfig->formats_config[SKL_PARAM_INIT].caps_size;
0510 
0511     for (i = 0; i < res->nr_input_pins; i++) {
0512         pin_res = &res->input[i];
0513         pin_fmt = &base_cfg_ext->pins_fmt[i];
0514 
0515         pin_fmt->pin_idx = pin_res->pin_index;
0516         pin_fmt->buf_size = pin_res->buf_size;
0517 
0518         format = &fmt->inputs[pin_res->pin_index].fmt;
0519         fill_pin_params(&pin_fmt->audio_fmt, format);
0520     }
0521 
0522     for (i = 0; i < res->nr_output_pins; i++) {
0523         pin_res = &res->output[i];
0524         pin_fmt = &base_cfg_ext->pins_fmt[res->nr_input_pins + i];
0525 
0526         pin_fmt->pin_idx = pin_res->pin_index;
0527         pin_fmt->buf_size = pin_res->buf_size;
0528 
0529         format = &fmt->outputs[pin_res->pin_index].fmt;
0530         fill_pin_params(&pin_fmt->audio_fmt, format);
0531     }
0532 
0533     if (!base_cfg_ext->priv_param_length)
0534         return;
0535 
0536     params = (char *)base_cfg_ext + sizeof(struct skl_base_cfg_ext);
0537     params += (base_cfg_ext->nr_input_pins + base_cfg_ext->nr_output_pins) *
0538           sizeof(struct skl_pin_format);
0539 
0540     memcpy(params, mconfig->formats_config[SKL_PARAM_INIT].caps,
0541            mconfig->formats_config[SKL_PARAM_INIT].caps_size);
0542 }
0543 
0544 /*
0545  * Copies copier capabilities into copier module and updates copier module
0546  * config size.
0547  */
0548 static void skl_copy_copier_caps(struct skl_module_cfg *mconfig,
0549                 struct skl_cpr_cfg *cpr_mconfig)
0550 {
0551     if (mconfig->formats_config[SKL_PARAM_INIT].caps_size == 0)
0552         return;
0553 
0554     memcpy(cpr_mconfig->gtw_cfg.config_data,
0555             mconfig->formats_config[SKL_PARAM_INIT].caps,
0556             mconfig->formats_config[SKL_PARAM_INIT].caps_size);
0557 
0558     cpr_mconfig->gtw_cfg.config_length =
0559             (mconfig->formats_config[SKL_PARAM_INIT].caps_size) / 4;
0560 }
0561 
0562 #define SKL_NON_GATEWAY_CPR_NODE_ID 0xFFFFFFFF
0563 /*
0564  * Calculate the gatewat settings required for copier module, type of
0565  * gateway and index of gateway to use
0566  */
0567 static u32 skl_get_node_id(struct skl_dev *skl,
0568             struct skl_module_cfg *mconfig)
0569 {
0570     union skl_connector_node_id node_id = {0};
0571     union skl_ssp_dma_node ssp_node  = {0};
0572     struct skl_pipe_params *params = mconfig->pipe->p_params;
0573 
0574     switch (mconfig->dev_type) {
0575     case SKL_DEVICE_BT:
0576         node_id.node.dma_type =
0577             (SKL_CONN_SOURCE == mconfig->hw_conn_type) ?
0578             SKL_DMA_I2S_LINK_OUTPUT_CLASS :
0579             SKL_DMA_I2S_LINK_INPUT_CLASS;
0580         node_id.node.vindex = params->host_dma_id +
0581                     (mconfig->vbus_id << 3);
0582         break;
0583 
0584     case SKL_DEVICE_I2S:
0585         node_id.node.dma_type =
0586             (SKL_CONN_SOURCE == mconfig->hw_conn_type) ?
0587             SKL_DMA_I2S_LINK_OUTPUT_CLASS :
0588             SKL_DMA_I2S_LINK_INPUT_CLASS;
0589         ssp_node.dma_node.time_slot_index = mconfig->time_slot;
0590         ssp_node.dma_node.i2s_instance = mconfig->vbus_id;
0591         node_id.node.vindex = ssp_node.val;
0592         break;
0593 
0594     case SKL_DEVICE_DMIC:
0595         node_id.node.dma_type = SKL_DMA_DMIC_LINK_INPUT_CLASS;
0596         node_id.node.vindex = mconfig->vbus_id +
0597                      (mconfig->time_slot);
0598         break;
0599 
0600     case SKL_DEVICE_HDALINK:
0601         node_id.node.dma_type =
0602             (SKL_CONN_SOURCE == mconfig->hw_conn_type) ?
0603             SKL_DMA_HDA_LINK_OUTPUT_CLASS :
0604             SKL_DMA_HDA_LINK_INPUT_CLASS;
0605         node_id.node.vindex = params->link_dma_id;
0606         break;
0607 
0608     case SKL_DEVICE_HDAHOST:
0609         node_id.node.dma_type =
0610             (SKL_CONN_SOURCE == mconfig->hw_conn_type) ?
0611             SKL_DMA_HDA_HOST_OUTPUT_CLASS :
0612             SKL_DMA_HDA_HOST_INPUT_CLASS;
0613         node_id.node.vindex = params->host_dma_id;
0614         break;
0615 
0616     default:
0617         node_id.val = 0xFFFFFFFF;
0618         break;
0619     }
0620 
0621     return node_id.val;
0622 }
0623 
0624 static void skl_setup_cpr_gateway_cfg(struct skl_dev *skl,
0625             struct skl_module_cfg *mconfig,
0626             struct skl_cpr_cfg *cpr_mconfig)
0627 {
0628     u32 dma_io_buf;
0629     struct skl_module_res *res;
0630     int res_idx = mconfig->res_idx;
0631 
0632     cpr_mconfig->gtw_cfg.node_id = skl_get_node_id(skl, mconfig);
0633 
0634     if (cpr_mconfig->gtw_cfg.node_id == SKL_NON_GATEWAY_CPR_NODE_ID) {
0635         cpr_mconfig->cpr_feature_mask = 0;
0636         return;
0637     }
0638 
0639     if (skl->nr_modules) {
0640         res = &mconfig->module->resources[mconfig->res_idx];
0641         cpr_mconfig->gtw_cfg.dma_buffer_size = res->dma_buffer_size;
0642         goto skip_buf_size_calc;
0643     } else {
0644         res = &mconfig->module->resources[res_idx];
0645     }
0646 
0647     switch (mconfig->hw_conn_type) {
0648     case SKL_CONN_SOURCE:
0649         if (mconfig->dev_type == SKL_DEVICE_HDAHOST)
0650             dma_io_buf =  res->ibs;
0651         else
0652             dma_io_buf =  res->obs;
0653         break;
0654 
0655     case SKL_CONN_SINK:
0656         if (mconfig->dev_type == SKL_DEVICE_HDAHOST)
0657             dma_io_buf =  res->obs;
0658         else
0659             dma_io_buf =  res->ibs;
0660         break;
0661 
0662     default:
0663         dev_warn(skl->dev, "wrong connection type: %d\n",
0664                 mconfig->hw_conn_type);
0665         return;
0666     }
0667 
0668     cpr_mconfig->gtw_cfg.dma_buffer_size =
0669                 mconfig->dma_buffer_size * dma_io_buf;
0670 
0671     /* fallback to 2ms default value */
0672     if (!cpr_mconfig->gtw_cfg.dma_buffer_size) {
0673         if (mconfig->hw_conn_type == SKL_CONN_SOURCE)
0674             cpr_mconfig->gtw_cfg.dma_buffer_size = 2 * res->obs;
0675         else
0676             cpr_mconfig->gtw_cfg.dma_buffer_size = 2 * res->ibs;
0677     }
0678 
0679 skip_buf_size_calc:
0680     cpr_mconfig->cpr_feature_mask = 0;
0681     cpr_mconfig->gtw_cfg.config_length  = 0;
0682 
0683     skl_copy_copier_caps(mconfig, cpr_mconfig);
0684 }
0685 
0686 #define DMA_CONTROL_ID 5
0687 #define DMA_I2S_BLOB_SIZE 21
0688 
0689 int skl_dsp_set_dma_control(struct skl_dev *skl, u32 *caps,
0690                 u32 caps_size, u32 node_id)
0691 {
0692     struct skl_dma_control *dma_ctrl;
0693     struct skl_ipc_large_config_msg msg = {0};
0694     int err = 0;
0695 
0696 
0697     /*
0698      * if blob size zero, then return
0699      */
0700     if (caps_size == 0)
0701         return 0;
0702 
0703     msg.large_param_id = DMA_CONTROL_ID;
0704     msg.param_data_size = sizeof(struct skl_dma_control) + caps_size;
0705 
0706     dma_ctrl = kzalloc(msg.param_data_size, GFP_KERNEL);
0707     if (dma_ctrl == NULL)
0708         return -ENOMEM;
0709 
0710     dma_ctrl->node_id = node_id;
0711 
0712     /*
0713      * NHLT blob may contain additional configs along with i2s blob.
0714      * firmware expects only the i2s blob size as the config_length.
0715      * So fix to i2s blob size.
0716      * size in dwords.
0717      */
0718     dma_ctrl->config_length = DMA_I2S_BLOB_SIZE;
0719 
0720     memcpy(dma_ctrl->config_data, caps, caps_size);
0721 
0722     err = skl_ipc_set_large_config(&skl->ipc, &msg, (u32 *)dma_ctrl);
0723 
0724     kfree(dma_ctrl);
0725     return err;
0726 }
0727 EXPORT_SYMBOL_GPL(skl_dsp_set_dma_control);
0728 
0729 static void skl_setup_out_format(struct skl_dev *skl,
0730             struct skl_module_cfg *mconfig,
0731             struct skl_audio_data_format *out_fmt)
0732 {
0733     struct skl_module *module = mconfig->module;
0734     struct skl_module_iface *fmt = &module->formats[mconfig->fmt_idx];
0735     struct skl_module_fmt *format = &fmt->outputs[0].fmt;
0736 
0737     out_fmt->number_of_channels = (u8)format->channels;
0738     out_fmt->s_freq = format->s_freq;
0739     out_fmt->bit_depth = format->bit_depth;
0740     out_fmt->valid_bit_depth = format->valid_bit_depth;
0741     out_fmt->ch_cfg = format->ch_cfg;
0742 
0743     out_fmt->channel_map = format->ch_map;
0744     out_fmt->interleaving = format->interleaving_style;
0745     out_fmt->sample_type = format->sample_type;
0746 
0747     dev_dbg(skl->dev, "copier out format chan=%d fre=%d bitdepth=%d\n",
0748         out_fmt->number_of_channels, format->s_freq, format->bit_depth);
0749 }
0750 
0751 /*
0752  * DSP needs SRC module for frequency conversion, SRC takes base module
0753  * configuration and the target frequency as extra parameter passed as src
0754  * config
0755  */
0756 static void skl_set_src_format(struct skl_dev *skl,
0757             struct skl_module_cfg *mconfig,
0758             struct skl_src_module_cfg *src_mconfig)
0759 {
0760     struct skl_module *module = mconfig->module;
0761     struct skl_module_iface *iface = &module->formats[mconfig->fmt_idx];
0762     struct skl_module_fmt *fmt = &iface->outputs[0].fmt;
0763 
0764     skl_set_base_module_format(skl, mconfig,
0765         (struct skl_base_cfg *)src_mconfig);
0766 
0767     src_mconfig->src_cfg = fmt->s_freq;
0768 }
0769 
0770 /*
0771  * DSP needs updown module to do channel conversion. updown module take base
0772  * module configuration and channel configuration
0773  * It also take coefficients and now we have defaults applied here
0774  */
0775 static void skl_set_updown_mixer_format(struct skl_dev *skl,
0776             struct skl_module_cfg *mconfig,
0777             struct skl_up_down_mixer_cfg *mixer_mconfig)
0778 {
0779     struct skl_module *module = mconfig->module;
0780     struct skl_module_iface *iface = &module->formats[mconfig->fmt_idx];
0781     struct skl_module_fmt *fmt = &iface->outputs[0].fmt;
0782 
0783     skl_set_base_module_format(skl, mconfig,
0784         (struct skl_base_cfg *)mixer_mconfig);
0785     mixer_mconfig->out_ch_cfg = fmt->ch_cfg;
0786     mixer_mconfig->ch_map = fmt->ch_map;
0787 }
0788 
0789 /*
0790  * 'copier' is DSP internal module which copies data from Host DMA (HDA host
0791  * dma) or link (hda link, SSP, PDM)
0792  * Here we calculate the copier module parameters, like PCM format, output
0793  * format, gateway settings
0794  * copier_module_config is sent as input buffer with INIT_INSTANCE IPC msg
0795  */
0796 static void skl_set_copier_format(struct skl_dev *skl,
0797             struct skl_module_cfg *mconfig,
0798             struct skl_cpr_cfg *cpr_mconfig)
0799 {
0800     struct skl_audio_data_format *out_fmt = &cpr_mconfig->out_fmt;
0801     struct skl_base_cfg *base_cfg = (struct skl_base_cfg *)cpr_mconfig;
0802 
0803     skl_set_base_module_format(skl, mconfig, base_cfg);
0804 
0805     skl_setup_out_format(skl, mconfig, out_fmt);
0806     skl_setup_cpr_gateway_cfg(skl, mconfig, cpr_mconfig);
0807 }
0808 
0809 /*
0810  * Mic select module allows selecting one or many input channels, thus
0811  * acting as a demux.
0812  *
0813  * Mic select module take base module configuration and out-format
0814  * configuration
0815  */
0816 static void skl_set_base_outfmt_format(struct skl_dev *skl,
0817             struct skl_module_cfg *mconfig,
0818             struct skl_base_outfmt_cfg *base_outfmt_mcfg)
0819 {
0820     struct skl_audio_data_format *out_fmt = &base_outfmt_mcfg->out_fmt;
0821     struct skl_base_cfg *base_cfg =
0822                 (struct skl_base_cfg *)base_outfmt_mcfg;
0823 
0824     skl_set_base_module_format(skl, mconfig, base_cfg);
0825     skl_setup_out_format(skl, mconfig, out_fmt);
0826 }
0827 
0828 static u16 skl_get_module_param_size(struct skl_dev *skl,
0829             struct skl_module_cfg *mconfig)
0830 {
0831     struct skl_module_res *res;
0832     struct skl_module *module = mconfig->module;
0833     u16 param_size;
0834 
0835     switch (mconfig->m_type) {
0836     case SKL_MODULE_TYPE_COPIER:
0837         param_size = sizeof(struct skl_cpr_cfg);
0838         param_size += mconfig->formats_config[SKL_PARAM_INIT].caps_size;
0839         return param_size;
0840 
0841     case SKL_MODULE_TYPE_SRCINT:
0842         return sizeof(struct skl_src_module_cfg);
0843 
0844     case SKL_MODULE_TYPE_UPDWMIX:
0845         return sizeof(struct skl_up_down_mixer_cfg);
0846 
0847     case SKL_MODULE_TYPE_BASE_OUTFMT:
0848     case SKL_MODULE_TYPE_MIC_SELECT:
0849         return sizeof(struct skl_base_outfmt_cfg);
0850 
0851     case SKL_MODULE_TYPE_MIXER:
0852     case SKL_MODULE_TYPE_KPB:
0853         return sizeof(struct skl_base_cfg);
0854 
0855     case SKL_MODULE_TYPE_ALGO:
0856     default:
0857         res = &module->resources[mconfig->res_idx];
0858 
0859         param_size = sizeof(struct skl_base_cfg) + sizeof(struct skl_base_cfg_ext);
0860         param_size += (res->nr_input_pins + res->nr_output_pins) *
0861                   sizeof(struct skl_pin_format);
0862         param_size += mconfig->formats_config[SKL_PARAM_INIT].caps_size;
0863 
0864         return param_size;
0865     }
0866 
0867     return 0;
0868 }
0869 
0870 /*
0871  * DSP firmware supports various modules like copier, SRC, updown etc.
0872  * These modules required various parameters to be calculated and sent for
0873  * the module initialization to DSP. By default a generic module needs only
0874  * base module format configuration
0875  */
0876 
0877 static int skl_set_module_format(struct skl_dev *skl,
0878             struct skl_module_cfg *module_config,
0879             u16 *module_config_size,
0880             void **param_data)
0881 {
0882     u16 param_size;
0883 
0884     param_size  = skl_get_module_param_size(skl, module_config);
0885 
0886     *param_data = kzalloc(param_size, GFP_KERNEL);
0887     if (NULL == *param_data)
0888         return -ENOMEM;
0889 
0890     *module_config_size = param_size;
0891 
0892     switch (module_config->m_type) {
0893     case SKL_MODULE_TYPE_COPIER:
0894         skl_set_copier_format(skl, module_config, *param_data);
0895         break;
0896 
0897     case SKL_MODULE_TYPE_SRCINT:
0898         skl_set_src_format(skl, module_config, *param_data);
0899         break;
0900 
0901     case SKL_MODULE_TYPE_UPDWMIX:
0902         skl_set_updown_mixer_format(skl, module_config, *param_data);
0903         break;
0904 
0905     case SKL_MODULE_TYPE_BASE_OUTFMT:
0906     case SKL_MODULE_TYPE_MIC_SELECT:
0907         skl_set_base_outfmt_format(skl, module_config, *param_data);
0908         break;
0909 
0910     case SKL_MODULE_TYPE_MIXER:
0911     case SKL_MODULE_TYPE_KPB:
0912         skl_set_base_module_format(skl, module_config, *param_data);
0913         break;
0914 
0915     case SKL_MODULE_TYPE_ALGO:
0916     default:
0917         skl_set_base_module_format(skl, module_config, *param_data);
0918         skl_set_base_ext_module_format(skl, module_config,
0919                            *param_data +
0920                            sizeof(struct skl_base_cfg));
0921         break;
0922     }
0923 
0924     dev_dbg(skl->dev, "Module type=%d id=%d config size: %d bytes\n",
0925             module_config->m_type, module_config->id.module_id,
0926             param_size);
0927     print_hex_dump_debug("Module params:", DUMP_PREFIX_OFFSET, 8, 4,
0928             *param_data, param_size, false);
0929     return 0;
0930 }
0931 
0932 static int skl_get_queue_index(struct skl_module_pin *mpin,
0933                 struct skl_module_inst_id id, int max)
0934 {
0935     int i;
0936 
0937     for (i = 0; i < max; i++)  {
0938         if (mpin[i].id.module_id == id.module_id &&
0939             mpin[i].id.instance_id == id.instance_id)
0940             return i;
0941     }
0942 
0943     return -EINVAL;
0944 }
0945 
0946 /*
0947  * Allocates queue for each module.
0948  * if dynamic, the pin_index is allocated 0 to max_pin.
0949  * In static, the pin_index is fixed based on module_id and instance id
0950  */
0951 static int skl_alloc_queue(struct skl_module_pin *mpin,
0952             struct skl_module_cfg *tgt_cfg, int max)
0953 {
0954     int i;
0955     struct skl_module_inst_id id = tgt_cfg->id;
0956     /*
0957      * if pin in dynamic, find first free pin
0958      * otherwise find match module and instance id pin as topology will
0959      * ensure a unique pin is assigned to this so no need to
0960      * allocate/free
0961      */
0962     for (i = 0; i < max; i++)  {
0963         if (mpin[i].is_dynamic) {
0964             if (!mpin[i].in_use &&
0965                 mpin[i].pin_state == SKL_PIN_UNBIND) {
0966 
0967                 mpin[i].in_use = true;
0968                 mpin[i].id.module_id = id.module_id;
0969                 mpin[i].id.instance_id = id.instance_id;
0970                 mpin[i].id.pvt_id = id.pvt_id;
0971                 mpin[i].tgt_mcfg = tgt_cfg;
0972                 return i;
0973             }
0974         } else {
0975             if (mpin[i].id.module_id == id.module_id &&
0976                 mpin[i].id.instance_id == id.instance_id &&
0977                 mpin[i].pin_state == SKL_PIN_UNBIND) {
0978 
0979                 mpin[i].tgt_mcfg = tgt_cfg;
0980                 return i;
0981             }
0982         }
0983     }
0984 
0985     return -EINVAL;
0986 }
0987 
0988 static void skl_free_queue(struct skl_module_pin *mpin, int q_index)
0989 {
0990     if (mpin[q_index].is_dynamic) {
0991         mpin[q_index].in_use = false;
0992         mpin[q_index].id.module_id = 0;
0993         mpin[q_index].id.instance_id = 0;
0994         mpin[q_index].id.pvt_id = 0;
0995     }
0996     mpin[q_index].pin_state = SKL_PIN_UNBIND;
0997     mpin[q_index].tgt_mcfg = NULL;
0998 }
0999 
1000 /* Module state will be set to unint, if all the out pin state is UNBIND */
1001 
1002 static void skl_clear_module_state(struct skl_module_pin *mpin, int max,
1003                         struct skl_module_cfg *mcfg)
1004 {
1005     int i;
1006     bool found = false;
1007 
1008     for (i = 0; i < max; i++)  {
1009         if (mpin[i].pin_state == SKL_PIN_UNBIND)
1010             continue;
1011         found = true;
1012         break;
1013     }
1014 
1015     if (!found)
1016         mcfg->m_state = SKL_MODULE_INIT_DONE;
1017     return;
1018 }
1019 
1020 /*
1021  * A module needs to be instanataited in DSP. A mdoule is present in a
1022  * collection of module referred as a PIPE.
1023  * We first calculate the module format, based on module type and then
1024  * invoke the DSP by sending IPC INIT_INSTANCE using ipc helper
1025  */
1026 int skl_init_module(struct skl_dev *skl,
1027             struct skl_module_cfg *mconfig)
1028 {
1029     u16 module_config_size = 0;
1030     void *param_data = NULL;
1031     int ret;
1032     struct skl_ipc_init_instance_msg msg;
1033 
1034     dev_dbg(skl->dev, "%s: module_id = %d instance=%d\n", __func__,
1035          mconfig->id.module_id, mconfig->id.pvt_id);
1036 
1037     if (mconfig->pipe->state != SKL_PIPE_CREATED) {
1038         dev_err(skl->dev, "Pipe not created state= %d pipe_id= %d\n",
1039                  mconfig->pipe->state, mconfig->pipe->ppl_id);
1040         return -EIO;
1041     }
1042 
1043     ret = skl_set_module_format(skl, mconfig,
1044             &module_config_size, &param_data);
1045     if (ret < 0) {
1046         dev_err(skl->dev, "Failed to set module format ret=%d\n", ret);
1047         return ret;
1048     }
1049 
1050     msg.module_id = mconfig->id.module_id;
1051     msg.instance_id = mconfig->id.pvt_id;
1052     msg.ppl_instance_id = mconfig->pipe->ppl_id;
1053     msg.param_data_size = module_config_size;
1054     msg.core_id = mconfig->core_id;
1055     msg.domain = mconfig->domain;
1056 
1057     ret = skl_ipc_init_instance(&skl->ipc, &msg, param_data);
1058     if (ret < 0) {
1059         dev_err(skl->dev, "Failed to init instance ret=%d\n", ret);
1060         kfree(param_data);
1061         return ret;
1062     }
1063     mconfig->m_state = SKL_MODULE_INIT_DONE;
1064     kfree(param_data);
1065     return ret;
1066 }
1067 
1068 static void skl_dump_bind_info(struct skl_dev *skl, struct skl_module_cfg
1069     *src_module, struct skl_module_cfg *dst_module)
1070 {
1071     dev_dbg(skl->dev, "%s: src module_id = %d  src_instance=%d\n",
1072         __func__, src_module->id.module_id, src_module->id.pvt_id);
1073     dev_dbg(skl->dev, "%s: dst_module=%d dst_instance=%d\n", __func__,
1074          dst_module->id.module_id, dst_module->id.pvt_id);
1075 
1076     dev_dbg(skl->dev, "src_module state = %d dst module state = %d\n",
1077         src_module->m_state, dst_module->m_state);
1078 }
1079 
1080 /*
1081  * On module freeup, we need to unbind the module with modules
1082  * it is already bind.
1083  * Find the pin allocated and unbind then using bind_unbind IPC
1084  */
1085 int skl_unbind_modules(struct skl_dev *skl,
1086             struct skl_module_cfg *src_mcfg,
1087             struct skl_module_cfg *dst_mcfg)
1088 {
1089     int ret;
1090     struct skl_ipc_bind_unbind_msg msg;
1091     struct skl_module_inst_id src_id = src_mcfg->id;
1092     struct skl_module_inst_id dst_id = dst_mcfg->id;
1093     int in_max = dst_mcfg->module->max_input_pins;
1094     int out_max = src_mcfg->module->max_output_pins;
1095     int src_index, dst_index, src_pin_state, dst_pin_state;
1096 
1097     skl_dump_bind_info(skl, src_mcfg, dst_mcfg);
1098 
1099     /* get src queue index */
1100     src_index = skl_get_queue_index(src_mcfg->m_out_pin, dst_id, out_max);
1101     if (src_index < 0)
1102         return 0;
1103 
1104     msg.src_queue = src_index;
1105 
1106     /* get dst queue index */
1107     dst_index  = skl_get_queue_index(dst_mcfg->m_in_pin, src_id, in_max);
1108     if (dst_index < 0)
1109         return 0;
1110 
1111     msg.dst_queue = dst_index;
1112 
1113     src_pin_state = src_mcfg->m_out_pin[src_index].pin_state;
1114     dst_pin_state = dst_mcfg->m_in_pin[dst_index].pin_state;
1115 
1116     if (src_pin_state != SKL_PIN_BIND_DONE ||
1117         dst_pin_state != SKL_PIN_BIND_DONE)
1118         return 0;
1119 
1120     msg.module_id = src_mcfg->id.module_id;
1121     msg.instance_id = src_mcfg->id.pvt_id;
1122     msg.dst_module_id = dst_mcfg->id.module_id;
1123     msg.dst_instance_id = dst_mcfg->id.pvt_id;
1124     msg.bind = false;
1125 
1126     ret = skl_ipc_bind_unbind(&skl->ipc, &msg);
1127     if (!ret) {
1128         /* free queue only if unbind is success */
1129         skl_free_queue(src_mcfg->m_out_pin, src_index);
1130         skl_free_queue(dst_mcfg->m_in_pin, dst_index);
1131 
1132         /*
1133          * check only if src module bind state, bind is
1134          * always from src -> sink
1135          */
1136         skl_clear_module_state(src_mcfg->m_out_pin, out_max, src_mcfg);
1137     }
1138 
1139     return ret;
1140 }
1141 
1142 #define CPR_SINK_FMT_PARAM_ID 2
1143 
1144 /*
1145  * Once a module is instantiated it need to be 'bind' with other modules in
1146  * the pipeline. For binding we need to find the module pins which are bind
1147  * together
1148  * This function finds the pins and then sends bund_unbind IPC message to
1149  * DSP using IPC helper
1150  */
1151 int skl_bind_modules(struct skl_dev *skl,
1152             struct skl_module_cfg *src_mcfg,
1153             struct skl_module_cfg *dst_mcfg)
1154 {
1155     int ret = 0;
1156     struct skl_ipc_bind_unbind_msg msg;
1157     int in_max = dst_mcfg->module->max_input_pins;
1158     int out_max = src_mcfg->module->max_output_pins;
1159     int src_index, dst_index;
1160     struct skl_module_fmt *format;
1161     struct skl_cpr_pin_fmt pin_fmt;
1162     struct skl_module *module;
1163     struct skl_module_iface *fmt;
1164 
1165     skl_dump_bind_info(skl, src_mcfg, dst_mcfg);
1166 
1167     if (src_mcfg->m_state < SKL_MODULE_INIT_DONE ||
1168         dst_mcfg->m_state < SKL_MODULE_INIT_DONE)
1169         return 0;
1170 
1171     src_index = skl_alloc_queue(src_mcfg->m_out_pin, dst_mcfg, out_max);
1172     if (src_index < 0)
1173         return -EINVAL;
1174 
1175     msg.src_queue = src_index;
1176     dst_index = skl_alloc_queue(dst_mcfg->m_in_pin, src_mcfg, in_max);
1177     if (dst_index < 0) {
1178         skl_free_queue(src_mcfg->m_out_pin, src_index);
1179         return -EINVAL;
1180     }
1181 
1182     /*
1183      * Copier module requires the separate large_config_set_ipc to
1184      * configure the pins other than 0
1185      */
1186     if (src_mcfg->m_type == SKL_MODULE_TYPE_COPIER && src_index > 0) {
1187         pin_fmt.sink_id = src_index;
1188         module = src_mcfg->module;
1189         fmt = &module->formats[src_mcfg->fmt_idx];
1190 
1191         /* Input fmt is same as that of src module input cfg */
1192         format = &fmt->inputs[0].fmt;
1193         fill_pin_params(&(pin_fmt.src_fmt), format);
1194 
1195         format = &fmt->outputs[src_index].fmt;
1196         fill_pin_params(&(pin_fmt.dst_fmt), format);
1197         ret = skl_set_module_params(skl, (void *)&pin_fmt,
1198                     sizeof(struct skl_cpr_pin_fmt),
1199                     CPR_SINK_FMT_PARAM_ID, src_mcfg);
1200 
1201         if (ret < 0)
1202             goto out;
1203     }
1204 
1205     msg.dst_queue = dst_index;
1206 
1207     dev_dbg(skl->dev, "src queue = %d dst queue =%d\n",
1208              msg.src_queue, msg.dst_queue);
1209 
1210     msg.module_id = src_mcfg->id.module_id;
1211     msg.instance_id = src_mcfg->id.pvt_id;
1212     msg.dst_module_id = dst_mcfg->id.module_id;
1213     msg.dst_instance_id = dst_mcfg->id.pvt_id;
1214     msg.bind = true;
1215 
1216     ret = skl_ipc_bind_unbind(&skl->ipc, &msg);
1217 
1218     if (!ret) {
1219         src_mcfg->m_state = SKL_MODULE_BIND_DONE;
1220         src_mcfg->m_out_pin[src_index].pin_state = SKL_PIN_BIND_DONE;
1221         dst_mcfg->m_in_pin[dst_index].pin_state = SKL_PIN_BIND_DONE;
1222         return ret;
1223     }
1224 out:
1225     /* error case , if IPC fails, clear the queue index */
1226     skl_free_queue(src_mcfg->m_out_pin, src_index);
1227     skl_free_queue(dst_mcfg->m_in_pin, dst_index);
1228 
1229     return ret;
1230 }
1231 
1232 static int skl_set_pipe_state(struct skl_dev *skl, struct skl_pipe *pipe,
1233     enum skl_ipc_pipeline_state state)
1234 {
1235     dev_dbg(skl->dev, "%s: pipe_state = %d\n", __func__, state);
1236 
1237     return skl_ipc_set_pipeline_state(&skl->ipc, pipe->ppl_id, state);
1238 }
1239 
1240 /*
1241  * A pipeline is a collection of modules. Before a module in instantiated a
1242  * pipeline needs to be created for it.
1243  * This function creates pipeline, by sending create pipeline IPC messages
1244  * to FW
1245  */
1246 int skl_create_pipeline(struct skl_dev *skl, struct skl_pipe *pipe)
1247 {
1248     int ret;
1249 
1250     dev_dbg(skl->dev, "%s: pipe_id = %d\n", __func__, pipe->ppl_id);
1251 
1252     ret = skl_ipc_create_pipeline(&skl->ipc, pipe->memory_pages,
1253                 pipe->pipe_priority, pipe->ppl_id,
1254                 pipe->lp_mode);
1255     if (ret < 0) {
1256         dev_err(skl->dev, "Failed to create pipeline\n");
1257         return ret;
1258     }
1259 
1260     pipe->state = SKL_PIPE_CREATED;
1261 
1262     return 0;
1263 }
1264 
1265 /*
1266  * A pipeline needs to be deleted on cleanup. If a pipeline is running,
1267  * then pause it first. Before actual deletion, pipeline should enter
1268  * reset state. Finish the procedure by sending delete pipeline IPC.
1269  * DSP will stop the DMA engines and release resources
1270  */
1271 int skl_delete_pipe(struct skl_dev *skl, struct skl_pipe *pipe)
1272 {
1273     int ret;
1274 
1275     dev_dbg(skl->dev, "%s: pipe = %d\n", __func__, pipe->ppl_id);
1276 
1277     /* If pipe was not created in FW, do not try to delete it */
1278     if (pipe->state < SKL_PIPE_CREATED)
1279         return 0;
1280 
1281     /* If pipe is started, do stop the pipe in FW. */
1282     if (pipe->state >= SKL_PIPE_STARTED) {
1283         ret = skl_set_pipe_state(skl, pipe, PPL_PAUSED);
1284         if (ret < 0) {
1285             dev_err(skl->dev, "Failed to stop pipeline\n");
1286             return ret;
1287         }
1288 
1289         pipe->state = SKL_PIPE_PAUSED;
1290     }
1291 
1292     /* reset pipe state before deletion */
1293     ret = skl_set_pipe_state(skl, pipe, PPL_RESET);
1294     if (ret < 0) {
1295         dev_err(skl->dev, "Failed to reset pipe ret=%d\n", ret);
1296         return ret;
1297     }
1298 
1299     pipe->state = SKL_PIPE_RESET;
1300 
1301     ret = skl_ipc_delete_pipeline(&skl->ipc, pipe->ppl_id);
1302     if (ret < 0) {
1303         dev_err(skl->dev, "Failed to delete pipeline\n");
1304         return ret;
1305     }
1306 
1307     pipe->state = SKL_PIPE_INVALID;
1308 
1309     return ret;
1310 }
1311 
1312 /*
1313  * A pipeline is also a scheduling entity in DSP which can be run, stopped
1314  * For processing data the pipe need to be run by sending IPC set pipe state
1315  * to DSP
1316  */
1317 int skl_run_pipe(struct skl_dev *skl, struct skl_pipe *pipe)
1318 {
1319     int ret;
1320 
1321     dev_dbg(skl->dev, "%s: pipe = %d\n", __func__, pipe->ppl_id);
1322 
1323     /* If pipe was not created in FW, do not try to pause or delete */
1324     if (pipe->state < SKL_PIPE_CREATED)
1325         return 0;
1326 
1327     /* Pipe has to be paused before it is started */
1328     ret = skl_set_pipe_state(skl, pipe, PPL_PAUSED);
1329     if (ret < 0) {
1330         dev_err(skl->dev, "Failed to pause pipe\n");
1331         return ret;
1332     }
1333 
1334     pipe->state = SKL_PIPE_PAUSED;
1335 
1336     ret = skl_set_pipe_state(skl, pipe, PPL_RUNNING);
1337     if (ret < 0) {
1338         dev_err(skl->dev, "Failed to start pipe\n");
1339         return ret;
1340     }
1341 
1342     pipe->state = SKL_PIPE_STARTED;
1343 
1344     return 0;
1345 }
1346 
1347 /*
1348  * Stop the pipeline by sending set pipe state IPC
1349  * DSP doesnt implement stop so we always send pause message
1350  */
1351 int skl_stop_pipe(struct skl_dev *skl, struct skl_pipe *pipe)
1352 {
1353     int ret;
1354 
1355     dev_dbg(skl->dev, "In %s pipe=%d\n", __func__, pipe->ppl_id);
1356 
1357     /* If pipe was not created in FW, do not try to pause or delete */
1358     if (pipe->state < SKL_PIPE_PAUSED)
1359         return 0;
1360 
1361     ret = skl_set_pipe_state(skl, pipe, PPL_PAUSED);
1362     if (ret < 0) {
1363         dev_dbg(skl->dev, "Failed to stop pipe\n");
1364         return ret;
1365     }
1366 
1367     pipe->state = SKL_PIPE_PAUSED;
1368 
1369     return 0;
1370 }
1371 
1372 /*
1373  * Reset the pipeline by sending set pipe state IPC this will reset the DMA
1374  * from the DSP side
1375  */
1376 int skl_reset_pipe(struct skl_dev *skl, struct skl_pipe *pipe)
1377 {
1378     int ret;
1379 
1380     /* If pipe was not created in FW, do not try to pause or delete */
1381     if (pipe->state < SKL_PIPE_PAUSED)
1382         return 0;
1383 
1384     ret = skl_set_pipe_state(skl, pipe, PPL_RESET);
1385     if (ret < 0) {
1386         dev_dbg(skl->dev, "Failed to reset pipe ret=%d\n", ret);
1387         return ret;
1388     }
1389 
1390     pipe->state = SKL_PIPE_RESET;
1391 
1392     return 0;
1393 }
1394 
1395 /* Algo parameter set helper function */
1396 int skl_set_module_params(struct skl_dev *skl, u32 *params, int size,
1397                 u32 param_id, struct skl_module_cfg *mcfg)
1398 {
1399     struct skl_ipc_large_config_msg msg;
1400 
1401     msg.module_id = mcfg->id.module_id;
1402     msg.instance_id = mcfg->id.pvt_id;
1403     msg.param_data_size = size;
1404     msg.large_param_id = param_id;
1405 
1406     return skl_ipc_set_large_config(&skl->ipc, &msg, params);
1407 }
1408 
1409 int skl_get_module_params(struct skl_dev *skl, u32 *params, int size,
1410               u32 param_id, struct skl_module_cfg *mcfg)
1411 {
1412     struct skl_ipc_large_config_msg msg;
1413     size_t bytes = size;
1414 
1415     msg.module_id = mcfg->id.module_id;
1416     msg.instance_id = mcfg->id.pvt_id;
1417     msg.param_data_size = size;
1418     msg.large_param_id = param_id;
1419 
1420     return skl_ipc_get_large_config(&skl->ipc, &msg, &params, &bytes);
1421 }
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