intel/common/soc-acpi-intel-tgl-match.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * soc-acpi-intel-tgl-match.c - tables and support for TGL ACPI enumeration.
0004  *
0005  * Copyright (c) 2019, Intel Corporation.
0006  *
0007  */
0008
0009 #include <sound/soc-acpi.h>
0010 #include <sound/soc-acpi-intel-match.h>
0011 #include "soc-acpi-intel-sdw-mockup-match.h"
0012
0013 static const struct snd_soc_acpi_codecs essx_83x6 = {
0014     .num_codecs = 3,
0015     .codecs = { "ESSX8316", "ESSX8326", "ESSX8336"},
0016 };
0017
0018 static const struct snd_soc_acpi_codecs tgl_codecs = {
0019     .num_codecs = 1,
0020     .codecs = {"MX98357A"}
0021 };
0022
0023 static const struct snd_soc_acpi_endpoint single_endpoint = {
0024     .num = 0,
0025     .aggregated = 0,
0026     .group_position = 0,
0027     .group_id = 0,
0028 };
0029
0030 static const struct snd_soc_acpi_endpoint spk_l_endpoint = {
0031     .num = 0,
0032     .aggregated = 1,
0033     .group_position = 0,
0034     .group_id = 1,
0035 };
0036
0037 static const struct snd_soc_acpi_endpoint spk_r_endpoint = {
0038     .num = 0,
0039     .aggregated = 1,
0040     .group_position = 1,
0041     .group_id = 1,
0042 };
0043
0044 static const struct snd_soc_acpi_adr_device rt711_0_adr[] = {
0045     {
0046         .adr = 0x000020025D071100ull,
0047         .num_endpoints = 1,
0048         .endpoints = &single_endpoint,
0049         .name_prefix = "rt711"
0050     }
0051 };
0052
0053 static const struct snd_soc_acpi_adr_device rt711_1_adr[] = {
0054     {
0055         .adr = 0x000120025D071100ull,
0056         .num_endpoints = 1,
0057         .endpoints = &single_endpoint,
0058         .name_prefix = "rt711"
0059     }
0060 };
0061
0062 static const struct snd_soc_acpi_adr_device rt1308_1_dual_adr[] = {
0063     {
0064         .adr = 0x000120025D130800ull,
0065         .num_endpoints = 1,
0066         .endpoints = &spk_l_endpoint,
0067         .name_prefix = "rt1308-1"
0068     },
0069     {
0070         .adr = 0x000122025D130800ull,
0071         .num_endpoints = 1,
0072         .endpoints = &spk_r_endpoint,
0073         .name_prefix = "rt1308-2"
0074     }
0075 };
0076
0077 static const struct snd_soc_acpi_adr_device rt1308_1_single_adr[] = {
0078     {
0079         .adr = 0x000120025D130800ull,
0080         .num_endpoints = 1,
0081         .endpoints = &single_endpoint,
0082         .name_prefix = "rt1308-1"
0083     }
0084 };
0085
0086 static const struct snd_soc_acpi_adr_device rt1308_2_single_adr[] = {
0087     {
0088         .adr = 0x000220025D130800ull,
0089         .num_endpoints = 1,
0090         .endpoints = &single_endpoint,
0091         .name_prefix = "rt1308-1"
0092     }
0093 };
0094
0095 static const struct snd_soc_acpi_adr_device rt1308_1_group1_adr[] = {
0096     {
0097         .adr = 0x000120025D130800ull,
0098         .num_endpoints = 1,
0099         .endpoints = &spk_l_endpoint,
0100         .name_prefix = "rt1308-1"
0101     }
0102 };
0103
0104 static const struct snd_soc_acpi_adr_device rt1308_2_group1_adr[] = {
0105     {
0106         .adr = 0x000220025D130800ull,
0107         .num_endpoints = 1,
0108         .endpoints = &spk_r_endpoint,
0109         .name_prefix = "rt1308-2"
0110     }
0111 };
0112
0113 static const struct snd_soc_acpi_adr_device rt715_0_adr[] = {
0114     {
0115         .adr = 0x000021025D071500ull,
0116         .num_endpoints = 1,
0117         .endpoints = &single_endpoint,
0118         .name_prefix = "rt715"
0119     }
0120 };
0121
0122 static const struct snd_soc_acpi_adr_device rt715_3_adr[] = {
0123     {
0124         .adr = 0x000320025D071500ull,
0125         .num_endpoints = 1,
0126         .endpoints = &single_endpoint,
0127         .name_prefix = "rt715"
0128     }
0129 };
0130
0131 static const struct snd_soc_acpi_adr_device mx8373_1_adr[] = {
0132     {
0133         .adr = 0x000123019F837300ull,
0134         .num_endpoints = 1,
0135         .endpoints = &spk_r_endpoint,
0136         .name_prefix = "Right"
0137     },
0138     {
0139         .adr = 0x000127019F837300ull,
0140         .num_endpoints = 1,
0141         .endpoints = &spk_l_endpoint,
0142         .name_prefix = "Left"
0143     }
0144 };
0145
0146 static const struct snd_soc_acpi_adr_device rt5682_0_adr[] = {
0147     {
0148         .adr = 0x000021025D568200ull,
0149         .num_endpoints = 1,
0150         .endpoints = &single_endpoint,
0151         .name_prefix = "rt5682"
0152     }
0153 };
0154
0155 static const struct snd_soc_acpi_adr_device rt711_sdca_0_adr[] = {
0156     {
0157         .adr = 0x000030025D071101ull,
0158         .num_endpoints = 1,
0159         .endpoints = &single_endpoint,
0160         .name_prefix = "rt711"
0161     }
0162 };
0163
0164 static const struct snd_soc_acpi_adr_device rt1316_1_single_adr[] = {
0165     {
0166         .adr = 0x000131025D131601ull,
0167         .num_endpoints = 1,
0168         .endpoints = &single_endpoint,
0169         .name_prefix = "rt1316-1"
0170     }
0171 };
0172
0173 static const struct snd_soc_acpi_adr_device rt1316_1_group1_adr[] = {
0174     {
0175         .adr = 0x000131025D131601ull, /* unique ID is set for some reason */
0176         .num_endpoints = 1,
0177         .endpoints = &spk_l_endpoint,
0178         .name_prefix = "rt1316-1"
0179     }
0180 };
0181
0182 static const struct snd_soc_acpi_adr_device rt1316_2_group1_adr[] = {
0183     {
0184         .adr = 0x000230025D131601ull,
0185         .num_endpoints = 1,
0186         .endpoints = &spk_r_endpoint,
0187         .name_prefix = "rt1316-2"
0188     }
0189 };
0190
0191 static const struct snd_soc_acpi_adr_device rt714_3_adr[] = {
0192     {
0193         .adr = 0x000330025D071401ull,
0194         .num_endpoints = 1,
0195         .endpoints = &single_endpoint,
0196         .name_prefix = "rt714"
0197     }
0198 };
0199
0200 static const struct snd_soc_acpi_link_adr tgl_rvp[] = {
0201     {
0202         .mask = BIT(0),
0203         .num_adr = ARRAY_SIZE(rt711_0_adr),
0204         .adr_d = rt711_0_adr,
0205     },
0206     {
0207         .mask = BIT(1),
0208         .num_adr = ARRAY_SIZE(rt1308_1_dual_adr),
0209         .adr_d = rt1308_1_dual_adr,
0210     },
0211     {}
0212 };
0213
0214 static const struct snd_soc_acpi_link_adr tgl_rvp_headset_only[] = {
0215     {
0216         .mask = BIT(0),
0217         .num_adr = ARRAY_SIZE(rt711_0_adr),
0218         .adr_d = rt711_0_adr,
0219     },
0220     {}
0221 };
0222
0223 static const struct snd_soc_acpi_link_adr tgl_hp[] = {
0224     {
0225         .mask = BIT(0),
0226         .num_adr = ARRAY_SIZE(rt711_0_adr),
0227         .adr_d = rt711_0_adr,
0228     },
0229     {
0230         .mask = BIT(1),
0231         .num_adr = ARRAY_SIZE(rt1308_1_single_adr),
0232         .adr_d = rt1308_1_single_adr,
0233     },
0234     {}
0235 };
0236
0237 static const struct snd_soc_acpi_link_adr tgl_chromebook_base[] = {
0238     {
0239         .mask = BIT(0),
0240         .num_adr = ARRAY_SIZE(rt5682_0_adr),
0241         .adr_d = rt5682_0_adr,
0242     },
0243     {
0244         .mask = BIT(1),
0245         .num_adr = ARRAY_SIZE(mx8373_1_adr),
0246         .adr_d = mx8373_1_adr,
0247     },
0248     {}
0249 };
0250
0251 static const struct snd_soc_acpi_link_adr tgl_3_in_1_default[] = {
0252     {
0253         .mask = BIT(0),
0254         .num_adr = ARRAY_SIZE(rt711_0_adr),
0255         .adr_d = rt711_0_adr,
0256     },
0257     {
0258         .mask = BIT(1),
0259         .num_adr = ARRAY_SIZE(rt1308_1_group1_adr),
0260         .adr_d = rt1308_1_group1_adr,
0261     },
0262     {
0263         .mask = BIT(2),
0264         .num_adr = ARRAY_SIZE(rt1308_2_group1_adr),
0265         .adr_d = rt1308_2_group1_adr,
0266     },
0267     {
0268         .mask = BIT(3),
0269         .num_adr = ARRAY_SIZE(rt715_3_adr),
0270         .adr_d = rt715_3_adr,
0271     },
0272     {}
0273 };
0274
0275 static const struct snd_soc_acpi_link_adr tgl_3_in_1_mono_amp[] = {
0276     {
0277         .mask = BIT(0),
0278         .num_adr = ARRAY_SIZE(rt711_0_adr),
0279         .adr_d = rt711_0_adr,
0280     },
0281     {
0282         .mask = BIT(1),
0283         .num_adr = ARRAY_SIZE(rt1308_1_single_adr),
0284         .adr_d = rt1308_1_single_adr,
0285     },
0286     {
0287         .mask = BIT(3),
0288         .num_adr = ARRAY_SIZE(rt715_3_adr),
0289         .adr_d = rt715_3_adr,
0290     },
0291     {}
0292 };
0293
0294 static const struct snd_soc_acpi_link_adr tgl_sdw_rt711_link1_rt1308_link2_rt715_link0[] = {
0295     {
0296         .mask = BIT(1),
0297         .num_adr = ARRAY_SIZE(rt711_1_adr),
0298         .adr_d = rt711_1_adr,
0299     },
0300     {
0301         .mask = BIT(2),
0302         .num_adr = ARRAY_SIZE(rt1308_2_single_adr),
0303         .adr_d = rt1308_2_single_adr,
0304     },
0305     {
0306         .mask = BIT(0),
0307         .num_adr = ARRAY_SIZE(rt715_0_adr),
0308         .adr_d = rt715_0_adr,
0309     },
0310     {}
0311 };
0312
0313 static const struct snd_soc_acpi_link_adr tgl_3_in_1_sdca[] = {
0314     {
0315         .mask = BIT(0),
0316         .num_adr = ARRAY_SIZE(rt711_sdca_0_adr),
0317         .adr_d = rt711_sdca_0_adr,
0318     },
0319     {
0320         .mask = BIT(1),
0321         .num_adr = ARRAY_SIZE(rt1316_1_group1_adr),
0322         .adr_d = rt1316_1_group1_adr,
0323     },
0324     {
0325         .mask = BIT(2),
0326         .num_adr = ARRAY_SIZE(rt1316_2_group1_adr),
0327         .adr_d = rt1316_2_group1_adr,
0328     },
0329     {
0330         .mask = BIT(3),
0331         .num_adr = ARRAY_SIZE(rt714_3_adr),
0332         .adr_d = rt714_3_adr,
0333     },
0334     {}
0335 };
0336
0337 static const struct snd_soc_acpi_link_adr tgl_3_in_1_sdca_mono[] = {
0338     {
0339         .mask = BIT(0),
0340         .num_adr = ARRAY_SIZE(rt711_sdca_0_adr),
0341         .adr_d = rt711_sdca_0_adr,
0342     },
0343     {
0344         .mask = BIT(1),
0345         .num_adr = ARRAY_SIZE(rt1316_1_single_adr),
0346         .adr_d = rt1316_1_single_adr,
0347     },
0348     {
0349         .mask = BIT(3),
0350         .num_adr = ARRAY_SIZE(rt714_3_adr),
0351         .adr_d = rt714_3_adr,
0352     },
0353     {}
0354 };
0355
0356 static const struct snd_soc_acpi_codecs tgl_max98373_amp = {
0357     .num_codecs = 1,
0358     .codecs = {"MX98373"}
0359 };
0360
0361 static const struct snd_soc_acpi_codecs tgl_rt1011_amp = {
0362     .num_codecs = 1,
0363     .codecs = {"10EC1011"}
0364 };
0365
0366 static const struct snd_soc_acpi_codecs tgl_rt5682_rt5682s_hp = {
0367     .num_codecs = 2,
0368     .codecs = {"10EC5682", "RTL5682"},
0369 };
0370
0371 static const struct snd_soc_acpi_codecs tgl_lt6911_hdmi = {
0372     .num_codecs = 1,
0373     .codecs = {"INTC10B0"}
0374 };
0375
0376 struct snd_soc_acpi_mach snd_soc_acpi_intel_tgl_machines[] = {
0377     {
0378         .comp_ids = &tgl_rt5682_rt5682s_hp,
0379         .drv_name = "tgl_mx98357_rt5682",
0380         .machine_quirk = snd_soc_acpi_codec_list,
0381         .quirk_data = &tgl_codecs,
0382         .sof_tplg_filename = "sof-tgl-max98357a-rt5682.tplg",
0383     },
0384     {
0385         .comp_ids = &tgl_rt5682_rt5682s_hp,
0386         .drv_name = "tgl_mx98373_rt5682",
0387         .machine_quirk = snd_soc_acpi_codec_list,
0388         .quirk_data = &tgl_max98373_amp,
0389         .sof_tplg_filename = "sof-tgl-max98373-rt5682.tplg",
0390     },
0391     {
0392         .comp_ids = &tgl_rt5682_rt5682s_hp,
0393         .drv_name = "tgl_rt1011_rt5682",
0394         .machine_quirk = snd_soc_acpi_codec_list,
0395         .quirk_data = &tgl_rt1011_amp,
0396         .sof_tplg_filename = "sof-tgl-rt1011-rt5682.tplg",
0397     },
0398     {
0399         .comp_ids = &essx_83x6,
0400         .drv_name = "sof-essx8336",
0401         .sof_tplg_filename = "sof-tgl-es8336", /* the tplg suffix is added at run time */
0402         .tplg_quirk_mask = SND_SOC_ACPI_TPLG_INTEL_SSP_NUMBER |
0403                     SND_SOC_ACPI_TPLG_INTEL_SSP_MSB |
0404                     SND_SOC_ACPI_TPLG_INTEL_DMIC_NUMBER,
0405     },
0406     {
0407         .id = "10EC1308",
0408         .drv_name = "tgl_rt1308_hdmi_ssp",
0409         .machine_quirk = snd_soc_acpi_codec_list,
0410         .quirk_data = &tgl_lt6911_hdmi,
0411         .sof_tplg_filename = "sof-tgl-rt1308-ssp2-hdmi-ssp15.tplg"
0412     },
0413     {},
0414 };
0415 EXPORT_SYMBOL_GPL(snd_soc_acpi_intel_tgl_machines);
0416
0417 /* this table is used when there is no I2S codec present */
0418 struct snd_soc_acpi_mach snd_soc_acpi_intel_tgl_sdw_machines[] = {
0419     /* mockup tests need to be first */
0420     {
0421         .link_mask = GENMASK(3, 0),
0422         .links = sdw_mockup_headset_2amps_mic,
0423         .drv_name = "sof_sdw",
0424         .sof_tplg_filename = "sof-tgl-rt711-rt1308-rt715.tplg",
0425     },
0426     {
0427         .link_mask = BIT(0) | BIT(1) | BIT(3),
0428         .links = sdw_mockup_headset_1amp_mic,
0429         .drv_name = "sof_sdw",
0430         .sof_tplg_filename = "sof-tgl-rt711-rt1308-mono-rt715.tplg",
0431     },
0432     {
0433         .link_mask = BIT(0) | BIT(1) | BIT(2),
0434         .links = sdw_mockup_mic_headset_1amp,
0435         .drv_name = "sof_sdw",
0436         .sof_tplg_filename = "sof-tgl-rt715-rt711-rt1308-mono.tplg",
0437     },
0438     {
0439         .link_mask = 0x7,
0440         .links = tgl_sdw_rt711_link1_rt1308_link2_rt715_link0,
0441         .drv_name = "sof_sdw",
0442         .sof_tplg_filename = "sof-tgl-rt715-rt711-rt1308-mono.tplg",
0443     },
0444     {
0445         .link_mask = 0xF, /* 4 active links required */
0446         .links = tgl_3_in_1_default,
0447         .drv_name = "sof_sdw",
0448         .sof_tplg_filename = "sof-tgl-rt711-rt1308-rt715.tplg",
0449     },
0450     {
0451         /*
0452          * link_mask should be 0xB, but all links are enabled by BIOS.
0453          * This entry will be selected if there is no rt1308 exposed
0454          * on link2 since it will fail to match the above entry.
0455          */
0456         .link_mask = 0xF,
0457         .links = tgl_3_in_1_mono_amp,
0458         .drv_name = "sof_sdw",
0459         .sof_tplg_filename = "sof-tgl-rt711-rt1308-mono-rt715.tplg",
0460     },
0461     {
0462         .link_mask = 0xF, /* 4 active links required */
0463         .links = tgl_3_in_1_sdca,
0464         .drv_name = "sof_sdw",
0465         .sof_tplg_filename = "sof-tgl-rt711-rt1316-rt714.tplg",
0466     },
0467     {
0468         /*
0469          * link_mask should be 0xB, but all links are enabled by BIOS.
0470          * This entry will be selected if there is no rt1316 amplifier exposed
0471          * on link2 since it will fail to match the above entry.
0472          */
0473
0474         .link_mask = 0xF, /* 4 active links required */
0475         .links = tgl_3_in_1_sdca_mono,
0476         .drv_name = "sof_sdw",
0477         .sof_tplg_filename = "sof-tgl-rt711-l0-rt1316-l1-mono-rt714-l3.tplg",
0478     },
0479
0480     {
0481         .link_mask = 0x3, /* rt711 on link 0 and 1 rt1308 on link 1 */
0482         .links = tgl_hp,
0483         .drv_name = "sof_sdw",
0484         .sof_tplg_filename = "sof-tgl-rt711-rt1308.tplg",
0485     },
0486     {
0487         .link_mask = 0x3, /* rt711 on link 0 and 2 rt1308s on link 1 */
0488         .links = tgl_rvp,
0489         .drv_name = "sof_sdw",
0490         .sof_tplg_filename = "sof-tgl-rt711-rt1308.tplg",
0491     },
0492     {
0493         .link_mask = 0x3, /* rt5682 on link0 & 2xmax98373 on link 1 */
0494         .links = tgl_chromebook_base,
0495         .drv_name = "sof_sdw",
0496         .sof_tplg_filename = "sof-tgl-sdw-max98373-rt5682.tplg",
0497     },
0498     {
0499         .link_mask = 0x1, /* rt711 on link 0 */
0500         .links = tgl_rvp_headset_only,
0501         .drv_name = "sof_sdw",
0502         .sof_tplg_filename = "sof-tgl-rt711.tplg",
0503     },
0504     {},
0505 };
0506 EXPORT_SYMBOL_GPL(snd_soc_acpi_intel_tgl_sdw_machines);