intel/avs/skl.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 //
0003 // Copyright(c) 2021-2022 Intel Corporation. All rights reserved.
0004 //
0005 // Authors: Cezary Rojewski <cezary.rojewski@intel.com>
0006 //          Amadeusz Slawinski <amadeuszx.slawinski@linux.intel.com>
0007 //
0008
0009 #include <linux/devcoredump.h>
0010 #include <linux/slab.h>
0011 #include <sound/hdaudio_ext.h>
0012 #include "avs.h"
0013 #include "messages.h"
0014
0015 static int skl_enable_logs(struct avs_dev *adev, enum avs_log_enable enable, u32 aging_period,
0016                u32 fifo_full_period, unsigned long resource_mask, u32 *priorities)
0017 {
0018     struct skl_log_state_info *info;
0019     u32 size, num_cores = adev->hw_cfg.dsp_cores;
0020     int ret, i;
0021
0022     if (fls_long(resource_mask) > num_cores)
0023         return -EINVAL;
0024     size = struct_size(info, logs_core, num_cores);
0025     info = kzalloc(size, GFP_KERNEL);
0026     if (!info)
0027         return -ENOMEM;
0028
0029     info->core_mask = resource_mask;
0030     if (enable)
0031         for_each_set_bit(i, &resource_mask, GENMASK(num_cores, 0)) {
0032             info->logs_core[i].enable = enable;
0033             info->logs_core[i].min_priority = *priorities++;
0034         }
0035     else
0036         for_each_set_bit(i, &resource_mask, GENMASK(num_cores, 0))
0037             info->logs_core[i].enable = enable;
0038
0039     ret = avs_ipc_set_enable_logs(adev, (u8 *)info, size);
0040     kfree(info);
0041     if (ret)
0042         return AVS_IPC_RET(ret);
0043
0044     return 0;
0045 }
0046
0047 int skl_log_buffer_offset(struct avs_dev *adev, u32 core)
0048 {
0049     return core * avs_log_buffer_size(adev);
0050 }
0051
0052 /* fw DbgLogWp registers */
0053 #define FW_REGS_DBG_LOG_WP(core) (0x30 + 0x4 * core)
0054
0055 static int
0056 skl_log_buffer_status(struct avs_dev *adev, union avs_notify_msg *msg)
0057 {
0058     unsigned long flags;
0059     void __iomem *buf;
0060     u16 size, write, offset;
0061
0062     spin_lock_irqsave(&adev->dbg.trace_lock, flags);
0063     if (!kfifo_initialized(&adev->dbg.trace_fifo)) {
0064         spin_unlock_irqrestore(&adev->dbg.trace_lock, flags);
0065         return 0;
0066     }
0067
0068     size = avs_log_buffer_size(adev) / 2;
0069     write = readl(avs_sram_addr(adev, AVS_FW_REGS_WINDOW) + FW_REGS_DBG_LOG_WP(msg->log.core));
0070     /* determine buffer half */
0071     offset = (write < size) ? size : 0;
0072
0073     /* Address is guaranteed to exist in SRAM2. */
0074     buf = avs_log_buffer_addr(adev, msg->log.core) + offset;
0075     __kfifo_fromio_locked(&adev->dbg.trace_fifo, buf, size, &adev->dbg.fifo_lock);
0076     wake_up(&adev->dbg.trace_waitq);
0077     spin_unlock_irqrestore(&adev->dbg.trace_lock, flags);
0078
0079     return 0;
0080 }
0081
0082 static int skl_coredump(struct avs_dev *adev, union avs_notify_msg *msg)
0083 {
0084     u8 *dump;
0085
0086     dump = vzalloc(AVS_FW_REGS_SIZE);
0087     if (!dump)
0088         return -ENOMEM;
0089
0090     memcpy_fromio(dump, avs_sram_addr(adev, AVS_FW_REGS_WINDOW), AVS_FW_REGS_SIZE);
0091     dev_coredumpv(adev->dev, dump, AVS_FW_REGS_SIZE, GFP_KERNEL);
0092
0093     return 0;
0094 }
0095
0096 static bool
0097 skl_d0ix_toggle(struct avs_dev *adev, struct avs_ipc_msg *tx, bool wake)
0098 {
0099     /* unsupported on cAVS 1.5 hw */
0100     return false;
0101 }
0102
0103 static int skl_set_d0ix(struct avs_dev *adev, bool enable)
0104 {
0105     /* unsupported on cAVS 1.5 hw */
0106     return 0;
0107 }
0108
0109 const struct avs_dsp_ops skl_dsp_ops = {
0110     .power = avs_dsp_core_power,
0111     .reset = avs_dsp_core_reset,
0112     .stall = avs_dsp_core_stall,
0113     .irq_handler = avs_dsp_irq_handler,
0114     .irq_thread = avs_dsp_irq_thread,
0115     .int_control = avs_dsp_interrupt_control,
0116     .load_basefw = avs_cldma_load_basefw,
0117     .load_lib = avs_cldma_load_library,
0118     .transfer_mods = avs_cldma_transfer_modules,
0119     .enable_logs = skl_enable_logs,
0120     .log_buffer_offset = skl_log_buffer_offset,
0121     .log_buffer_status = skl_log_buffer_status,
0122     .coredump = skl_coredump,
0123     .d0ix_toggle = skl_d0ix_toggle,
0124     .set_d0ix = skl_set_d0ix,
0125 };