intel/avs/avs.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Copyright(c) 2021-2022 Intel Corporation. All rights reserved.
0004  *
0005  * Authors: Cezary Rojewski <cezary.rojewski@intel.com>
0006  *          Amadeusz Slawinski <amadeuszx.slawinski@linux.intel.com>
0007  */
0008
0009 #ifndef __SOUND_SOC_INTEL_AVS_H
0010 #define __SOUND_SOC_INTEL_AVS_H
0011
0012 #include <linux/device.h>
0013 #include <linux/firmware.h>
0014 #include <linux/kfifo.h>
0015 #include <sound/hda_codec.h>
0016 #include <sound/hda_register.h>
0017 #include <sound/soc-component.h>
0018 #include "messages.h"
0019 #include "registers.h"
0020
0021 struct avs_dev;
0022 struct avs_tplg;
0023 struct avs_tplg_library;
0024 struct avs_soc_component;
0025 struct avs_ipc_msg;
0026
0027 /*
0028  * struct avs_dsp_ops - Platform-specific DSP operations
0029  *
0030  * @power: Power on or off DSP cores
0031  * @reset: Enter or exit reset state on DSP cores
0032  * @stall: Stall or run DSP cores
0033  * @irq_handler: Top half of IPC servicing
0034  * @irq_thread: Bottom half of IPC servicing
0035  * @int_control: Enable or disable IPC interrupts
0036  */
0037 struct avs_dsp_ops {
0038     int (* const power)(struct avs_dev *, u32, bool);
0039     int (* const reset)(struct avs_dev *, u32, bool);
0040     int (* const stall)(struct avs_dev *, u32, bool);
0041     irqreturn_t (* const irq_handler)(int, void *);
0042     irqreturn_t (* const irq_thread)(int, void *);
0043     void (* const int_control)(struct avs_dev *, bool);
0044     int (* const load_basefw)(struct avs_dev *, struct firmware *);
0045     int (* const load_lib)(struct avs_dev *, struct firmware *, u32);
0046     int (* const transfer_mods)(struct avs_dev *, bool, struct avs_module_entry *, u32);
0047     int (* const enable_logs)(struct avs_dev *, enum avs_log_enable, u32, u32, unsigned long,
0048                   u32 *);
0049     int (* const log_buffer_offset)(struct avs_dev *, u32);
0050     int (* const log_buffer_status)(struct avs_dev *, union avs_notify_msg *);
0051     int (* const coredump)(struct avs_dev *, union avs_notify_msg *);
0052     bool (* const d0ix_toggle)(struct avs_dev *, struct avs_ipc_msg *, bool);
0053     int (* const set_d0ix)(struct avs_dev *, bool);
0054 };
0055
0056 #define avs_dsp_op(adev, op, ...) \
0057     ((adev)->spec->dsp_ops->op(adev, ## __VA_ARGS__))
0058
0059 extern const struct avs_dsp_ops skl_dsp_ops;
0060 extern const struct avs_dsp_ops apl_dsp_ops;
0061
0062 #define AVS_PLATATTR_CLDMA      BIT_ULL(0)
0063 #define AVS_PLATATTR_IMR        BIT_ULL(1)
0064
0065 #define avs_platattr_test(adev, attr) \
0066     ((adev)->spec->attributes & AVS_PLATATTR_##attr)
0067
0068 /* Platform specific descriptor */
0069 struct avs_spec {
0070     const char *name;
0071
0072     const struct avs_dsp_ops *const dsp_ops;
0073     struct avs_fw_version min_fw_version; /* anything below is rejected */
0074
0075     const u32 core_init_mask;   /* used during DSP boot */
0076     const u64 attributes;       /* bitmask of AVS_PLATATTR_* */
0077     const u32 sram_base_offset;
0078     const u32 sram_window_size;
0079     const u32 rom_status;
0080 };
0081
0082 struct avs_fw_entry {
0083     char *name;
0084     const struct firmware *fw;
0085
0086     struct list_head node;
0087 };
0088
0089 struct avs_debug {
0090     struct kfifo trace_fifo;
0091     spinlock_t fifo_lock;   /* serialize I/O for trace_fifo */
0092     spinlock_t trace_lock;  /* serialize debug window I/O between each LOG_BUFFER_STATUS */
0093     wait_queue_head_t trace_waitq;
0094     u32 aging_timer_period;
0095     u32 fifo_full_timer_period;
0096     u32 logged_resources;   /* context dependent: core or library */
0097 };
0098
0099 /*
0100  * struct avs_dev - Intel HD-Audio driver data
0101  *
0102  * @dev: PCI device
0103  * @dsp_ba: DSP bar address
0104  * @spec: platform-specific descriptor
0105  * @fw_cfg: Firmware configuration, obtained through FW_CONFIG message
0106  * @hw_cfg: Hardware configuration, obtained through HW_CONFIG message
0107  * @mods_info: Available module-types, obtained through MODULES_INFO message
0108  * @mod_idas: Module instance ID pool, one per module-type
0109  * @modres_mutex: For synchronizing any @mods_info updates
0110  * @ppl_ida: Pipeline instance ID pool
0111  * @fw_list: List of libraries loaded, including base firmware
0112  */
0113 struct avs_dev {
0114     struct hda_bus base;
0115     struct device *dev;
0116
0117     void __iomem *dsp_ba;
0118     const struct avs_spec *spec;
0119     struct avs_ipc *ipc;
0120
0121     struct avs_fw_cfg fw_cfg;
0122     struct avs_hw_cfg hw_cfg;
0123     struct avs_mods_info *mods_info;
0124     struct ida **mod_idas;
0125     struct mutex modres_mutex;
0126     struct ida ppl_ida;
0127     struct list_head fw_list;
0128     int *core_refs;     /* reference count per core */
0129     char **lib_names;
0130
0131     struct completion fw_ready;
0132     struct work_struct probe_work;
0133
0134     struct nhlt_acpi_table *nhlt;
0135     struct list_head comp_list;
0136     struct mutex comp_list_mutex;
0137     struct list_head path_list;
0138     spinlock_t path_list_lock;
0139     struct mutex path_mutex;
0140
0141     struct avs_debug dbg;
0142 };
0143
0144 /* from hda_bus to avs_dev */
0145 #define hda_to_avs(hda) container_of(hda, struct avs_dev, base)
0146 /* from hdac_bus to avs_dev */
0147 #define hdac_to_avs(hdac) hda_to_avs(to_hda_bus(hdac))
0148 /* from device to avs_dev */
0149 #define to_avs_dev(dev) \
0150 ({ \
0151     struct hdac_bus *__bus = dev_get_drvdata(dev); \
0152     hdac_to_avs(__bus); \
0153 })
0154
0155 int avs_dsp_core_power(struct avs_dev *adev, u32 core_mask, bool power);
0156 int avs_dsp_core_reset(struct avs_dev *adev, u32 core_mask, bool reset);
0157 int avs_dsp_core_stall(struct avs_dev *adev, u32 core_mask, bool stall);
0158 int avs_dsp_core_enable(struct avs_dev *adev, u32 core_mask);
0159 int avs_dsp_core_disable(struct avs_dev *adev, u32 core_mask);
0160
0161 /* Inter Process Communication */
0162
0163 struct avs_ipc_msg {
0164     union {
0165         u64 header;
0166         union avs_global_msg glb;
0167         union avs_reply_msg rsp;
0168     };
0169     void *data;
0170     size_t size;
0171 };
0172
0173 /*
0174  * struct avs_ipc - DSP IPC context
0175  *
0176  * @dev: PCI device
0177  * @rx: Reply message cache
0178  * @default_timeout_ms: default message timeout in MS
0179  * @ready: whether firmware is ready and communication is open
0180  * @rx_completed: whether RX for previously sent TX has been received
0181  * @rx_lock: for serializing manipulation of rx_* fields
0182  * @msg_lock: for synchronizing request handling
0183  * @done_completion: DONE-part of IPC i.e. ROM and ACKs from FW
0184  * @busy_completion: BUSY-part of IPC i.e. receiving responses from FW
0185  */
0186 struct avs_ipc {
0187     struct device *dev;
0188
0189     struct avs_ipc_msg rx;
0190     u32 default_timeout_ms;
0191     bool ready;
0192     atomic_t recovering;
0193
0194     bool rx_completed;
0195     spinlock_t rx_lock;
0196     struct mutex msg_mutex;
0197     struct completion done_completion;
0198     struct completion busy_completion;
0199
0200     struct work_struct recovery_work;
0201     struct delayed_work d0ix_work;
0202     atomic_t d0ix_disable_depth;
0203     bool in_d0ix;
0204 };
0205
0206 #define AVS_EIPC    EREMOTEIO
0207 /*
0208  * IPC handlers may return positive value (firmware error code) what denotes
0209  * successful HOST <-> DSP communication yet failure to process specific request.
0210  *
0211  * Below macro converts returned value to linux kernel error code.
0212  * All IPC callers MUST use it as soon as firmware error code is consumed.
0213  */
0214 #define AVS_IPC_RET(ret) \
0215     (((ret) <= 0) ? (ret) : -AVS_EIPC)
0216
0217 static inline void avs_ipc_err(struct avs_dev *adev, struct avs_ipc_msg *tx,
0218                    const char *name, int error)
0219 {
0220     /*
0221      * If IPC channel is blocked e.g.: due to ongoing recovery,
0222      * -EPERM error code is expected and thus it's not an actual error.
0223      */
0224     if (error == -EPERM)
0225         dev_dbg(adev->dev, "%s 0x%08x 0x%08x failed: %d\n", name,
0226             tx->glb.primary, tx->glb.ext.val, error);
0227     else
0228         dev_err(adev->dev, "%s 0x%08x 0x%08x failed: %d\n", name,
0229             tx->glb.primary, tx->glb.ext.val, error);
0230 }
0231
0232 irqreturn_t avs_dsp_irq_handler(int irq, void *dev_id);
0233 irqreturn_t avs_dsp_irq_thread(int irq, void *dev_id);
0234 void avs_dsp_process_response(struct avs_dev *adev, u64 header);
0235 int avs_dsp_send_msg_timeout(struct avs_dev *adev,
0236                  struct avs_ipc_msg *request,
0237                  struct avs_ipc_msg *reply, int timeout);
0238 int avs_dsp_send_msg(struct avs_dev *adev,
0239              struct avs_ipc_msg *request, struct avs_ipc_msg *reply);
0240 /* Two variants below are for messages that control DSP power states. */
0241 int avs_dsp_send_pm_msg_timeout(struct avs_dev *adev, struct avs_ipc_msg *request,
0242                 struct avs_ipc_msg *reply, int timeout, bool wake_d0i0);
0243 int avs_dsp_send_pm_msg(struct avs_dev *adev, struct avs_ipc_msg *request,
0244             struct avs_ipc_msg *reply, bool wake_d0i0);
0245 int avs_dsp_send_rom_msg_timeout(struct avs_dev *adev,
0246                  struct avs_ipc_msg *request, int timeout);
0247 int avs_dsp_send_rom_msg(struct avs_dev *adev, struct avs_ipc_msg *request);
0248 void avs_dsp_interrupt_control(struct avs_dev *adev, bool enable);
0249 int avs_ipc_init(struct avs_ipc *ipc, struct device *dev);
0250 void avs_ipc_block(struct avs_ipc *ipc);
0251
0252 int avs_dsp_disable_d0ix(struct avs_dev *adev);
0253 int avs_dsp_enable_d0ix(struct avs_dev *adev);
0254
0255 int skl_log_buffer_offset(struct avs_dev *adev, u32 core);
0256
0257 /* Firmware resources management */
0258
0259 int avs_get_module_entry(struct avs_dev *adev, const guid_t *uuid, struct avs_module_entry *entry);
0260 int avs_get_module_id_entry(struct avs_dev *adev, u32 module_id, struct avs_module_entry *entry);
0261 int avs_get_module_id(struct avs_dev *adev, const guid_t *uuid);
0262 bool avs_is_module_ida_empty(struct avs_dev *adev, u32 module_id);
0263
0264 int avs_module_info_init(struct avs_dev *adev, bool purge);
0265 void avs_module_info_free(struct avs_dev *adev);
0266 int avs_module_id_alloc(struct avs_dev *adev, u16 module_id);
0267 void avs_module_id_free(struct avs_dev *adev, u16 module_id, u8 instance_id);
0268 int avs_request_firmware(struct avs_dev *adev, const struct firmware **fw_p, const char *name);
0269 void avs_release_last_firmware(struct avs_dev *adev);
0270 void avs_release_firmwares(struct avs_dev *adev);
0271
0272 int avs_dsp_init_module(struct avs_dev *adev, u16 module_id, u8 ppl_instance_id,
0273             u8 core_id, u8 domain, void *param, u32 param_size,
0274             u16 *instance_id);
0275 void avs_dsp_delete_module(struct avs_dev *adev, u16 module_id, u16 instance_id,
0276                u8 ppl_instance_id, u8 core_id);
0277 int avs_dsp_create_pipeline(struct avs_dev *adev, u16 req_size, u8 priority,
0278                 bool lp, u16 attributes, u8 *instance_id);
0279 int avs_dsp_delete_pipeline(struct avs_dev *adev, u8 instance_id);
0280
0281 /* Firmware loading */
0282
0283 void avs_hda_clock_gating_enable(struct avs_dev *adev, bool enable);
0284 void avs_hda_power_gating_enable(struct avs_dev *adev, bool enable);
0285 void avs_hda_l1sen_enable(struct avs_dev *adev, bool enable);
0286
0287 int avs_dsp_load_libraries(struct avs_dev *adev, struct avs_tplg_library *libs, u32 num_libs);
0288 int avs_dsp_boot_firmware(struct avs_dev *adev, bool purge);
0289 int avs_dsp_first_boot_firmware(struct avs_dev *adev);
0290
0291 int avs_cldma_load_basefw(struct avs_dev *adev, struct firmware *fw);
0292 int avs_cldma_load_library(struct avs_dev *adev, struct firmware *lib, u32 id);
0293 int avs_cldma_transfer_modules(struct avs_dev *adev, bool load,
0294                    struct avs_module_entry *mods, u32 num_mods);
0295 int avs_hda_load_basefw(struct avs_dev *adev, struct firmware *fw);
0296 int avs_hda_load_library(struct avs_dev *adev, struct firmware *lib, u32 id);
0297 int avs_hda_transfer_modules(struct avs_dev *adev, bool load,
0298                  struct avs_module_entry *mods, u32 num_mods);
0299
0300 /* Soc component members */
0301
0302 struct avs_soc_component {
0303     struct snd_soc_component base;
0304     struct avs_tplg *tplg;
0305
0306     struct list_head node;
0307 };
0308
0309 #define to_avs_soc_component(comp) \
0310     container_of(comp, struct avs_soc_component, base)
0311
0312 extern const struct snd_soc_dai_ops avs_dai_fe_ops;
0313
0314 int avs_dmic_platform_register(struct avs_dev *adev, const char *name);
0315 int avs_i2s_platform_register(struct avs_dev *adev, const char *name, unsigned long port_mask,
0316                   unsigned long *tdms);
0317 int avs_hda_platform_register(struct avs_dev *adev, const char *name);
0318
0319 int avs_register_all_boards(struct avs_dev *adev);
0320 void avs_unregister_all_boards(struct avs_dev *adev);
0321
0322 /* Firmware tracing helpers */
0323
0324 unsigned int __kfifo_fromio_locked(struct kfifo *fifo, const void __iomem *src, unsigned int len,
0325                    spinlock_t *lock);
0326
0327 #define avs_log_buffer_size(adev) \
0328     ((adev)->fw_cfg.trace_log_bytes / (adev)->hw_cfg.dsp_cores)
0329
0330 #define avs_log_buffer_addr(adev, core) \
0331 ({ \
0332     s32 __offset = avs_dsp_op(adev, log_buffer_offset, core); \
0333     (__offset < 0) ? NULL : \
0334              (avs_sram_addr(adev, AVS_DEBUG_WINDOW) + __offset); \
0335 })
0336
0337 struct apl_log_buffer_layout {
0338     u32 read_ptr;
0339     u32 write_ptr;
0340     u8 buffer[];
0341 } __packed;
0342
0343 #define apl_log_payload_size(adev) \
0344     (avs_log_buffer_size(adev) - sizeof(struct apl_log_buffer_layout))
0345
0346 #define apl_log_payload_addr(addr) \
0347     (addr + sizeof(struct apl_log_buffer_layout))
0348
0349 #endif /* __SOUND_SOC_INTEL_AVS_H */