soc/fsl/fsl_rpmsg.c

0001 // SPDX-License-Identifier: GPL-2.0+
0002 // Copyright 2018-2021 NXP
0003
0004 #include <linux/clk.h>
0005 #include <linux/clk-provider.h>
0006 #include <linux/delay.h>
0007 #include <linux/dmaengine.h>
0008 #include <linux/module.h>
0009 #include <linux/of_device.h>
0010 #include <linux/of_address.h>
0011 #include <linux/pm_runtime.h>
0012 #include <linux/rpmsg.h>
0013 #include <linux/slab.h>
0014 #include <sound/core.h>
0015 #include <sound/dmaengine_pcm.h>
0016 #include <sound/pcm_params.h>
0017
0018 #include "fsl_rpmsg.h"
0019 #include "imx-pcm.h"
0020
0021 #define FSL_RPMSG_RATES        (SNDRV_PCM_RATE_8000 | \
0022                 SNDRV_PCM_RATE_16000 | \
0023                 SNDRV_PCM_RATE_48000)
0024 #define FSL_RPMSG_FORMATS   SNDRV_PCM_FMTBIT_S16_LE
0025
0026 /* 192kHz/32bit/2ch/60s size is 0x574e00 */
0027 #define LPA_LARGE_BUFFER_SIZE  (0x6000000)
0028
0029 static const unsigned int fsl_rpmsg_rates[] = {
0030     8000, 11025, 16000, 22050, 44100,
0031     32000, 48000, 96000, 88200, 176400, 192000,
0032     352800, 384000, 705600, 768000, 1411200, 2822400,
0033 };
0034
0035 static const struct snd_pcm_hw_constraint_list fsl_rpmsg_rate_constraints = {
0036     .count = ARRAY_SIZE(fsl_rpmsg_rates),
0037     .list = fsl_rpmsg_rates,
0038 };
0039
0040 static int fsl_rpmsg_hw_params(struct snd_pcm_substream *substream,
0041                    struct snd_pcm_hw_params *params,
0042                    struct snd_soc_dai *dai)
0043 {
0044     struct fsl_rpmsg *rpmsg = snd_soc_dai_get_drvdata(dai);
0045     struct clk *p = rpmsg->mclk, *pll = NULL, *npll = NULL;
0046     u64 rate = params_rate(params);
0047     int ret = 0;
0048
0049     /* Get current pll parent */
0050     while (p && rpmsg->pll8k && rpmsg->pll11k) {
0051         struct clk *pp = clk_get_parent(p);
0052
0053         if (clk_is_match(pp, rpmsg->pll8k) ||
0054             clk_is_match(pp, rpmsg->pll11k)) {
0055             pll = pp;
0056             break;
0057         }
0058         p = pp;
0059     }
0060
0061     /* Switch to another pll parent if needed. */
0062     if (pll) {
0063         npll = (do_div(rate, 8000) ? rpmsg->pll11k : rpmsg->pll8k);
0064         if (!clk_is_match(pll, npll)) {
0065             ret = clk_set_parent(p, npll);
0066             if (ret < 0)
0067                 dev_warn(dai->dev, "failed to set parent %s: %d\n",
0068                      __clk_get_name(npll), ret);
0069         }
0070     }
0071
0072     if (!(rpmsg->mclk_streams & BIT(substream->stream))) {
0073         ret = clk_prepare_enable(rpmsg->mclk);
0074         if (ret) {
0075             dev_err(dai->dev, "failed to enable mclk: %d\n", ret);
0076             return ret;
0077         }
0078
0079         rpmsg->mclk_streams |= BIT(substream->stream);
0080     }
0081
0082     return ret;
0083 }
0084
0085 static int fsl_rpmsg_hw_free(struct snd_pcm_substream *substream,
0086                  struct snd_soc_dai *dai)
0087 {
0088     struct fsl_rpmsg *rpmsg = snd_soc_dai_get_drvdata(dai);
0089
0090     if (rpmsg->mclk_streams & BIT(substream->stream)) {
0091         clk_disable_unprepare(rpmsg->mclk);
0092         rpmsg->mclk_streams &= ~BIT(substream->stream);
0093     }
0094
0095     return 0;
0096 }
0097
0098 static int fsl_rpmsg_startup(struct snd_pcm_substream *substream,
0099                  struct snd_soc_dai *cpu_dai)
0100 {
0101     int ret;
0102
0103     ret = snd_pcm_hw_constraint_list(substream->runtime, 0,
0104                      SNDRV_PCM_HW_PARAM_RATE,
0105                      &fsl_rpmsg_rate_constraints);
0106
0107     return ret;
0108 }
0109
0110 static const struct snd_soc_dai_ops fsl_rpmsg_dai_ops = {
0111     .startup    = fsl_rpmsg_startup,
0112     .hw_params      = fsl_rpmsg_hw_params,
0113     .hw_free        = fsl_rpmsg_hw_free,
0114 };
0115
0116 static struct snd_soc_dai_driver fsl_rpmsg_dai = {
0117     .playback = {
0118         .stream_name = "CPU-Playback",
0119         .channels_min = 2,
0120         .channels_max = 2,
0121         .rates = SNDRV_PCM_RATE_KNOT,
0122         .formats = FSL_RPMSG_FORMATS,
0123     },
0124     .capture = {
0125         .stream_name = "CPU-Capture",
0126         .channels_min = 2,
0127         .channels_max = 2,
0128         .rates = SNDRV_PCM_RATE_KNOT,
0129         .formats = FSL_RPMSG_FORMATS,
0130     },
0131     .symmetric_rate        = 1,
0132     .symmetric_channels    = 1,
0133     .symmetric_sample_bits = 1,
0134     .ops = &fsl_rpmsg_dai_ops,
0135 };
0136
0137 static const struct snd_soc_component_driver fsl_component = {
0138     .name           = "fsl-rpmsg",
0139     .legacy_dai_naming  = 1,
0140 };
0141
0142 static const struct fsl_rpmsg_soc_data imx7ulp_data = {
0143     .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
0144          SNDRV_PCM_RATE_48000,
0145     .formats = SNDRV_PCM_FMTBIT_S16_LE,
0146 };
0147
0148 static const struct fsl_rpmsg_soc_data imx8mm_data = {
0149     .rates = SNDRV_PCM_RATE_KNOT,
0150     .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE |
0151            SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_DSD_U8 |
0152            SNDRV_PCM_FMTBIT_DSD_U16_LE | SNDRV_PCM_FMTBIT_DSD_U32_LE,
0153 };
0154
0155 static const struct fsl_rpmsg_soc_data imx8mn_data = {
0156     .rates = SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |
0157          SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 |
0158          SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |
0159          SNDRV_PCM_RATE_192000,
0160     .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE |
0161            SNDRV_PCM_FMTBIT_S32_LE,
0162 };
0163
0164 static const struct fsl_rpmsg_soc_data imx8mp_data = {
0165     .rates = SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |
0166          SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 |
0167          SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |
0168          SNDRV_PCM_RATE_192000,
0169     .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE |
0170            SNDRV_PCM_FMTBIT_S32_LE,
0171 };
0172
0173 static const struct of_device_id fsl_rpmsg_ids[] = {
0174     { .compatible = "fsl,imx7ulp-rpmsg-audio", .data = &imx7ulp_data},
0175     { .compatible = "fsl,imx8mm-rpmsg-audio", .data = &imx8mm_data},
0176     { .compatible = "fsl,imx8mn-rpmsg-audio", .data = &imx8mn_data},
0177     { .compatible = "fsl,imx8mp-rpmsg-audio", .data = &imx8mp_data},
0178     { .compatible = "fsl,imx8ulp-rpmsg-audio", .data = &imx7ulp_data},
0179     { /* sentinel */ }
0180 };
0181 MODULE_DEVICE_TABLE(of, fsl_rpmsg_ids);
0182
0183 static int fsl_rpmsg_probe(struct platform_device *pdev)
0184 {
0185     struct device_node *np = pdev->dev.of_node;
0186     struct fsl_rpmsg *rpmsg;
0187     int ret;
0188
0189     rpmsg = devm_kzalloc(&pdev->dev, sizeof(struct fsl_rpmsg), GFP_KERNEL);
0190     if (!rpmsg)
0191         return -ENOMEM;
0192
0193     rpmsg->soc_data = of_device_get_match_data(&pdev->dev);
0194
0195     fsl_rpmsg_dai.playback.rates = rpmsg->soc_data->rates;
0196     fsl_rpmsg_dai.capture.rates = rpmsg->soc_data->rates;
0197     fsl_rpmsg_dai.playback.formats = rpmsg->soc_data->formats;
0198     fsl_rpmsg_dai.capture.formats = rpmsg->soc_data->formats;
0199
0200     if (of_property_read_bool(np, "fsl,enable-lpa")) {
0201         rpmsg->enable_lpa = 1;
0202         rpmsg->buffer_size = LPA_LARGE_BUFFER_SIZE;
0203     } else {
0204         rpmsg->buffer_size = IMX_DEFAULT_DMABUF_SIZE;
0205     }
0206
0207     /* Get the optional clocks */
0208     rpmsg->ipg = devm_clk_get_optional(&pdev->dev, "ipg");
0209     if (IS_ERR(rpmsg->ipg))
0210         return PTR_ERR(rpmsg->ipg);
0211
0212     rpmsg->mclk = devm_clk_get_optional(&pdev->dev, "mclk");
0213     if (IS_ERR(rpmsg->mclk))
0214         return PTR_ERR(rpmsg->mclk);
0215
0216     rpmsg->dma = devm_clk_get_optional(&pdev->dev, "dma");
0217     if (IS_ERR(rpmsg->dma))
0218         return PTR_ERR(rpmsg->dma);
0219
0220     rpmsg->pll8k = devm_clk_get_optional(&pdev->dev, "pll8k");
0221     if (IS_ERR(rpmsg->pll8k))
0222         return PTR_ERR(rpmsg->pll8k);
0223
0224     rpmsg->pll11k = devm_clk_get_optional(&pdev->dev, "pll11k");
0225     if (IS_ERR(rpmsg->pll11k))
0226         return PTR_ERR(rpmsg->pll11k);
0227
0228     platform_set_drvdata(pdev, rpmsg);
0229     pm_runtime_enable(&pdev->dev);
0230
0231     ret = devm_snd_soc_register_component(&pdev->dev, &fsl_component,
0232                           &fsl_rpmsg_dai, 1);
0233     if (ret)
0234         return ret;
0235
0236     rpmsg->card_pdev = platform_device_register_data(&pdev->dev,
0237                              "imx-audio-rpmsg",
0238                              PLATFORM_DEVID_NONE,
0239                              NULL,
0240                              0);
0241     if (IS_ERR(rpmsg->card_pdev)) {
0242         dev_err(&pdev->dev, "failed to register rpmsg card\n");
0243         ret = PTR_ERR(rpmsg->card_pdev);
0244         return ret;
0245     }
0246
0247     return 0;
0248 }
0249
0250 static int fsl_rpmsg_remove(struct platform_device *pdev)
0251 {
0252     struct fsl_rpmsg *rpmsg = platform_get_drvdata(pdev);
0253
0254     if (rpmsg->card_pdev)
0255         platform_device_unregister(rpmsg->card_pdev);
0256
0257     return 0;
0258 }
0259
0260 #ifdef CONFIG_PM
0261 static int fsl_rpmsg_runtime_resume(struct device *dev)
0262 {
0263     struct fsl_rpmsg *rpmsg = dev_get_drvdata(dev);
0264     int ret;
0265
0266     ret = clk_prepare_enable(rpmsg->ipg);
0267     if (ret) {
0268         dev_err(dev, "failed to enable ipg clock: %d\n", ret);
0269         goto ipg_err;
0270     }
0271
0272     ret = clk_prepare_enable(rpmsg->dma);
0273     if (ret) {
0274         dev_err(dev, "Failed to enable dma clock %d\n", ret);
0275         goto dma_err;
0276     }
0277
0278     return 0;
0279
0280 dma_err:
0281     clk_disable_unprepare(rpmsg->ipg);
0282 ipg_err:
0283     return ret;
0284 }
0285
0286 static int fsl_rpmsg_runtime_suspend(struct device *dev)
0287 {
0288     struct fsl_rpmsg *rpmsg = dev_get_drvdata(dev);
0289
0290     clk_disable_unprepare(rpmsg->dma);
0291     clk_disable_unprepare(rpmsg->ipg);
0292
0293     return 0;
0294 }
0295 #endif
0296
0297 static const struct dev_pm_ops fsl_rpmsg_pm_ops = {
0298     SET_RUNTIME_PM_OPS(fsl_rpmsg_runtime_suspend,
0299                fsl_rpmsg_runtime_resume,
0300                NULL)
0301 };
0302
0303 static struct platform_driver fsl_rpmsg_driver = {
0304     .probe  = fsl_rpmsg_probe,
0305     .remove = fsl_rpmsg_remove,
0306     .driver = {
0307         .name = "fsl_rpmsg",
0308         .pm = &fsl_rpmsg_pm_ops,
0309         .of_match_table = fsl_rpmsg_ids,
0310     },
0311 };
0312 module_platform_driver(fsl_rpmsg_driver);
0313
0314 MODULE_DESCRIPTION("Freescale SoC Audio PRMSG CPU Interface");
0315 MODULE_AUTHOR("Shengjiu Wang <shengjiu.wang@nxp.com>");
0316 MODULE_ALIAS("platform:fsl_rpmsg");
0317 MODULE_LICENSE("GPL");