soc/fsl/fsl_audmix.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * NXP AUDMIX ALSA SoC Digital Audio Interface (DAI) driver
0004  *
0005  * Copyright 2017 NXP
0006  */
0007
0008 #include <linux/clk.h>
0009 #include <linux/module.h>
0010 #include <linux/of_platform.h>
0011 #include <linux/pm_runtime.h>
0012 #include <sound/soc.h>
0013 #include <sound/pcm_params.h>
0014
0015 #include "fsl_audmix.h"
0016
0017 #define SOC_ENUM_SINGLE_S(xreg, xshift, xtexts) \
0018     SOC_ENUM_SINGLE(xreg, xshift, ARRAY_SIZE(xtexts), xtexts)
0019
0020 static const char
0021     *tdm_sel[] = { "TDM1", "TDM2", },
0022     *mode_sel[] = { "Disabled", "TDM1", "TDM2", "Mixed", },
0023     *width_sel[] = { "16b", "18b", "20b", "24b", "32b", },
0024     *endis_sel[] = { "Disabled", "Enabled", },
0025     *updn_sel[] = { "Downward", "Upward", },
0026     *mask_sel[] = { "Unmask", "Mask", };
0027
0028 static const struct soc_enum fsl_audmix_enum[] = {
0029 /* FSL_AUDMIX_CTR enums */
0030 SOC_ENUM_SINGLE_S(FSL_AUDMIX_CTR, FSL_AUDMIX_CTR_MIXCLK_SHIFT, tdm_sel),
0031 SOC_ENUM_SINGLE_S(FSL_AUDMIX_CTR, FSL_AUDMIX_CTR_OUTSRC_SHIFT, mode_sel),
0032 SOC_ENUM_SINGLE_S(FSL_AUDMIX_CTR, FSL_AUDMIX_CTR_OUTWIDTH_SHIFT, width_sel),
0033 SOC_ENUM_SINGLE_S(FSL_AUDMIX_CTR, FSL_AUDMIX_CTR_MASKRTDF_SHIFT, mask_sel),
0034 SOC_ENUM_SINGLE_S(FSL_AUDMIX_CTR, FSL_AUDMIX_CTR_MASKCKDF_SHIFT, mask_sel),
0035 SOC_ENUM_SINGLE_S(FSL_AUDMIX_CTR, FSL_AUDMIX_CTR_SYNCMODE_SHIFT, endis_sel),
0036 SOC_ENUM_SINGLE_S(FSL_AUDMIX_CTR, FSL_AUDMIX_CTR_SYNCSRC_SHIFT, tdm_sel),
0037 /* FSL_AUDMIX_ATCR0 enums */
0038 SOC_ENUM_SINGLE_S(FSL_AUDMIX_ATCR0, 0, endis_sel),
0039 SOC_ENUM_SINGLE_S(FSL_AUDMIX_ATCR0, 1, updn_sel),
0040 /* FSL_AUDMIX_ATCR1 enums */
0041 SOC_ENUM_SINGLE_S(FSL_AUDMIX_ATCR1, 0, endis_sel),
0042 SOC_ENUM_SINGLE_S(FSL_AUDMIX_ATCR1, 1, updn_sel),
0043 };
0044
0045 struct fsl_audmix_state {
0046     u8 tdms;
0047     u8 clk;
0048     char msg[64];
0049 };
0050
0051 static const struct fsl_audmix_state prms[4][4] = {{
0052     /* DIS->DIS, do nothing */
0053     { .tdms = 0, .clk = 0, .msg = "" },
0054     /* DIS->TDM1*/
0055     { .tdms = 1, .clk = 1, .msg = "DIS->TDM1: TDM1 not started!\n" },
0056     /* DIS->TDM2*/
0057     { .tdms = 2, .clk = 2, .msg = "DIS->TDM2: TDM2 not started!\n" },
0058     /* DIS->MIX */
0059     { .tdms = 3, .clk = 0, .msg = "DIS->MIX: Please start both TDMs!\n" }
0060 }, {    /* TDM1->DIS */
0061     { .tdms = 1, .clk = 0, .msg = "TDM1->DIS: TDM1 not started!\n" },
0062     /* TDM1->TDM1, do nothing */
0063     { .tdms = 0, .clk = 0, .msg = "" },
0064     /* TDM1->TDM2 */
0065     { .tdms = 3, .clk = 2, .msg = "TDM1->TDM2: Please start both TDMs!\n" },
0066     /* TDM1->MIX */
0067     { .tdms = 3, .clk = 0, .msg = "TDM1->MIX: Please start both TDMs!\n" }
0068 }, {    /* TDM2->DIS */
0069     { .tdms = 2, .clk = 0, .msg = "TDM2->DIS: TDM2 not started!\n" },
0070     /* TDM2->TDM1 */
0071     { .tdms = 3, .clk = 1, .msg = "TDM2->TDM1: Please start both TDMs!\n" },
0072     /* TDM2->TDM2, do nothing */
0073     { .tdms = 0, .clk = 0, .msg = "" },
0074     /* TDM2->MIX */
0075     { .tdms = 3, .clk = 0, .msg = "TDM2->MIX: Please start both TDMs!\n" }
0076 }, {    /* MIX->DIS */
0077     { .tdms = 3, .clk = 0, .msg = "MIX->DIS: Please start both TDMs!\n" },
0078     /* MIX->TDM1 */
0079     { .tdms = 3, .clk = 1, .msg = "MIX->TDM1: Please start both TDMs!\n" },
0080     /* MIX->TDM2 */
0081     { .tdms = 3, .clk = 2, .msg = "MIX->TDM2: Please start both TDMs!\n" },
0082     /* MIX->MIX, do nothing */
0083     { .tdms = 0, .clk = 0, .msg = "" }
0084 }, };
0085
0086 static int fsl_audmix_state_trans(struct snd_soc_component *comp,
0087                   unsigned int *mask, unsigned int *ctr,
0088                   const struct fsl_audmix_state prm)
0089 {
0090     struct fsl_audmix *priv = snd_soc_component_get_drvdata(comp);
0091     /* Enforce all required TDMs are started */
0092     if ((priv->tdms & prm.tdms) != prm.tdms) {
0093         dev_dbg(comp->dev, "%s", prm.msg);
0094         return -EINVAL;
0095     }
0096
0097     switch (prm.clk) {
0098     case 1:
0099     case 2:
0100         /* Set mix clock */
0101         (*mask) |= FSL_AUDMIX_CTR_MIXCLK_MASK;
0102         (*ctr)  |= FSL_AUDMIX_CTR_MIXCLK(prm.clk - 1);
0103         break;
0104     default:
0105         break;
0106     }
0107
0108     return 0;
0109 }
0110
0111 static int fsl_audmix_put_mix_clk_src(struct snd_kcontrol *kcontrol,
0112                       struct snd_ctl_elem_value *ucontrol)
0113 {
0114     struct snd_soc_component *comp = snd_kcontrol_chip(kcontrol);
0115     struct fsl_audmix *priv = snd_soc_component_get_drvdata(comp);
0116     struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
0117     unsigned int *item = ucontrol->value.enumerated.item;
0118     unsigned int reg_val, val, mix_clk;
0119
0120     /* Get current state */
0121     reg_val = snd_soc_component_read(comp, FSL_AUDMIX_CTR);
0122     mix_clk = ((reg_val & FSL_AUDMIX_CTR_MIXCLK_MASK)
0123             >> FSL_AUDMIX_CTR_MIXCLK_SHIFT);
0124     val = snd_soc_enum_item_to_val(e, item[0]);
0125
0126     dev_dbg(comp->dev, "TDMs=x%08x, val=x%08x\n", priv->tdms, val);
0127
0128     /**
0129      * Ensure the current selected mixer clock is available
0130      * for configuration propagation
0131      */
0132     if (!(priv->tdms & BIT(mix_clk))) {
0133         dev_err(comp->dev,
0134             "Started TDM%d needed for config propagation!\n",
0135             mix_clk + 1);
0136         return -EINVAL;
0137     }
0138
0139     if (!(priv->tdms & BIT(val))) {
0140         dev_err(comp->dev,
0141             "The selected clock source has no TDM%d enabled!\n",
0142             val + 1);
0143         return -EINVAL;
0144     }
0145
0146     return snd_soc_put_enum_double(kcontrol, ucontrol);
0147 }
0148
0149 static int fsl_audmix_put_out_src(struct snd_kcontrol *kcontrol,
0150                   struct snd_ctl_elem_value *ucontrol)
0151 {
0152     struct snd_soc_component *comp = snd_kcontrol_chip(kcontrol);
0153     struct fsl_audmix *priv = snd_soc_component_get_drvdata(comp);
0154     struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
0155     unsigned int *item = ucontrol->value.enumerated.item;
0156     u32 out_src, mix_clk;
0157     unsigned int reg_val, val, mask = 0, ctr = 0;
0158     int ret;
0159
0160     /* Get current state */
0161     reg_val = snd_soc_component_read(comp, FSL_AUDMIX_CTR);
0162
0163     /* "From" state */
0164     out_src = ((reg_val & FSL_AUDMIX_CTR_OUTSRC_MASK)
0165             >> FSL_AUDMIX_CTR_OUTSRC_SHIFT);
0166     mix_clk = ((reg_val & FSL_AUDMIX_CTR_MIXCLK_MASK)
0167             >> FSL_AUDMIX_CTR_MIXCLK_SHIFT);
0168
0169     /* "To" state */
0170     val = snd_soc_enum_item_to_val(e, item[0]);
0171
0172     dev_dbg(comp->dev, "TDMs=x%08x, val=x%08x\n", priv->tdms, val);
0173
0174     /* Check if state is changing ... */
0175     if (out_src == val)
0176         return 0;
0177     /**
0178      * Ensure the current selected mixer clock is available
0179      * for configuration propagation
0180      */
0181     if (!(priv->tdms & BIT(mix_clk))) {
0182         dev_err(comp->dev,
0183             "Started TDM%d needed for config propagation!\n",
0184             mix_clk + 1);
0185         return -EINVAL;
0186     }
0187
0188     /* Check state transition constraints */
0189     ret = fsl_audmix_state_trans(comp, &mask, &ctr, prms[out_src][val]);
0190     if (ret)
0191         return ret;
0192
0193     /* Complete transition to new state */
0194     mask |= FSL_AUDMIX_CTR_OUTSRC_MASK;
0195     ctr  |= FSL_AUDMIX_CTR_OUTSRC(val);
0196
0197     return snd_soc_component_update_bits(comp, FSL_AUDMIX_CTR, mask, ctr);
0198 }
0199
0200 static const struct snd_kcontrol_new fsl_audmix_snd_controls[] = {
0201     /* FSL_AUDMIX_CTR controls */
0202     {   .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
0203         .name = "Mixing Clock Source",
0204         .info = snd_soc_info_enum_double,
0205         .access = SNDRV_CTL_ELEM_ACCESS_WRITE,
0206         .put = fsl_audmix_put_mix_clk_src,
0207         .private_value = (unsigned long)&fsl_audmix_enum[0] },
0208     {   .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
0209         .name = "Output Source",
0210         .info = snd_soc_info_enum_double,
0211         .access = SNDRV_CTL_ELEM_ACCESS_WRITE,
0212         .put = fsl_audmix_put_out_src,
0213         .private_value = (unsigned long)&fsl_audmix_enum[1] },
0214     SOC_ENUM("Output Width", fsl_audmix_enum[2]),
0215     SOC_ENUM("Frame Rate Diff Error", fsl_audmix_enum[3]),
0216     SOC_ENUM("Clock Freq Diff Error", fsl_audmix_enum[4]),
0217     SOC_ENUM("Sync Mode Config", fsl_audmix_enum[5]),
0218     SOC_ENUM("Sync Mode Clk Source", fsl_audmix_enum[6]),
0219     /* TDM1 Attenuation controls */
0220     SOC_ENUM("TDM1 Attenuation", fsl_audmix_enum[7]),
0221     SOC_ENUM("TDM1 Attenuation Direction", fsl_audmix_enum[8]),
0222     SOC_SINGLE("TDM1 Attenuation Step Divider", FSL_AUDMIX_ATCR0,
0223            2, 0x00fff, 0),
0224     SOC_SINGLE("TDM1 Attenuation Initial Value", FSL_AUDMIX_ATIVAL0,
0225            0, 0x3ffff, 0),
0226     SOC_SINGLE("TDM1 Attenuation Step Up Factor", FSL_AUDMIX_ATSTPUP0,
0227            0, 0x3ffff, 0),
0228     SOC_SINGLE("TDM1 Attenuation Step Down Factor", FSL_AUDMIX_ATSTPDN0,
0229            0, 0x3ffff, 0),
0230     SOC_SINGLE("TDM1 Attenuation Step Target", FSL_AUDMIX_ATSTPTGT0,
0231            0, 0x3ffff, 0),
0232     /* TDM2 Attenuation controls */
0233     SOC_ENUM("TDM2 Attenuation", fsl_audmix_enum[9]),
0234     SOC_ENUM("TDM2 Attenuation Direction", fsl_audmix_enum[10]),
0235     SOC_SINGLE("TDM2 Attenuation Step Divider", FSL_AUDMIX_ATCR1,
0236            2, 0x00fff, 0),
0237     SOC_SINGLE("TDM2 Attenuation Initial Value", FSL_AUDMIX_ATIVAL1,
0238            0, 0x3ffff, 0),
0239     SOC_SINGLE("TDM2 Attenuation Step Up Factor", FSL_AUDMIX_ATSTPUP1,
0240            0, 0x3ffff, 0),
0241     SOC_SINGLE("TDM2 Attenuation Step Down Factor", FSL_AUDMIX_ATSTPDN1,
0242            0, 0x3ffff, 0),
0243     SOC_SINGLE("TDM2 Attenuation Step Target", FSL_AUDMIX_ATSTPTGT1,
0244            0, 0x3ffff, 0),
0245 };
0246
0247 static int fsl_audmix_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
0248 {
0249     struct snd_soc_component *comp = dai->component;
0250     u32 mask = 0, ctr = 0;
0251
0252     /* AUDMIX is working in DSP_A format only */
0253     switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
0254     case SND_SOC_DAIFMT_DSP_A:
0255         break;
0256     default:
0257         return -EINVAL;
0258     }
0259
0260     /* For playback the AUDMIX is consumer, and for record is provider */
0261     switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
0262     case SND_SOC_DAIFMT_BC_FC:
0263     case SND_SOC_DAIFMT_BP_FP:
0264         break;
0265     default:
0266         return -EINVAL;
0267     }
0268
0269     switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
0270     case SND_SOC_DAIFMT_IB_NF:
0271         /* Output data will be written on positive edge of the clock */
0272         ctr |= FSL_AUDMIX_CTR_OUTCKPOL(0);
0273         break;
0274     case SND_SOC_DAIFMT_NB_NF:
0275         /* Output data will be written on negative edge of the clock */
0276         ctr |= FSL_AUDMIX_CTR_OUTCKPOL(1);
0277         break;
0278     default:
0279         return -EINVAL;
0280     }
0281
0282     mask |= FSL_AUDMIX_CTR_OUTCKPOL_MASK;
0283
0284     return snd_soc_component_update_bits(comp, FSL_AUDMIX_CTR, mask, ctr);
0285 }
0286
0287 static int fsl_audmix_dai_trigger(struct snd_pcm_substream *substream, int cmd,
0288                   struct snd_soc_dai *dai)
0289 {
0290     struct fsl_audmix *priv = snd_soc_dai_get_drvdata(dai);
0291     unsigned long lock_flags;
0292
0293     /* Capture stream shall not be handled */
0294     if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
0295         return 0;
0296
0297     switch (cmd) {
0298     case SNDRV_PCM_TRIGGER_START:
0299     case SNDRV_PCM_TRIGGER_RESUME:
0300     case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
0301         spin_lock_irqsave(&priv->lock, lock_flags);
0302         priv->tdms |= BIT(dai->driver->id);
0303         spin_unlock_irqrestore(&priv->lock, lock_flags);
0304         break;
0305     case SNDRV_PCM_TRIGGER_STOP:
0306     case SNDRV_PCM_TRIGGER_SUSPEND:
0307     case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
0308         spin_lock_irqsave(&priv->lock, lock_flags);
0309         priv->tdms &= ~BIT(dai->driver->id);
0310         spin_unlock_irqrestore(&priv->lock, lock_flags);
0311         break;
0312     default:
0313         return -EINVAL;
0314     }
0315
0316     return 0;
0317 }
0318
0319 static const struct snd_soc_dai_ops fsl_audmix_dai_ops = {
0320     .set_fmt  = fsl_audmix_dai_set_fmt,
0321     .trigger      = fsl_audmix_dai_trigger,
0322 };
0323
0324 static struct snd_soc_dai_driver fsl_audmix_dai[] = {
0325     {
0326         .id   = 0,
0327         .name = "audmix-0",
0328         .playback = {
0329             .stream_name = "AUDMIX-Playback-0",
0330             .channels_min = 8,
0331             .channels_max = 8,
0332             .rate_min = 8000,
0333             .rate_max = 96000,
0334             .rates = SNDRV_PCM_RATE_8000_96000,
0335             .formats = FSL_AUDMIX_FORMATS,
0336         },
0337         .capture = {
0338             .stream_name = "AUDMIX-Capture-0",
0339             .channels_min = 8,
0340             .channels_max = 8,
0341             .rate_min = 8000,
0342             .rate_max = 96000,
0343             .rates = SNDRV_PCM_RATE_8000_96000,
0344             .formats = FSL_AUDMIX_FORMATS,
0345         },
0346         .ops = &fsl_audmix_dai_ops,
0347     },
0348     {
0349         .id   = 1,
0350         .name = "audmix-1",
0351         .playback = {
0352             .stream_name = "AUDMIX-Playback-1",
0353             .channels_min = 8,
0354             .channels_max = 8,
0355             .rate_min = 8000,
0356             .rate_max = 96000,
0357             .rates = SNDRV_PCM_RATE_8000_96000,
0358             .formats = FSL_AUDMIX_FORMATS,
0359         },
0360         .capture = {
0361             .stream_name = "AUDMIX-Capture-1",
0362             .channels_min = 8,
0363             .channels_max = 8,
0364             .rate_min = 8000,
0365             .rate_max = 96000,
0366             .rates = SNDRV_PCM_RATE_8000_96000,
0367             .formats = FSL_AUDMIX_FORMATS,
0368         },
0369         .ops = &fsl_audmix_dai_ops,
0370     },
0371 };
0372
0373 static const struct snd_soc_component_driver fsl_audmix_component = {
0374     .name         = "fsl-audmix-dai",
0375     .controls     = fsl_audmix_snd_controls,
0376     .num_controls     = ARRAY_SIZE(fsl_audmix_snd_controls),
0377 };
0378
0379 static bool fsl_audmix_readable_reg(struct device *dev, unsigned int reg)
0380 {
0381     switch (reg) {
0382     case FSL_AUDMIX_CTR:
0383     case FSL_AUDMIX_STR:
0384     case FSL_AUDMIX_ATCR0:
0385     case FSL_AUDMIX_ATIVAL0:
0386     case FSL_AUDMIX_ATSTPUP0:
0387     case FSL_AUDMIX_ATSTPDN0:
0388     case FSL_AUDMIX_ATSTPTGT0:
0389     case FSL_AUDMIX_ATTNVAL0:
0390     case FSL_AUDMIX_ATSTP0:
0391     case FSL_AUDMIX_ATCR1:
0392     case FSL_AUDMIX_ATIVAL1:
0393     case FSL_AUDMIX_ATSTPUP1:
0394     case FSL_AUDMIX_ATSTPDN1:
0395     case FSL_AUDMIX_ATSTPTGT1:
0396     case FSL_AUDMIX_ATTNVAL1:
0397     case FSL_AUDMIX_ATSTP1:
0398         return true;
0399     default:
0400         return false;
0401     }
0402 }
0403
0404 static bool fsl_audmix_writeable_reg(struct device *dev, unsigned int reg)
0405 {
0406     switch (reg) {
0407     case FSL_AUDMIX_CTR:
0408     case FSL_AUDMIX_ATCR0:
0409     case FSL_AUDMIX_ATIVAL0:
0410     case FSL_AUDMIX_ATSTPUP0:
0411     case FSL_AUDMIX_ATSTPDN0:
0412     case FSL_AUDMIX_ATSTPTGT0:
0413     case FSL_AUDMIX_ATCR1:
0414     case FSL_AUDMIX_ATIVAL1:
0415     case FSL_AUDMIX_ATSTPUP1:
0416     case FSL_AUDMIX_ATSTPDN1:
0417     case FSL_AUDMIX_ATSTPTGT1:
0418         return true;
0419     default:
0420         return false;
0421     }
0422 }
0423
0424 static const struct reg_default fsl_audmix_reg[] = {
0425     { FSL_AUDMIX_CTR,       0x00060 },
0426     { FSL_AUDMIX_STR,       0x00003 },
0427     { FSL_AUDMIX_ATCR0,     0x00000 },
0428     { FSL_AUDMIX_ATIVAL0,   0x3FFFF },
0429     { FSL_AUDMIX_ATSTPUP0,  0x2AAAA },
0430     { FSL_AUDMIX_ATSTPDN0,  0x30000 },
0431     { FSL_AUDMIX_ATSTPTGT0, 0x00010 },
0432     { FSL_AUDMIX_ATTNVAL0,  0x00000 },
0433     { FSL_AUDMIX_ATSTP0,    0x00000 },
0434     { FSL_AUDMIX_ATCR1,     0x00000 },
0435     { FSL_AUDMIX_ATIVAL1,   0x3FFFF },
0436     { FSL_AUDMIX_ATSTPUP1,  0x2AAAA },
0437     { FSL_AUDMIX_ATSTPDN1,  0x30000 },
0438     { FSL_AUDMIX_ATSTPTGT1, 0x00010 },
0439     { FSL_AUDMIX_ATTNVAL1,  0x00000 },
0440     { FSL_AUDMIX_ATSTP1,    0x00000 },
0441 };
0442
0443 static const struct regmap_config fsl_audmix_regmap_config = {
0444     .reg_bits = 32,
0445     .reg_stride = 4,
0446     .val_bits = 32,
0447     .max_register = FSL_AUDMIX_ATSTP1,
0448     .reg_defaults = fsl_audmix_reg,
0449     .num_reg_defaults = ARRAY_SIZE(fsl_audmix_reg),
0450     .readable_reg = fsl_audmix_readable_reg,
0451     .writeable_reg = fsl_audmix_writeable_reg,
0452     .cache_type = REGCACHE_FLAT,
0453 };
0454
0455 static const struct of_device_id fsl_audmix_ids[] = {
0456     {
0457         .compatible = "fsl,imx8qm-audmix",
0458     },
0459     { /* sentinel */ }
0460 };
0461 MODULE_DEVICE_TABLE(of, fsl_audmix_ids);
0462
0463 static int fsl_audmix_probe(struct platform_device *pdev)
0464 {
0465     struct device *dev = &pdev->dev;
0466     struct fsl_audmix *priv;
0467     void __iomem *regs;
0468     int ret;
0469
0470     priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
0471     if (!priv)
0472         return -ENOMEM;
0473
0474     /* Get the addresses */
0475     regs = devm_platform_ioremap_resource(pdev, 0);
0476     if (IS_ERR(regs))
0477         return PTR_ERR(regs);
0478
0479     priv->regmap = devm_regmap_init_mmio(dev, regs, &fsl_audmix_regmap_config);
0480     if (IS_ERR(priv->regmap)) {
0481         dev_err(dev, "failed to init regmap\n");
0482         return PTR_ERR(priv->regmap);
0483     }
0484
0485     priv->ipg_clk = devm_clk_get(dev, "ipg");
0486     if (IS_ERR(priv->ipg_clk)) {
0487         dev_err(dev, "failed to get ipg clock\n");
0488         return PTR_ERR(priv->ipg_clk);
0489     }
0490
0491     spin_lock_init(&priv->lock);
0492     platform_set_drvdata(pdev, priv);
0493     pm_runtime_enable(dev);
0494
0495     ret = devm_snd_soc_register_component(dev, &fsl_audmix_component,
0496                           fsl_audmix_dai,
0497                           ARRAY_SIZE(fsl_audmix_dai));
0498     if (ret) {
0499         dev_err(dev, "failed to register ASoC DAI\n");
0500         goto err_disable_pm;
0501     }
0502
0503     priv->pdev = platform_device_register_data(dev, "imx-audmix", 0, NULL, 0);
0504     if (IS_ERR(priv->pdev)) {
0505         ret = PTR_ERR(priv->pdev);
0506         dev_err(dev, "failed to register platform: %d\n", ret);
0507         goto err_disable_pm;
0508     }
0509
0510     return 0;
0511
0512 err_disable_pm:
0513     pm_runtime_disable(dev);
0514     return ret;
0515 }
0516
0517 static int fsl_audmix_remove(struct platform_device *pdev)
0518 {
0519     struct fsl_audmix *priv = dev_get_drvdata(&pdev->dev);
0520
0521     pm_runtime_disable(&pdev->dev);
0522
0523     if (priv->pdev)
0524         platform_device_unregister(priv->pdev);
0525
0526     return 0;
0527 }
0528
0529 #ifdef CONFIG_PM
0530 static int fsl_audmix_runtime_resume(struct device *dev)
0531 {
0532     struct fsl_audmix *priv = dev_get_drvdata(dev);
0533     int ret;
0534
0535     ret = clk_prepare_enable(priv->ipg_clk);
0536     if (ret) {
0537         dev_err(dev, "Failed to enable IPG clock: %d\n", ret);
0538         return ret;
0539     }
0540
0541     regcache_cache_only(priv->regmap, false);
0542     regcache_mark_dirty(priv->regmap);
0543
0544     return regcache_sync(priv->regmap);
0545 }
0546
0547 static int fsl_audmix_runtime_suspend(struct device *dev)
0548 {
0549     struct fsl_audmix *priv = dev_get_drvdata(dev);
0550
0551     regcache_cache_only(priv->regmap, true);
0552
0553     clk_disable_unprepare(priv->ipg_clk);
0554
0555     return 0;
0556 }
0557 #endif /* CONFIG_PM */
0558
0559 static const struct dev_pm_ops fsl_audmix_pm = {
0560     SET_RUNTIME_PM_OPS(fsl_audmix_runtime_suspend,
0561                fsl_audmix_runtime_resume,
0562                NULL)
0563     SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
0564                 pm_runtime_force_resume)
0565 };
0566
0567 static struct platform_driver fsl_audmix_driver = {
0568     .probe = fsl_audmix_probe,
0569     .remove = fsl_audmix_remove,
0570     .driver = {
0571         .name = "fsl-audmix",
0572         .of_match_table = fsl_audmix_ids,
0573         .pm = &fsl_audmix_pm,
0574     },
0575 };
0576 module_platform_driver(fsl_audmix_driver);
0577
0578 MODULE_DESCRIPTION("NXP AUDMIX ASoC DAI driver");
0579 MODULE_AUTHOR("Viorel Suman <viorel.suman@nxp.com>");
0580 MODULE_ALIAS("platform:fsl-audmix");
0581 MODULE_LICENSE("GPL v2");