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0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * wm8991.c  --  WM8991 ALSA Soc Audio driver
0004  *
0005  * Copyright 2007-2010 Wolfson Microelectronics PLC.
0006  * Author: Graeme Gregory
0007  *         Graeme.Gregory@wolfsonmicro.com
0008  */
0009 
0010 #include <linux/module.h>
0011 #include <linux/moduleparam.h>
0012 #include <linux/kernel.h>
0013 #include <linux/init.h>
0014 #include <linux/delay.h>
0015 #include <linux/pm.h>
0016 #include <linux/i2c.h>
0017 #include <linux/regmap.h>
0018 #include <linux/slab.h>
0019 #include <sound/core.h>
0020 #include <sound/pcm.h>
0021 #include <sound/pcm_params.h>
0022 #include <sound/soc.h>
0023 #include <sound/soc-dapm.h>
0024 #include <sound/initval.h>
0025 #include <sound/tlv.h>
0026 #include <asm/div64.h>
0027 
0028 #include "wm8991.h"
0029 
0030 struct wm8991_priv {
0031     struct regmap *regmap;
0032     unsigned int pcmclk;
0033 };
0034 
0035 static const struct reg_default wm8991_reg_defaults[] = {
0036     {  1, 0x0000 },     /* R1  - Power Management (1) */
0037     {  2, 0x6000 },     /* R2  - Power Management (2) */
0038     {  3, 0x0000 },     /* R3  - Power Management (3) */
0039     {  4, 0x4050 },     /* R4  - Audio Interface (1) */
0040     {  5, 0x4000 },     /* R5  - Audio Interface (2) */
0041     {  6, 0x01C8 },     /* R6  - Clocking (1) */
0042     {  7, 0x0000 },     /* R7  - Clocking (2) */
0043     {  8, 0x0040 },     /* R8  - Audio Interface (3) */
0044     {  9, 0x0040 },     /* R9  - Audio Interface (4) */
0045     { 10, 0x0004 },     /* R10 - DAC CTRL */
0046     { 11, 0x00C0 },     /* R11 - Left DAC Digital Volume */
0047     { 12, 0x00C0 },     /* R12 - Right DAC Digital Volume */
0048     { 13, 0x0000 },     /* R13 - Digital Side Tone */
0049     { 14, 0x0100 },     /* R14 - ADC CTRL */
0050     { 15, 0x00C0 },     /* R15 - Left ADC Digital Volume */
0051     { 16, 0x00C0 },     /* R16 - Right ADC Digital Volume */
0052 
0053     { 18, 0x0000 },     /* R18 - GPIO CTRL 1 */
0054     { 19, 0x1000 },     /* R19 - GPIO1 & GPIO2 */
0055     { 20, 0x1010 },     /* R20 - GPIO3 & GPIO4 */
0056     { 21, 0x1010 },     /* R21 - GPIO5 & GPIO6 */
0057     { 22, 0x8000 },     /* R22 - GPIOCTRL 2 */
0058     { 23, 0x0800 },     /* R23 - GPIO_POL */
0059     { 24, 0x008B },     /* R24 - Left Line Input 1&2 Volume */
0060     { 25, 0x008B },     /* R25 - Left Line Input 3&4 Volume */
0061     { 26, 0x008B },     /* R26 - Right Line Input 1&2 Volume */
0062     { 27, 0x008B },     /* R27 - Right Line Input 3&4 Volume */
0063     { 28, 0x0000 },     /* R28 - Left Output Volume */
0064     { 29, 0x0000 },     /* R29 - Right Output Volume */
0065     { 30, 0x0066 },     /* R30 - Line Outputs Volume */
0066     { 31, 0x0022 },     /* R31 - Out3/4 Volume */
0067     { 32, 0x0079 },     /* R32 - Left OPGA Volume */
0068     { 33, 0x0079 },     /* R33 - Right OPGA Volume */
0069     { 34, 0x0003 },     /* R34 - Speaker Volume */
0070     { 35, 0x0003 },     /* R35 - ClassD1 */
0071 
0072     { 37, 0x0100 },     /* R37 - ClassD3 */
0073 
0074     { 39, 0x0000 },     /* R39 - Input Mixer1 */
0075     { 40, 0x0000 },     /* R40 - Input Mixer2 */
0076     { 41, 0x0000 },     /* R41 - Input Mixer3 */
0077     { 42, 0x0000 },     /* R42 - Input Mixer4 */
0078     { 43, 0x0000 },     /* R43 - Input Mixer5 */
0079     { 44, 0x0000 },     /* R44 - Input Mixer6 */
0080     { 45, 0x0000 },     /* R45 - Output Mixer1 */
0081     { 46, 0x0000 },     /* R46 - Output Mixer2 */
0082     { 47, 0x0000 },     /* R47 - Output Mixer3 */
0083     { 48, 0x0000 },     /* R48 - Output Mixer4 */
0084     { 49, 0x0000 },     /* R49 - Output Mixer5 */
0085     { 50, 0x0000 },     /* R50 - Output Mixer6 */
0086     { 51, 0x0180 },     /* R51 - Out3/4 Mixer */
0087     { 52, 0x0000 },     /* R52 - Line Mixer1 */
0088     { 53, 0x0000 },     /* R53 - Line Mixer2 */
0089     { 54, 0x0000 },     /* R54 - Speaker Mixer */
0090     { 55, 0x0000 },     /* R55 - Additional Control */
0091     { 56, 0x0000 },     /* R56 - AntiPOP1 */
0092     { 57, 0x0000 },     /* R57 - AntiPOP2 */
0093     { 58, 0x0000 },     /* R58 - MICBIAS */
0094 
0095     { 60, 0x0008 },     /* R60 - PLL1 */
0096     { 61, 0x0031 },     /* R61 - PLL2 */
0097     { 62, 0x0026 },     /* R62 - PLL3 */
0098 };
0099 
0100 static bool wm8991_volatile(struct device *dev, unsigned int reg)
0101 {
0102     switch (reg) {
0103     case WM8991_RESET:
0104         return true;
0105     default:
0106         return false;
0107     }
0108 }
0109 
0110 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(in_pga_tlv, -1650, 150, 0);
0111 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(out_mix_tlv, -2100, 300, 0);
0112 static const SNDRV_CTL_TLVD_DECLARE_DB_RANGE(out_pga_tlv,
0113     0x00, 0x2f, SNDRV_CTL_TLVD_DB_SCALE_ITEM(SNDRV_CTL_TLVD_DB_GAIN_MUTE, 0, 1),
0114     0x30, 0x7f, SNDRV_CTL_TLVD_DB_SCALE_ITEM(-7300, 100, 0),
0115 );
0116 static const SNDRV_CTL_TLVD_DECLARE_DB_RANGE(out_dac_tlv,
0117     0x00, 0xbf, SNDRV_CTL_TLVD_DB_SCALE_ITEM(-71625, 375, 1),
0118     0xc0, 0xff, SNDRV_CTL_TLVD_DB_SCALE_ITEM(0, 0, 0),
0119 );
0120 static const SNDRV_CTL_TLVD_DECLARE_DB_RANGE(in_adc_tlv,
0121     0x00, 0xef, SNDRV_CTL_TLVD_DB_SCALE_ITEM(-71625, 375, 1),
0122     0xf0, 0xff, SNDRV_CTL_TLVD_DB_SCALE_ITEM(17625, 0, 0),
0123 );
0124 static const SNDRV_CTL_TLVD_DECLARE_DB_RANGE(out_sidetone_tlv,
0125     0x00, 0x0c, SNDRV_CTL_TLVD_DB_SCALE_ITEM(-3600, 300, 0),
0126     0x0d, 0x0f, SNDRV_CTL_TLVD_DB_SCALE_ITEM(0, 0, 0),
0127 );
0128 
0129 static int wm899x_outpga_put_volsw_vu(struct snd_kcontrol *kcontrol,
0130                       struct snd_ctl_elem_value *ucontrol)
0131 {
0132     struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
0133     int reg = kcontrol->private_value & 0xff;
0134     int ret;
0135     u16 val;
0136 
0137     ret = snd_soc_put_volsw(kcontrol, ucontrol);
0138     if (ret < 0)
0139         return ret;
0140 
0141     /* now hit the volume update bits (always bit 8) */
0142     val = snd_soc_component_read(component, reg);
0143     return snd_soc_component_write(component, reg, val | 0x0100);
0144 }
0145 
0146 static const char *wm8991_digital_sidetone[] =
0147 {"None", "Left ADC", "Right ADC", "Reserved"};
0148 
0149 static SOC_ENUM_SINGLE_DECL(wm8991_left_digital_sidetone_enum,
0150                 WM8991_DIGITAL_SIDE_TONE,
0151                 WM8991_ADC_TO_DACL_SHIFT,
0152                 wm8991_digital_sidetone);
0153 
0154 static SOC_ENUM_SINGLE_DECL(wm8991_right_digital_sidetone_enum,
0155                 WM8991_DIGITAL_SIDE_TONE,
0156                 WM8991_ADC_TO_DACR_SHIFT,
0157                 wm8991_digital_sidetone);
0158 
0159 static const char *wm8991_adcmode[] =
0160 {"Hi-fi mode", "Voice mode 1", "Voice mode 2", "Voice mode 3"};
0161 
0162 static SOC_ENUM_SINGLE_DECL(wm8991_right_adcmode_enum,
0163                 WM8991_ADC_CTRL,
0164                 WM8991_ADC_HPF_CUT_SHIFT,
0165                 wm8991_adcmode);
0166 
0167 static const struct snd_kcontrol_new wm8991_snd_controls[] = {
0168     /* INMIXL */
0169     SOC_SINGLE("LIN12 PGA Boost", WM8991_INPUT_MIXER3, WM8991_L12MNBST_BIT, 1, 0),
0170     SOC_SINGLE("LIN34 PGA Boost", WM8991_INPUT_MIXER3, WM8991_L34MNBST_BIT, 1, 0),
0171     /* INMIXR */
0172     SOC_SINGLE("RIN12 PGA Boost", WM8991_INPUT_MIXER3, WM8991_R12MNBST_BIT, 1, 0),
0173     SOC_SINGLE("RIN34 PGA Boost", WM8991_INPUT_MIXER3, WM8991_R34MNBST_BIT, 1, 0),
0174 
0175     /* LOMIX */
0176     SOC_SINGLE_TLV("LOMIX LIN3 Bypass Volume", WM8991_OUTPUT_MIXER3,
0177         WM8991_LLI3LOVOL_SHIFT, WM8991_LLI3LOVOL_MASK, 1, out_mix_tlv),
0178     SOC_SINGLE_TLV("LOMIX RIN12 PGA Bypass Volume", WM8991_OUTPUT_MIXER3,
0179         WM8991_LR12LOVOL_SHIFT, WM8991_LR12LOVOL_MASK, 1, out_mix_tlv),
0180     SOC_SINGLE_TLV("LOMIX LIN12 PGA Bypass Volume", WM8991_OUTPUT_MIXER3,
0181         WM8991_LL12LOVOL_SHIFT, WM8991_LL12LOVOL_MASK, 1, out_mix_tlv),
0182     SOC_SINGLE_TLV("LOMIX RIN3 Bypass Volume", WM8991_OUTPUT_MIXER5,
0183         WM8991_LRI3LOVOL_SHIFT, WM8991_LRI3LOVOL_MASK, 1, out_mix_tlv),
0184     SOC_SINGLE_TLV("LOMIX AINRMUX Bypass Volume", WM8991_OUTPUT_MIXER5,
0185         WM8991_LRBLOVOL_SHIFT, WM8991_LRBLOVOL_MASK, 1, out_mix_tlv),
0186     SOC_SINGLE_TLV("LOMIX AINLMUX Bypass Volume", WM8991_OUTPUT_MIXER5,
0187         WM8991_LRBLOVOL_SHIFT, WM8991_LRBLOVOL_MASK, 1, out_mix_tlv),
0188 
0189     /* ROMIX */
0190     SOC_SINGLE_TLV("ROMIX RIN3 Bypass Volume", WM8991_OUTPUT_MIXER4,
0191         WM8991_RRI3ROVOL_SHIFT, WM8991_RRI3ROVOL_MASK, 1, out_mix_tlv),
0192     SOC_SINGLE_TLV("ROMIX LIN12 PGA Bypass Volume", WM8991_OUTPUT_MIXER4,
0193         WM8991_RL12ROVOL_SHIFT, WM8991_RL12ROVOL_MASK, 1, out_mix_tlv),
0194     SOC_SINGLE_TLV("ROMIX RIN12 PGA Bypass Volume", WM8991_OUTPUT_MIXER4,
0195         WM8991_RR12ROVOL_SHIFT, WM8991_RR12ROVOL_MASK, 1, out_mix_tlv),
0196     SOC_SINGLE_TLV("ROMIX LIN3 Bypass Volume", WM8991_OUTPUT_MIXER6,
0197         WM8991_RLI3ROVOL_SHIFT, WM8991_RLI3ROVOL_MASK, 1, out_mix_tlv),
0198     SOC_SINGLE_TLV("ROMIX AINLMUX Bypass Volume", WM8991_OUTPUT_MIXER6,
0199         WM8991_RLBROVOL_SHIFT, WM8991_RLBROVOL_MASK, 1, out_mix_tlv),
0200     SOC_SINGLE_TLV("ROMIX AINRMUX Bypass Volume", WM8991_OUTPUT_MIXER6,
0201         WM8991_RRBROVOL_SHIFT, WM8991_RRBROVOL_MASK, 1, out_mix_tlv),
0202 
0203     /* LOUT */
0204     SOC_WM899X_OUTPGA_SINGLE_R_TLV("LOUT Volume", WM8991_LEFT_OUTPUT_VOLUME,
0205         WM8991_LOUTVOL_SHIFT, WM8991_LOUTVOL_MASK, 0, out_pga_tlv),
0206     SOC_SINGLE("LOUT ZC", WM8991_LEFT_OUTPUT_VOLUME, WM8991_LOZC_BIT, 1, 0),
0207 
0208     /* ROUT */
0209     SOC_WM899X_OUTPGA_SINGLE_R_TLV("ROUT Volume", WM8991_RIGHT_OUTPUT_VOLUME,
0210         WM8991_ROUTVOL_SHIFT, WM8991_ROUTVOL_MASK, 0, out_pga_tlv),
0211     SOC_SINGLE("ROUT ZC", WM8991_RIGHT_OUTPUT_VOLUME, WM8991_ROZC_BIT, 1, 0),
0212 
0213     /* LOPGA */
0214     SOC_WM899X_OUTPGA_SINGLE_R_TLV("LOPGA Volume", WM8991_LEFT_OPGA_VOLUME,
0215         WM8991_LOPGAVOL_SHIFT, WM8991_LOPGAVOL_MASK, 0, out_pga_tlv),
0216     SOC_SINGLE("LOPGA ZC Switch", WM8991_LEFT_OPGA_VOLUME,
0217         WM8991_LOPGAZC_BIT, 1, 0),
0218 
0219     /* ROPGA */
0220     SOC_WM899X_OUTPGA_SINGLE_R_TLV("ROPGA Volume", WM8991_RIGHT_OPGA_VOLUME,
0221         WM8991_ROPGAVOL_SHIFT, WM8991_ROPGAVOL_MASK, 0, out_pga_tlv),
0222     SOC_SINGLE("ROPGA ZC Switch", WM8991_RIGHT_OPGA_VOLUME,
0223         WM8991_ROPGAZC_BIT, 1, 0),
0224 
0225     SOC_SINGLE("LON Mute Switch", WM8991_LINE_OUTPUTS_VOLUME,
0226         WM8991_LONMUTE_BIT, 1, 0),
0227     SOC_SINGLE("LOP Mute Switch", WM8991_LINE_OUTPUTS_VOLUME,
0228         WM8991_LOPMUTE_BIT, 1, 0),
0229     SOC_SINGLE("LOP Attenuation Switch", WM8991_LINE_OUTPUTS_VOLUME,
0230         WM8991_LOATTN_BIT, 1, 0),
0231     SOC_SINGLE("RON Mute Switch", WM8991_LINE_OUTPUTS_VOLUME,
0232         WM8991_RONMUTE_BIT, 1, 0),
0233     SOC_SINGLE("ROP Mute Switch", WM8991_LINE_OUTPUTS_VOLUME,
0234         WM8991_ROPMUTE_BIT, 1, 0),
0235     SOC_SINGLE("ROP Attenuation Switch", WM8991_LINE_OUTPUTS_VOLUME,
0236         WM8991_ROATTN_BIT, 1, 0),
0237 
0238     SOC_SINGLE("OUT3 Mute Switch", WM8991_OUT3_4_VOLUME,
0239         WM8991_OUT3MUTE_BIT, 1, 0),
0240     SOC_SINGLE("OUT3 Attenuation Switch", WM8991_OUT3_4_VOLUME,
0241         WM8991_OUT3ATTN_BIT, 1, 0),
0242 
0243     SOC_SINGLE("OUT4 Mute Switch", WM8991_OUT3_4_VOLUME,
0244         WM8991_OUT4MUTE_BIT, 1, 0),
0245     SOC_SINGLE("OUT4 Attenuation Switch", WM8991_OUT3_4_VOLUME,
0246         WM8991_OUT4ATTN_BIT, 1, 0),
0247 
0248     SOC_SINGLE("Speaker Mode Switch", WM8991_CLASSD1,
0249         WM8991_CDMODE_BIT, 1, 0),
0250 
0251     SOC_SINGLE("Speaker Output Attenuation Volume", WM8991_SPEAKER_VOLUME,
0252         WM8991_SPKVOL_SHIFT, WM8991_SPKVOL_MASK, 0),
0253     SOC_SINGLE("Speaker DC Boost Volume", WM8991_CLASSD3,
0254         WM8991_DCGAIN_SHIFT, WM8991_DCGAIN_MASK, 0),
0255     SOC_SINGLE("Speaker AC Boost Volume", WM8991_CLASSD3,
0256         WM8991_ACGAIN_SHIFT, WM8991_ACGAIN_MASK, 0),
0257 
0258     SOC_WM899X_OUTPGA_SINGLE_R_TLV("Left DAC Digital Volume",
0259         WM8991_LEFT_DAC_DIGITAL_VOLUME,
0260         WM8991_DACL_VOL_SHIFT,
0261         WM8991_DACL_VOL_MASK,
0262         0,
0263         out_dac_tlv),
0264 
0265     SOC_WM899X_OUTPGA_SINGLE_R_TLV("Right DAC Digital Volume",
0266         WM8991_RIGHT_DAC_DIGITAL_VOLUME,
0267         WM8991_DACR_VOL_SHIFT,
0268         WM8991_DACR_VOL_MASK,
0269         0,
0270         out_dac_tlv),
0271 
0272     SOC_ENUM("Left Digital Sidetone", wm8991_left_digital_sidetone_enum),
0273     SOC_ENUM("Right Digital Sidetone", wm8991_right_digital_sidetone_enum),
0274 
0275     SOC_SINGLE_TLV("Left Digital Sidetone Volume", WM8991_DIGITAL_SIDE_TONE,
0276         WM8991_ADCL_DAC_SVOL_SHIFT, WM8991_ADCL_DAC_SVOL_MASK, 0,
0277         out_sidetone_tlv),
0278     SOC_SINGLE_TLV("Right Digital Sidetone Volume", WM8991_DIGITAL_SIDE_TONE,
0279         WM8991_ADCR_DAC_SVOL_SHIFT, WM8991_ADCR_DAC_SVOL_MASK, 0,
0280         out_sidetone_tlv),
0281 
0282     SOC_SINGLE("ADC Digital High Pass Filter Switch", WM8991_ADC_CTRL,
0283         WM8991_ADC_HPF_ENA_BIT, 1, 0),
0284 
0285     SOC_ENUM("ADC HPF Mode", wm8991_right_adcmode_enum),
0286 
0287     SOC_WM899X_OUTPGA_SINGLE_R_TLV("Left ADC Digital Volume",
0288         WM8991_LEFT_ADC_DIGITAL_VOLUME,
0289         WM8991_ADCL_VOL_SHIFT,
0290         WM8991_ADCL_VOL_MASK,
0291         0,
0292         in_adc_tlv),
0293 
0294     SOC_WM899X_OUTPGA_SINGLE_R_TLV("Right ADC Digital Volume",
0295         WM8991_RIGHT_ADC_DIGITAL_VOLUME,
0296         WM8991_ADCR_VOL_SHIFT,
0297         WM8991_ADCR_VOL_MASK,
0298         0,
0299         in_adc_tlv),
0300 
0301     SOC_WM899X_OUTPGA_SINGLE_R_TLV("LIN12 Volume",
0302         WM8991_LEFT_LINE_INPUT_1_2_VOLUME,
0303         WM8991_LIN12VOL_SHIFT,
0304         WM8991_LIN12VOL_MASK,
0305         0,
0306         in_pga_tlv),
0307 
0308     SOC_SINGLE("LIN12 ZC Switch", WM8991_LEFT_LINE_INPUT_1_2_VOLUME,
0309         WM8991_LI12ZC_BIT, 1, 0),
0310 
0311     SOC_SINGLE("LIN12 Mute Switch", WM8991_LEFT_LINE_INPUT_1_2_VOLUME,
0312         WM8991_LI12MUTE_BIT, 1, 0),
0313 
0314     SOC_WM899X_OUTPGA_SINGLE_R_TLV("LIN34 Volume",
0315         WM8991_LEFT_LINE_INPUT_3_4_VOLUME,
0316         WM8991_LIN34VOL_SHIFT,
0317         WM8991_LIN34VOL_MASK,
0318         0,
0319         in_pga_tlv),
0320 
0321     SOC_SINGLE("LIN34 ZC Switch", WM8991_LEFT_LINE_INPUT_3_4_VOLUME,
0322         WM8991_LI34ZC_BIT, 1, 0),
0323 
0324     SOC_SINGLE("LIN34 Mute Switch", WM8991_LEFT_LINE_INPUT_3_4_VOLUME,
0325         WM8991_LI34MUTE_BIT, 1, 0),
0326 
0327     SOC_WM899X_OUTPGA_SINGLE_R_TLV("RIN12 Volume",
0328         WM8991_RIGHT_LINE_INPUT_1_2_VOLUME,
0329         WM8991_RIN12VOL_SHIFT,
0330         WM8991_RIN12VOL_MASK,
0331         0,
0332         in_pga_tlv),
0333 
0334     SOC_SINGLE("RIN12 ZC Switch", WM8991_RIGHT_LINE_INPUT_1_2_VOLUME,
0335         WM8991_RI12ZC_BIT, 1, 0),
0336 
0337     SOC_SINGLE("RIN12 Mute Switch", WM8991_RIGHT_LINE_INPUT_1_2_VOLUME,
0338         WM8991_RI12MUTE_BIT, 1, 0),
0339 
0340     SOC_WM899X_OUTPGA_SINGLE_R_TLV("RIN34 Volume",
0341         WM8991_RIGHT_LINE_INPUT_3_4_VOLUME,
0342         WM8991_RIN34VOL_SHIFT,
0343         WM8991_RIN34VOL_MASK,
0344         0,
0345         in_pga_tlv),
0346 
0347     SOC_SINGLE("RIN34 ZC Switch", WM8991_RIGHT_LINE_INPUT_3_4_VOLUME,
0348         WM8991_RI34ZC_BIT, 1, 0),
0349 
0350     SOC_SINGLE("RIN34 Mute Switch", WM8991_RIGHT_LINE_INPUT_3_4_VOLUME,
0351         WM8991_RI34MUTE_BIT, 1, 0),
0352 };
0353 
0354 /*
0355  * _DAPM_ Controls
0356  */
0357 static int outmixer_event(struct snd_soc_dapm_widget *w,
0358               struct snd_kcontrol *kcontrol, int event)
0359 {
0360     struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
0361     u32 reg_shift = kcontrol->private_value & 0xfff;
0362     int ret = 0;
0363     u16 reg;
0364 
0365     switch (reg_shift) {
0366     case WM8991_SPEAKER_MIXER | (WM8991_LDSPK_BIT << 8):
0367         reg = snd_soc_component_read(component, WM8991_OUTPUT_MIXER1);
0368         if (reg & WM8991_LDLO) {
0369             printk(KERN_WARNING
0370                    "Cannot set as Output Mixer 1 LDLO Set\n");
0371             ret = -1;
0372         }
0373         break;
0374 
0375     case WM8991_SPEAKER_MIXER | (WM8991_RDSPK_BIT << 8):
0376         reg = snd_soc_component_read(component, WM8991_OUTPUT_MIXER2);
0377         if (reg & WM8991_RDRO) {
0378             printk(KERN_WARNING
0379                    "Cannot set as Output Mixer 2 RDRO Set\n");
0380             ret = -1;
0381         }
0382         break;
0383 
0384     case WM8991_OUTPUT_MIXER1 | (WM8991_LDLO_BIT << 8):
0385         reg = snd_soc_component_read(component, WM8991_SPEAKER_MIXER);
0386         if (reg & WM8991_LDSPK) {
0387             printk(KERN_WARNING
0388                    "Cannot set as Speaker Mixer LDSPK Set\n");
0389             ret = -1;
0390         }
0391         break;
0392 
0393     case WM8991_OUTPUT_MIXER2 | (WM8991_RDRO_BIT << 8):
0394         reg = snd_soc_component_read(component, WM8991_SPEAKER_MIXER);
0395         if (reg & WM8991_RDSPK) {
0396             printk(KERN_WARNING
0397                    "Cannot set as Speaker Mixer RDSPK Set\n");
0398             ret = -1;
0399         }
0400         break;
0401     }
0402 
0403     return ret;
0404 }
0405 
0406 /* INMIX dB values */
0407 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(in_mix_tlv, -1200, 300, 1);
0408 
0409 /* Left In PGA Connections */
0410 static const struct snd_kcontrol_new wm8991_dapm_lin12_pga_controls[] = {
0411     SOC_DAPM_SINGLE("LIN1 Switch", WM8991_INPUT_MIXER2, WM8991_LMN1_BIT, 1, 0),
0412     SOC_DAPM_SINGLE("LIN2 Switch", WM8991_INPUT_MIXER2, WM8991_LMP2_BIT, 1, 0),
0413 };
0414 
0415 static const struct snd_kcontrol_new wm8991_dapm_lin34_pga_controls[] = {
0416     SOC_DAPM_SINGLE("LIN3 Switch", WM8991_INPUT_MIXER2, WM8991_LMN3_BIT, 1, 0),
0417     SOC_DAPM_SINGLE("LIN4 Switch", WM8991_INPUT_MIXER2, WM8991_LMP4_BIT, 1, 0),
0418 };
0419 
0420 /* Right In PGA Connections */
0421 static const struct snd_kcontrol_new wm8991_dapm_rin12_pga_controls[] = {
0422     SOC_DAPM_SINGLE("RIN1 Switch", WM8991_INPUT_MIXER2, WM8991_RMN1_BIT, 1, 0),
0423     SOC_DAPM_SINGLE("RIN2 Switch", WM8991_INPUT_MIXER2, WM8991_RMP2_BIT, 1, 0),
0424 };
0425 
0426 static const struct snd_kcontrol_new wm8991_dapm_rin34_pga_controls[] = {
0427     SOC_DAPM_SINGLE("RIN3 Switch", WM8991_INPUT_MIXER2, WM8991_RMN3_BIT, 1, 0),
0428     SOC_DAPM_SINGLE("RIN4 Switch", WM8991_INPUT_MIXER2, WM8991_RMP4_BIT, 1, 0),
0429 };
0430 
0431 /* INMIXL */
0432 static const struct snd_kcontrol_new wm8991_dapm_inmixl_controls[] = {
0433     SOC_DAPM_SINGLE_TLV("Record Left Volume", WM8991_INPUT_MIXER3,
0434         WM8991_LDBVOL_SHIFT, WM8991_LDBVOL_MASK, 0, in_mix_tlv),
0435     SOC_DAPM_SINGLE_TLV("LIN2 Volume", WM8991_INPUT_MIXER5, WM8991_LI2BVOL_SHIFT,
0436         7, 0, in_mix_tlv),
0437     SOC_DAPM_SINGLE("LINPGA12 Switch", WM8991_INPUT_MIXER3, WM8991_L12MNB_BIT,
0438         1, 0),
0439     SOC_DAPM_SINGLE("LINPGA34 Switch", WM8991_INPUT_MIXER3, WM8991_L34MNB_BIT,
0440         1, 0),
0441 };
0442 
0443 /* INMIXR */
0444 static const struct snd_kcontrol_new wm8991_dapm_inmixr_controls[] = {
0445     SOC_DAPM_SINGLE_TLV("Record Right Volume", WM8991_INPUT_MIXER4,
0446         WM8991_RDBVOL_SHIFT, WM8991_RDBVOL_MASK, 0, in_mix_tlv),
0447     SOC_DAPM_SINGLE_TLV("RIN2 Volume", WM8991_INPUT_MIXER6, WM8991_RI2BVOL_SHIFT,
0448         7, 0, in_mix_tlv),
0449     SOC_DAPM_SINGLE("RINPGA12 Switch", WM8991_INPUT_MIXER3, WM8991_L12MNB_BIT,
0450         1, 0),
0451     SOC_DAPM_SINGLE("RINPGA34 Switch", WM8991_INPUT_MIXER3, WM8991_L34MNB_BIT,
0452         1, 0),
0453 };
0454 
0455 /* AINLMUX */
0456 static const char *wm8991_ainlmux[] =
0457 {"INMIXL Mix", "RXVOICE Mix", "DIFFINL Mix"};
0458 
0459 static SOC_ENUM_SINGLE_DECL(wm8991_ainlmux_enum,
0460                 WM8991_INPUT_MIXER1, WM8991_AINLMODE_SHIFT,
0461                 wm8991_ainlmux);
0462 
0463 static const struct snd_kcontrol_new wm8991_dapm_ainlmux_controls =
0464     SOC_DAPM_ENUM("Route", wm8991_ainlmux_enum);
0465 
0466 /* DIFFINL */
0467 
0468 /* AINRMUX */
0469 static const char *wm8991_ainrmux[] =
0470 {"INMIXR Mix", "RXVOICE Mix", "DIFFINR Mix"};
0471 
0472 static SOC_ENUM_SINGLE_DECL(wm8991_ainrmux_enum,
0473                 WM8991_INPUT_MIXER1, WM8991_AINRMODE_SHIFT,
0474                 wm8991_ainrmux);
0475 
0476 static const struct snd_kcontrol_new wm8991_dapm_ainrmux_controls =
0477     SOC_DAPM_ENUM("Route", wm8991_ainrmux_enum);
0478 
0479 /* LOMIX */
0480 static const struct snd_kcontrol_new wm8991_dapm_lomix_controls[] = {
0481     SOC_DAPM_SINGLE("LOMIX Right ADC Bypass Switch", WM8991_OUTPUT_MIXER1,
0482         WM8991_LRBLO_BIT, 1, 0),
0483     SOC_DAPM_SINGLE("LOMIX Left ADC Bypass Switch", WM8991_OUTPUT_MIXER1,
0484         WM8991_LLBLO_BIT, 1, 0),
0485     SOC_DAPM_SINGLE("LOMIX RIN3 Bypass Switch", WM8991_OUTPUT_MIXER1,
0486         WM8991_LRI3LO_BIT, 1, 0),
0487     SOC_DAPM_SINGLE("LOMIX LIN3 Bypass Switch", WM8991_OUTPUT_MIXER1,
0488         WM8991_LLI3LO_BIT, 1, 0),
0489     SOC_DAPM_SINGLE("LOMIX RIN12 PGA Bypass Switch", WM8991_OUTPUT_MIXER1,
0490         WM8991_LR12LO_BIT, 1, 0),
0491     SOC_DAPM_SINGLE("LOMIX LIN12 PGA Bypass Switch", WM8991_OUTPUT_MIXER1,
0492         WM8991_LL12LO_BIT, 1, 0),
0493     SOC_DAPM_SINGLE("LOMIX Left DAC Switch", WM8991_OUTPUT_MIXER1,
0494         WM8991_LDLO_BIT, 1, 0),
0495 };
0496 
0497 /* ROMIX */
0498 static const struct snd_kcontrol_new wm8991_dapm_romix_controls[] = {
0499     SOC_DAPM_SINGLE("ROMIX Left ADC Bypass Switch", WM8991_OUTPUT_MIXER2,
0500         WM8991_RLBRO_BIT, 1, 0),
0501     SOC_DAPM_SINGLE("ROMIX Right ADC Bypass Switch", WM8991_OUTPUT_MIXER2,
0502         WM8991_RRBRO_BIT, 1, 0),
0503     SOC_DAPM_SINGLE("ROMIX LIN3 Bypass Switch", WM8991_OUTPUT_MIXER2,
0504         WM8991_RLI3RO_BIT, 1, 0),
0505     SOC_DAPM_SINGLE("ROMIX RIN3 Bypass Switch", WM8991_OUTPUT_MIXER2,
0506         WM8991_RRI3RO_BIT, 1, 0),
0507     SOC_DAPM_SINGLE("ROMIX LIN12 PGA Bypass Switch", WM8991_OUTPUT_MIXER2,
0508         WM8991_RL12RO_BIT, 1, 0),
0509     SOC_DAPM_SINGLE("ROMIX RIN12 PGA Bypass Switch", WM8991_OUTPUT_MIXER2,
0510         WM8991_RR12RO_BIT, 1, 0),
0511     SOC_DAPM_SINGLE("ROMIX Right DAC Switch", WM8991_OUTPUT_MIXER2,
0512         WM8991_RDRO_BIT, 1, 0),
0513 };
0514 
0515 /* LONMIX */
0516 static const struct snd_kcontrol_new wm8991_dapm_lonmix_controls[] = {
0517     SOC_DAPM_SINGLE("LONMIX Left Mixer PGA Switch", WM8991_LINE_MIXER1,
0518         WM8991_LLOPGALON_BIT, 1, 0),
0519     SOC_DAPM_SINGLE("LONMIX Right Mixer PGA Switch", WM8991_LINE_MIXER1,
0520         WM8991_LROPGALON_BIT, 1, 0),
0521     SOC_DAPM_SINGLE("LONMIX Inverted LOP Switch", WM8991_LINE_MIXER1,
0522         WM8991_LOPLON_BIT, 1, 0),
0523 };
0524 
0525 /* LOPMIX */
0526 static const struct snd_kcontrol_new wm8991_dapm_lopmix_controls[] = {
0527     SOC_DAPM_SINGLE("LOPMIX Right Mic Bypass Switch", WM8991_LINE_MIXER1,
0528         WM8991_LR12LOP_BIT, 1, 0),
0529     SOC_DAPM_SINGLE("LOPMIX Left Mic Bypass Switch", WM8991_LINE_MIXER1,
0530         WM8991_LL12LOP_BIT, 1, 0),
0531     SOC_DAPM_SINGLE("LOPMIX Left Mixer PGA Switch", WM8991_LINE_MIXER1,
0532         WM8991_LLOPGALOP_BIT, 1, 0),
0533 };
0534 
0535 /* RONMIX */
0536 static const struct snd_kcontrol_new wm8991_dapm_ronmix_controls[] = {
0537     SOC_DAPM_SINGLE("RONMIX Right Mixer PGA Switch", WM8991_LINE_MIXER2,
0538         WM8991_RROPGARON_BIT, 1, 0),
0539     SOC_DAPM_SINGLE("RONMIX Left Mixer PGA Switch", WM8991_LINE_MIXER2,
0540         WM8991_RLOPGARON_BIT, 1, 0),
0541     SOC_DAPM_SINGLE("RONMIX Inverted ROP Switch", WM8991_LINE_MIXER2,
0542         WM8991_ROPRON_BIT, 1, 0),
0543 };
0544 
0545 /* ROPMIX */
0546 static const struct snd_kcontrol_new wm8991_dapm_ropmix_controls[] = {
0547     SOC_DAPM_SINGLE("ROPMIX Left Mic Bypass Switch", WM8991_LINE_MIXER2,
0548         WM8991_RL12ROP_BIT, 1, 0),
0549     SOC_DAPM_SINGLE("ROPMIX Right Mic Bypass Switch", WM8991_LINE_MIXER2,
0550         WM8991_RR12ROP_BIT, 1, 0),
0551     SOC_DAPM_SINGLE("ROPMIX Right Mixer PGA Switch", WM8991_LINE_MIXER2,
0552         WM8991_RROPGAROP_BIT, 1, 0),
0553 };
0554 
0555 /* OUT3MIX */
0556 static const struct snd_kcontrol_new wm8991_dapm_out3mix_controls[] = {
0557     SOC_DAPM_SINGLE("OUT3MIX LIN4RXN Bypass Switch", WM8991_OUT3_4_MIXER,
0558         WM8991_LI4O3_BIT, 1, 0),
0559     SOC_DAPM_SINGLE("OUT3MIX Left Out PGA Switch", WM8991_OUT3_4_MIXER,
0560         WM8991_LPGAO3_BIT, 1, 0),
0561 };
0562 
0563 /* OUT4MIX */
0564 static const struct snd_kcontrol_new wm8991_dapm_out4mix_controls[] = {
0565     SOC_DAPM_SINGLE("OUT4MIX Right Out PGA Switch", WM8991_OUT3_4_MIXER,
0566         WM8991_RPGAO4_BIT, 1, 0),
0567     SOC_DAPM_SINGLE("OUT4MIX RIN4RXP Bypass Switch", WM8991_OUT3_4_MIXER,
0568         WM8991_RI4O4_BIT, 1, 0),
0569 };
0570 
0571 /* SPKMIX */
0572 static const struct snd_kcontrol_new wm8991_dapm_spkmix_controls[] = {
0573     SOC_DAPM_SINGLE("SPKMIX LIN2 Bypass Switch", WM8991_SPEAKER_MIXER,
0574         WM8991_LI2SPK_BIT, 1, 0),
0575     SOC_DAPM_SINGLE("SPKMIX LADC Bypass Switch", WM8991_SPEAKER_MIXER,
0576         WM8991_LB2SPK_BIT, 1, 0),
0577     SOC_DAPM_SINGLE("SPKMIX Left Mixer PGA Switch", WM8991_SPEAKER_MIXER,
0578         WM8991_LOPGASPK_BIT, 1, 0),
0579     SOC_DAPM_SINGLE("SPKMIX Left DAC Switch", WM8991_SPEAKER_MIXER,
0580         WM8991_LDSPK_BIT, 1, 0),
0581     SOC_DAPM_SINGLE("SPKMIX Right DAC Switch", WM8991_SPEAKER_MIXER,
0582         WM8991_RDSPK_BIT, 1, 0),
0583     SOC_DAPM_SINGLE("SPKMIX Right Mixer PGA Switch", WM8991_SPEAKER_MIXER,
0584         WM8991_ROPGASPK_BIT, 1, 0),
0585     SOC_DAPM_SINGLE("SPKMIX RADC Bypass Switch", WM8991_SPEAKER_MIXER,
0586         WM8991_RL12ROP_BIT, 1, 0),
0587     SOC_DAPM_SINGLE("SPKMIX RIN2 Bypass Switch", WM8991_SPEAKER_MIXER,
0588         WM8991_RI2SPK_BIT, 1, 0),
0589 };
0590 
0591 static const struct snd_soc_dapm_widget wm8991_dapm_widgets[] = {
0592     /* Input Side */
0593     /* Input Lines */
0594     SND_SOC_DAPM_INPUT("LIN1"),
0595     SND_SOC_DAPM_INPUT("LIN2"),
0596     SND_SOC_DAPM_INPUT("LIN3"),
0597     SND_SOC_DAPM_INPUT("LIN4RXN"),
0598     SND_SOC_DAPM_INPUT("RIN3"),
0599     SND_SOC_DAPM_INPUT("RIN4RXP"),
0600     SND_SOC_DAPM_INPUT("RIN1"),
0601     SND_SOC_DAPM_INPUT("RIN2"),
0602     SND_SOC_DAPM_INPUT("Internal ADC Source"),
0603 
0604     SND_SOC_DAPM_SUPPLY("INL", WM8991_POWER_MANAGEMENT_2,
0605                 WM8991_AINL_ENA_BIT, 0, NULL, 0),
0606     SND_SOC_DAPM_SUPPLY("INR", WM8991_POWER_MANAGEMENT_2,
0607                 WM8991_AINR_ENA_BIT, 0, NULL, 0),
0608 
0609     /* DACs */
0610     SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8991_POWER_MANAGEMENT_2,
0611         WM8991_ADCL_ENA_BIT, 0),
0612     SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8991_POWER_MANAGEMENT_2,
0613         WM8991_ADCR_ENA_BIT, 0),
0614 
0615     /* Input PGAs */
0616     SND_SOC_DAPM_MIXER("LIN12 PGA", WM8991_POWER_MANAGEMENT_2, WM8991_LIN12_ENA_BIT,
0617         0, &wm8991_dapm_lin12_pga_controls[0],
0618         ARRAY_SIZE(wm8991_dapm_lin12_pga_controls)),
0619     SND_SOC_DAPM_MIXER("LIN34 PGA", WM8991_POWER_MANAGEMENT_2, WM8991_LIN34_ENA_BIT,
0620         0, &wm8991_dapm_lin34_pga_controls[0],
0621         ARRAY_SIZE(wm8991_dapm_lin34_pga_controls)),
0622     SND_SOC_DAPM_MIXER("RIN12 PGA", WM8991_POWER_MANAGEMENT_2, WM8991_RIN12_ENA_BIT,
0623         0, &wm8991_dapm_rin12_pga_controls[0],
0624         ARRAY_SIZE(wm8991_dapm_rin12_pga_controls)),
0625     SND_SOC_DAPM_MIXER("RIN34 PGA", WM8991_POWER_MANAGEMENT_2, WM8991_RIN34_ENA_BIT,
0626         0, &wm8991_dapm_rin34_pga_controls[0],
0627         ARRAY_SIZE(wm8991_dapm_rin34_pga_controls)),
0628 
0629     /* INMIXL */
0630     SND_SOC_DAPM_MIXER("INMIXL", SND_SOC_NOPM, 0, 0,
0631         &wm8991_dapm_inmixl_controls[0],
0632         ARRAY_SIZE(wm8991_dapm_inmixl_controls)),
0633 
0634     /* AINLMUX */
0635     SND_SOC_DAPM_MUX("AINLMUX", SND_SOC_NOPM, 0, 0,
0636         &wm8991_dapm_ainlmux_controls),
0637 
0638     /* INMIXR */
0639     SND_SOC_DAPM_MIXER("INMIXR", SND_SOC_NOPM, 0, 0,
0640         &wm8991_dapm_inmixr_controls[0],
0641         ARRAY_SIZE(wm8991_dapm_inmixr_controls)),
0642 
0643     /* AINRMUX */
0644     SND_SOC_DAPM_MUX("AINRMUX", SND_SOC_NOPM, 0, 0,
0645         &wm8991_dapm_ainrmux_controls),
0646 
0647     /* Output Side */
0648     /* DACs */
0649     SND_SOC_DAPM_DAC("Left DAC", "Left Playback", WM8991_POWER_MANAGEMENT_3,
0650         WM8991_DACL_ENA_BIT, 0),
0651     SND_SOC_DAPM_DAC("Right DAC", "Right Playback", WM8991_POWER_MANAGEMENT_3,
0652         WM8991_DACR_ENA_BIT, 0),
0653 
0654     /* LOMIX */
0655     SND_SOC_DAPM_MIXER_E("LOMIX", WM8991_POWER_MANAGEMENT_3, WM8991_LOMIX_ENA_BIT,
0656         0, &wm8991_dapm_lomix_controls[0],
0657         ARRAY_SIZE(wm8991_dapm_lomix_controls),
0658         outmixer_event, SND_SOC_DAPM_PRE_REG),
0659 
0660     /* LONMIX */
0661     SND_SOC_DAPM_MIXER("LONMIX", WM8991_POWER_MANAGEMENT_3, WM8991_LON_ENA_BIT, 0,
0662         &wm8991_dapm_lonmix_controls[0],
0663         ARRAY_SIZE(wm8991_dapm_lonmix_controls)),
0664 
0665     /* LOPMIX */
0666     SND_SOC_DAPM_MIXER("LOPMIX", WM8991_POWER_MANAGEMENT_3, WM8991_LOP_ENA_BIT, 0,
0667         &wm8991_dapm_lopmix_controls[0],
0668         ARRAY_SIZE(wm8991_dapm_lopmix_controls)),
0669 
0670     /* OUT3MIX */
0671     SND_SOC_DAPM_MIXER("OUT3MIX", WM8991_POWER_MANAGEMENT_1, WM8991_OUT3_ENA_BIT, 0,
0672         &wm8991_dapm_out3mix_controls[0],
0673         ARRAY_SIZE(wm8991_dapm_out3mix_controls)),
0674 
0675     /* SPKMIX */
0676     SND_SOC_DAPM_MIXER_E("SPKMIX", WM8991_POWER_MANAGEMENT_1, WM8991_SPK_ENA_BIT, 0,
0677         &wm8991_dapm_spkmix_controls[0],
0678         ARRAY_SIZE(wm8991_dapm_spkmix_controls), outmixer_event,
0679         SND_SOC_DAPM_PRE_REG),
0680 
0681     /* OUT4MIX */
0682     SND_SOC_DAPM_MIXER("OUT4MIX", WM8991_POWER_MANAGEMENT_1, WM8991_OUT4_ENA_BIT, 0,
0683         &wm8991_dapm_out4mix_controls[0],
0684         ARRAY_SIZE(wm8991_dapm_out4mix_controls)),
0685 
0686     /* ROPMIX */
0687     SND_SOC_DAPM_MIXER("ROPMIX", WM8991_POWER_MANAGEMENT_3, WM8991_ROP_ENA_BIT, 0,
0688         &wm8991_dapm_ropmix_controls[0],
0689         ARRAY_SIZE(wm8991_dapm_ropmix_controls)),
0690 
0691     /* RONMIX */
0692     SND_SOC_DAPM_MIXER("RONMIX", WM8991_POWER_MANAGEMENT_3, WM8991_RON_ENA_BIT, 0,
0693         &wm8991_dapm_ronmix_controls[0],
0694         ARRAY_SIZE(wm8991_dapm_ronmix_controls)),
0695 
0696     /* ROMIX */
0697     SND_SOC_DAPM_MIXER_E("ROMIX", WM8991_POWER_MANAGEMENT_3, WM8991_ROMIX_ENA_BIT,
0698         0, &wm8991_dapm_romix_controls[0],
0699         ARRAY_SIZE(wm8991_dapm_romix_controls),
0700         outmixer_event, SND_SOC_DAPM_PRE_REG),
0701 
0702     /* LOUT PGA */
0703     SND_SOC_DAPM_PGA("LOUT PGA", WM8991_POWER_MANAGEMENT_1, WM8991_LOUT_ENA_BIT, 0,
0704         NULL, 0),
0705 
0706     /* ROUT PGA */
0707     SND_SOC_DAPM_PGA("ROUT PGA", WM8991_POWER_MANAGEMENT_1, WM8991_ROUT_ENA_BIT, 0,
0708         NULL, 0),
0709 
0710     /* LOPGA */
0711     SND_SOC_DAPM_PGA("LOPGA", WM8991_POWER_MANAGEMENT_3, WM8991_LOPGA_ENA_BIT, 0,
0712         NULL, 0),
0713 
0714     /* ROPGA */
0715     SND_SOC_DAPM_PGA("ROPGA", WM8991_POWER_MANAGEMENT_3, WM8991_ROPGA_ENA_BIT, 0,
0716         NULL, 0),
0717 
0718     /* MICBIAS */
0719     SND_SOC_DAPM_SUPPLY("MICBIAS", WM8991_POWER_MANAGEMENT_1,
0720                 WM8991_MICBIAS_ENA_BIT, 0, NULL, 0),
0721 
0722     SND_SOC_DAPM_OUTPUT("LON"),
0723     SND_SOC_DAPM_OUTPUT("LOP"),
0724     SND_SOC_DAPM_OUTPUT("OUT3"),
0725     SND_SOC_DAPM_OUTPUT("LOUT"),
0726     SND_SOC_DAPM_OUTPUT("SPKN"),
0727     SND_SOC_DAPM_OUTPUT("SPKP"),
0728     SND_SOC_DAPM_OUTPUT("ROUT"),
0729     SND_SOC_DAPM_OUTPUT("OUT4"),
0730     SND_SOC_DAPM_OUTPUT("ROP"),
0731     SND_SOC_DAPM_OUTPUT("RON"),
0732     SND_SOC_DAPM_OUTPUT("OUT"),
0733 
0734     SND_SOC_DAPM_OUTPUT("Internal DAC Sink"),
0735 };
0736 
0737 static const struct snd_soc_dapm_route wm8991_dapm_routes[] = {
0738     /* Make DACs turn on when playing even if not mixed into any outputs */
0739     {"Internal DAC Sink", NULL, "Left DAC"},
0740     {"Internal DAC Sink", NULL, "Right DAC"},
0741 
0742     /* Make ADCs turn on when recording even if not mixed from any inputs */
0743     {"Left ADC", NULL, "Internal ADC Source"},
0744     {"Right ADC", NULL, "Internal ADC Source"},
0745 
0746     /* Input Side */
0747     {"INMIXL", NULL, "INL"},
0748     {"AINLMUX", NULL, "INL"},
0749     {"INMIXR", NULL, "INR"},
0750     {"AINRMUX", NULL, "INR"},
0751     /* LIN12 PGA */
0752     {"LIN12 PGA", "LIN1 Switch", "LIN1"},
0753     {"LIN12 PGA", "LIN2 Switch", "LIN2"},
0754     /* LIN34 PGA */
0755     {"LIN34 PGA", "LIN3 Switch", "LIN3"},
0756     {"LIN34 PGA", "LIN4 Switch", "LIN4RXN"},
0757     /* INMIXL */
0758     {"INMIXL", "Record Left Volume", "LOMIX"},
0759     {"INMIXL", "LIN2 Volume", "LIN2"},
0760     {"INMIXL", "LINPGA12 Switch", "LIN12 PGA"},
0761     {"INMIXL", "LINPGA34 Switch", "LIN34 PGA"},
0762     /* AINLMUX */
0763     {"AINLMUX", "INMIXL Mix", "INMIXL"},
0764     {"AINLMUX", "DIFFINL Mix", "LIN12 PGA"},
0765     {"AINLMUX", "DIFFINL Mix", "LIN34 PGA"},
0766     {"AINLMUX", "RXVOICE Mix", "LIN4RXN"},
0767     {"AINLMUX", "RXVOICE Mix", "RIN4RXP"},
0768     /* ADC */
0769     {"Left ADC", NULL, "AINLMUX"},
0770 
0771     /* RIN12 PGA */
0772     {"RIN12 PGA", "RIN1 Switch", "RIN1"},
0773     {"RIN12 PGA", "RIN2 Switch", "RIN2"},
0774     /* RIN34 PGA */
0775     {"RIN34 PGA", "RIN3 Switch", "RIN3"},
0776     {"RIN34 PGA", "RIN4 Switch", "RIN4RXP"},
0777     /* INMIXL */
0778     {"INMIXR", "Record Right Volume", "ROMIX"},
0779     {"INMIXR", "RIN2 Volume", "RIN2"},
0780     {"INMIXR", "RINPGA12 Switch", "RIN12 PGA"},
0781     {"INMIXR", "RINPGA34 Switch", "RIN34 PGA"},
0782     /* AINRMUX */
0783     {"AINRMUX", "INMIXR Mix", "INMIXR"},
0784     {"AINRMUX", "DIFFINR Mix", "RIN12 PGA"},
0785     {"AINRMUX", "DIFFINR Mix", "RIN34 PGA"},
0786     {"AINRMUX", "RXVOICE Mix", "LIN4RXN"},
0787     {"AINRMUX", "RXVOICE Mix", "RIN4RXP"},
0788     /* ADC */
0789     {"Right ADC", NULL, "AINRMUX"},
0790 
0791     /* LOMIX */
0792     {"LOMIX", "LOMIX RIN3 Bypass Switch", "RIN3"},
0793     {"LOMIX", "LOMIX LIN3 Bypass Switch", "LIN3"},
0794     {"LOMIX", "LOMIX LIN12 PGA Bypass Switch", "LIN12 PGA"},
0795     {"LOMIX", "LOMIX RIN12 PGA Bypass Switch", "RIN12 PGA"},
0796     {"LOMIX", "LOMIX Right ADC Bypass Switch", "AINRMUX"},
0797     {"LOMIX", "LOMIX Left ADC Bypass Switch", "AINLMUX"},
0798     {"LOMIX", "LOMIX Left DAC Switch", "Left DAC"},
0799 
0800     /* ROMIX */
0801     {"ROMIX", "ROMIX RIN3 Bypass Switch", "RIN3"},
0802     {"ROMIX", "ROMIX LIN3 Bypass Switch", "LIN3"},
0803     {"ROMIX", "ROMIX LIN12 PGA Bypass Switch", "LIN12 PGA"},
0804     {"ROMIX", "ROMIX RIN12 PGA Bypass Switch", "RIN12 PGA"},
0805     {"ROMIX", "ROMIX Right ADC Bypass Switch", "AINRMUX"},
0806     {"ROMIX", "ROMIX Left ADC Bypass Switch", "AINLMUX"},
0807     {"ROMIX", "ROMIX Right DAC Switch", "Right DAC"},
0808 
0809     /* SPKMIX */
0810     {"SPKMIX", "SPKMIX LIN2 Bypass Switch", "LIN2"},
0811     {"SPKMIX", "SPKMIX RIN2 Bypass Switch", "RIN2"},
0812     {"SPKMIX", "SPKMIX LADC Bypass Switch", "AINLMUX"},
0813     {"SPKMIX", "SPKMIX RADC Bypass Switch", "AINRMUX"},
0814     {"SPKMIX", "SPKMIX Left Mixer PGA Switch", "LOPGA"},
0815     {"SPKMIX", "SPKMIX Right Mixer PGA Switch", "ROPGA"},
0816     {"SPKMIX", "SPKMIX Right DAC Switch", "Right DAC"},
0817     {"SPKMIX", "SPKMIX Left DAC Switch", "Right DAC"},
0818 
0819     /* LONMIX */
0820     {"LONMIX", "LONMIX Left Mixer PGA Switch", "LOPGA"},
0821     {"LONMIX", "LONMIX Right Mixer PGA Switch", "ROPGA"},
0822     {"LONMIX", "LONMIX Inverted LOP Switch", "LOPMIX"},
0823 
0824     /* LOPMIX */
0825     {"LOPMIX", "LOPMIX Right Mic Bypass Switch", "RIN12 PGA"},
0826     {"LOPMIX", "LOPMIX Left Mic Bypass Switch", "LIN12 PGA"},
0827     {"LOPMIX", "LOPMIX Left Mixer PGA Switch", "LOPGA"},
0828 
0829     /* OUT3MIX */
0830     {"OUT3MIX", "OUT3MIX LIN4RXN Bypass Switch", "LIN4RXN"},
0831     {"OUT3MIX", "OUT3MIX Left Out PGA Switch", "LOPGA"},
0832 
0833     /* OUT4MIX */
0834     {"OUT4MIX", "OUT4MIX Right Out PGA Switch", "ROPGA"},
0835     {"OUT4MIX", "OUT4MIX RIN4RXP Bypass Switch", "RIN4RXP"},
0836 
0837     /* RONMIX */
0838     {"RONMIX", "RONMIX Right Mixer PGA Switch", "ROPGA"},
0839     {"RONMIX", "RONMIX Left Mixer PGA Switch", "LOPGA"},
0840     {"RONMIX", "RONMIX Inverted ROP Switch", "ROPMIX"},
0841 
0842     /* ROPMIX */
0843     {"ROPMIX", "ROPMIX Left Mic Bypass Switch", "LIN12 PGA"},
0844     {"ROPMIX", "ROPMIX Right Mic Bypass Switch", "RIN12 PGA"},
0845     {"ROPMIX", "ROPMIX Right Mixer PGA Switch", "ROPGA"},
0846 
0847     /* Out Mixer PGAs */
0848     {"LOPGA", NULL, "LOMIX"},
0849     {"ROPGA", NULL, "ROMIX"},
0850 
0851     {"LOUT PGA", NULL, "LOMIX"},
0852     {"ROUT PGA", NULL, "ROMIX"},
0853 
0854     /* Output Pins */
0855     {"LON", NULL, "LONMIX"},
0856     {"LOP", NULL, "LOPMIX"},
0857     {"OUT", NULL, "OUT3MIX"},
0858     {"LOUT", NULL, "LOUT PGA"},
0859     {"SPKN", NULL, "SPKMIX"},
0860     {"ROUT", NULL, "ROUT PGA"},
0861     {"OUT4", NULL, "OUT4MIX"},
0862     {"ROP", NULL, "ROPMIX"},
0863     {"RON", NULL, "RONMIX"},
0864 };
0865 
0866 /* PLL divisors */
0867 struct _pll_div {
0868     u32 div2;
0869     u32 n;
0870     u32 k;
0871 };
0872 
0873 /* The size in bits of the pll divide multiplied by 10
0874  * to allow rounding later */
0875 #define FIXED_PLL_SIZE ((1 << 16) * 10)
0876 
0877 static void pll_factors(struct _pll_div *pll_div, unsigned int target,
0878             unsigned int source)
0879 {
0880     u64 Kpart;
0881     unsigned int K, Ndiv, Nmod;
0882 
0883 
0884     Ndiv = target / source;
0885     if (Ndiv < 6) {
0886         source >>= 1;
0887         pll_div->div2 = 1;
0888         Ndiv = target / source;
0889     } else
0890         pll_div->div2 = 0;
0891 
0892     if ((Ndiv < 6) || (Ndiv > 12))
0893         printk(KERN_WARNING
0894                "WM8991 N value outwith recommended range! N = %d\n", Ndiv);
0895 
0896     pll_div->n = Ndiv;
0897     Nmod = target % source;
0898     Kpart = FIXED_PLL_SIZE * (long long)Nmod;
0899 
0900     do_div(Kpart, source);
0901 
0902     K = Kpart & 0xFFFFFFFF;
0903 
0904     /* Check if we need to round */
0905     if ((K % 10) >= 5)
0906         K += 5;
0907 
0908     /* Move down to proper range now rounding is done */
0909     K /= 10;
0910 
0911     pll_div->k = K;
0912 }
0913 
0914 static int wm8991_set_dai_pll(struct snd_soc_dai *codec_dai,
0915                   int pll_id, int src, unsigned int freq_in, unsigned int freq_out)
0916 {
0917     u16 reg;
0918     struct snd_soc_component *component = codec_dai->component;
0919     struct _pll_div pll_div;
0920 
0921     if (freq_in && freq_out) {
0922         pll_factors(&pll_div, freq_out * 4, freq_in);
0923 
0924         /* Turn on PLL */
0925         reg = snd_soc_component_read(component, WM8991_POWER_MANAGEMENT_2);
0926         reg |= WM8991_PLL_ENA;
0927         snd_soc_component_write(component, WM8991_POWER_MANAGEMENT_2, reg);
0928 
0929         /* sysclk comes from PLL */
0930         reg = snd_soc_component_read(component, WM8991_CLOCKING_2);
0931         snd_soc_component_write(component, WM8991_CLOCKING_2, reg | WM8991_SYSCLK_SRC);
0932 
0933         /* set up N , fractional mode and pre-divisor if necessary */
0934         snd_soc_component_write(component, WM8991_PLL1, pll_div.n | WM8991_SDM |
0935                   (pll_div.div2 ? WM8991_PRESCALE : 0));
0936         snd_soc_component_write(component, WM8991_PLL2, (u8)(pll_div.k>>8));
0937         snd_soc_component_write(component, WM8991_PLL3, (u8)(pll_div.k & 0xFF));
0938     } else {
0939         /* Turn on PLL */
0940         reg = snd_soc_component_read(component, WM8991_POWER_MANAGEMENT_2);
0941         reg &= ~WM8991_PLL_ENA;
0942         snd_soc_component_write(component, WM8991_POWER_MANAGEMENT_2, reg);
0943     }
0944     return 0;
0945 }
0946 
0947 /*
0948  * Set's ADC and Voice DAC format.
0949  */
0950 static int wm8991_set_dai_fmt(struct snd_soc_dai *codec_dai,
0951                   unsigned int fmt)
0952 {
0953     struct snd_soc_component *component = codec_dai->component;
0954     u16 audio1, audio3;
0955 
0956     audio1 = snd_soc_component_read(component, WM8991_AUDIO_INTERFACE_1);
0957     audio3 = snd_soc_component_read(component, WM8991_AUDIO_INTERFACE_3);
0958 
0959     /* set master/slave audio interface */
0960     switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
0961     case SND_SOC_DAIFMT_CBS_CFS:
0962         audio3 &= ~WM8991_AIF_MSTR1;
0963         break;
0964     case SND_SOC_DAIFMT_CBM_CFM:
0965         audio3 |= WM8991_AIF_MSTR1;
0966         break;
0967     default:
0968         return -EINVAL;
0969     }
0970 
0971     audio1 &= ~WM8991_AIF_FMT_MASK;
0972 
0973     /* interface format */
0974     switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
0975     case SND_SOC_DAIFMT_I2S:
0976         audio1 |= WM8991_AIF_TMF_I2S;
0977         audio1 &= ~WM8991_AIF_LRCLK_INV;
0978         break;
0979     case SND_SOC_DAIFMT_RIGHT_J:
0980         audio1 |= WM8991_AIF_TMF_RIGHTJ;
0981         audio1 &= ~WM8991_AIF_LRCLK_INV;
0982         break;
0983     case SND_SOC_DAIFMT_LEFT_J:
0984         audio1 |= WM8991_AIF_TMF_LEFTJ;
0985         audio1 &= ~WM8991_AIF_LRCLK_INV;
0986         break;
0987     case SND_SOC_DAIFMT_DSP_A:
0988         audio1 |= WM8991_AIF_TMF_DSP;
0989         audio1 &= ~WM8991_AIF_LRCLK_INV;
0990         break;
0991     case SND_SOC_DAIFMT_DSP_B:
0992         audio1 |= WM8991_AIF_TMF_DSP | WM8991_AIF_LRCLK_INV;
0993         break;
0994     default:
0995         return -EINVAL;
0996     }
0997 
0998     snd_soc_component_write(component, WM8991_AUDIO_INTERFACE_1, audio1);
0999     snd_soc_component_write(component, WM8991_AUDIO_INTERFACE_3, audio3);
1000     return 0;
1001 }
1002 
1003 static int wm8991_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
1004                  int div_id, int div)
1005 {
1006     struct snd_soc_component *component = codec_dai->component;
1007     u16 reg;
1008 
1009     switch (div_id) {
1010     case WM8991_MCLK_DIV:
1011         reg = snd_soc_component_read(component, WM8991_CLOCKING_2) &
1012               ~WM8991_MCLK_DIV_MASK;
1013         snd_soc_component_write(component, WM8991_CLOCKING_2, reg | div);
1014         break;
1015     case WM8991_DACCLK_DIV:
1016         reg = snd_soc_component_read(component, WM8991_CLOCKING_2) &
1017               ~WM8991_DAC_CLKDIV_MASK;
1018         snd_soc_component_write(component, WM8991_CLOCKING_2, reg | div);
1019         break;
1020     case WM8991_ADCCLK_DIV:
1021         reg = snd_soc_component_read(component, WM8991_CLOCKING_2) &
1022               ~WM8991_ADC_CLKDIV_MASK;
1023         snd_soc_component_write(component, WM8991_CLOCKING_2, reg | div);
1024         break;
1025     case WM8991_BCLK_DIV:
1026         reg = snd_soc_component_read(component, WM8991_CLOCKING_1) &
1027               ~WM8991_BCLK_DIV_MASK;
1028         snd_soc_component_write(component, WM8991_CLOCKING_1, reg | div);
1029         break;
1030     default:
1031         return -EINVAL;
1032     }
1033 
1034     return 0;
1035 }
1036 
1037 /*
1038  * Set PCM DAI bit size and sample rate.
1039  */
1040 static int wm8991_hw_params(struct snd_pcm_substream *substream,
1041                 struct snd_pcm_hw_params *params,
1042                 struct snd_soc_dai *dai)
1043 {
1044     struct snd_soc_component *component = dai->component;
1045     u16 audio1 = snd_soc_component_read(component, WM8991_AUDIO_INTERFACE_1);
1046 
1047     audio1 &= ~WM8991_AIF_WL_MASK;
1048     /* bit size */
1049     switch (params_width(params)) {
1050     case 16:
1051         break;
1052     case 20:
1053         audio1 |= WM8991_AIF_WL_20BITS;
1054         break;
1055     case 24:
1056         audio1 |= WM8991_AIF_WL_24BITS;
1057         break;
1058     case 32:
1059         audio1 |= WM8991_AIF_WL_32BITS;
1060         break;
1061     }
1062 
1063     snd_soc_component_write(component, WM8991_AUDIO_INTERFACE_1, audio1);
1064     return 0;
1065 }
1066 
1067 static int wm8991_mute(struct snd_soc_dai *dai, int mute, int direction)
1068 {
1069     struct snd_soc_component *component = dai->component;
1070     u16 val;
1071 
1072     val  = snd_soc_component_read(component, WM8991_DAC_CTRL) & ~WM8991_DAC_MUTE;
1073     if (mute)
1074         snd_soc_component_write(component, WM8991_DAC_CTRL, val | WM8991_DAC_MUTE);
1075     else
1076         snd_soc_component_write(component, WM8991_DAC_CTRL, val);
1077     return 0;
1078 }
1079 
1080 static int wm8991_set_bias_level(struct snd_soc_component *component,
1081                  enum snd_soc_bias_level level)
1082 {
1083     struct wm8991_priv *wm8991 = snd_soc_component_get_drvdata(component);
1084     u16 val;
1085 
1086     switch (level) {
1087     case SND_SOC_BIAS_ON:
1088         break;
1089 
1090     case SND_SOC_BIAS_PREPARE:
1091         /* VMID=2*50k */
1092         val = snd_soc_component_read(component, WM8991_POWER_MANAGEMENT_1) &
1093               ~WM8991_VMID_MODE_MASK;
1094         snd_soc_component_write(component, WM8991_POWER_MANAGEMENT_1, val | 0x2);
1095         break;
1096 
1097     case SND_SOC_BIAS_STANDBY:
1098         if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
1099             regcache_sync(wm8991->regmap);
1100             /* Enable all output discharge bits */
1101             snd_soc_component_write(component, WM8991_ANTIPOP1, WM8991_DIS_LLINE |
1102                       WM8991_DIS_RLINE | WM8991_DIS_OUT3 |
1103                       WM8991_DIS_OUT4 | WM8991_DIS_LOUT |
1104                       WM8991_DIS_ROUT);
1105 
1106             /* Enable POBCTRL, SOFT_ST, VMIDTOG and BUFDCOPEN */
1107             snd_soc_component_write(component, WM8991_ANTIPOP2, WM8991_SOFTST |
1108                       WM8991_BUFDCOPEN | WM8991_POBCTRL |
1109                       WM8991_VMIDTOG);
1110 
1111             /* Delay to allow output caps to discharge */
1112             msleep(300);
1113 
1114             /* Disable VMIDTOG */
1115             snd_soc_component_write(component, WM8991_ANTIPOP2, WM8991_SOFTST |
1116                       WM8991_BUFDCOPEN | WM8991_POBCTRL);
1117 
1118             /* disable all output discharge bits */
1119             snd_soc_component_write(component, WM8991_ANTIPOP1, 0);
1120 
1121             /* Enable outputs */
1122             snd_soc_component_write(component, WM8991_POWER_MANAGEMENT_1, 0x1b00);
1123 
1124             msleep(50);
1125 
1126             /* Enable VMID at 2x50k */
1127             snd_soc_component_write(component, WM8991_POWER_MANAGEMENT_1, 0x1f02);
1128 
1129             msleep(100);
1130 
1131             /* Enable VREF */
1132             snd_soc_component_write(component, WM8991_POWER_MANAGEMENT_1, 0x1f03);
1133 
1134             msleep(600);
1135 
1136             /* Enable BUFIOEN */
1137             snd_soc_component_write(component, WM8991_ANTIPOP2, WM8991_SOFTST |
1138                       WM8991_BUFDCOPEN | WM8991_POBCTRL |
1139                       WM8991_BUFIOEN);
1140 
1141             /* Disable outputs */
1142             snd_soc_component_write(component, WM8991_POWER_MANAGEMENT_1, 0x3);
1143 
1144             /* disable POBCTRL, SOFT_ST and BUFDCOPEN */
1145             snd_soc_component_write(component, WM8991_ANTIPOP2, WM8991_BUFIOEN);
1146         }
1147 
1148         /* VMID=2*250k */
1149         val = snd_soc_component_read(component, WM8991_POWER_MANAGEMENT_1) &
1150               ~WM8991_VMID_MODE_MASK;
1151         snd_soc_component_write(component, WM8991_POWER_MANAGEMENT_1, val | 0x4);
1152         break;
1153 
1154     case SND_SOC_BIAS_OFF:
1155         /* Enable POBCTRL and SOFT_ST */
1156         snd_soc_component_write(component, WM8991_ANTIPOP2, WM8991_SOFTST |
1157                   WM8991_POBCTRL | WM8991_BUFIOEN);
1158 
1159         /* Enable POBCTRL, SOFT_ST and BUFDCOPEN */
1160         snd_soc_component_write(component, WM8991_ANTIPOP2, WM8991_SOFTST |
1161                   WM8991_BUFDCOPEN | WM8991_POBCTRL |
1162                   WM8991_BUFIOEN);
1163 
1164         /* mute DAC */
1165         val = snd_soc_component_read(component, WM8991_DAC_CTRL);
1166         snd_soc_component_write(component, WM8991_DAC_CTRL, val | WM8991_DAC_MUTE);
1167 
1168         /* Enable any disabled outputs */
1169         snd_soc_component_write(component, WM8991_POWER_MANAGEMENT_1, 0x1f03);
1170 
1171         /* Disable VMID */
1172         snd_soc_component_write(component, WM8991_POWER_MANAGEMENT_1, 0x1f01);
1173 
1174         msleep(300);
1175 
1176         /* Enable all output discharge bits */
1177         snd_soc_component_write(component, WM8991_ANTIPOP1, WM8991_DIS_LLINE |
1178                   WM8991_DIS_RLINE | WM8991_DIS_OUT3 |
1179                   WM8991_DIS_OUT4 | WM8991_DIS_LOUT |
1180                   WM8991_DIS_ROUT);
1181 
1182         /* Disable VREF */
1183         snd_soc_component_write(component, WM8991_POWER_MANAGEMENT_1, 0x0);
1184 
1185         /* disable POBCTRL, SOFT_ST and BUFDCOPEN */
1186         snd_soc_component_write(component, WM8991_ANTIPOP2, 0x0);
1187         regcache_mark_dirty(wm8991->regmap);
1188         break;
1189     }
1190 
1191     return 0;
1192 }
1193 
1194 #define WM8991_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
1195             SNDRV_PCM_FMTBIT_S24_LE)
1196 
1197 static const struct snd_soc_dai_ops wm8991_ops = {
1198     .hw_params = wm8991_hw_params,
1199     .mute_stream = wm8991_mute,
1200     .set_fmt = wm8991_set_dai_fmt,
1201     .set_clkdiv = wm8991_set_dai_clkdiv,
1202     .set_pll = wm8991_set_dai_pll,
1203     .no_capture_mute = 1,
1204 };
1205 
1206 /*
1207  * The WM8991 supports 2 different and mutually exclusive DAI
1208  * configurations.
1209  *
1210  * 1. ADC/DAC on Primary Interface
1211  * 2. ADC on Primary Interface/DAC on secondary
1212  */
1213 static struct snd_soc_dai_driver wm8991_dai = {
1214     /* ADC/DAC on primary */
1215     .name = "wm8991",
1216     .id = 1,
1217     .playback = {
1218         .stream_name = "Playback",
1219         .channels_min = 1,
1220         .channels_max = 2,
1221         .rates = SNDRV_PCM_RATE_8000_96000,
1222         .formats = WM8991_FORMATS
1223     },
1224     .capture = {
1225         .stream_name = "Capture",
1226         .channels_min = 1,
1227         .channels_max = 2,
1228         .rates = SNDRV_PCM_RATE_8000_96000,
1229         .formats = WM8991_FORMATS
1230     },
1231     .ops = &wm8991_ops
1232 };
1233 
1234 static const struct snd_soc_component_driver soc_component_dev_wm8991 = {
1235     .set_bias_level     = wm8991_set_bias_level,
1236     .controls       = wm8991_snd_controls,
1237     .num_controls       = ARRAY_SIZE(wm8991_snd_controls),
1238     .dapm_widgets       = wm8991_dapm_widgets,
1239     .num_dapm_widgets   = ARRAY_SIZE(wm8991_dapm_widgets),
1240     .dapm_routes        = wm8991_dapm_routes,
1241     .num_dapm_routes    = ARRAY_SIZE(wm8991_dapm_routes),
1242     .suspend_bias_off   = 1,
1243     .idle_bias_on       = 1,
1244     .use_pmdown_time    = 1,
1245     .endianness     = 1,
1246 };
1247 
1248 static const struct regmap_config wm8991_regmap = {
1249     .reg_bits = 8,
1250     .val_bits = 16,
1251 
1252     .max_register = WM8991_PLL3,
1253     .volatile_reg = wm8991_volatile,
1254     .reg_defaults = wm8991_reg_defaults,
1255     .num_reg_defaults = ARRAY_SIZE(wm8991_reg_defaults),
1256     .cache_type = REGCACHE_RBTREE,
1257 };
1258 
1259 static int wm8991_i2c_probe(struct i2c_client *i2c)
1260 {
1261     struct wm8991_priv *wm8991;
1262     unsigned int val;
1263     int ret;
1264 
1265     wm8991 = devm_kzalloc(&i2c->dev, sizeof(*wm8991), GFP_KERNEL);
1266     if (!wm8991)
1267         return -ENOMEM;
1268 
1269     wm8991->regmap = devm_regmap_init_i2c(i2c, &wm8991_regmap);
1270     if (IS_ERR(wm8991->regmap))
1271         return PTR_ERR(wm8991->regmap);
1272 
1273     i2c_set_clientdata(i2c, wm8991);
1274 
1275     ret = regmap_read(wm8991->regmap, WM8991_RESET, &val);
1276     if (ret != 0) {
1277         dev_err(&i2c->dev, "Failed to read device ID: %d\n", ret);
1278         return ret;
1279     }
1280     if (val != 0x8991) {
1281         dev_err(&i2c->dev, "Device with ID %x is not a WM8991\n", val);
1282         return -EINVAL;
1283     }
1284 
1285     ret = regmap_write(wm8991->regmap, WM8991_RESET, 0);
1286     if (ret < 0) {
1287         dev_err(&i2c->dev, "Failed to issue reset: %d\n", ret);
1288         return ret;
1289     }
1290 
1291     regmap_update_bits(wm8991->regmap, WM8991_AUDIO_INTERFACE_4,
1292                WM8991_ALRCGPIO1, WM8991_ALRCGPIO1);
1293 
1294     regmap_update_bits(wm8991->regmap, WM8991_GPIO1_GPIO2,
1295                WM8991_GPIO1_SEL_MASK, 1);
1296 
1297     regmap_update_bits(wm8991->regmap, WM8991_POWER_MANAGEMENT_1,
1298                WM8991_VREF_ENA | WM8991_VMID_MODE_MASK,
1299                WM8991_VREF_ENA | WM8991_VMID_MODE_MASK);
1300 
1301     regmap_update_bits(wm8991->regmap, WM8991_POWER_MANAGEMENT_2,
1302                WM8991_OPCLK_ENA, WM8991_OPCLK_ENA);
1303 
1304     regmap_write(wm8991->regmap, WM8991_DAC_CTRL, 0);
1305     regmap_write(wm8991->regmap, WM8991_LEFT_OUTPUT_VOLUME,
1306              0x50 | (1<<8));
1307     regmap_write(wm8991->regmap, WM8991_RIGHT_OUTPUT_VOLUME,
1308              0x50 | (1<<8));
1309 
1310     ret = devm_snd_soc_register_component(&i2c->dev,
1311                      &soc_component_dev_wm8991, &wm8991_dai, 1);
1312 
1313     return ret;
1314 }
1315 
1316 static const struct i2c_device_id wm8991_i2c_id[] = {
1317     { "wm8991", 0 },
1318     { }
1319 };
1320 MODULE_DEVICE_TABLE(i2c, wm8991_i2c_id);
1321 
1322 static struct i2c_driver wm8991_i2c_driver = {
1323     .driver = {
1324         .name = "wm8991",
1325     },
1326     .probe_new = wm8991_i2c_probe,
1327     .id_table = wm8991_i2c_id,
1328 };
1329 
1330 module_i2c_driver(wm8991_i2c_driver);
1331 
1332 MODULE_DESCRIPTION("ASoC WM8991 driver");
1333 MODULE_AUTHOR("Graeme Gregory");
1334 MODULE_LICENSE("GPL");
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