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0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * wm8983.h  --  WM8983 ALSA SoC Audio driver
0004  *
0005  * Copyright 2011 Wolfson Microelectronics plc
0006  *
0007  * Author: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
0008  */
0009 
0010 #ifndef _WM8983_H
0011 #define _WM8983_H
0012 
0013 /*
0014  * Register values.
0015  */
0016 #define WM8983_SOFTWARE_RESET                   0x00
0017 #define WM8983_POWER_MANAGEMENT_1               0x01
0018 #define WM8983_POWER_MANAGEMENT_2               0x02
0019 #define WM8983_POWER_MANAGEMENT_3               0x03
0020 #define WM8983_AUDIO_INTERFACE                  0x04
0021 #define WM8983_COMPANDING_CONTROL               0x05
0022 #define WM8983_CLOCK_GEN_CONTROL                0x06
0023 #define WM8983_ADDITIONAL_CONTROL               0x07
0024 #define WM8983_GPIO_CONTROL                     0x08
0025 #define WM8983_JACK_DETECT_CONTROL_1            0x09
0026 #define WM8983_DAC_CONTROL                      0x0A
0027 #define WM8983_LEFT_DAC_DIGITAL_VOL             0x0B
0028 #define WM8983_RIGHT_DAC_DIGITAL_VOL            0x0C
0029 #define WM8983_JACK_DETECT_CONTROL_2            0x0D
0030 #define WM8983_ADC_CONTROL                      0x0E
0031 #define WM8983_LEFT_ADC_DIGITAL_VOL             0x0F
0032 #define WM8983_RIGHT_ADC_DIGITAL_VOL            0x10
0033 #define WM8983_EQ1_LOW_SHELF                    0x12
0034 #define WM8983_EQ2_PEAK_1                       0x13
0035 #define WM8983_EQ3_PEAK_2                       0x14
0036 #define WM8983_EQ4_PEAK_3                       0x15
0037 #define WM8983_EQ5_HIGH_SHELF                   0x16
0038 #define WM8983_DAC_LIMITER_1                    0x18
0039 #define WM8983_DAC_LIMITER_2                    0x19
0040 #define WM8983_NOTCH_FILTER_1                   0x1B
0041 #define WM8983_NOTCH_FILTER_2                   0x1C
0042 #define WM8983_NOTCH_FILTER_3                   0x1D
0043 #define WM8983_NOTCH_FILTER_4                   0x1E
0044 #define WM8983_ALC_CONTROL_1                    0x20
0045 #define WM8983_ALC_CONTROL_2                    0x21
0046 #define WM8983_ALC_CONTROL_3                    0x22
0047 #define WM8983_NOISE_GATE                       0x23
0048 #define WM8983_PLL_N                            0x24
0049 #define WM8983_PLL_K_1                          0x25
0050 #define WM8983_PLL_K_2                          0x26
0051 #define WM8983_PLL_K_3                          0x27
0052 #define WM8983_3D_CONTROL                       0x29
0053 #define WM8983_OUT4_TO_ADC                      0x2A
0054 #define WM8983_BEEP_CONTROL                     0x2B
0055 #define WM8983_INPUT_CTRL                       0x2C
0056 #define WM8983_LEFT_INP_PGA_GAIN_CTRL           0x2D
0057 #define WM8983_RIGHT_INP_PGA_GAIN_CTRL          0x2E
0058 #define WM8983_LEFT_ADC_BOOST_CTRL              0x2F
0059 #define WM8983_RIGHT_ADC_BOOST_CTRL             0x30
0060 #define WM8983_OUTPUT_CTRL                      0x31
0061 #define WM8983_LEFT_MIXER_CTRL                  0x32
0062 #define WM8983_RIGHT_MIXER_CTRL                 0x33
0063 #define WM8983_LOUT1_HP_VOLUME_CTRL             0x34
0064 #define WM8983_ROUT1_HP_VOLUME_CTRL             0x35
0065 #define WM8983_LOUT2_SPK_VOLUME_CTRL            0x36
0066 #define WM8983_ROUT2_SPK_VOLUME_CTRL            0x37
0067 #define WM8983_OUT3_MIXER_CTRL                  0x38
0068 #define WM8983_OUT4_MONO_MIX_CTRL               0x39
0069 #define WM8983_BIAS_CTRL                        0x3D
0070 
0071 #define WM8983_REGISTER_COUNT                   59
0072 #define WM8983_MAX_REGISTER                     0x3F
0073 
0074 /*
0075  * Field Definitions.
0076  */
0077 
0078 /*
0079  * R0 (0x00) - Software Reset
0080  */
0081 #define WM8983_SOFTWARE_RESET_MASK              0x01FF  /* SOFTWARE_RESET - [8:0] */
0082 #define WM8983_SOFTWARE_RESET_SHIFT                  0  /* SOFTWARE_RESET - [8:0] */
0083 #define WM8983_SOFTWARE_RESET_WIDTH                  9  /* SOFTWARE_RESET - [8:0] */
0084 
0085 /*
0086  * R1 (0x01) - Power management 1
0087  */
0088 #define WM8983_BUFDCOPEN                        0x0100  /* BUFDCOPEN */
0089 #define WM8983_BUFDCOPEN_MASK                   0x0100  /* BUFDCOPEN */
0090 #define WM8983_BUFDCOPEN_SHIFT                       8  /* BUFDCOPEN */
0091 #define WM8983_BUFDCOPEN_WIDTH                       1  /* BUFDCOPEN */
0092 #define WM8983_OUT4MIXEN                        0x0080  /* OUT4MIXEN */
0093 #define WM8983_OUT4MIXEN_MASK                   0x0080  /* OUT4MIXEN */
0094 #define WM8983_OUT4MIXEN_SHIFT                       7  /* OUT4MIXEN */
0095 #define WM8983_OUT4MIXEN_WIDTH                       1  /* OUT4MIXEN */
0096 #define WM8983_OUT3MIXEN                        0x0040  /* OUT3MIXEN */
0097 #define WM8983_OUT3MIXEN_MASK                   0x0040  /* OUT3MIXEN */
0098 #define WM8983_OUT3MIXEN_SHIFT                       6  /* OUT3MIXEN */
0099 #define WM8983_OUT3MIXEN_WIDTH                       1  /* OUT3MIXEN */
0100 #define WM8983_PLLEN                            0x0020  /* PLLEN */
0101 #define WM8983_PLLEN_MASK                       0x0020  /* PLLEN */
0102 #define WM8983_PLLEN_SHIFT                           5  /* PLLEN */
0103 #define WM8983_PLLEN_WIDTH                           1  /* PLLEN */
0104 #define WM8983_MICBEN                           0x0010  /* MICBEN */
0105 #define WM8983_MICBEN_MASK                      0x0010  /* MICBEN */
0106 #define WM8983_MICBEN_SHIFT                          4  /* MICBEN */
0107 #define WM8983_MICBEN_WIDTH                          1  /* MICBEN */
0108 #define WM8983_BIASEN                           0x0008  /* BIASEN */
0109 #define WM8983_BIASEN_MASK                      0x0008  /* BIASEN */
0110 #define WM8983_BIASEN_SHIFT                          3  /* BIASEN */
0111 #define WM8983_BIASEN_WIDTH                          1  /* BIASEN */
0112 #define WM8983_BUFIOEN                          0x0004  /* BUFIOEN */
0113 #define WM8983_BUFIOEN_MASK                     0x0004  /* BUFIOEN */
0114 #define WM8983_BUFIOEN_SHIFT                         2  /* BUFIOEN */
0115 #define WM8983_BUFIOEN_WIDTH                         1  /* BUFIOEN */
0116 #define WM8983_VMIDSEL_MASK                     0x0003  /* VMIDSEL - [1:0] */
0117 #define WM8983_VMIDSEL_SHIFT                         0  /* VMIDSEL - [1:0] */
0118 #define WM8983_VMIDSEL_WIDTH                         2  /* VMIDSEL - [1:0] */
0119 
0120 /*
0121  * R2 (0x02) - Power management 2
0122  */
0123 #define WM8983_ROUT1EN                          0x0100  /* ROUT1EN */
0124 #define WM8983_ROUT1EN_MASK                     0x0100  /* ROUT1EN */
0125 #define WM8983_ROUT1EN_SHIFT                         8  /* ROUT1EN */
0126 #define WM8983_ROUT1EN_WIDTH                         1  /* ROUT1EN */
0127 #define WM8983_LOUT1EN                          0x0080  /* LOUT1EN */
0128 #define WM8983_LOUT1EN_MASK                     0x0080  /* LOUT1EN */
0129 #define WM8983_LOUT1EN_SHIFT                         7  /* LOUT1EN */
0130 #define WM8983_LOUT1EN_WIDTH                         1  /* LOUT1EN */
0131 #define WM8983_SLEEP                            0x0040  /* SLEEP */
0132 #define WM8983_SLEEP_MASK                       0x0040  /* SLEEP */
0133 #define WM8983_SLEEP_SHIFT                           6  /* SLEEP */
0134 #define WM8983_SLEEP_WIDTH                           1  /* SLEEP */
0135 #define WM8983_BOOSTENR                         0x0020  /* BOOSTENR */
0136 #define WM8983_BOOSTENR_MASK                    0x0020  /* BOOSTENR */
0137 #define WM8983_BOOSTENR_SHIFT                        5  /* BOOSTENR */
0138 #define WM8983_BOOSTENR_WIDTH                        1  /* BOOSTENR */
0139 #define WM8983_BOOSTENL                         0x0010  /* BOOSTENL */
0140 #define WM8983_BOOSTENL_MASK                    0x0010  /* BOOSTENL */
0141 #define WM8983_BOOSTENL_SHIFT                        4  /* BOOSTENL */
0142 #define WM8983_BOOSTENL_WIDTH                        1  /* BOOSTENL */
0143 #define WM8983_INPGAENR                         0x0008  /* INPGAENR */
0144 #define WM8983_INPGAENR_MASK                    0x0008  /* INPGAENR */
0145 #define WM8983_INPGAENR_SHIFT                        3  /* INPGAENR */
0146 #define WM8983_INPGAENR_WIDTH                        1  /* INPGAENR */
0147 #define WM8983_INPPGAENL                        0x0004  /* INPPGAENL */
0148 #define WM8983_INPPGAENL_MASK                   0x0004  /* INPPGAENL */
0149 #define WM8983_INPPGAENL_SHIFT                       2  /* INPPGAENL */
0150 #define WM8983_INPPGAENL_WIDTH                       1  /* INPPGAENL */
0151 #define WM8983_ADCENR                           0x0002  /* ADCENR */
0152 #define WM8983_ADCENR_MASK                      0x0002  /* ADCENR */
0153 #define WM8983_ADCENR_SHIFT                          1  /* ADCENR */
0154 #define WM8983_ADCENR_WIDTH                          1  /* ADCENR */
0155 #define WM8983_ADCENL                           0x0001  /* ADCENL */
0156 #define WM8983_ADCENL_MASK                      0x0001  /* ADCENL */
0157 #define WM8983_ADCENL_SHIFT                          0  /* ADCENL */
0158 #define WM8983_ADCENL_WIDTH                          1  /* ADCENL */
0159 
0160 /*
0161  * R3 (0x03) - Power management 3
0162  */
0163 #define WM8983_OUT4EN                           0x0100  /* OUT4EN */
0164 #define WM8983_OUT4EN_MASK                      0x0100  /* OUT4EN */
0165 #define WM8983_OUT4EN_SHIFT                          8  /* OUT4EN */
0166 #define WM8983_OUT4EN_WIDTH                          1  /* OUT4EN */
0167 #define WM8983_OUT3EN                           0x0080  /* OUT3EN */
0168 #define WM8983_OUT3EN_MASK                      0x0080  /* OUT3EN */
0169 #define WM8983_OUT3EN_SHIFT                          7  /* OUT3EN */
0170 #define WM8983_OUT3EN_WIDTH                          1  /* OUT3EN */
0171 #define WM8983_LOUT2EN                          0x0040  /* LOUT2EN */
0172 #define WM8983_LOUT2EN_MASK                     0x0040  /* LOUT2EN */
0173 #define WM8983_LOUT2EN_SHIFT                         6  /* LOUT2EN */
0174 #define WM8983_LOUT2EN_WIDTH                         1  /* LOUT2EN */
0175 #define WM8983_ROUT2EN                          0x0020  /* ROUT2EN */
0176 #define WM8983_ROUT2EN_MASK                     0x0020  /* ROUT2EN */
0177 #define WM8983_ROUT2EN_SHIFT                         5  /* ROUT2EN */
0178 #define WM8983_ROUT2EN_WIDTH                         1  /* ROUT2EN */
0179 #define WM8983_RMIXEN                           0x0008  /* RMIXEN */
0180 #define WM8983_RMIXEN_MASK                      0x0008  /* RMIXEN */
0181 #define WM8983_RMIXEN_SHIFT                          3  /* RMIXEN */
0182 #define WM8983_RMIXEN_WIDTH                          1  /* RMIXEN */
0183 #define WM8983_LMIXEN                           0x0004  /* LMIXEN */
0184 #define WM8983_LMIXEN_MASK                      0x0004  /* LMIXEN */
0185 #define WM8983_LMIXEN_SHIFT                          2  /* LMIXEN */
0186 #define WM8983_LMIXEN_WIDTH                          1  /* LMIXEN */
0187 #define WM8983_DACENR                           0x0002  /* DACENR */
0188 #define WM8983_DACENR_MASK                      0x0002  /* DACENR */
0189 #define WM8983_DACENR_SHIFT                          1  /* DACENR */
0190 #define WM8983_DACENR_WIDTH                          1  /* DACENR */
0191 #define WM8983_DACENL                           0x0001  /* DACENL */
0192 #define WM8983_DACENL_MASK                      0x0001  /* DACENL */
0193 #define WM8983_DACENL_SHIFT                          0  /* DACENL */
0194 #define WM8983_DACENL_WIDTH                          1  /* DACENL */
0195 
0196 /*
0197  * R4 (0x04) - Audio Interface
0198  */
0199 #define WM8983_BCP                              0x0100  /* BCP */
0200 #define WM8983_BCP_MASK                         0x0100  /* BCP */
0201 #define WM8983_BCP_SHIFT                             8  /* BCP */
0202 #define WM8983_BCP_WIDTH                             1  /* BCP */
0203 #define WM8983_LRCP                             0x0080  /* LRCP */
0204 #define WM8983_LRCP_MASK                        0x0080  /* LRCP */
0205 #define WM8983_LRCP_SHIFT                            7  /* LRCP */
0206 #define WM8983_LRCP_WIDTH                            1  /* LRCP */
0207 #define WM8983_WL_MASK                          0x0060  /* WL - [6:5] */
0208 #define WM8983_WL_SHIFT                              5  /* WL - [6:5] */
0209 #define WM8983_WL_WIDTH                              2  /* WL - [6:5] */
0210 #define WM8983_FMT_MASK                         0x0018  /* FMT - [4:3] */
0211 #define WM8983_FMT_SHIFT                             3  /* FMT - [4:3] */
0212 #define WM8983_FMT_WIDTH                             2  /* FMT - [4:3] */
0213 #define WM8983_DLRSWAP                          0x0004  /* DLRSWAP */
0214 #define WM8983_DLRSWAP_MASK                     0x0004  /* DLRSWAP */
0215 #define WM8983_DLRSWAP_SHIFT                         2  /* DLRSWAP */
0216 #define WM8983_DLRSWAP_WIDTH                         1  /* DLRSWAP */
0217 #define WM8983_ALRSWAP                          0x0002  /* ALRSWAP */
0218 #define WM8983_ALRSWAP_MASK                     0x0002  /* ALRSWAP */
0219 #define WM8983_ALRSWAP_SHIFT                         1  /* ALRSWAP */
0220 #define WM8983_ALRSWAP_WIDTH                         1  /* ALRSWAP */
0221 #define WM8983_MONO                             0x0001  /* MONO */
0222 #define WM8983_MONO_MASK                        0x0001  /* MONO */
0223 #define WM8983_MONO_SHIFT                            0  /* MONO */
0224 #define WM8983_MONO_WIDTH                            1  /* MONO */
0225 
0226 /*
0227  * R5 (0x05) - Companding control
0228  */
0229 #define WM8983_WL8                              0x0020  /* WL8 */
0230 #define WM8983_WL8_MASK                         0x0020  /* WL8 */
0231 #define WM8983_WL8_SHIFT                             5  /* WL8 */
0232 #define WM8983_WL8_WIDTH                             1  /* WL8 */
0233 #define WM8983_DAC_COMP_MASK                    0x0018  /* DAC_COMP - [4:3] */
0234 #define WM8983_DAC_COMP_SHIFT                        3  /* DAC_COMP - [4:3] */
0235 #define WM8983_DAC_COMP_WIDTH                        2  /* DAC_COMP - [4:3] */
0236 #define WM8983_ADC_COMP_MASK                    0x0006  /* ADC_COMP - [2:1] */
0237 #define WM8983_ADC_COMP_SHIFT                        1  /* ADC_COMP - [2:1] */
0238 #define WM8983_ADC_COMP_WIDTH                        2  /* ADC_COMP - [2:1] */
0239 #define WM8983_LOOPBACK                         0x0001  /* LOOPBACK */
0240 #define WM8983_LOOPBACK_MASK                    0x0001  /* LOOPBACK */
0241 #define WM8983_LOOPBACK_SHIFT                        0  /* LOOPBACK */
0242 #define WM8983_LOOPBACK_WIDTH                        1  /* LOOPBACK */
0243 
0244 /*
0245  * R6 (0x06) - Clock Gen control
0246  */
0247 #define WM8983_CLKSEL                           0x0100  /* CLKSEL */
0248 #define WM8983_CLKSEL_MASK                      0x0100  /* CLKSEL */
0249 #define WM8983_CLKSEL_SHIFT                          8  /* CLKSEL */
0250 #define WM8983_CLKSEL_WIDTH                          1  /* CLKSEL */
0251 #define WM8983_MCLKDIV_MASK                     0x00E0  /* MCLKDIV - [7:5] */
0252 #define WM8983_MCLKDIV_SHIFT                         5  /* MCLKDIV - [7:5] */
0253 #define WM8983_MCLKDIV_WIDTH                         3  /* MCLKDIV - [7:5] */
0254 #define WM8983_BCLKDIV_MASK                     0x001C  /* BCLKDIV - [4:2] */
0255 #define WM8983_BCLKDIV_SHIFT                         2  /* BCLKDIV - [4:2] */
0256 #define WM8983_BCLKDIV_WIDTH                         3  /* BCLKDIV - [4:2] */
0257 #define WM8983_MS                               0x0001  /* MS */
0258 #define WM8983_MS_MASK                          0x0001  /* MS */
0259 #define WM8983_MS_SHIFT                              0  /* MS */
0260 #define WM8983_MS_WIDTH                              1  /* MS */
0261 
0262 /*
0263  * R7 (0x07) - Additional control
0264  */
0265 #define WM8983_SR_MASK                          0x000E  /* SR - [3:1] */
0266 #define WM8983_SR_SHIFT                              1  /* SR - [3:1] */
0267 #define WM8983_SR_WIDTH                              3  /* SR - [3:1] */
0268 #define WM8983_SLOWCLKEN                        0x0001  /* SLOWCLKEN */
0269 #define WM8983_SLOWCLKEN_MASK                   0x0001  /* SLOWCLKEN */
0270 #define WM8983_SLOWCLKEN_SHIFT                       0  /* SLOWCLKEN */
0271 #define WM8983_SLOWCLKEN_WIDTH                       1  /* SLOWCLKEN */
0272 
0273 /*
0274  * R8 (0x08) - GPIO Control
0275  */
0276 #define WM8983_OPCLKDIV_MASK                    0x0030  /* OPCLKDIV - [5:4] */
0277 #define WM8983_OPCLKDIV_SHIFT                        4  /* OPCLKDIV - [5:4] */
0278 #define WM8983_OPCLKDIV_WIDTH                        2  /* OPCLKDIV - [5:4] */
0279 #define WM8983_GPIO1POL                         0x0008  /* GPIO1POL */
0280 #define WM8983_GPIO1POL_MASK                    0x0008  /* GPIO1POL */
0281 #define WM8983_GPIO1POL_SHIFT                        3  /* GPIO1POL */
0282 #define WM8983_GPIO1POL_WIDTH                        1  /* GPIO1POL */
0283 #define WM8983_GPIO1SEL_MASK                    0x0007  /* GPIO1SEL - [2:0] */
0284 #define WM8983_GPIO1SEL_SHIFT                        0  /* GPIO1SEL - [2:0] */
0285 #define WM8983_GPIO1SEL_WIDTH                        3  /* GPIO1SEL - [2:0] */
0286 
0287 /*
0288  * R9 (0x09) - Jack Detect Control 1
0289  */
0290 #define WM8983_JD_VMID1                         0x0100  /* JD_VMID1 */
0291 #define WM8983_JD_VMID1_MASK                    0x0100  /* JD_VMID1 */
0292 #define WM8983_JD_VMID1_SHIFT                        8  /* JD_VMID1 */
0293 #define WM8983_JD_VMID1_WIDTH                        1  /* JD_VMID1 */
0294 #define WM8983_JD_VMID0                         0x0080  /* JD_VMID0 */
0295 #define WM8983_JD_VMID0_MASK                    0x0080  /* JD_VMID0 */
0296 #define WM8983_JD_VMID0_SHIFT                        7  /* JD_VMID0 */
0297 #define WM8983_JD_VMID0_WIDTH                        1  /* JD_VMID0 */
0298 #define WM8983_JD_EN                            0x0040  /* JD_EN */
0299 #define WM8983_JD_EN_MASK                       0x0040  /* JD_EN */
0300 #define WM8983_JD_EN_SHIFT                           6  /* JD_EN */
0301 #define WM8983_JD_EN_WIDTH                           1  /* JD_EN */
0302 #define WM8983_JD_SEL_MASK                      0x0030  /* JD_SEL - [5:4] */
0303 #define WM8983_JD_SEL_SHIFT                          4  /* JD_SEL - [5:4] */
0304 #define WM8983_JD_SEL_WIDTH                          2  /* JD_SEL - [5:4] */
0305 
0306 /*
0307  * R10 (0x0A) - DAC Control
0308  */
0309 #define WM8983_SOFTMUTE                         0x0040  /* SOFTMUTE */
0310 #define WM8983_SOFTMUTE_MASK                    0x0040  /* SOFTMUTE */
0311 #define WM8983_SOFTMUTE_SHIFT                        6  /* SOFTMUTE */
0312 #define WM8983_SOFTMUTE_WIDTH                        1  /* SOFTMUTE */
0313 #define WM8983_DACOSR128                        0x0008  /* DACOSR128 */
0314 #define WM8983_DACOSR128_MASK                   0x0008  /* DACOSR128 */
0315 #define WM8983_DACOSR128_SHIFT                       3  /* DACOSR128 */
0316 #define WM8983_DACOSR128_WIDTH                       1  /* DACOSR128 */
0317 #define WM8983_AMUTE                            0x0004  /* AMUTE */
0318 #define WM8983_AMUTE_MASK                       0x0004  /* AMUTE */
0319 #define WM8983_AMUTE_SHIFT                           2  /* AMUTE */
0320 #define WM8983_AMUTE_WIDTH                           1  /* AMUTE */
0321 #define WM8983_DACRPOL                          0x0002  /* DACRPOL */
0322 #define WM8983_DACRPOL_MASK                     0x0002  /* DACRPOL */
0323 #define WM8983_DACRPOL_SHIFT                         1  /* DACRPOL */
0324 #define WM8983_DACRPOL_WIDTH                         1  /* DACRPOL */
0325 #define WM8983_DACLPOL                          0x0001  /* DACLPOL */
0326 #define WM8983_DACLPOL_MASK                     0x0001  /* DACLPOL */
0327 #define WM8983_DACLPOL_SHIFT                         0  /* DACLPOL */
0328 #define WM8983_DACLPOL_WIDTH                         1  /* DACLPOL */
0329 
0330 /*
0331  * R11 (0x0B) - Left DAC digital Vol
0332  */
0333 #define WM8983_DACVU                            0x0100  /* DACVU */
0334 #define WM8983_DACVU_MASK                       0x0100  /* DACVU */
0335 #define WM8983_DACVU_SHIFT                           8  /* DACVU */
0336 #define WM8983_DACVU_WIDTH                           1  /* DACVU */
0337 #define WM8983_DACLVOL_MASK                     0x00FF  /* DACLVOL - [7:0] */
0338 #define WM8983_DACLVOL_SHIFT                         0  /* DACLVOL - [7:0] */
0339 #define WM8983_DACLVOL_WIDTH                         8  /* DACLVOL - [7:0] */
0340 
0341 /*
0342  * R12 (0x0C) - Right DAC digital vol
0343  */
0344 #define WM8983_DACVU                            0x0100  /* DACVU */
0345 #define WM8983_DACVU_MASK                       0x0100  /* DACVU */
0346 #define WM8983_DACVU_SHIFT                           8  /* DACVU */
0347 #define WM8983_DACVU_WIDTH                           1  /* DACVU */
0348 #define WM8983_DACRVOL_MASK                     0x00FF  /* DACRVOL - [7:0] */
0349 #define WM8983_DACRVOL_SHIFT                         0  /* DACRVOL - [7:0] */
0350 #define WM8983_DACRVOL_WIDTH                         8  /* DACRVOL - [7:0] */
0351 
0352 /*
0353  * R13 (0x0D) - Jack Detect Control 2
0354  */
0355 #define WM8983_JD_EN1_MASK                      0x00F0  /* JD_EN1 - [7:4] */
0356 #define WM8983_JD_EN1_SHIFT                          4  /* JD_EN1 - [7:4] */
0357 #define WM8983_JD_EN1_WIDTH                          4  /* JD_EN1 - [7:4] */
0358 #define WM8983_JD_EN0_MASK                      0x000F  /* JD_EN0 - [3:0] */
0359 #define WM8983_JD_EN0_SHIFT                          0  /* JD_EN0 - [3:0] */
0360 #define WM8983_JD_EN0_WIDTH                          4  /* JD_EN0 - [3:0] */
0361 
0362 /*
0363  * R14 (0x0E) - ADC Control
0364  */
0365 #define WM8983_HPFEN                            0x0100  /* HPFEN */
0366 #define WM8983_HPFEN_MASK                       0x0100  /* HPFEN */
0367 #define WM8983_HPFEN_SHIFT                           8  /* HPFEN */
0368 #define WM8983_HPFEN_WIDTH                           1  /* HPFEN */
0369 #define WM8983_HPFAPP                           0x0080  /* HPFAPP */
0370 #define WM8983_HPFAPP_MASK                      0x0080  /* HPFAPP */
0371 #define WM8983_HPFAPP_SHIFT                          7  /* HPFAPP */
0372 #define WM8983_HPFAPP_WIDTH                          1  /* HPFAPP */
0373 #define WM8983_HPFCUT_MASK                      0x0070  /* HPFCUT - [6:4] */
0374 #define WM8983_HPFCUT_SHIFT                          4  /* HPFCUT - [6:4] */
0375 #define WM8983_HPFCUT_WIDTH                          3  /* HPFCUT - [6:4] */
0376 #define WM8983_ADCOSR128                        0x0008  /* ADCOSR128 */
0377 #define WM8983_ADCOSR128_MASK                   0x0008  /* ADCOSR128 */
0378 #define WM8983_ADCOSR128_SHIFT                       3  /* ADCOSR128 */
0379 #define WM8983_ADCOSR128_WIDTH                       1  /* ADCOSR128 */
0380 #define WM8983_ADCRPOL                          0x0002  /* ADCRPOL */
0381 #define WM8983_ADCRPOL_MASK                     0x0002  /* ADCRPOL */
0382 #define WM8983_ADCRPOL_SHIFT                         1  /* ADCRPOL */
0383 #define WM8983_ADCRPOL_WIDTH                         1  /* ADCRPOL */
0384 #define WM8983_ADCLPOL                          0x0001  /* ADCLPOL */
0385 #define WM8983_ADCLPOL_MASK                     0x0001  /* ADCLPOL */
0386 #define WM8983_ADCLPOL_SHIFT                         0  /* ADCLPOL */
0387 #define WM8983_ADCLPOL_WIDTH                         1  /* ADCLPOL */
0388 
0389 /*
0390  * R15 (0x0F) - Left ADC Digital Vol
0391  */
0392 #define WM8983_ADCVU                            0x0100  /* ADCVU */
0393 #define WM8983_ADCVU_MASK                       0x0100  /* ADCVU */
0394 #define WM8983_ADCVU_SHIFT                           8  /* ADCVU */
0395 #define WM8983_ADCVU_WIDTH                           1  /* ADCVU */
0396 #define WM8983_ADCLVOL_MASK                     0x00FF  /* ADCLVOL - [7:0] */
0397 #define WM8983_ADCLVOL_SHIFT                         0  /* ADCLVOL - [7:0] */
0398 #define WM8983_ADCLVOL_WIDTH                         8  /* ADCLVOL - [7:0] */
0399 
0400 /*
0401  * R16 (0x10) - Right ADC Digital Vol
0402  */
0403 #define WM8983_ADCVU                            0x0100  /* ADCVU */
0404 #define WM8983_ADCVU_MASK                       0x0100  /* ADCVU */
0405 #define WM8983_ADCVU_SHIFT                           8  /* ADCVU */
0406 #define WM8983_ADCVU_WIDTH                           1  /* ADCVU */
0407 #define WM8983_ADCRVOL_MASK                     0x00FF  /* ADCRVOL - [7:0] */
0408 #define WM8983_ADCRVOL_SHIFT                         0  /* ADCRVOL - [7:0] */
0409 #define WM8983_ADCRVOL_WIDTH                         8  /* ADCRVOL - [7:0] */
0410 
0411 /*
0412  * R18 (0x12) - EQ1 - low shelf
0413  */
0414 #define WM8983_EQ3DMODE                         0x0100  /* EQ3DMODE */
0415 #define WM8983_EQ3DMODE_MASK                    0x0100  /* EQ3DMODE */
0416 #define WM8983_EQ3DMODE_SHIFT                        8  /* EQ3DMODE */
0417 #define WM8983_EQ3DMODE_WIDTH                        1  /* EQ3DMODE */
0418 #define WM8983_EQ1C_MASK                        0x0060  /* EQ1C - [6:5] */
0419 #define WM8983_EQ1C_SHIFT                            5  /* EQ1C - [6:5] */
0420 #define WM8983_EQ1C_WIDTH                            2  /* EQ1C - [6:5] */
0421 #define WM8983_EQ1G_MASK                        0x001F  /* EQ1G - [4:0] */
0422 #define WM8983_EQ1G_SHIFT                            0  /* EQ1G - [4:0] */
0423 #define WM8983_EQ1G_WIDTH                            5  /* EQ1G - [4:0] */
0424 
0425 /*
0426  * R19 (0x13) - EQ2 - peak 1
0427  */
0428 #define WM8983_EQ2BW                            0x0100  /* EQ2BW */
0429 #define WM8983_EQ2BW_MASK                       0x0100  /* EQ2BW */
0430 #define WM8983_EQ2BW_SHIFT                           8  /* EQ2BW */
0431 #define WM8983_EQ2BW_WIDTH                           1  /* EQ2BW */
0432 #define WM8983_EQ2C_MASK                        0x0060  /* EQ2C - [6:5] */
0433 #define WM8983_EQ2C_SHIFT                            5  /* EQ2C - [6:5] */
0434 #define WM8983_EQ2C_WIDTH                            2  /* EQ2C - [6:5] */
0435 #define WM8983_EQ2G_MASK                        0x001F  /* EQ2G - [4:0] */
0436 #define WM8983_EQ2G_SHIFT                            0  /* EQ2G - [4:0] */
0437 #define WM8983_EQ2G_WIDTH                            5  /* EQ2G - [4:0] */
0438 
0439 /*
0440  * R20 (0x14) - EQ3 - peak 2
0441  */
0442 #define WM8983_EQ3BW                            0x0100  /* EQ3BW */
0443 #define WM8983_EQ3BW_MASK                       0x0100  /* EQ3BW */
0444 #define WM8983_EQ3BW_SHIFT                           8  /* EQ3BW */
0445 #define WM8983_EQ3BW_WIDTH                           1  /* EQ3BW */
0446 #define WM8983_EQ3C_MASK                        0x0060  /* EQ3C - [6:5] */
0447 #define WM8983_EQ3C_SHIFT                            5  /* EQ3C - [6:5] */
0448 #define WM8983_EQ3C_WIDTH                            2  /* EQ3C - [6:5] */
0449 #define WM8983_EQ3G_MASK                        0x001F  /* EQ3G - [4:0] */
0450 #define WM8983_EQ3G_SHIFT                            0  /* EQ3G - [4:0] */
0451 #define WM8983_EQ3G_WIDTH                            5  /* EQ3G - [4:0] */
0452 
0453 /*
0454  * R21 (0x15) - EQ4 - peak 3
0455  */
0456 #define WM8983_EQ4BW                            0x0100  /* EQ4BW */
0457 #define WM8983_EQ4BW_MASK                       0x0100  /* EQ4BW */
0458 #define WM8983_EQ4BW_SHIFT                           8  /* EQ4BW */
0459 #define WM8983_EQ4BW_WIDTH                           1  /* EQ4BW */
0460 #define WM8983_EQ4C_MASK                        0x0060  /* EQ4C - [6:5] */
0461 #define WM8983_EQ4C_SHIFT                            5  /* EQ4C - [6:5] */
0462 #define WM8983_EQ4C_WIDTH                            2  /* EQ4C - [6:5] */
0463 #define WM8983_EQ4G_MASK                        0x001F  /* EQ4G - [4:0] */
0464 #define WM8983_EQ4G_SHIFT                            0  /* EQ4G - [4:0] */
0465 #define WM8983_EQ4G_WIDTH                            5  /* EQ4G - [4:0] */
0466 
0467 /*
0468  * R22 (0x16) - EQ5 - high shelf
0469  */
0470 #define WM8983_EQ5C_MASK                        0x0060  /* EQ5C - [6:5] */
0471 #define WM8983_EQ5C_SHIFT                            5  /* EQ5C - [6:5] */
0472 #define WM8983_EQ5C_WIDTH                            2  /* EQ5C - [6:5] */
0473 #define WM8983_EQ5G_MASK                        0x001F  /* EQ5G - [4:0] */
0474 #define WM8983_EQ5G_SHIFT                            0  /* EQ5G - [4:0] */
0475 #define WM8983_EQ5G_WIDTH                            5  /* EQ5G - [4:0] */
0476 
0477 /*
0478  * R24 (0x18) - DAC Limiter 1
0479  */
0480 #define WM8983_LIMEN                            0x0100  /* LIMEN */
0481 #define WM8983_LIMEN_MASK                       0x0100  /* LIMEN */
0482 #define WM8983_LIMEN_SHIFT                           8  /* LIMEN */
0483 #define WM8983_LIMEN_WIDTH                           1  /* LIMEN */
0484 #define WM8983_LIMDCY_MASK                      0x00F0  /* LIMDCY - [7:4] */
0485 #define WM8983_LIMDCY_SHIFT                          4  /* LIMDCY - [7:4] */
0486 #define WM8983_LIMDCY_WIDTH                          4  /* LIMDCY - [7:4] */
0487 #define WM8983_LIMATK_MASK                      0x000F  /* LIMATK - [3:0] */
0488 #define WM8983_LIMATK_SHIFT                          0  /* LIMATK - [3:0] */
0489 #define WM8983_LIMATK_WIDTH                          4  /* LIMATK - [3:0] */
0490 
0491 /*
0492  * R25 (0x19) - DAC Limiter 2
0493  */
0494 #define WM8983_LIMLVL_MASK                      0x0070  /* LIMLVL - [6:4] */
0495 #define WM8983_LIMLVL_SHIFT                          4  /* LIMLVL - [6:4] */
0496 #define WM8983_LIMLVL_WIDTH                          3  /* LIMLVL - [6:4] */
0497 #define WM8983_LIMBOOST_MASK                    0x000F  /* LIMBOOST - [3:0] */
0498 #define WM8983_LIMBOOST_SHIFT                        0  /* LIMBOOST - [3:0] */
0499 #define WM8983_LIMBOOST_WIDTH                        4  /* LIMBOOST - [3:0] */
0500 
0501 /*
0502  * R27 (0x1B) - Notch Filter 1
0503  */
0504 #define WM8983_NFU                              0x0100  /* NFU */
0505 #define WM8983_NFU_MASK                         0x0100  /* NFU */
0506 #define WM8983_NFU_SHIFT                             8  /* NFU */
0507 #define WM8983_NFU_WIDTH                             1  /* NFU */
0508 #define WM8983_NFEN                             0x0080  /* NFEN */
0509 #define WM8983_NFEN_MASK                        0x0080  /* NFEN */
0510 #define WM8983_NFEN_SHIFT                            7  /* NFEN */
0511 #define WM8983_NFEN_WIDTH                            1  /* NFEN */
0512 #define WM8983_NFA0_13_7_MASK                   0x007F  /* NFA0(13:7) - [6:0] */
0513 #define WM8983_NFA0_13_7_SHIFT                       0  /* NFA0(13:7) - [6:0] */
0514 #define WM8983_NFA0_13_7_WIDTH                       7  /* NFA0(13:7) - [6:0] */
0515 
0516 /*
0517  * R28 (0x1C) - Notch Filter 2
0518  */
0519 #define WM8983_NFU                              0x0100  /* NFU */
0520 #define WM8983_NFU_MASK                         0x0100  /* NFU */
0521 #define WM8983_NFU_SHIFT                             8  /* NFU */
0522 #define WM8983_NFU_WIDTH                             1  /* NFU */
0523 #define WM8983_NFA0_6_0_MASK                    0x007F  /* NFA0(6:0) - [6:0] */
0524 #define WM8983_NFA0_6_0_SHIFT                        0  /* NFA0(6:0) - [6:0] */
0525 #define WM8983_NFA0_6_0_WIDTH                        7  /* NFA0(6:0) - [6:0] */
0526 
0527 /*
0528  * R29 (0x1D) - Notch Filter 3
0529  */
0530 #define WM8983_NFU                              0x0100  /* NFU */
0531 #define WM8983_NFU_MASK                         0x0100  /* NFU */
0532 #define WM8983_NFU_SHIFT                             8  /* NFU */
0533 #define WM8983_NFU_WIDTH                             1  /* NFU */
0534 #define WM8983_NFA1_13_7_MASK                   0x007F  /* NFA1(13:7) - [6:0] */
0535 #define WM8983_NFA1_13_7_SHIFT                       0  /* NFA1(13:7) - [6:0] */
0536 #define WM8983_NFA1_13_7_WIDTH                       7  /* NFA1(13:7) - [6:0] */
0537 
0538 /*
0539  * R30 (0x1E) - Notch Filter 4
0540  */
0541 #define WM8983_NFU                              0x0100  /* NFU */
0542 #define WM8983_NFU_MASK                         0x0100  /* NFU */
0543 #define WM8983_NFU_SHIFT                             8  /* NFU */
0544 #define WM8983_NFU_WIDTH                             1  /* NFU */
0545 #define WM8983_NFA1_6_0_MASK                    0x007F  /* NFA1(6:0) - [6:0] */
0546 #define WM8983_NFA1_6_0_SHIFT                        0  /* NFA1(6:0) - [6:0] */
0547 #define WM8983_NFA1_6_0_WIDTH                        7  /* NFA1(6:0) - [6:0] */
0548 
0549 /*
0550  * R32 (0x20) - ALC control 1
0551  */
0552 #define WM8983_ALCSEL_MASK                      0x0180  /* ALCSEL - [8:7] */
0553 #define WM8983_ALCSEL_SHIFT                          7  /* ALCSEL - [8:7] */
0554 #define WM8983_ALCSEL_WIDTH                          2  /* ALCSEL - [8:7] */
0555 #define WM8983_ALCMAX_MASK                      0x0038  /* ALCMAX - [5:3] */
0556 #define WM8983_ALCMAX_SHIFT                          3  /* ALCMAX - [5:3] */
0557 #define WM8983_ALCMAX_WIDTH                          3  /* ALCMAX - [5:3] */
0558 #define WM8983_ALCMIN_MASK                      0x0007  /* ALCMIN - [2:0] */
0559 #define WM8983_ALCMIN_SHIFT                          0  /* ALCMIN - [2:0] */
0560 #define WM8983_ALCMIN_WIDTH                          3  /* ALCMIN - [2:0] */
0561 
0562 /*
0563  * R33 (0x21) - ALC control 2
0564  */
0565 #define WM8983_ALCHLD_MASK                      0x00F0  /* ALCHLD - [7:4] */
0566 #define WM8983_ALCHLD_SHIFT                          4  /* ALCHLD - [7:4] */
0567 #define WM8983_ALCHLD_WIDTH                          4  /* ALCHLD - [7:4] */
0568 #define WM8983_ALCLVL_MASK                      0x000F  /* ALCLVL - [3:0] */
0569 #define WM8983_ALCLVL_SHIFT                          0  /* ALCLVL - [3:0] */
0570 #define WM8983_ALCLVL_WIDTH                          4  /* ALCLVL - [3:0] */
0571 
0572 /*
0573  * R34 (0x22) - ALC control 3
0574  */
0575 #define WM8983_ALCMODE                          0x0100  /* ALCMODE */
0576 #define WM8983_ALCMODE_MASK                     0x0100  /* ALCMODE */
0577 #define WM8983_ALCMODE_SHIFT                         8  /* ALCMODE */
0578 #define WM8983_ALCMODE_WIDTH                         1  /* ALCMODE */
0579 #define WM8983_ALCDCY_MASK                      0x00F0  /* ALCDCY - [7:4] */
0580 #define WM8983_ALCDCY_SHIFT                          4  /* ALCDCY - [7:4] */
0581 #define WM8983_ALCDCY_WIDTH                          4  /* ALCDCY - [7:4] */
0582 #define WM8983_ALCATK_MASK                      0x000F  /* ALCATK - [3:0] */
0583 #define WM8983_ALCATK_SHIFT                          0  /* ALCATK - [3:0] */
0584 #define WM8983_ALCATK_WIDTH                          4  /* ALCATK - [3:0] */
0585 
0586 /*
0587  * R35 (0x23) - Noise Gate
0588  */
0589 #define WM8983_NGEN                             0x0008  /* NGEN */
0590 #define WM8983_NGEN_MASK                        0x0008  /* NGEN */
0591 #define WM8983_NGEN_SHIFT                            3  /* NGEN */
0592 #define WM8983_NGEN_WIDTH                            1  /* NGEN */
0593 #define WM8983_NGTH_MASK                        0x0007  /* NGTH - [2:0] */
0594 #define WM8983_NGTH_SHIFT                            0  /* NGTH - [2:0] */
0595 #define WM8983_NGTH_WIDTH                            3  /* NGTH - [2:0] */
0596 
0597 /*
0598  * R36 (0x24) - PLL N
0599  */
0600 #define WM8983_PLL_PRESCALE                     0x0010  /* PLL_PRESCALE */
0601 #define WM8983_PLL_PRESCALE_MASK                0x0010  /* PLL_PRESCALE */
0602 #define WM8983_PLL_PRESCALE_SHIFT                    4  /* PLL_PRESCALE */
0603 #define WM8983_PLL_PRESCALE_WIDTH                    1  /* PLL_PRESCALE */
0604 #define WM8983_PLLN_MASK                        0x000F  /* PLLN - [3:0] */
0605 #define WM8983_PLLN_SHIFT                            0  /* PLLN - [3:0] */
0606 #define WM8983_PLLN_WIDTH                            4  /* PLLN - [3:0] */
0607 
0608 /*
0609  * R37 (0x25) - PLL K 1
0610  */
0611 #define WM8983_PLLK_23_18_MASK                  0x003F  /* PLLK(23:18) - [5:0] */
0612 #define WM8983_PLLK_23_18_SHIFT                      0  /* PLLK(23:18) - [5:0] */
0613 #define WM8983_PLLK_23_18_WIDTH                      6  /* PLLK(23:18) - [5:0] */
0614 
0615 /*
0616  * R38 (0x26) - PLL K 2
0617  */
0618 #define WM8983_PLLK_17_9_MASK                   0x01FF  /* PLLK(17:9) - [8:0] */
0619 #define WM8983_PLLK_17_9_SHIFT                       0  /* PLLK(17:9) - [8:0] */
0620 #define WM8983_PLLK_17_9_WIDTH                       9  /* PLLK(17:9) - [8:0] */
0621 
0622 /*
0623  * R39 (0x27) - PLL K 3
0624  */
0625 #define WM8983_PLLK_8_0_MASK                    0x01FF  /* PLLK(8:0) - [8:0] */
0626 #define WM8983_PLLK_8_0_SHIFT                        0  /* PLLK(8:0) - [8:0] */
0627 #define WM8983_PLLK_8_0_WIDTH                        9  /* PLLK(8:0) - [8:0] */
0628 
0629 /*
0630  * R41 (0x29) - 3D control
0631  */
0632 #define WM8983_DEPTH3D_MASK                     0x000F  /* DEPTH3D - [3:0] */
0633 #define WM8983_DEPTH3D_SHIFT                         0  /* DEPTH3D - [3:0] */
0634 #define WM8983_DEPTH3D_WIDTH                         4  /* DEPTH3D - [3:0] */
0635 
0636 /*
0637  * R42 (0x2A) - OUT4 to ADC
0638  */
0639 #define WM8983_OUT4_2ADCVOL_MASK                0x01C0  /* OUT4_2ADCVOL - [8:6] */
0640 #define WM8983_OUT4_2ADCVOL_SHIFT                    6  /* OUT4_2ADCVOL - [8:6] */
0641 #define WM8983_OUT4_2ADCVOL_WIDTH                    3  /* OUT4_2ADCVOL - [8:6] */
0642 #define WM8983_OUT4_2LNR                        0x0020  /* OUT4_2LNR */
0643 #define WM8983_OUT4_2LNR_MASK                   0x0020  /* OUT4_2LNR */
0644 #define WM8983_OUT4_2LNR_SHIFT                       5  /* OUT4_2LNR */
0645 #define WM8983_OUT4_2LNR_WIDTH                       1  /* OUT4_2LNR */
0646 #define WM8983_POBCTRL                          0x0004  /* POBCTRL */
0647 #define WM8983_POBCTRL_MASK                     0x0004  /* POBCTRL */
0648 #define WM8983_POBCTRL_SHIFT                         2  /* POBCTRL */
0649 #define WM8983_POBCTRL_WIDTH                         1  /* POBCTRL */
0650 #define WM8983_DELEN                            0x0002  /* DELEN */
0651 #define WM8983_DELEN_MASK                       0x0002  /* DELEN */
0652 #define WM8983_DELEN_SHIFT                           1  /* DELEN */
0653 #define WM8983_DELEN_WIDTH                           1  /* DELEN */
0654 #define WM8983_OUT1DEL                          0x0001  /* OUT1DEL */
0655 #define WM8983_OUT1DEL_MASK                     0x0001  /* OUT1DEL */
0656 #define WM8983_OUT1DEL_SHIFT                         0  /* OUT1DEL */
0657 #define WM8983_OUT1DEL_WIDTH                         1  /* OUT1DEL */
0658 
0659 /*
0660  * R43 (0x2B) - Beep control
0661  */
0662 #define WM8983_BYPL2RMIX                        0x0100  /* BYPL2RMIX */
0663 #define WM8983_BYPL2RMIX_MASK                   0x0100  /* BYPL2RMIX */
0664 #define WM8983_BYPL2RMIX_SHIFT                       8  /* BYPL2RMIX */
0665 #define WM8983_BYPL2RMIX_WIDTH                       1  /* BYPL2RMIX */
0666 #define WM8983_BYPR2LMIX                        0x0080  /* BYPR2LMIX */
0667 #define WM8983_BYPR2LMIX_MASK                   0x0080  /* BYPR2LMIX */
0668 #define WM8983_BYPR2LMIX_SHIFT                       7  /* BYPR2LMIX */
0669 #define WM8983_BYPR2LMIX_WIDTH                       1  /* BYPR2LMIX */
0670 #define WM8983_MUTERPGA2INV                     0x0020  /* MUTERPGA2INV */
0671 #define WM8983_MUTERPGA2INV_MASK                0x0020  /* MUTERPGA2INV */
0672 #define WM8983_MUTERPGA2INV_SHIFT                    5  /* MUTERPGA2INV */
0673 #define WM8983_MUTERPGA2INV_WIDTH                    1  /* MUTERPGA2INV */
0674 #define WM8983_INVROUT2                         0x0010  /* INVROUT2 */
0675 #define WM8983_INVROUT2_MASK                    0x0010  /* INVROUT2 */
0676 #define WM8983_INVROUT2_SHIFT                        4  /* INVROUT2 */
0677 #define WM8983_INVROUT2_WIDTH                        1  /* INVROUT2 */
0678 #define WM8983_BEEPVOL_MASK                     0x000E  /* BEEPVOL - [3:1] */
0679 #define WM8983_BEEPVOL_SHIFT                         1  /* BEEPVOL - [3:1] */
0680 #define WM8983_BEEPVOL_WIDTH                         3  /* BEEPVOL - [3:1] */
0681 #define WM8983_BEEPEN                           0x0001  /* BEEPEN */
0682 #define WM8983_BEEPEN_MASK                      0x0001  /* BEEPEN */
0683 #define WM8983_BEEPEN_SHIFT                          0  /* BEEPEN */
0684 #define WM8983_BEEPEN_WIDTH                          1  /* BEEPEN */
0685 
0686 /*
0687  * R44 (0x2C) - Input ctrl
0688  */
0689 #define WM8983_MBVSEL                           0x0100  /* MBVSEL */
0690 #define WM8983_MBVSEL_MASK                      0x0100  /* MBVSEL */
0691 #define WM8983_MBVSEL_SHIFT                          8  /* MBVSEL */
0692 #define WM8983_MBVSEL_WIDTH                          1  /* MBVSEL */
0693 #define WM8983_R2_2INPPGA                       0x0040  /* R2_2INPPGA */
0694 #define WM8983_R2_2INPPGA_MASK                  0x0040  /* R2_2INPPGA */
0695 #define WM8983_R2_2INPPGA_SHIFT                      6  /* R2_2INPPGA */
0696 #define WM8983_R2_2INPPGA_WIDTH                      1  /* R2_2INPPGA */
0697 #define WM8983_RIN2INPPGA                       0x0020  /* RIN2INPPGA */
0698 #define WM8983_RIN2INPPGA_MASK                  0x0020  /* RIN2INPPGA */
0699 #define WM8983_RIN2INPPGA_SHIFT                      5  /* RIN2INPPGA */
0700 #define WM8983_RIN2INPPGA_WIDTH                      1  /* RIN2INPPGA */
0701 #define WM8983_RIP2INPPGA                       0x0010  /* RIP2INPPGA */
0702 #define WM8983_RIP2INPPGA_MASK                  0x0010  /* RIP2INPPGA */
0703 #define WM8983_RIP2INPPGA_SHIFT                      4  /* RIP2INPPGA */
0704 #define WM8983_RIP2INPPGA_WIDTH                      1  /* RIP2INPPGA */
0705 #define WM8983_L2_2INPPGA                       0x0004  /* L2_2INPPGA */
0706 #define WM8983_L2_2INPPGA_MASK                  0x0004  /* L2_2INPPGA */
0707 #define WM8983_L2_2INPPGA_SHIFT                      2  /* L2_2INPPGA */
0708 #define WM8983_L2_2INPPGA_WIDTH                      1  /* L2_2INPPGA */
0709 #define WM8983_LIN2INPPGA                       0x0002  /* LIN2INPPGA */
0710 #define WM8983_LIN2INPPGA_MASK                  0x0002  /* LIN2INPPGA */
0711 #define WM8983_LIN2INPPGA_SHIFT                      1  /* LIN2INPPGA */
0712 #define WM8983_LIN2INPPGA_WIDTH                      1  /* LIN2INPPGA */
0713 #define WM8983_LIP2INPPGA                       0x0001  /* LIP2INPPGA */
0714 #define WM8983_LIP2INPPGA_MASK                  0x0001  /* LIP2INPPGA */
0715 #define WM8983_LIP2INPPGA_SHIFT                      0  /* LIP2INPPGA */
0716 #define WM8983_LIP2INPPGA_WIDTH                      1  /* LIP2INPPGA */
0717 
0718 /*
0719  * R45 (0x2D) - Left INP PGA gain ctrl
0720  */
0721 #define WM8983_INPGAVU                          0x0100  /* INPGAVU */
0722 #define WM8983_INPGAVU_MASK                     0x0100  /* INPGAVU */
0723 #define WM8983_INPGAVU_SHIFT                         8  /* INPGAVU */
0724 #define WM8983_INPGAVU_WIDTH                         1  /* INPGAVU */
0725 #define WM8983_INPPGAZCL                        0x0080  /* INPPGAZCL */
0726 #define WM8983_INPPGAZCL_MASK                   0x0080  /* INPPGAZCL */
0727 #define WM8983_INPPGAZCL_SHIFT                       7  /* INPPGAZCL */
0728 #define WM8983_INPPGAZCL_WIDTH                       1  /* INPPGAZCL */
0729 #define WM8983_INPPGAMUTEL                      0x0040  /* INPPGAMUTEL */
0730 #define WM8983_INPPGAMUTEL_MASK                 0x0040  /* INPPGAMUTEL */
0731 #define WM8983_INPPGAMUTEL_SHIFT                     6  /* INPPGAMUTEL */
0732 #define WM8983_INPPGAMUTEL_WIDTH                     1  /* INPPGAMUTEL */
0733 #define WM8983_INPPGAVOLL_MASK                  0x003F  /* INPPGAVOLL - [5:0] */
0734 #define WM8983_INPPGAVOLL_SHIFT                      0  /* INPPGAVOLL - [5:0] */
0735 #define WM8983_INPPGAVOLL_WIDTH                      6  /* INPPGAVOLL - [5:0] */
0736 
0737 /*
0738  * R46 (0x2E) - Right INP PGA gain ctrl
0739  */
0740 #define WM8983_INPGAVU                          0x0100  /* INPGAVU */
0741 #define WM8983_INPGAVU_MASK                     0x0100  /* INPGAVU */
0742 #define WM8983_INPGAVU_SHIFT                         8  /* INPGAVU */
0743 #define WM8983_INPGAVU_WIDTH                         1  /* INPGAVU */
0744 #define WM8983_INPPGAZCR                        0x0080  /* INPPGAZCR */
0745 #define WM8983_INPPGAZCR_MASK                   0x0080  /* INPPGAZCR */
0746 #define WM8983_INPPGAZCR_SHIFT                       7  /* INPPGAZCR */
0747 #define WM8983_INPPGAZCR_WIDTH                       1  /* INPPGAZCR */
0748 #define WM8983_INPPGAMUTER                      0x0040  /* INPPGAMUTER */
0749 #define WM8983_INPPGAMUTER_MASK                 0x0040  /* INPPGAMUTER */
0750 #define WM8983_INPPGAMUTER_SHIFT                     6  /* INPPGAMUTER */
0751 #define WM8983_INPPGAMUTER_WIDTH                     1  /* INPPGAMUTER */
0752 #define WM8983_INPPGAVOLR_MASK                  0x003F  /* INPPGAVOLR - [5:0] */
0753 #define WM8983_INPPGAVOLR_SHIFT                      0  /* INPPGAVOLR - [5:0] */
0754 #define WM8983_INPPGAVOLR_WIDTH                      6  /* INPPGAVOLR - [5:0] */
0755 
0756 /*
0757  * R47 (0x2F) - Left ADC BOOST ctrl
0758  */
0759 #define WM8983_PGABOOSTL                        0x0100  /* PGABOOSTL */
0760 #define WM8983_PGABOOSTL_MASK                   0x0100  /* PGABOOSTL */
0761 #define WM8983_PGABOOSTL_SHIFT                       8  /* PGABOOSTL */
0762 #define WM8983_PGABOOSTL_WIDTH                       1  /* PGABOOSTL */
0763 #define WM8983_L2_2BOOSTVOL_MASK                0x0070  /* L2_2BOOSTVOL - [6:4] */
0764 #define WM8983_L2_2BOOSTVOL_SHIFT                    4  /* L2_2BOOSTVOL - [6:4] */
0765 #define WM8983_L2_2BOOSTVOL_WIDTH                    3  /* L2_2BOOSTVOL - [6:4] */
0766 #define WM8983_AUXL2BOOSTVOL_MASK               0x0007  /* AUXL2BOOSTVOL - [2:0] */
0767 #define WM8983_AUXL2BOOSTVOL_SHIFT                   0  /* AUXL2BOOSTVOL - [2:0] */
0768 #define WM8983_AUXL2BOOSTVOL_WIDTH                   3  /* AUXL2BOOSTVOL - [2:0] */
0769 
0770 /*
0771  * R48 (0x30) - Right ADC BOOST ctrl
0772  */
0773 #define WM8983_PGABOOSTR                        0x0100  /* PGABOOSTR */
0774 #define WM8983_PGABOOSTR_MASK                   0x0100  /* PGABOOSTR */
0775 #define WM8983_PGABOOSTR_SHIFT                       8  /* PGABOOSTR */
0776 #define WM8983_PGABOOSTR_WIDTH                       1  /* PGABOOSTR */
0777 #define WM8983_R2_2BOOSTVOL_MASK                0x0070  /* R2_2BOOSTVOL - [6:4] */
0778 #define WM8983_R2_2BOOSTVOL_SHIFT                    4  /* R2_2BOOSTVOL - [6:4] */
0779 #define WM8983_R2_2BOOSTVOL_WIDTH                    3  /* R2_2BOOSTVOL - [6:4] */
0780 #define WM8983_AUXR2BOOSTVOL_MASK               0x0007  /* AUXR2BOOSTVOL - [2:0] */
0781 #define WM8983_AUXR2BOOSTVOL_SHIFT                   0  /* AUXR2BOOSTVOL - [2:0] */
0782 #define WM8983_AUXR2BOOSTVOL_WIDTH                   3  /* AUXR2BOOSTVOL - [2:0] */
0783 
0784 /*
0785  * R49 (0x31) - Output ctrl
0786  */
0787 #define WM8983_DACL2RMIX                        0x0040  /* DACL2RMIX */
0788 #define WM8983_DACL2RMIX_MASK                   0x0040  /* DACL2RMIX */
0789 #define WM8983_DACL2RMIX_SHIFT                       6  /* DACL2RMIX */
0790 #define WM8983_DACL2RMIX_WIDTH                       1  /* DACL2RMIX */
0791 #define WM8983_DACR2LMIX                        0x0020  /* DACR2LMIX */
0792 #define WM8983_DACR2LMIX_MASK                   0x0020  /* DACR2LMIX */
0793 #define WM8983_DACR2LMIX_SHIFT                       5  /* DACR2LMIX */
0794 #define WM8983_DACR2LMIX_WIDTH                       1  /* DACR2LMIX */
0795 #define WM8983_OUT4BOOST                        0x0010  /* OUT4BOOST */
0796 #define WM8983_OUT4BOOST_MASK                   0x0010  /* OUT4BOOST */
0797 #define WM8983_OUT4BOOST_SHIFT                       4  /* OUT4BOOST */
0798 #define WM8983_OUT4BOOST_WIDTH                       1  /* OUT4BOOST */
0799 #define WM8983_OUT3BOOST                        0x0008  /* OUT3BOOST */
0800 #define WM8983_OUT3BOOST_MASK                   0x0008  /* OUT3BOOST */
0801 #define WM8983_OUT3BOOST_SHIFT                       3  /* OUT3BOOST */
0802 #define WM8983_OUT3BOOST_WIDTH                       1  /* OUT3BOOST */
0803 #define WM8983_SPKBOOST                         0x0004  /* SPKBOOST */
0804 #define WM8983_SPKBOOST_MASK                    0x0004  /* SPKBOOST */
0805 #define WM8983_SPKBOOST_SHIFT                        2  /* SPKBOOST */
0806 #define WM8983_SPKBOOST_WIDTH                        1  /* SPKBOOST */
0807 #define WM8983_TSDEN                            0x0002  /* TSDEN */
0808 #define WM8983_TSDEN_MASK                       0x0002  /* TSDEN */
0809 #define WM8983_TSDEN_SHIFT                           1  /* TSDEN */
0810 #define WM8983_TSDEN_WIDTH                           1  /* TSDEN */
0811 #define WM8983_VROI                             0x0001  /* VROI */
0812 #define WM8983_VROI_MASK                        0x0001  /* VROI */
0813 #define WM8983_VROI_SHIFT                            0  /* VROI */
0814 #define WM8983_VROI_WIDTH                            1  /* VROI */
0815 
0816 /*
0817  * R50 (0x32) - Left mixer ctrl
0818  */
0819 #define WM8983_AUXLMIXVOL_MASK                  0x01C0  /* AUXLMIXVOL - [8:6] */
0820 #define WM8983_AUXLMIXVOL_SHIFT                      6  /* AUXLMIXVOL - [8:6] */
0821 #define WM8983_AUXLMIXVOL_WIDTH                      3  /* AUXLMIXVOL - [8:6] */
0822 #define WM8983_AUXL2LMIX                        0x0020  /* AUXL2LMIX */
0823 #define WM8983_AUXL2LMIX_MASK                   0x0020  /* AUXL2LMIX */
0824 #define WM8983_AUXL2LMIX_SHIFT                       5  /* AUXL2LMIX */
0825 #define WM8983_AUXL2LMIX_WIDTH                       1  /* AUXL2LMIX */
0826 #define WM8983_BYPLMIXVOL_MASK                  0x001C  /* BYPLMIXVOL - [4:2] */
0827 #define WM8983_BYPLMIXVOL_SHIFT                      2  /* BYPLMIXVOL - [4:2] */
0828 #define WM8983_BYPLMIXVOL_WIDTH                      3  /* BYPLMIXVOL - [4:2] */
0829 #define WM8983_BYPL2LMIX                        0x0002  /* BYPL2LMIX */
0830 #define WM8983_BYPL2LMIX_MASK                   0x0002  /* BYPL2LMIX */
0831 #define WM8983_BYPL2LMIX_SHIFT                       1  /* BYPL2LMIX */
0832 #define WM8983_BYPL2LMIX_WIDTH                       1  /* BYPL2LMIX */
0833 #define WM8983_DACL2LMIX                        0x0001  /* DACL2LMIX */
0834 #define WM8983_DACL2LMIX_MASK                   0x0001  /* DACL2LMIX */
0835 #define WM8983_DACL2LMIX_SHIFT                       0  /* DACL2LMIX */
0836 #define WM8983_DACL2LMIX_WIDTH                       1  /* DACL2LMIX */
0837 
0838 /*
0839  * R51 (0x33) - Right mixer ctrl
0840  */
0841 #define WM8983_AUXRMIXVOL_MASK                  0x01C0  /* AUXRMIXVOL - [8:6] */
0842 #define WM8983_AUXRMIXVOL_SHIFT                      6  /* AUXRMIXVOL - [8:6] */
0843 #define WM8983_AUXRMIXVOL_WIDTH                      3  /* AUXRMIXVOL - [8:6] */
0844 #define WM8983_AUXR2RMIX                        0x0020  /* AUXR2RMIX */
0845 #define WM8983_AUXR2RMIX_MASK                   0x0020  /* AUXR2RMIX */
0846 #define WM8983_AUXR2RMIX_SHIFT                       5  /* AUXR2RMIX */
0847 #define WM8983_AUXR2RMIX_WIDTH                       1  /* AUXR2RMIX */
0848 #define WM8983_BYPRMIXVOL_MASK                  0x001C  /* BYPRMIXVOL - [4:2] */
0849 #define WM8983_BYPRMIXVOL_SHIFT                      2  /* BYPRMIXVOL - [4:2] */
0850 #define WM8983_BYPRMIXVOL_WIDTH                      3  /* BYPRMIXVOL - [4:2] */
0851 #define WM8983_BYPR2RMIX                        0x0002  /* BYPR2RMIX */
0852 #define WM8983_BYPR2RMIX_MASK                   0x0002  /* BYPR2RMIX */
0853 #define WM8983_BYPR2RMIX_SHIFT                       1  /* BYPR2RMIX */
0854 #define WM8983_BYPR2RMIX_WIDTH                       1  /* BYPR2RMIX */
0855 #define WM8983_DACR2RMIX                        0x0001  /* DACR2RMIX */
0856 #define WM8983_DACR2RMIX_MASK                   0x0001  /* DACR2RMIX */
0857 #define WM8983_DACR2RMIX_SHIFT                       0  /* DACR2RMIX */
0858 #define WM8983_DACR2RMIX_WIDTH                       1  /* DACR2RMIX */
0859 
0860 /*
0861  * R52 (0x34) - LOUT1 (HP) volume ctrl
0862  */
0863 #define WM8983_OUT1VU                           0x0100  /* OUT1VU */
0864 #define WM8983_OUT1VU_MASK                      0x0100  /* OUT1VU */
0865 #define WM8983_OUT1VU_SHIFT                          8  /* OUT1VU */
0866 #define WM8983_OUT1VU_WIDTH                          1  /* OUT1VU */
0867 #define WM8983_LOUT1ZC                          0x0080  /* LOUT1ZC */
0868 #define WM8983_LOUT1ZC_MASK                     0x0080  /* LOUT1ZC */
0869 #define WM8983_LOUT1ZC_SHIFT                         7  /* LOUT1ZC */
0870 #define WM8983_LOUT1ZC_WIDTH                         1  /* LOUT1ZC */
0871 #define WM8983_LOUT1MUTE                        0x0040  /* LOUT1MUTE */
0872 #define WM8983_LOUT1MUTE_MASK                   0x0040  /* LOUT1MUTE */
0873 #define WM8983_LOUT1MUTE_SHIFT                       6  /* LOUT1MUTE */
0874 #define WM8983_LOUT1MUTE_WIDTH                       1  /* LOUT1MUTE */
0875 #define WM8983_LOUT1VOL_MASK                    0x003F  /* LOUT1VOL - [5:0] */
0876 #define WM8983_LOUT1VOL_SHIFT                        0  /* LOUT1VOL - [5:0] */
0877 #define WM8983_LOUT1VOL_WIDTH                        6  /* LOUT1VOL - [5:0] */
0878 
0879 /*
0880  * R53 (0x35) - ROUT1 (HP) volume ctrl
0881  */
0882 #define WM8983_OUT1VU                           0x0100  /* OUT1VU */
0883 #define WM8983_OUT1VU_MASK                      0x0100  /* OUT1VU */
0884 #define WM8983_OUT1VU_SHIFT                          8  /* OUT1VU */
0885 #define WM8983_OUT1VU_WIDTH                          1  /* OUT1VU */
0886 #define WM8983_ROUT1ZC                          0x0080  /* ROUT1ZC */
0887 #define WM8983_ROUT1ZC_MASK                     0x0080  /* ROUT1ZC */
0888 #define WM8983_ROUT1ZC_SHIFT                         7  /* ROUT1ZC */
0889 #define WM8983_ROUT1ZC_WIDTH                         1  /* ROUT1ZC */
0890 #define WM8983_ROUT1MUTE                        0x0040  /* ROUT1MUTE */
0891 #define WM8983_ROUT1MUTE_MASK                   0x0040  /* ROUT1MUTE */
0892 #define WM8983_ROUT1MUTE_SHIFT                       6  /* ROUT1MUTE */
0893 #define WM8983_ROUT1MUTE_WIDTH                       1  /* ROUT1MUTE */
0894 #define WM8983_ROUT1VOL_MASK                    0x003F  /* ROUT1VOL - [5:0] */
0895 #define WM8983_ROUT1VOL_SHIFT                        0  /* ROUT1VOL - [5:0] */
0896 #define WM8983_ROUT1VOL_WIDTH                        6  /* ROUT1VOL - [5:0] */
0897 
0898 /*
0899  * R54 (0x36) - LOUT2 (SPK) volume ctrl
0900  */
0901 #define WM8983_OUT2VU                           0x0100  /* OUT2VU */
0902 #define WM8983_OUT2VU_MASK                      0x0100  /* OUT2VU */
0903 #define WM8983_OUT2VU_SHIFT                          8  /* OUT2VU */
0904 #define WM8983_OUT2VU_WIDTH                          1  /* OUT2VU */
0905 #define WM8983_LOUT2ZC                          0x0080  /* LOUT2ZC */
0906 #define WM8983_LOUT2ZC_MASK                     0x0080  /* LOUT2ZC */
0907 #define WM8983_LOUT2ZC_SHIFT                         7  /* LOUT2ZC */
0908 #define WM8983_LOUT2ZC_WIDTH                         1  /* LOUT2ZC */
0909 #define WM8983_LOUT2MUTE                        0x0040  /* LOUT2MUTE */
0910 #define WM8983_LOUT2MUTE_MASK                   0x0040  /* LOUT2MUTE */
0911 #define WM8983_LOUT2MUTE_SHIFT                       6  /* LOUT2MUTE */
0912 #define WM8983_LOUT2MUTE_WIDTH                       1  /* LOUT2MUTE */
0913 #define WM8983_LOUT2VOL_MASK                    0x003F  /* LOUT2VOL - [5:0] */
0914 #define WM8983_LOUT2VOL_SHIFT                        0  /* LOUT2VOL - [5:0] */
0915 #define WM8983_LOUT2VOL_WIDTH                        6  /* LOUT2VOL - [5:0] */
0916 
0917 /*
0918  * R55 (0x37) - ROUT2 (SPK) volume ctrl
0919  */
0920 #define WM8983_OUT2VU                           0x0100  /* OUT2VU */
0921 #define WM8983_OUT2VU_MASK                      0x0100  /* OUT2VU */
0922 #define WM8983_OUT2VU_SHIFT                          8  /* OUT2VU */
0923 #define WM8983_OUT2VU_WIDTH                          1  /* OUT2VU */
0924 #define WM8983_ROUT2ZC                          0x0080  /* ROUT2ZC */
0925 #define WM8983_ROUT2ZC_MASK                     0x0080  /* ROUT2ZC */
0926 #define WM8983_ROUT2ZC_SHIFT                         7  /* ROUT2ZC */
0927 #define WM8983_ROUT2ZC_WIDTH                         1  /* ROUT2ZC */
0928 #define WM8983_ROUT2MUTE                        0x0040  /* ROUT2MUTE */
0929 #define WM8983_ROUT2MUTE_MASK                   0x0040  /* ROUT2MUTE */
0930 #define WM8983_ROUT2MUTE_SHIFT                       6  /* ROUT2MUTE */
0931 #define WM8983_ROUT2MUTE_WIDTH                       1  /* ROUT2MUTE */
0932 #define WM8983_ROUT2VOL_MASK                    0x003F  /* ROUT2VOL - [5:0] */
0933 #define WM8983_ROUT2VOL_SHIFT                        0  /* ROUT2VOL - [5:0] */
0934 #define WM8983_ROUT2VOL_WIDTH                        6  /* ROUT2VOL - [5:0] */
0935 
0936 /*
0937  * R56 (0x38) - OUT3 mixer ctrl
0938  */
0939 #define WM8983_OUT3MUTE                         0x0040  /* OUT3MUTE */
0940 #define WM8983_OUT3MUTE_MASK                    0x0040  /* OUT3MUTE */
0941 #define WM8983_OUT3MUTE_SHIFT                        6  /* OUT3MUTE */
0942 #define WM8983_OUT3MUTE_WIDTH                        1  /* OUT3MUTE */
0943 #define WM8983_OUT4_2OUT3                       0x0008  /* OUT4_2OUT3 */
0944 #define WM8983_OUT4_2OUT3_MASK                  0x0008  /* OUT4_2OUT3 */
0945 #define WM8983_OUT4_2OUT3_SHIFT                      3  /* OUT4_2OUT3 */
0946 #define WM8983_OUT4_2OUT3_WIDTH                      1  /* OUT4_2OUT3 */
0947 #define WM8983_BYPL2OUT3                        0x0004  /* BYPL2OUT3 */
0948 #define WM8983_BYPL2OUT3_MASK                   0x0004  /* BYPL2OUT3 */
0949 #define WM8983_BYPL2OUT3_SHIFT                       2  /* BYPL2OUT3 */
0950 #define WM8983_BYPL2OUT3_WIDTH                       1  /* BYPL2OUT3 */
0951 #define WM8983_LMIX2OUT3                        0x0002  /* LMIX2OUT3 */
0952 #define WM8983_LMIX2OUT3_MASK                   0x0002  /* LMIX2OUT3 */
0953 #define WM8983_LMIX2OUT3_SHIFT                       1  /* LMIX2OUT3 */
0954 #define WM8983_LMIX2OUT3_WIDTH                       1  /* LMIX2OUT3 */
0955 #define WM8983_LDAC2OUT3                        0x0001  /* LDAC2OUT3 */
0956 #define WM8983_LDAC2OUT3_MASK                   0x0001  /* LDAC2OUT3 */
0957 #define WM8983_LDAC2OUT3_SHIFT                       0  /* LDAC2OUT3 */
0958 #define WM8983_LDAC2OUT3_WIDTH                       1  /* LDAC2OUT3 */
0959 
0960 /*
0961  * R57 (0x39) - OUT4 (MONO) mix ctrl
0962  */
0963 #define WM8983_OUT3_2OUT4                       0x0080  /* OUT3_2OUT4 */
0964 #define WM8983_OUT3_2OUT4_MASK                  0x0080  /* OUT3_2OUT4 */
0965 #define WM8983_OUT3_2OUT4_SHIFT                      7  /* OUT3_2OUT4 */
0966 #define WM8983_OUT3_2OUT4_WIDTH                      1  /* OUT3_2OUT4 */
0967 #define WM8983_OUT4MUTE                         0x0040  /* OUT4MUTE */
0968 #define WM8983_OUT4MUTE_MASK                    0x0040  /* OUT4MUTE */
0969 #define WM8983_OUT4MUTE_SHIFT                        6  /* OUT4MUTE */
0970 #define WM8983_OUT4MUTE_WIDTH                        1  /* OUT4MUTE */
0971 #define WM8983_OUT4ATTN                         0x0020  /* OUT4ATTN */
0972 #define WM8983_OUT4ATTN_MASK                    0x0020  /* OUT4ATTN */
0973 #define WM8983_OUT4ATTN_SHIFT                        5  /* OUT4ATTN */
0974 #define WM8983_OUT4ATTN_WIDTH                        1  /* OUT4ATTN */
0975 #define WM8983_LMIX2OUT4                        0x0010  /* LMIX2OUT4 */
0976 #define WM8983_LMIX2OUT4_MASK                   0x0010  /* LMIX2OUT4 */
0977 #define WM8983_LMIX2OUT4_SHIFT                       4  /* LMIX2OUT4 */
0978 #define WM8983_LMIX2OUT4_WIDTH                       1  /* LMIX2OUT4 */
0979 #define WM8983_LDAC2OUT4                        0x0008  /* LDAC2OUT4 */
0980 #define WM8983_LDAC2OUT4_MASK                   0x0008  /* LDAC2OUT4 */
0981 #define WM8983_LDAC2OUT4_SHIFT                       3  /* LDAC2OUT4 */
0982 #define WM8983_LDAC2OUT4_WIDTH                       1  /* LDAC2OUT4 */
0983 #define WM8983_BYPR2OUT4                        0x0004  /* BYPR2OUT4 */
0984 #define WM8983_BYPR2OUT4_MASK                   0x0004  /* BYPR2OUT4 */
0985 #define WM8983_BYPR2OUT4_SHIFT                       2  /* BYPR2OUT4 */
0986 #define WM8983_BYPR2OUT4_WIDTH                       1  /* BYPR2OUT4 */
0987 #define WM8983_RMIX2OUT4                        0x0002  /* RMIX2OUT4 */
0988 #define WM8983_RMIX2OUT4_MASK                   0x0002  /* RMIX2OUT4 */
0989 #define WM8983_RMIX2OUT4_SHIFT                       1  /* RMIX2OUT4 */
0990 #define WM8983_RMIX2OUT4_WIDTH                       1  /* RMIX2OUT4 */
0991 #define WM8983_RDAC2OUT4                        0x0001  /* RDAC2OUT4 */
0992 #define WM8983_RDAC2OUT4_MASK                   0x0001  /* RDAC2OUT4 */
0993 #define WM8983_RDAC2OUT4_SHIFT                       0  /* RDAC2OUT4 */
0994 #define WM8983_RDAC2OUT4_WIDTH                       1  /* RDAC2OUT4 */
0995 
0996 /*
0997  * R61 (0x3D) - BIAS CTRL
0998  */
0999 #define WM8983_BIASCUT                          0x0100  /* BIASCUT */
1000 #define WM8983_BIASCUT_MASK                     0x0100  /* BIASCUT */
1001 #define WM8983_BIASCUT_SHIFT                         8  /* BIASCUT */
1002 #define WM8983_BIASCUT_WIDTH                         1  /* BIASCUT */
1003 #define WM8983_HALFIPBIAS                       0x0080  /* HALFIPBIAS */
1004 #define WM8983_HALFIPBIAS_MASK                  0x0080  /* HALFIPBIAS */
1005 #define WM8983_HALFIPBIAS_SHIFT                      7  /* HALFIPBIAS */
1006 #define WM8983_HALFIPBIAS_WIDTH                      1  /* HALFIPBIAS */
1007 #define WM8983_VBBIASTST_MASK                   0x0060  /* VBBIASTST - [6:5] */
1008 #define WM8983_VBBIASTST_SHIFT                       5  /* VBBIASTST - [6:5] */
1009 #define WM8983_VBBIASTST_WIDTH                       2  /* VBBIASTST - [6:5] */
1010 #define WM8983_BUFBIAS_MASK                     0x0018  /* BUFBIAS - [4:3] */
1011 #define WM8983_BUFBIAS_SHIFT                         3  /* BUFBIAS - [4:3] */
1012 #define WM8983_BUFBIAS_WIDTH                         2  /* BUFBIAS - [4:3] */
1013 #define WM8983_ADCBIAS_MASK                     0x0006  /* ADCBIAS - [2:1] */
1014 #define WM8983_ADCBIAS_SHIFT                         1  /* ADCBIAS - [2:1] */
1015 #define WM8983_ADCBIAS_WIDTH                         2  /* ADCBIAS - [2:1] */
1016 #define WM8983_HALFOPBIAS                       0x0001  /* HALFOPBIAS */
1017 #define WM8983_HALFOPBIAS_MASK                  0x0001  /* HALFOPBIAS */
1018 #define WM8983_HALFOPBIAS_SHIFT                      0  /* HALFOPBIAS */
1019 #define WM8983_HALFOPBIAS_WIDTH                      1  /* HALFOPBIAS */
1020 
1021 enum clk_src {
1022     WM8983_CLKSRC_MCLK,
1023     WM8983_CLKSRC_PLL
1024 };
1025 
1026 #endif /* _WM8983_H */
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