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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * wm8974.c  --  WM8974 ALSA Soc Audio driver
0004  *
0005  * Copyright 2006-2009 Wolfson Microelectronics PLC.
0006  *
0007  * Author: Liam Girdwood <Liam.Girdwood@wolfsonmicro.com>
0008  */
0009 
0010 #include <linux/module.h>
0011 #include <linux/kernel.h>
0012 #include <linux/init.h>
0013 #include <linux/delay.h>
0014 #include <linux/pm.h>
0015 #include <linux/i2c.h>
0016 #include <linux/regmap.h>
0017 #include <linux/slab.h>
0018 #include <sound/core.h>
0019 #include <sound/pcm.h>
0020 #include <sound/pcm_params.h>
0021 #include <sound/soc.h>
0022 #include <sound/initval.h>
0023 #include <sound/tlv.h>
0024 
0025 #include "wm8974.h"
0026 
0027 struct wm8974_priv {
0028     unsigned int mclk;
0029     unsigned int fs;
0030 };
0031 
0032 static const struct reg_default wm8974_reg_defaults[] = {
0033     {  0, 0x0000 }, {  1, 0x0000 }, {  2, 0x0000 }, {  3, 0x0000 },
0034     {  4, 0x0050 }, {  5, 0x0000 }, {  6, 0x0140 }, {  7, 0x0000 },
0035     {  8, 0x0000 }, {  9, 0x0000 }, { 10, 0x0000 }, { 11, 0x00ff },
0036     { 12, 0x0000 }, { 13, 0x0000 }, { 14, 0x0100 }, { 15, 0x00ff },
0037     { 16, 0x0000 }, { 17, 0x0000 }, { 18, 0x012c }, { 19, 0x002c },
0038     { 20, 0x002c }, { 21, 0x002c }, { 22, 0x002c }, { 23, 0x0000 },
0039     { 24, 0x0032 }, { 25, 0x0000 }, { 26, 0x0000 }, { 27, 0x0000 },
0040     { 28, 0x0000 }, { 29, 0x0000 }, { 30, 0x0000 }, { 31, 0x0000 },
0041     { 32, 0x0038 }, { 33, 0x000b }, { 34, 0x0032 }, { 35, 0x0000 },
0042     { 36, 0x0008 }, { 37, 0x000c }, { 38, 0x0093 }, { 39, 0x00e9 },
0043     { 40, 0x0000 }, { 41, 0x0000 }, { 42, 0x0000 }, { 43, 0x0000 },
0044     { 44, 0x0003 }, { 45, 0x0010 }, { 46, 0x0000 }, { 47, 0x0000 },
0045     { 48, 0x0000 }, { 49, 0x0002 }, { 50, 0x0000 }, { 51, 0x0000 },
0046     { 52, 0x0000 }, { 53, 0x0000 }, { 54, 0x0039 }, { 55, 0x0000 },
0047     { 56, 0x0000 },
0048 };
0049 
0050 #define WM8974_POWER1_BIASEN  0x08
0051 #define WM8974_POWER1_BUFIOEN 0x04
0052 
0053 #define wm8974_reset(c) snd_soc_component_write(c, WM8974_RESET, 0)
0054 
0055 static const char *wm8974_companding[] = {"Off", "NC", "u-law", "A-law" };
0056 static const char *wm8974_deemp[] = {"None", "32kHz", "44.1kHz", "48kHz" };
0057 static const char *wm8974_eqmode[] = {"Capture", "Playback" };
0058 static const char *wm8974_bw[] = {"Narrow", "Wide" };
0059 static const char *wm8974_eq1[] = {"80Hz", "105Hz", "135Hz", "175Hz" };
0060 static const char *wm8974_eq2[] = {"230Hz", "300Hz", "385Hz", "500Hz" };
0061 static const char *wm8974_eq3[] = {"650Hz", "850Hz", "1.1kHz", "1.4kHz" };
0062 static const char *wm8974_eq4[] = {"1.8kHz", "2.4kHz", "3.2kHz", "4.1kHz" };
0063 static const char *wm8974_eq5[] = {"5.3kHz", "6.9kHz", "9kHz", "11.7kHz" };
0064 static const char *wm8974_alc[] = {"ALC", "Limiter" };
0065 
0066 static const struct soc_enum wm8974_enum[] = {
0067     SOC_ENUM_SINGLE(WM8974_COMP, 1, 4, wm8974_companding), /* adc */
0068     SOC_ENUM_SINGLE(WM8974_COMP, 3, 4, wm8974_companding), /* dac */
0069     SOC_ENUM_SINGLE(WM8974_DAC,  4, 4, wm8974_deemp),
0070     SOC_ENUM_SINGLE(WM8974_EQ1,  8, 2, wm8974_eqmode),
0071 
0072     SOC_ENUM_SINGLE(WM8974_EQ1,  5, 4, wm8974_eq1),
0073     SOC_ENUM_SINGLE(WM8974_EQ2,  8, 2, wm8974_bw),
0074     SOC_ENUM_SINGLE(WM8974_EQ2,  5, 4, wm8974_eq2),
0075     SOC_ENUM_SINGLE(WM8974_EQ3,  8, 2, wm8974_bw),
0076 
0077     SOC_ENUM_SINGLE(WM8974_EQ3,  5, 4, wm8974_eq3),
0078     SOC_ENUM_SINGLE(WM8974_EQ4,  8, 2, wm8974_bw),
0079     SOC_ENUM_SINGLE(WM8974_EQ4,  5, 4, wm8974_eq4),
0080     SOC_ENUM_SINGLE(WM8974_EQ5,  8, 2, wm8974_bw),
0081 
0082     SOC_ENUM_SINGLE(WM8974_EQ5,  5, 4, wm8974_eq5),
0083     SOC_ENUM_SINGLE(WM8974_ALC3,  8, 2, wm8974_alc),
0084 };
0085 
0086 static const char *wm8974_auxmode_text[] = { "Buffer", "Mixer" };
0087 
0088 static SOC_ENUM_SINGLE_DECL(wm8974_auxmode,
0089                 WM8974_INPUT,  3, wm8974_auxmode_text);
0090 
0091 static const DECLARE_TLV_DB_SCALE(digital_tlv, -12750, 50, 1);
0092 static const DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0);
0093 static const DECLARE_TLV_DB_SCALE(inpga_tlv, -1200, 75, 0);
0094 static const DECLARE_TLV_DB_SCALE(spk_tlv, -5700, 100, 0);
0095 
0096 static const struct snd_kcontrol_new wm8974_snd_controls[] = {
0097 
0098 SOC_SINGLE("Digital Loopback Switch", WM8974_COMP, 0, 1, 0),
0099 
0100 SOC_ENUM("DAC Companding", wm8974_enum[1]),
0101 SOC_ENUM("ADC Companding", wm8974_enum[0]),
0102 
0103 SOC_ENUM("Playback De-emphasis", wm8974_enum[2]),
0104 SOC_SINGLE("DAC Inversion Switch", WM8974_DAC, 0, 1, 0),
0105 
0106 SOC_SINGLE_TLV("PCM Volume", WM8974_DACVOL, 0, 255, 0, digital_tlv),
0107 
0108 SOC_SINGLE("High Pass Filter Switch", WM8974_ADC, 8, 1, 0),
0109 SOC_SINGLE("High Pass Cut Off", WM8974_ADC, 4, 7, 0),
0110 SOC_SINGLE("ADC Inversion Switch", WM8974_ADC, 0, 1, 0),
0111 
0112 SOC_SINGLE_TLV("Capture Volume", WM8974_ADCVOL,  0, 255, 0, digital_tlv),
0113 
0114 SOC_ENUM("Equaliser Function", wm8974_enum[3]),
0115 SOC_ENUM("EQ1 Cut Off", wm8974_enum[4]),
0116 SOC_SINGLE_TLV("EQ1 Volume", WM8974_EQ1,  0, 24, 1, eq_tlv),
0117 
0118 SOC_ENUM("Equaliser EQ2 Bandwidth", wm8974_enum[5]),
0119 SOC_ENUM("EQ2 Cut Off", wm8974_enum[6]),
0120 SOC_SINGLE_TLV("EQ2 Volume", WM8974_EQ2,  0, 24, 1, eq_tlv),
0121 
0122 SOC_ENUM("Equaliser EQ3 Bandwidth", wm8974_enum[7]),
0123 SOC_ENUM("EQ3 Cut Off", wm8974_enum[8]),
0124 SOC_SINGLE_TLV("EQ3 Volume", WM8974_EQ3,  0, 24, 1, eq_tlv),
0125 
0126 SOC_ENUM("Equaliser EQ4 Bandwidth", wm8974_enum[9]),
0127 SOC_ENUM("EQ4 Cut Off", wm8974_enum[10]),
0128 SOC_SINGLE_TLV("EQ4 Volume", WM8974_EQ4,  0, 24, 1, eq_tlv),
0129 
0130 SOC_ENUM("Equaliser EQ5 Bandwidth", wm8974_enum[11]),
0131 SOC_ENUM("EQ5 Cut Off", wm8974_enum[12]),
0132 SOC_SINGLE_TLV("EQ5 Volume", WM8974_EQ5,  0, 24, 1, eq_tlv),
0133 
0134 SOC_SINGLE("DAC Playback Limiter Switch", WM8974_DACLIM1,  8, 1, 0),
0135 SOC_SINGLE("DAC Playback Limiter Decay", WM8974_DACLIM1,  4, 15, 0),
0136 SOC_SINGLE("DAC Playback Limiter Attack", WM8974_DACLIM1,  0, 15, 0),
0137 
0138 SOC_SINGLE("DAC Playback Limiter Threshold", WM8974_DACLIM2,  4, 7, 0),
0139 SOC_SINGLE("DAC Playback Limiter Boost", WM8974_DACLIM2,  0, 15, 0),
0140 
0141 SOC_SINGLE("ALC Enable Switch", WM8974_ALC1,  8, 1, 0),
0142 SOC_SINGLE("ALC Capture Max Gain", WM8974_ALC1,  3, 7, 0),
0143 SOC_SINGLE("ALC Capture Min Gain", WM8974_ALC1,  0, 7, 0),
0144 
0145 SOC_SINGLE("ALC Capture ZC Switch", WM8974_ALC2,  8, 1, 0),
0146 SOC_SINGLE("ALC Capture Hold", WM8974_ALC2,  4, 7, 0),
0147 SOC_SINGLE("ALC Capture Target", WM8974_ALC2,  0, 15, 0),
0148 
0149 SOC_ENUM("ALC Capture Mode", wm8974_enum[13]),
0150 SOC_SINGLE("ALC Capture Decay", WM8974_ALC3,  4, 15, 0),
0151 SOC_SINGLE("ALC Capture Attack", WM8974_ALC3,  0, 15, 0),
0152 
0153 SOC_SINGLE("ALC Capture Noise Gate Switch", WM8974_NGATE,  3, 1, 0),
0154 SOC_SINGLE("ALC Capture Noise Gate Threshold", WM8974_NGATE,  0, 7, 0),
0155 
0156 SOC_SINGLE("Capture PGA ZC Switch", WM8974_INPPGA,  7, 1, 0),
0157 SOC_SINGLE_TLV("Capture PGA Volume", WM8974_INPPGA,  0, 63, 0, inpga_tlv),
0158 
0159 SOC_SINGLE("Speaker Playback ZC Switch", WM8974_SPKVOL,  7, 1, 0),
0160 SOC_SINGLE("Speaker Playback Switch", WM8974_SPKVOL,  6, 1, 1),
0161 SOC_SINGLE_TLV("Speaker Playback Volume", WM8974_SPKVOL,  0, 63, 0, spk_tlv),
0162 
0163 SOC_ENUM("Aux Mode", wm8974_auxmode),
0164 
0165 SOC_SINGLE("Capture Boost(+20dB)", WM8974_ADCBOOST,  8, 1, 0),
0166 SOC_SINGLE("Mono Playback Switch", WM8974_MONOMIX, 6, 1, 1),
0167 
0168 /* DAC / ADC oversampling */
0169 SOC_SINGLE("DAC 128x Oversampling Switch", WM8974_DAC, 8, 1, 0),
0170 SOC_SINGLE("ADC 128x Oversampling Switch", WM8974_ADC, 8, 1, 0),
0171 };
0172 
0173 /* Speaker Output Mixer */
0174 static const struct snd_kcontrol_new wm8974_speaker_mixer_controls[] = {
0175 SOC_DAPM_SINGLE("Line Bypass Switch", WM8974_SPKMIX, 1, 1, 0),
0176 SOC_DAPM_SINGLE("Aux Playback Switch", WM8974_SPKMIX, 5, 1, 0),
0177 SOC_DAPM_SINGLE("PCM Playback Switch", WM8974_SPKMIX, 0, 1, 0),
0178 };
0179 
0180 /* Mono Output Mixer */
0181 static const struct snd_kcontrol_new wm8974_mono_mixer_controls[] = {
0182 SOC_DAPM_SINGLE("Line Bypass Switch", WM8974_MONOMIX, 1, 1, 0),
0183 SOC_DAPM_SINGLE("Aux Playback Switch", WM8974_MONOMIX, 2, 1, 0),
0184 SOC_DAPM_SINGLE("PCM Playback Switch", WM8974_MONOMIX, 0, 1, 0),
0185 };
0186 
0187 /* Boost mixer */
0188 static const struct snd_kcontrol_new wm8974_boost_mixer[] = {
0189 SOC_DAPM_SINGLE("Aux Switch", WM8974_INPPGA, 6, 1, 1),
0190 };
0191 
0192 /* Input PGA */
0193 static const struct snd_kcontrol_new wm8974_inpga[] = {
0194 SOC_DAPM_SINGLE("Aux Switch", WM8974_INPUT, 2, 1, 0),
0195 SOC_DAPM_SINGLE("MicN Switch", WM8974_INPUT, 1, 1, 0),
0196 SOC_DAPM_SINGLE("MicP Switch", WM8974_INPUT, 0, 1, 0),
0197 };
0198 
0199 static const struct snd_soc_dapm_widget wm8974_dapm_widgets[] = {
0200 SND_SOC_DAPM_MIXER("Speaker Mixer", WM8974_POWER3, 2, 0,
0201     &wm8974_speaker_mixer_controls[0],
0202     ARRAY_SIZE(wm8974_speaker_mixer_controls)),
0203 SND_SOC_DAPM_MIXER("Mono Mixer", WM8974_POWER3, 3, 0,
0204     &wm8974_mono_mixer_controls[0],
0205     ARRAY_SIZE(wm8974_mono_mixer_controls)),
0206 SND_SOC_DAPM_DAC("DAC", "HiFi Playback", WM8974_POWER3, 0, 0),
0207 SND_SOC_DAPM_ADC("ADC", "HiFi Capture", WM8974_POWER2, 0, 0),
0208 SND_SOC_DAPM_PGA("Aux Input", WM8974_POWER1, 6, 0, NULL, 0),
0209 SND_SOC_DAPM_PGA("SpkN Out", WM8974_POWER3, 5, 0, NULL, 0),
0210 SND_SOC_DAPM_PGA("SpkP Out", WM8974_POWER3, 6, 0, NULL, 0),
0211 SND_SOC_DAPM_PGA("Mono Out", WM8974_POWER3, 7, 0, NULL, 0),
0212 
0213 SND_SOC_DAPM_MIXER("Input PGA", WM8974_POWER2, 2, 0, wm8974_inpga,
0214            ARRAY_SIZE(wm8974_inpga)),
0215 SND_SOC_DAPM_MIXER("Boost Mixer", WM8974_POWER2, 4, 0,
0216            wm8974_boost_mixer, ARRAY_SIZE(wm8974_boost_mixer)),
0217 
0218 SND_SOC_DAPM_SUPPLY("Mic Bias", WM8974_POWER1, 4, 0, NULL, 0),
0219 
0220 SND_SOC_DAPM_INPUT("MICN"),
0221 SND_SOC_DAPM_INPUT("MICP"),
0222 SND_SOC_DAPM_INPUT("AUX"),
0223 SND_SOC_DAPM_OUTPUT("MONOOUT"),
0224 SND_SOC_DAPM_OUTPUT("SPKOUTP"),
0225 SND_SOC_DAPM_OUTPUT("SPKOUTN"),
0226 };
0227 
0228 static const struct snd_soc_dapm_route wm8974_dapm_routes[] = {
0229     /* Mono output mixer */
0230     {"Mono Mixer", "PCM Playback Switch", "DAC"},
0231     {"Mono Mixer", "Aux Playback Switch", "Aux Input"},
0232     {"Mono Mixer", "Line Bypass Switch", "Boost Mixer"},
0233 
0234     /* Speaker output mixer */
0235     {"Speaker Mixer", "PCM Playback Switch", "DAC"},
0236     {"Speaker Mixer", "Aux Playback Switch", "Aux Input"},
0237     {"Speaker Mixer", "Line Bypass Switch", "Boost Mixer"},
0238 
0239     /* Outputs */
0240     {"Mono Out", NULL, "Mono Mixer"},
0241     {"MONOOUT", NULL, "Mono Out"},
0242     {"SpkN Out", NULL, "Speaker Mixer"},
0243     {"SpkP Out", NULL, "Speaker Mixer"},
0244     {"SPKOUTN", NULL, "SpkN Out"},
0245     {"SPKOUTP", NULL, "SpkP Out"},
0246 
0247     /* Boost Mixer */
0248     {"ADC", NULL, "Boost Mixer"},
0249     {"Boost Mixer", "Aux Switch", "Aux Input"},
0250     {"Boost Mixer", NULL, "Input PGA"},
0251     {"Boost Mixer", NULL, "MICP"},
0252 
0253     /* Input PGA */
0254     {"Input PGA", "Aux Switch", "Aux Input"},
0255     {"Input PGA", "MicN Switch", "MICN"},
0256     {"Input PGA", "MicP Switch", "MICP"},
0257 
0258     /* Inputs */
0259     {"Aux Input", NULL, "AUX"},
0260 };
0261 
0262 struct pll_ {
0263     unsigned int pre_div:1;
0264     unsigned int n:4;
0265     unsigned int k;
0266 };
0267 
0268 /* The size in bits of the pll divide multiplied by 10
0269  * to allow rounding later */
0270 #define FIXED_PLL_SIZE ((1 << 24) * 10)
0271 
0272 static void pll_factors(struct pll_ *pll_div,
0273             unsigned int target, unsigned int source)
0274 {
0275     unsigned long long Kpart;
0276     unsigned int K, Ndiv, Nmod;
0277 
0278     /* There is a fixed divide by 4 in the output path */
0279     target *= 4;
0280 
0281     Ndiv = target / source;
0282     if (Ndiv < 6) {
0283         source /= 2;
0284         pll_div->pre_div = 1;
0285         Ndiv = target / source;
0286     } else
0287         pll_div->pre_div = 0;
0288 
0289     if ((Ndiv < 6) || (Ndiv > 12))
0290         printk(KERN_WARNING
0291             "WM8974 N value %u outwith recommended range!\n",
0292             Ndiv);
0293 
0294     pll_div->n = Ndiv;
0295     Nmod = target % source;
0296     Kpart = FIXED_PLL_SIZE * (long long)Nmod;
0297 
0298     do_div(Kpart, source);
0299 
0300     K = Kpart & 0xFFFFFFFF;
0301 
0302     /* Check if we need to round */
0303     if ((K % 10) >= 5)
0304         K += 5;
0305 
0306     /* Move down to proper range now rounding is done */
0307     K /= 10;
0308 
0309     pll_div->k = K;
0310 }
0311 
0312 static int wm8974_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
0313         int source, unsigned int freq_in, unsigned int freq_out)
0314 {
0315     struct snd_soc_component *component = codec_dai->component;
0316     struct pll_ pll_div;
0317     u16 reg;
0318 
0319     if (freq_in == 0 || freq_out == 0) {
0320         /* Clock CODEC directly from MCLK */
0321         reg = snd_soc_component_read(component, WM8974_CLOCK);
0322         snd_soc_component_write(component, WM8974_CLOCK, reg & 0x0ff);
0323 
0324         /* Turn off PLL */
0325         reg = snd_soc_component_read(component, WM8974_POWER1);
0326         snd_soc_component_write(component, WM8974_POWER1, reg & 0x1df);
0327         return 0;
0328     }
0329 
0330     pll_factors(&pll_div, freq_out, freq_in);
0331 
0332     snd_soc_component_write(component, WM8974_PLLN, (pll_div.pre_div << 4) | pll_div.n);
0333     snd_soc_component_write(component, WM8974_PLLK1, pll_div.k >> 18);
0334     snd_soc_component_write(component, WM8974_PLLK2, (pll_div.k >> 9) & 0x1ff);
0335     snd_soc_component_write(component, WM8974_PLLK3, pll_div.k & 0x1ff);
0336     reg = snd_soc_component_read(component, WM8974_POWER1);
0337     snd_soc_component_write(component, WM8974_POWER1, reg | 0x020);
0338 
0339     /* Run CODEC from PLL instead of MCLK */
0340     reg = snd_soc_component_read(component, WM8974_CLOCK);
0341     snd_soc_component_write(component, WM8974_CLOCK, reg | 0x100);
0342 
0343     return 0;
0344 }
0345 
0346 /*
0347  * Configure WM8974 clock dividers.
0348  */
0349 static int wm8974_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
0350         int div_id, int div)
0351 {
0352     struct snd_soc_component *component = codec_dai->component;
0353     u16 reg;
0354 
0355     switch (div_id) {
0356     case WM8974_OPCLKDIV:
0357         reg = snd_soc_component_read(component, WM8974_GPIO) & 0x1cf;
0358         snd_soc_component_write(component, WM8974_GPIO, reg | div);
0359         break;
0360     case WM8974_MCLKDIV:
0361         reg = snd_soc_component_read(component, WM8974_CLOCK) & 0x11f;
0362         snd_soc_component_write(component, WM8974_CLOCK, reg | div);
0363         break;
0364     case WM8974_BCLKDIV:
0365         reg = snd_soc_component_read(component, WM8974_CLOCK) & 0x1e3;
0366         snd_soc_component_write(component, WM8974_CLOCK, reg | div);
0367         break;
0368     default:
0369         return -EINVAL;
0370     }
0371 
0372     return 0;
0373 }
0374 
0375 static unsigned int wm8974_get_mclkdiv(unsigned int f_in, unsigned int f_out,
0376                        int *mclkdiv)
0377 {
0378     unsigned int ratio = 2 * f_in / f_out;
0379 
0380     if (ratio <= 2) {
0381         *mclkdiv = WM8974_MCLKDIV_1;
0382         ratio = 2;
0383     } else if (ratio == 3) {
0384         *mclkdiv = WM8974_MCLKDIV_1_5;
0385     } else if (ratio == 4) {
0386         *mclkdiv = WM8974_MCLKDIV_2;
0387     } else if (ratio <= 6) {
0388         *mclkdiv = WM8974_MCLKDIV_3;
0389         ratio = 6;
0390     } else if (ratio <= 8) {
0391         *mclkdiv = WM8974_MCLKDIV_4;
0392         ratio = 8;
0393     } else if (ratio <= 12) {
0394         *mclkdiv = WM8974_MCLKDIV_6;
0395         ratio = 12;
0396     } else if (ratio <= 16) {
0397         *mclkdiv = WM8974_MCLKDIV_8;
0398         ratio = 16;
0399     } else {
0400         *mclkdiv = WM8974_MCLKDIV_12;
0401         ratio = 24;
0402     }
0403 
0404     return f_out * ratio / 2;
0405 }
0406 
0407 static int wm8974_update_clocks(struct snd_soc_dai *dai)
0408 {
0409     struct snd_soc_component *component = dai->component;
0410     struct wm8974_priv *priv = snd_soc_component_get_drvdata(component);
0411     unsigned int fs256;
0412     unsigned int fpll = 0;
0413     unsigned int f;
0414     int mclkdiv;
0415 
0416     if (!priv->mclk || !priv->fs)
0417         return 0;
0418 
0419     fs256 = 256 * priv->fs;
0420 
0421     f = wm8974_get_mclkdiv(priv->mclk, fs256, &mclkdiv);
0422 
0423     if (f != priv->mclk) {
0424         /* The PLL performs best around 90MHz */
0425         fpll = wm8974_get_mclkdiv(22500000, fs256, &mclkdiv);
0426     }
0427 
0428     wm8974_set_dai_pll(dai, 0, 0, priv->mclk, fpll);
0429     wm8974_set_dai_clkdiv(dai, WM8974_MCLKDIV, mclkdiv);
0430 
0431     return 0;
0432 }
0433 
0434 static int wm8974_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id,
0435                  unsigned int freq, int dir)
0436 {
0437     struct snd_soc_component *component = dai->component;
0438     struct wm8974_priv *priv = snd_soc_component_get_drvdata(component);
0439 
0440     if (dir != SND_SOC_CLOCK_IN)
0441         return -EINVAL;
0442 
0443     priv->mclk = freq;
0444 
0445     return wm8974_update_clocks(dai);
0446 }
0447 
0448 static int wm8974_set_dai_fmt(struct snd_soc_dai *codec_dai,
0449         unsigned int fmt)
0450 {
0451     struct snd_soc_component *component = codec_dai->component;
0452     u16 iface = 0;
0453     u16 clk = snd_soc_component_read(component, WM8974_CLOCK) & 0x1fe;
0454 
0455     /* set master/slave audio interface */
0456     switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
0457     case SND_SOC_DAIFMT_CBM_CFM:
0458         clk |= 0x0001;
0459         break;
0460     case SND_SOC_DAIFMT_CBS_CFS:
0461         break;
0462     default:
0463         return -EINVAL;
0464     }
0465 
0466     /* interface format */
0467     switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
0468     case SND_SOC_DAIFMT_I2S:
0469         iface |= 0x0010;
0470         break;
0471     case SND_SOC_DAIFMT_RIGHT_J:
0472         break;
0473     case SND_SOC_DAIFMT_LEFT_J:
0474         iface |= 0x0008;
0475         break;
0476     case SND_SOC_DAIFMT_DSP_A:
0477         if ((fmt & SND_SOC_DAIFMT_INV_MASK) == SND_SOC_DAIFMT_IB_IF ||
0478             (fmt & SND_SOC_DAIFMT_INV_MASK) == SND_SOC_DAIFMT_NB_IF) {
0479             return -EINVAL;
0480         }
0481         iface |= 0x00018;
0482         break;
0483     default:
0484         return -EINVAL;
0485     }
0486 
0487     /* clock inversion */
0488     switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
0489     case SND_SOC_DAIFMT_NB_NF:
0490         break;
0491     case SND_SOC_DAIFMT_IB_IF:
0492         iface |= 0x0180;
0493         break;
0494     case SND_SOC_DAIFMT_IB_NF:
0495         iface |= 0x0100;
0496         break;
0497     case SND_SOC_DAIFMT_NB_IF:
0498         iface |= 0x0080;
0499         break;
0500     default:
0501         return -EINVAL;
0502     }
0503 
0504     snd_soc_component_write(component, WM8974_IFACE, iface);
0505     snd_soc_component_write(component, WM8974_CLOCK, clk);
0506     return 0;
0507 }
0508 
0509 static int wm8974_pcm_hw_params(struct snd_pcm_substream *substream,
0510                 struct snd_pcm_hw_params *params,
0511                 struct snd_soc_dai *dai)
0512 {
0513     struct snd_soc_component *component = dai->component;
0514     struct wm8974_priv *priv = snd_soc_component_get_drvdata(component);
0515     u16 iface = snd_soc_component_read(component, WM8974_IFACE) & 0x19f;
0516     u16 adn = snd_soc_component_read(component, WM8974_ADD) & 0x1f1;
0517     int err;
0518 
0519     priv->fs = params_rate(params);
0520     err = wm8974_update_clocks(dai);
0521     if (err)
0522         return err;
0523 
0524     /* bit size */
0525     switch (params_width(params)) {
0526     case 16:
0527         break;
0528     case 20:
0529         iface |= 0x0020;
0530         break;
0531     case 24:
0532         iface |= 0x0040;
0533         break;
0534     case 32:
0535         iface |= 0x0060;
0536         break;
0537     }
0538 
0539     /* filter coefficient */
0540     switch (params_rate(params)) {
0541     case 8000:
0542         adn |= 0x5 << 1;
0543         break;
0544     case 11025:
0545         adn |= 0x4 << 1;
0546         break;
0547     case 16000:
0548         adn |= 0x3 << 1;
0549         break;
0550     case 22050:
0551         adn |= 0x2 << 1;
0552         break;
0553     case 32000:
0554         adn |= 0x1 << 1;
0555         break;
0556     case 44100:
0557     case 48000:
0558         break;
0559     }
0560 
0561     snd_soc_component_write(component, WM8974_IFACE, iface);
0562     snd_soc_component_write(component, WM8974_ADD, adn);
0563     return 0;
0564 }
0565 
0566 static int wm8974_mute(struct snd_soc_dai *dai, int mute, int direction)
0567 {
0568     struct snd_soc_component *component = dai->component;
0569     u16 mute_reg = snd_soc_component_read(component, WM8974_DAC) & 0xffbf;
0570 
0571     if (mute)
0572         snd_soc_component_write(component, WM8974_DAC, mute_reg | 0x40);
0573     else
0574         snd_soc_component_write(component, WM8974_DAC, mute_reg);
0575     return 0;
0576 }
0577 
0578 /* liam need to make this lower power with dapm */
0579 static int wm8974_set_bias_level(struct snd_soc_component *component,
0580     enum snd_soc_bias_level level)
0581 {
0582     u16 power1 = snd_soc_component_read(component, WM8974_POWER1) & ~0x3;
0583 
0584     switch (level) {
0585     case SND_SOC_BIAS_ON:
0586     case SND_SOC_BIAS_PREPARE:
0587         power1 |= 0x1;  /* VMID 50k */
0588         snd_soc_component_write(component, WM8974_POWER1, power1);
0589         break;
0590 
0591     case SND_SOC_BIAS_STANDBY:
0592         power1 |= WM8974_POWER1_BIASEN | WM8974_POWER1_BUFIOEN;
0593 
0594         if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
0595             regcache_sync(dev_get_regmap(component->dev, NULL));
0596 
0597             /* Initial cap charge at VMID 5k */
0598             snd_soc_component_write(component, WM8974_POWER1, power1 | 0x3);
0599             mdelay(100);
0600         }
0601 
0602         power1 |= 0x2;  /* VMID 500k */
0603         snd_soc_component_write(component, WM8974_POWER1, power1);
0604         break;
0605 
0606     case SND_SOC_BIAS_OFF:
0607         snd_soc_component_write(component, WM8974_POWER1, 0);
0608         snd_soc_component_write(component, WM8974_POWER2, 0);
0609         snd_soc_component_write(component, WM8974_POWER3, 0);
0610         break;
0611     }
0612 
0613     return 0;
0614 }
0615 
0616 #define WM8974_RATES (SNDRV_PCM_RATE_8000_48000)
0617 
0618 #define WM8974_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
0619     SNDRV_PCM_FMTBIT_S24_LE)
0620 
0621 static const struct snd_soc_dai_ops wm8974_ops = {
0622     .hw_params = wm8974_pcm_hw_params,
0623     .mute_stream = wm8974_mute,
0624     .set_fmt = wm8974_set_dai_fmt,
0625     .set_clkdiv = wm8974_set_dai_clkdiv,
0626     .set_pll = wm8974_set_dai_pll,
0627     .set_sysclk = wm8974_set_dai_sysclk,
0628     .no_capture_mute = 1,
0629 };
0630 
0631 static struct snd_soc_dai_driver wm8974_dai = {
0632     .name = "wm8974-hifi",
0633     .playback = {
0634         .stream_name = "Playback",
0635         .channels_min = 1,
0636         .channels_max = 2,   /* Only 1 channel of data */
0637         .rates = WM8974_RATES,
0638         .formats = WM8974_FORMATS,},
0639     .capture = {
0640         .stream_name = "Capture",
0641         .channels_min = 1,
0642         .channels_max = 2,   /* Only 1 channel of data */
0643         .rates = WM8974_RATES,
0644         .formats = WM8974_FORMATS,},
0645     .ops = &wm8974_ops,
0646     .symmetric_rate = 1,
0647 };
0648 
0649 static const struct regmap_config wm8974_regmap = {
0650     .reg_bits = 7,
0651     .val_bits = 9,
0652 
0653     .max_register = WM8974_MONOMIX,
0654     .reg_defaults = wm8974_reg_defaults,
0655     .num_reg_defaults = ARRAY_SIZE(wm8974_reg_defaults),
0656     .cache_type = REGCACHE_FLAT,
0657 };
0658 
0659 static int wm8974_probe(struct snd_soc_component *component)
0660 {
0661     int ret = 0;
0662 
0663     ret = wm8974_reset(component);
0664     if (ret < 0) {
0665         dev_err(component->dev, "Failed to issue reset\n");
0666         return ret;
0667     }
0668 
0669     return 0;
0670 }
0671 
0672 static const struct snd_soc_component_driver soc_component_dev_wm8974 = {
0673     .probe          = wm8974_probe,
0674     .set_bias_level     = wm8974_set_bias_level,
0675     .controls       = wm8974_snd_controls,
0676     .num_controls       = ARRAY_SIZE(wm8974_snd_controls),
0677     .dapm_widgets       = wm8974_dapm_widgets,
0678     .num_dapm_widgets   = ARRAY_SIZE(wm8974_dapm_widgets),
0679     .dapm_routes        = wm8974_dapm_routes,
0680     .num_dapm_routes    = ARRAY_SIZE(wm8974_dapm_routes),
0681     .suspend_bias_off   = 1,
0682     .idle_bias_on       = 1,
0683     .use_pmdown_time    = 1,
0684     .endianness     = 1,
0685 };
0686 
0687 static int wm8974_i2c_probe(struct i2c_client *i2c)
0688 {
0689     struct wm8974_priv *priv;
0690     struct regmap *regmap;
0691     int ret;
0692 
0693     priv = devm_kzalloc(&i2c->dev, sizeof(*priv), GFP_KERNEL);
0694     if (!priv)
0695         return -ENOMEM;
0696 
0697     i2c_set_clientdata(i2c, priv);
0698 
0699     regmap = devm_regmap_init_i2c(i2c, &wm8974_regmap);
0700     if (IS_ERR(regmap))
0701         return PTR_ERR(regmap);
0702 
0703     ret = devm_snd_soc_register_component(&i2c->dev,
0704             &soc_component_dev_wm8974, &wm8974_dai, 1);
0705 
0706     return ret;
0707 }
0708 
0709 static const struct i2c_device_id wm8974_i2c_id[] = {
0710     { "wm8974", 0 },
0711     { }
0712 };
0713 MODULE_DEVICE_TABLE(i2c, wm8974_i2c_id);
0714 
0715 static const struct of_device_id wm8974_of_match[] = {
0716        { .compatible = "wlf,wm8974", },
0717        { }
0718 };
0719 MODULE_DEVICE_TABLE(of, wm8974_of_match);
0720 
0721 static struct i2c_driver wm8974_i2c_driver = {
0722     .driver = {
0723         .name = "wm8974",
0724         .of_match_table = wm8974_of_match,
0725     },
0726     .probe_new = wm8974_i2c_probe,
0727     .id_table = wm8974_i2c_id,
0728 };
0729 
0730 module_i2c_driver(wm8974_i2c_driver);
0731 
0732 MODULE_DESCRIPTION("ASoC WM8974 driver");
0733 MODULE_AUTHOR("Liam Girdwood");
0734 MODULE_LICENSE("GPL");
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