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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * wm8960.c  --  WM8960 ALSA SoC Audio driver
0004  *
0005  * Copyright 2007-11 Wolfson Microelectronics, plc
0006  *
0007  * Author: Liam Girdwood
0008  */
0009 
0010 #include <linux/module.h>
0011 #include <linux/moduleparam.h>
0012 #include <linux/init.h>
0013 #include <linux/delay.h>
0014 #include <linux/pm.h>
0015 #include <linux/clk.h>
0016 #include <linux/i2c.h>
0017 #include <linux/acpi.h>
0018 #include <linux/slab.h>
0019 #include <sound/core.h>
0020 #include <sound/pcm.h>
0021 #include <sound/pcm_params.h>
0022 #include <sound/soc.h>
0023 #include <sound/initval.h>
0024 #include <sound/tlv.h>
0025 #include <sound/wm8960.h>
0026 
0027 #include "wm8960.h"
0028 
0029 /* R25 - Power 1 */
0030 #define WM8960_VMID_MASK 0x180
0031 #define WM8960_VREF      0x40
0032 
0033 /* R26 - Power 2 */
0034 #define WM8960_PWR2_LOUT1   0x40
0035 #define WM8960_PWR2_ROUT1   0x20
0036 #define WM8960_PWR2_OUT3    0x02
0037 
0038 /* R28 - Anti-pop 1 */
0039 #define WM8960_POBCTRL   0x80
0040 #define WM8960_BUFDCOPEN 0x10
0041 #define WM8960_BUFIOEN   0x08
0042 #define WM8960_SOFT_ST   0x04
0043 #define WM8960_HPSTBY    0x01
0044 
0045 /* R29 - Anti-pop 2 */
0046 #define WM8960_DISOP     0x40
0047 #define WM8960_DRES_MASK 0x30
0048 
0049 #define WM8960_DSCH_TOUT    600 /* discharge timeout, ms */
0050 
0051 static bool is_pll_freq_available(unsigned int source, unsigned int target);
0052 static int wm8960_set_pll(struct snd_soc_component *component,
0053         unsigned int freq_in, unsigned int freq_out);
0054 /*
0055  * wm8960 register cache
0056  * We can't read the WM8960 register space when we are
0057  * using 2 wire for device control, so we cache them instead.
0058  */
0059 static const struct reg_default wm8960_reg_defaults[] = {
0060     {  0x0, 0x00a7 },
0061     {  0x1, 0x00a7 },
0062     {  0x2, 0x0000 },
0063     {  0x3, 0x0000 },
0064     {  0x4, 0x0000 },
0065     {  0x5, 0x0008 },
0066     {  0x6, 0x0000 },
0067     {  0x7, 0x000a },
0068     {  0x8, 0x01c0 },
0069     {  0x9, 0x0000 },
0070     {  0xa, 0x00ff },
0071     {  0xb, 0x00ff },
0072 
0073     { 0x10, 0x0000 },
0074     { 0x11, 0x007b },
0075     { 0x12, 0x0100 },
0076     { 0x13, 0x0032 },
0077     { 0x14, 0x0000 },
0078     { 0x15, 0x00c3 },
0079     { 0x16, 0x00c3 },
0080     { 0x17, 0x01c0 },
0081     { 0x18, 0x0000 },
0082     { 0x19, 0x0000 },
0083     { 0x1a, 0x0000 },
0084     { 0x1b, 0x0000 },
0085     { 0x1c, 0x0000 },
0086     { 0x1d, 0x0000 },
0087 
0088     { 0x20, 0x0100 },
0089     { 0x21, 0x0100 },
0090     { 0x22, 0x0050 },
0091 
0092     { 0x25, 0x0050 },
0093     { 0x26, 0x0000 },
0094     { 0x27, 0x0000 },
0095     { 0x28, 0x0000 },
0096     { 0x29, 0x0000 },
0097     { 0x2a, 0x0040 },
0098     { 0x2b, 0x0000 },
0099     { 0x2c, 0x0000 },
0100     { 0x2d, 0x0050 },
0101     { 0x2e, 0x0050 },
0102     { 0x2f, 0x0000 },
0103     { 0x30, 0x0002 },
0104     { 0x31, 0x0037 },
0105 
0106     { 0x33, 0x0080 },
0107     { 0x34, 0x0008 },
0108     { 0x35, 0x0031 },
0109     { 0x36, 0x0026 },
0110     { 0x37, 0x00e9 },
0111 };
0112 
0113 static bool wm8960_volatile(struct device *dev, unsigned int reg)
0114 {
0115     switch (reg) {
0116     case WM8960_RESET:
0117         return true;
0118     default:
0119         return false;
0120     }
0121 }
0122 
0123 struct wm8960_priv {
0124     struct clk *mclk;
0125     struct regmap *regmap;
0126     int (*set_bias_level)(struct snd_soc_component *,
0127                   enum snd_soc_bias_level level);
0128     struct snd_soc_dapm_widget *lout1;
0129     struct snd_soc_dapm_widget *rout1;
0130     struct snd_soc_dapm_widget *out3;
0131     bool deemph;
0132     int lrclk;
0133     int bclk;
0134     int sysclk;
0135     int clk_id;
0136     int freq_in;
0137     bool is_stream_in_use[2];
0138     struct wm8960_data pdata;
0139     ktime_t dsch_start;
0140 };
0141 
0142 #define wm8960_reset(c) regmap_write(c, WM8960_RESET, 0)
0143 
0144 /* enumerated controls */
0145 static const char *wm8960_polarity[] = {"No Inversion", "Left Inverted",
0146     "Right Inverted", "Stereo Inversion"};
0147 static const char *wm8960_3d_upper_cutoff[] = {"High", "Low"};
0148 static const char *wm8960_3d_lower_cutoff[] = {"Low", "High"};
0149 static const char *wm8960_alcfunc[] = {"Off", "Right", "Left", "Stereo"};
0150 static const char *wm8960_alcmode[] = {"ALC", "Limiter"};
0151 static const char *wm8960_adc_data_output_sel[] = {
0152     "Left Data = Left ADC;  Right Data = Right ADC",
0153     "Left Data = Left ADC;  Right Data = Left ADC",
0154     "Left Data = Right ADC; Right Data = Right ADC",
0155     "Left Data = Right ADC; Right Data = Left ADC",
0156 };
0157 static const char *wm8960_dmonomix[] = {"Stereo", "Mono"};
0158 
0159 static const struct soc_enum wm8960_enum[] = {
0160     SOC_ENUM_SINGLE(WM8960_DACCTL1, 5, 4, wm8960_polarity),
0161     SOC_ENUM_SINGLE(WM8960_DACCTL2, 5, 4, wm8960_polarity),
0162     SOC_ENUM_SINGLE(WM8960_3D, 6, 2, wm8960_3d_upper_cutoff),
0163     SOC_ENUM_SINGLE(WM8960_3D, 5, 2, wm8960_3d_lower_cutoff),
0164     SOC_ENUM_SINGLE(WM8960_ALC1, 7, 4, wm8960_alcfunc),
0165     SOC_ENUM_SINGLE(WM8960_ALC3, 8, 2, wm8960_alcmode),
0166     SOC_ENUM_SINGLE(WM8960_ADDCTL1, 2, 4, wm8960_adc_data_output_sel),
0167     SOC_ENUM_SINGLE(WM8960_ADDCTL1, 4, 2, wm8960_dmonomix),
0168 };
0169 
0170 static const int deemph_settings[] = { 0, 32000, 44100, 48000 };
0171 
0172 static int wm8960_set_deemph(struct snd_soc_component *component)
0173 {
0174     struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
0175     int val, i, best;
0176 
0177     /* If we're using deemphasis select the nearest available sample
0178      * rate.
0179      */
0180     if (wm8960->deemph) {
0181         best = 1;
0182         for (i = 2; i < ARRAY_SIZE(deemph_settings); i++) {
0183             if (abs(deemph_settings[i] - wm8960->lrclk) <
0184                 abs(deemph_settings[best] - wm8960->lrclk))
0185                 best = i;
0186         }
0187 
0188         val = best << 1;
0189     } else {
0190         val = 0;
0191     }
0192 
0193     dev_dbg(component->dev, "Set deemphasis %d\n", val);
0194 
0195     return snd_soc_component_update_bits(component, WM8960_DACCTL1,
0196                    0x6, val);
0197 }
0198 
0199 static int wm8960_get_deemph(struct snd_kcontrol *kcontrol,
0200                  struct snd_ctl_elem_value *ucontrol)
0201 {
0202     struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
0203     struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
0204 
0205     ucontrol->value.integer.value[0] = wm8960->deemph;
0206     return 0;
0207 }
0208 
0209 static int wm8960_put_deemph(struct snd_kcontrol *kcontrol,
0210                  struct snd_ctl_elem_value *ucontrol)
0211 {
0212     struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
0213     struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
0214     unsigned int deemph = ucontrol->value.integer.value[0];
0215 
0216     if (deemph > 1)
0217         return -EINVAL;
0218 
0219     wm8960->deemph = deemph;
0220 
0221     return wm8960_set_deemph(component);
0222 }
0223 
0224 static const DECLARE_TLV_DB_SCALE(adc_tlv, -9750, 50, 1);
0225 static const DECLARE_TLV_DB_SCALE(inpga_tlv, -1725, 75, 0);
0226 static const DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1);
0227 static const DECLARE_TLV_DB_SCALE(bypass_tlv, -2100, 300, 0);
0228 static const DECLARE_TLV_DB_SCALE(out_tlv, -12100, 100, 1);
0229 static const DECLARE_TLV_DB_SCALE(lineinboost_tlv, -1500, 300, 1);
0230 static const SNDRV_CTL_TLVD_DECLARE_DB_RANGE(micboost_tlv,
0231     0, 1, TLV_DB_SCALE_ITEM(0, 1300, 0),
0232     2, 3, TLV_DB_SCALE_ITEM(2000, 900, 0),
0233 );
0234 
0235 static const struct snd_kcontrol_new wm8960_snd_controls[] = {
0236 SOC_DOUBLE_R_TLV("Capture Volume", WM8960_LINVOL, WM8960_RINVOL,
0237          0, 63, 0, inpga_tlv),
0238 SOC_DOUBLE_R("Capture Volume ZC Switch", WM8960_LINVOL, WM8960_RINVOL,
0239     6, 1, 0),
0240 SOC_DOUBLE_R("Capture Switch", WM8960_LINVOL, WM8960_RINVOL,
0241     7, 1, 1),
0242 
0243 SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT3 Volume",
0244            WM8960_INBMIX1, 4, 7, 0, lineinboost_tlv),
0245 SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT2 Volume",
0246            WM8960_INBMIX1, 1, 7, 0, lineinboost_tlv),
0247 SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT3 Volume",
0248            WM8960_INBMIX2, 4, 7, 0, lineinboost_tlv),
0249 SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT2 Volume",
0250            WM8960_INBMIX2, 1, 7, 0, lineinboost_tlv),
0251 SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT1 Volume",
0252         WM8960_RINPATH, 4, 3, 0, micboost_tlv),
0253 SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT1 Volume",
0254         WM8960_LINPATH, 4, 3, 0, micboost_tlv),
0255 
0256 SOC_DOUBLE_R_TLV("Playback Volume", WM8960_LDAC, WM8960_RDAC,
0257          0, 255, 0, dac_tlv),
0258 
0259 SOC_DOUBLE_R_TLV("Headphone Playback Volume", WM8960_LOUT1, WM8960_ROUT1,
0260          0, 127, 0, out_tlv),
0261 SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8960_LOUT1, WM8960_ROUT1,
0262     7, 1, 0),
0263 
0264 SOC_DOUBLE_R_TLV("Speaker Playback Volume", WM8960_LOUT2, WM8960_ROUT2,
0265          0, 127, 0, out_tlv),
0266 SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8960_LOUT2, WM8960_ROUT2,
0267     7, 1, 0),
0268 SOC_SINGLE("Speaker DC Volume", WM8960_CLASSD3, 3, 5, 0),
0269 SOC_SINGLE("Speaker AC Volume", WM8960_CLASSD3, 0, 5, 0),
0270 
0271 SOC_SINGLE("PCM Playback -6dB Switch", WM8960_DACCTL1, 7, 1, 0),
0272 SOC_ENUM("ADC Polarity", wm8960_enum[0]),
0273 SOC_SINGLE("ADC High Pass Filter Switch", WM8960_DACCTL1, 0, 1, 0),
0274 
0275 SOC_ENUM("DAC Polarity", wm8960_enum[1]),
0276 SOC_SINGLE_BOOL_EXT("DAC Deemphasis Switch", 0,
0277             wm8960_get_deemph, wm8960_put_deemph),
0278 
0279 SOC_ENUM("3D Filter Upper Cut-Off", wm8960_enum[2]),
0280 SOC_ENUM("3D Filter Lower Cut-Off", wm8960_enum[3]),
0281 SOC_SINGLE("3D Volume", WM8960_3D, 1, 15, 0),
0282 SOC_SINGLE("3D Switch", WM8960_3D, 0, 1, 0),
0283 
0284 SOC_ENUM("ALC Function", wm8960_enum[4]),
0285 SOC_SINGLE("ALC Max Gain", WM8960_ALC1, 4, 7, 0),
0286 SOC_SINGLE("ALC Target", WM8960_ALC1, 0, 15, 1),
0287 SOC_SINGLE("ALC Min Gain", WM8960_ALC2, 4, 7, 0),
0288 SOC_SINGLE("ALC Hold Time", WM8960_ALC2, 0, 15, 0),
0289 SOC_ENUM("ALC Mode", wm8960_enum[5]),
0290 SOC_SINGLE("ALC Decay", WM8960_ALC3, 4, 15, 0),
0291 SOC_SINGLE("ALC Attack", WM8960_ALC3, 0, 15, 0),
0292 
0293 SOC_SINGLE("Noise Gate Threshold", WM8960_NOISEG, 3, 31, 0),
0294 SOC_SINGLE("Noise Gate Switch", WM8960_NOISEG, 0, 1, 0),
0295 
0296 SOC_DOUBLE_R_TLV("ADC PCM Capture Volume", WM8960_LADC, WM8960_RADC,
0297     0, 255, 0, adc_tlv),
0298 
0299 SOC_SINGLE_TLV("Left Output Mixer Boost Bypass Volume",
0300            WM8960_BYPASS1, 4, 7, 1, bypass_tlv),
0301 SOC_SINGLE_TLV("Left Output Mixer LINPUT3 Volume",
0302            WM8960_LOUTMIX, 4, 7, 1, bypass_tlv),
0303 SOC_SINGLE_TLV("Right Output Mixer Boost Bypass Volume",
0304            WM8960_BYPASS2, 4, 7, 1, bypass_tlv),
0305 SOC_SINGLE_TLV("Right Output Mixer RINPUT3 Volume",
0306            WM8960_ROUTMIX, 4, 7, 1, bypass_tlv),
0307 
0308 SOC_ENUM("ADC Data Output Select", wm8960_enum[6]),
0309 SOC_ENUM("DAC Mono Mix", wm8960_enum[7]),
0310 };
0311 
0312 static const struct snd_kcontrol_new wm8960_lin_boost[] = {
0313 SOC_DAPM_SINGLE("LINPUT2 Switch", WM8960_LINPATH, 6, 1, 0),
0314 SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LINPATH, 7, 1, 0),
0315 SOC_DAPM_SINGLE("LINPUT1 Switch", WM8960_LINPATH, 8, 1, 0),
0316 };
0317 
0318 static const struct snd_kcontrol_new wm8960_lin[] = {
0319 SOC_DAPM_SINGLE("Boost Switch", WM8960_LINPATH, 3, 1, 0),
0320 };
0321 
0322 static const struct snd_kcontrol_new wm8960_rin_boost[] = {
0323 SOC_DAPM_SINGLE("RINPUT2 Switch", WM8960_RINPATH, 6, 1, 0),
0324 SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_RINPATH, 7, 1, 0),
0325 SOC_DAPM_SINGLE("RINPUT1 Switch", WM8960_RINPATH, 8, 1, 0),
0326 };
0327 
0328 static const struct snd_kcontrol_new wm8960_rin[] = {
0329 SOC_DAPM_SINGLE("Boost Switch", WM8960_RINPATH, 3, 1, 0),
0330 };
0331 
0332 static const struct snd_kcontrol_new wm8960_loutput_mixer[] = {
0333 SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_LOUTMIX, 8, 1, 0),
0334 SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LOUTMIX, 7, 1, 0),
0335 SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS1, 7, 1, 0),
0336 };
0337 
0338 static const struct snd_kcontrol_new wm8960_routput_mixer[] = {
0339 SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_ROUTMIX, 8, 1, 0),
0340 SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_ROUTMIX, 7, 1, 0),
0341 SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS2, 7, 1, 0),
0342 };
0343 
0344 static const struct snd_kcontrol_new wm8960_mono_out[] = {
0345 SOC_DAPM_SINGLE("Left Switch", WM8960_MONOMIX1, 7, 1, 0),
0346 SOC_DAPM_SINGLE("Right Switch", WM8960_MONOMIX2, 7, 1, 0),
0347 };
0348 
0349 static const struct snd_soc_dapm_widget wm8960_dapm_widgets[] = {
0350 SND_SOC_DAPM_INPUT("LINPUT1"),
0351 SND_SOC_DAPM_INPUT("RINPUT1"),
0352 SND_SOC_DAPM_INPUT("LINPUT2"),
0353 SND_SOC_DAPM_INPUT("RINPUT2"),
0354 SND_SOC_DAPM_INPUT("LINPUT3"),
0355 SND_SOC_DAPM_INPUT("RINPUT3"),
0356 
0357 SND_SOC_DAPM_SUPPLY("MICB", WM8960_POWER1, 1, 0, NULL, 0),
0358 
0359 SND_SOC_DAPM_MIXER("Left Boost Mixer", WM8960_POWER1, 5, 0,
0360            wm8960_lin_boost, ARRAY_SIZE(wm8960_lin_boost)),
0361 SND_SOC_DAPM_MIXER("Right Boost Mixer", WM8960_POWER1, 4, 0,
0362            wm8960_rin_boost, ARRAY_SIZE(wm8960_rin_boost)),
0363 
0364 SND_SOC_DAPM_MIXER("Left Input Mixer", WM8960_POWER3, 5, 0,
0365            wm8960_lin, ARRAY_SIZE(wm8960_lin)),
0366 SND_SOC_DAPM_MIXER("Right Input Mixer", WM8960_POWER3, 4, 0,
0367            wm8960_rin, ARRAY_SIZE(wm8960_rin)),
0368 
0369 SND_SOC_DAPM_ADC("Left ADC", "Capture", WM8960_POWER1, 3, 0),
0370 SND_SOC_DAPM_ADC("Right ADC", "Capture", WM8960_POWER1, 2, 0),
0371 
0372 SND_SOC_DAPM_DAC("Left DAC", "Playback", WM8960_POWER2, 8, 0),
0373 SND_SOC_DAPM_DAC("Right DAC", "Playback", WM8960_POWER2, 7, 0),
0374 
0375 SND_SOC_DAPM_MIXER("Left Output Mixer", WM8960_POWER3, 3, 0,
0376     &wm8960_loutput_mixer[0],
0377     ARRAY_SIZE(wm8960_loutput_mixer)),
0378 SND_SOC_DAPM_MIXER("Right Output Mixer", WM8960_POWER3, 2, 0,
0379     &wm8960_routput_mixer[0],
0380     ARRAY_SIZE(wm8960_routput_mixer)),
0381 
0382 SND_SOC_DAPM_PGA("LOUT1 PGA", WM8960_POWER2, 6, 0, NULL, 0),
0383 SND_SOC_DAPM_PGA("ROUT1 PGA", WM8960_POWER2, 5, 0, NULL, 0),
0384 
0385 SND_SOC_DAPM_PGA("Left Speaker PGA", WM8960_POWER2, 4, 0, NULL, 0),
0386 SND_SOC_DAPM_PGA("Right Speaker PGA", WM8960_POWER2, 3, 0, NULL, 0),
0387 
0388 SND_SOC_DAPM_PGA("Right Speaker Output", WM8960_CLASSD1, 7, 0, NULL, 0),
0389 SND_SOC_DAPM_PGA("Left Speaker Output", WM8960_CLASSD1, 6, 0, NULL, 0),
0390 
0391 SND_SOC_DAPM_OUTPUT("SPK_LP"),
0392 SND_SOC_DAPM_OUTPUT("SPK_LN"),
0393 SND_SOC_DAPM_OUTPUT("HP_L"),
0394 SND_SOC_DAPM_OUTPUT("HP_R"),
0395 SND_SOC_DAPM_OUTPUT("SPK_RP"),
0396 SND_SOC_DAPM_OUTPUT("SPK_RN"),
0397 SND_SOC_DAPM_OUTPUT("OUT3"),
0398 };
0399 
0400 static const struct snd_soc_dapm_widget wm8960_dapm_widgets_out3[] = {
0401 SND_SOC_DAPM_MIXER("Mono Output Mixer", WM8960_POWER2, 1, 0,
0402     &wm8960_mono_out[0],
0403     ARRAY_SIZE(wm8960_mono_out)),
0404 };
0405 
0406 /* Represent OUT3 as a PGA so that it gets turned on with LOUT1/ROUT1 */
0407 static const struct snd_soc_dapm_widget wm8960_dapm_widgets_capless[] = {
0408 SND_SOC_DAPM_PGA("OUT3 VMID", WM8960_POWER2, 1, 0, NULL, 0),
0409 };
0410 
0411 static const struct snd_soc_dapm_route audio_paths[] = {
0412     { "Left Boost Mixer", "LINPUT1 Switch", "LINPUT1" },
0413     { "Left Boost Mixer", "LINPUT2 Switch", "LINPUT2" },
0414     { "Left Boost Mixer", "LINPUT3 Switch", "LINPUT3" },
0415 
0416     { "Left Input Mixer", "Boost Switch", "Left Boost Mixer" },
0417     { "Left Input Mixer", "Boost Switch", "LINPUT1" },  /* Really Boost Switch */
0418     { "Left Input Mixer", NULL, "LINPUT2" },
0419     { "Left Input Mixer", NULL, "LINPUT3" },
0420 
0421     { "Right Boost Mixer", "RINPUT1 Switch", "RINPUT1" },
0422     { "Right Boost Mixer", "RINPUT2 Switch", "RINPUT2" },
0423     { "Right Boost Mixer", "RINPUT3 Switch", "RINPUT3" },
0424 
0425     { "Right Input Mixer", "Boost Switch", "Right Boost Mixer" },
0426     { "Right Input Mixer", "Boost Switch", "RINPUT1" },  /* Really Boost Switch */
0427     { "Right Input Mixer", NULL, "RINPUT2" },
0428     { "Right Input Mixer", NULL, "RINPUT3" },
0429 
0430     { "Left ADC", NULL, "Left Input Mixer" },
0431     { "Right ADC", NULL, "Right Input Mixer" },
0432 
0433     { "Left Output Mixer", "LINPUT3 Switch", "LINPUT3" },
0434     { "Left Output Mixer", "Boost Bypass Switch", "Left Boost Mixer" },
0435     { "Left Output Mixer", "PCM Playback Switch", "Left DAC" },
0436 
0437     { "Right Output Mixer", "RINPUT3 Switch", "RINPUT3" },
0438     { "Right Output Mixer", "Boost Bypass Switch", "Right Boost Mixer" },
0439     { "Right Output Mixer", "PCM Playback Switch", "Right DAC" },
0440 
0441     { "LOUT1 PGA", NULL, "Left Output Mixer" },
0442     { "ROUT1 PGA", NULL, "Right Output Mixer" },
0443 
0444     { "HP_L", NULL, "LOUT1 PGA" },
0445     { "HP_R", NULL, "ROUT1 PGA" },
0446 
0447     { "Left Speaker PGA", NULL, "Left Output Mixer" },
0448     { "Right Speaker PGA", NULL, "Right Output Mixer" },
0449 
0450     { "Left Speaker Output", NULL, "Left Speaker PGA" },
0451     { "Right Speaker Output", NULL, "Right Speaker PGA" },
0452 
0453     { "SPK_LN", NULL, "Left Speaker Output" },
0454     { "SPK_LP", NULL, "Left Speaker Output" },
0455     { "SPK_RN", NULL, "Right Speaker Output" },
0456     { "SPK_RP", NULL, "Right Speaker Output" },
0457 };
0458 
0459 static const struct snd_soc_dapm_route audio_paths_out3[] = {
0460     { "Mono Output Mixer", "Left Switch", "Left Output Mixer" },
0461     { "Mono Output Mixer", "Right Switch", "Right Output Mixer" },
0462 
0463     { "OUT3", NULL, "Mono Output Mixer", }
0464 };
0465 
0466 static const struct snd_soc_dapm_route audio_paths_capless[] = {
0467     { "HP_L", NULL, "OUT3 VMID" },
0468     { "HP_R", NULL, "OUT3 VMID" },
0469 
0470     { "OUT3 VMID", NULL, "Left Output Mixer" },
0471     { "OUT3 VMID", NULL, "Right Output Mixer" },
0472 };
0473 
0474 static int wm8960_add_widgets(struct snd_soc_component *component)
0475 {
0476     struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
0477     struct wm8960_data *pdata = &wm8960->pdata;
0478     struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
0479     struct snd_soc_dapm_widget *w;
0480 
0481     snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets,
0482                   ARRAY_SIZE(wm8960_dapm_widgets));
0483 
0484     snd_soc_dapm_add_routes(dapm, audio_paths, ARRAY_SIZE(audio_paths));
0485 
0486     /* In capless mode OUT3 is used to provide VMID for the
0487      * headphone outputs, otherwise it is used as a mono mixer.
0488      */
0489     if (pdata && pdata->capless) {
0490         snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets_capless,
0491                       ARRAY_SIZE(wm8960_dapm_widgets_capless));
0492 
0493         snd_soc_dapm_add_routes(dapm, audio_paths_capless,
0494                     ARRAY_SIZE(audio_paths_capless));
0495     } else {
0496         snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets_out3,
0497                       ARRAY_SIZE(wm8960_dapm_widgets_out3));
0498 
0499         snd_soc_dapm_add_routes(dapm, audio_paths_out3,
0500                     ARRAY_SIZE(audio_paths_out3));
0501     }
0502 
0503     /* We need to power up the headphone output stage out of
0504      * sequence for capless mode.  To save scanning the widget
0505      * list each time to find the desired power state do so now
0506      * and save the result.
0507      */
0508     list_for_each_entry(w, &component->card->widgets, list) {
0509         if (w->dapm != dapm)
0510             continue;
0511         if (strcmp(w->name, "LOUT1 PGA") == 0)
0512             wm8960->lout1 = w;
0513         if (strcmp(w->name, "ROUT1 PGA") == 0)
0514             wm8960->rout1 = w;
0515         if (strcmp(w->name, "OUT3 VMID") == 0)
0516             wm8960->out3 = w;
0517     }
0518     
0519     return 0;
0520 }
0521 
0522 static int wm8960_set_dai_fmt(struct snd_soc_dai *codec_dai,
0523         unsigned int fmt)
0524 {
0525     struct snd_soc_component *component = codec_dai->component;
0526     u16 iface = 0;
0527 
0528     /* set master/slave audio interface */
0529     switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
0530     case SND_SOC_DAIFMT_CBM_CFM:
0531         iface |= 0x0040;
0532         break;
0533     case SND_SOC_DAIFMT_CBS_CFS:
0534         break;
0535     default:
0536         return -EINVAL;
0537     }
0538 
0539     /* interface format */
0540     switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
0541     case SND_SOC_DAIFMT_I2S:
0542         iface |= 0x0002;
0543         break;
0544     case SND_SOC_DAIFMT_RIGHT_J:
0545         break;
0546     case SND_SOC_DAIFMT_LEFT_J:
0547         iface |= 0x0001;
0548         break;
0549     case SND_SOC_DAIFMT_DSP_A:
0550         iface |= 0x0003;
0551         break;
0552     case SND_SOC_DAIFMT_DSP_B:
0553         iface |= 0x0013;
0554         break;
0555     default:
0556         return -EINVAL;
0557     }
0558 
0559     /* clock inversion */
0560     switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
0561     case SND_SOC_DAIFMT_NB_NF:
0562         break;
0563     case SND_SOC_DAIFMT_IB_IF:
0564         iface |= 0x0090;
0565         break;
0566     case SND_SOC_DAIFMT_IB_NF:
0567         iface |= 0x0080;
0568         break;
0569     case SND_SOC_DAIFMT_NB_IF:
0570         iface |= 0x0010;
0571         break;
0572     default:
0573         return -EINVAL;
0574     }
0575 
0576     /* set iface */
0577     snd_soc_component_write(component, WM8960_IFACE1, iface);
0578     return 0;
0579 }
0580 
0581 static struct {
0582     int rate;
0583     unsigned int val;
0584 } alc_rates[] = {
0585     { 48000, 0 },
0586     { 44100, 0 },
0587     { 32000, 1 },
0588     { 22050, 2 },
0589     { 24000, 2 },
0590     { 16000, 3 },
0591     { 11025, 4 },
0592     { 12000, 4 },
0593     {  8000, 5 },
0594 };
0595 
0596 /* -1 for reserved value */
0597 static const int sysclk_divs[] = { 1, -1, 2, -1 };
0598 
0599 /* Multiply 256 for internal 256 div */
0600 static const int dac_divs[] = { 256, 384, 512, 768, 1024, 1408, 1536 };
0601 
0602 /* Multiply 10 to eliminate decimials */
0603 static const int bclk_divs[] = {
0604     10, 15, 20, 30, 40, 55, 60, 80, 110,
0605     120, 160, 220, 240, 320, 320, 320
0606 };
0607 
0608 /**
0609  * wm8960_configure_sysclk - checks if there is a sysclk frequency available
0610  *  The sysclk must be chosen such that:
0611  *      - sysclk     = MCLK / sysclk_divs
0612  *      - lrclk      = sysclk / dac_divs
0613  *      - 10 * bclk  = sysclk / bclk_divs
0614  *
0615  * @wm8960: codec private data
0616  * @mclk: MCLK used to derive sysclk
0617  * @sysclk_idx: sysclk_divs index for found sysclk
0618  * @dac_idx: dac_divs index for found lrclk
0619  * @bclk_idx: bclk_divs index for found bclk
0620  *
0621  * Returns:
0622  *  -1, in case no sysclk frequency available found
0623  * >=0, in case we could derive bclk and lrclk from sysclk using
0624  *      (@sysclk_idx, @dac_idx, @bclk_idx) dividers
0625  */
0626 static
0627 int wm8960_configure_sysclk(struct wm8960_priv *wm8960, int mclk,
0628                 int *sysclk_idx, int *dac_idx, int *bclk_idx)
0629 {
0630     int sysclk, bclk, lrclk;
0631     int i, j, k;
0632     int diff;
0633 
0634     /* marker for no match */
0635     *bclk_idx = -1;
0636 
0637     bclk = wm8960->bclk;
0638     lrclk = wm8960->lrclk;
0639 
0640     /* check if the sysclk frequency is available. */
0641     for (i = 0; i < ARRAY_SIZE(sysclk_divs); ++i) {
0642         if (sysclk_divs[i] == -1)
0643             continue;
0644         sysclk = mclk / sysclk_divs[i];
0645         for (j = 0; j < ARRAY_SIZE(dac_divs); ++j) {
0646             if (sysclk != dac_divs[j] * lrclk)
0647                 continue;
0648             for (k = 0; k < ARRAY_SIZE(bclk_divs); ++k) {
0649                 diff = sysclk - bclk * bclk_divs[k] / 10;
0650                 if (diff == 0) {
0651                     *sysclk_idx = i;
0652                     *dac_idx = j;
0653                     *bclk_idx = k;
0654                     break;
0655                 }
0656             }
0657             if (k != ARRAY_SIZE(bclk_divs))
0658                 break;
0659         }
0660         if (j != ARRAY_SIZE(dac_divs))
0661             break;
0662     }
0663     return *bclk_idx;
0664 }
0665 
0666 /**
0667  * wm8960_configure_pll - checks if there is a PLL out frequency available
0668  *  The PLL out frequency must be chosen such that:
0669  *      - sysclk      = lrclk * dac_divs
0670  *      - freq_out    = sysclk * sysclk_divs
0671  *      - 10 * sysclk = bclk * bclk_divs
0672  *
0673  *  If we cannot find an exact match for (sysclk, lrclk, bclk)
0674  *  triplet, we relax the bclk such that bclk is chosen as the
0675  *  closest available frequency greater than expected bclk.
0676  *
0677  * @component: component structure
0678  * @freq_in: input frequency used to derive freq out via PLL
0679  * @sysclk_idx: sysclk_divs index for found sysclk
0680  * @dac_idx: dac_divs index for found lrclk
0681  * @bclk_idx: bclk_divs index for found bclk
0682  *
0683  * Returns:
0684  * < 0, in case no PLL frequency out available was found
0685  * >=0, in case we could derive bclk, lrclk, sysclk from PLL out using
0686  *      (@sysclk_idx, @dac_idx, @bclk_idx) dividers
0687  */
0688 static
0689 int wm8960_configure_pll(struct snd_soc_component *component, int freq_in,
0690              int *sysclk_idx, int *dac_idx, int *bclk_idx)
0691 {
0692     struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
0693     int sysclk, bclk, lrclk, freq_out;
0694     int diff, closest, best_freq_out;
0695     int i, j, k;
0696 
0697     bclk = wm8960->bclk;
0698     lrclk = wm8960->lrclk;
0699     closest = freq_in;
0700 
0701     best_freq_out = -EINVAL;
0702     *sysclk_idx = *dac_idx = *bclk_idx = -1;
0703 
0704     /*
0705      * From Datasheet, the PLL performs best when f2 is between
0706      * 90MHz and 100MHz, the desired sysclk output is 11.2896MHz
0707      * or 12.288MHz, then sysclkdiv = 2 is the best choice.
0708      * So search sysclk_divs from 2 to 1 other than from 1 to 2.
0709      */
0710     for (i = ARRAY_SIZE(sysclk_divs) - 1; i >= 0; --i) {
0711         if (sysclk_divs[i] == -1)
0712             continue;
0713         for (j = 0; j < ARRAY_SIZE(dac_divs); ++j) {
0714             sysclk = lrclk * dac_divs[j];
0715             freq_out = sysclk * sysclk_divs[i];
0716 
0717             for (k = 0; k < ARRAY_SIZE(bclk_divs); ++k) {
0718                 if (!is_pll_freq_available(freq_in, freq_out))
0719                     continue;
0720 
0721                 diff = sysclk - bclk * bclk_divs[k] / 10;
0722                 if (diff == 0) {
0723                     *sysclk_idx = i;
0724                     *dac_idx = j;
0725                     *bclk_idx = k;
0726                     return freq_out;
0727                 }
0728                 if (diff > 0 && closest > diff) {
0729                     *sysclk_idx = i;
0730                     *dac_idx = j;
0731                     *bclk_idx = k;
0732                     closest = diff;
0733                     best_freq_out = freq_out;
0734                 }
0735             }
0736         }
0737     }
0738 
0739     return best_freq_out;
0740 }
0741 static int wm8960_configure_clocking(struct snd_soc_component *component)
0742 {
0743     struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
0744     int freq_out, freq_in;
0745     u16 iface1 = snd_soc_component_read(component, WM8960_IFACE1);
0746     int i, j, k;
0747     int ret;
0748 
0749     /*
0750      * For Slave mode clocking should still be configured,
0751      * so this if statement should be removed, but some platform
0752      * may not work if the sysclk is not configured, to avoid such
0753      * compatible issue, just add '!wm8960->sysclk' condition in
0754      * this if statement.
0755      */
0756     if (!(iface1 & (1 << 6)) && !wm8960->sysclk) {
0757         dev_warn(component->dev,
0758              "slave mode, but proceeding with no clock configuration\n");
0759         return 0;
0760     }
0761 
0762     if (wm8960->clk_id != WM8960_SYSCLK_MCLK && !wm8960->freq_in) {
0763         dev_err(component->dev, "No MCLK configured\n");
0764         return -EINVAL;
0765     }
0766 
0767     freq_in = wm8960->freq_in;
0768     /*
0769      * If it's sysclk auto mode, check if the MCLK can provide sysclk or
0770      * not. If MCLK can provide sysclk, using MCLK to provide sysclk
0771      * directly. Otherwise, auto select a available pll out frequency
0772      * and set PLL.
0773      */
0774     if (wm8960->clk_id == WM8960_SYSCLK_AUTO) {
0775         /* disable the PLL and using MCLK to provide sysclk */
0776         wm8960_set_pll(component, 0, 0);
0777         freq_out = freq_in;
0778     } else if (wm8960->sysclk) {
0779         freq_out = wm8960->sysclk;
0780     } else {
0781         dev_err(component->dev, "No SYSCLK configured\n");
0782         return -EINVAL;
0783     }
0784 
0785     if (wm8960->clk_id != WM8960_SYSCLK_PLL) {
0786         ret = wm8960_configure_sysclk(wm8960, freq_out, &i, &j, &k);
0787         if (ret >= 0) {
0788             goto configure_clock;
0789         } else if (wm8960->clk_id != WM8960_SYSCLK_AUTO) {
0790             dev_err(component->dev, "failed to configure clock\n");
0791             return -EINVAL;
0792         }
0793     }
0794 
0795     freq_out = wm8960_configure_pll(component, freq_in, &i, &j, &k);
0796     if (freq_out < 0) {
0797         dev_err(component->dev, "failed to configure clock via PLL\n");
0798         return freq_out;
0799     }
0800     wm8960_set_pll(component, freq_in, freq_out);
0801 
0802 configure_clock:
0803     /* configure sysclk clock */
0804     snd_soc_component_update_bits(component, WM8960_CLOCK1, 3 << 1, i << 1);
0805 
0806     /* configure frame clock */
0807     snd_soc_component_update_bits(component, WM8960_CLOCK1, 0x7 << 3, j << 3);
0808     snd_soc_component_update_bits(component, WM8960_CLOCK1, 0x7 << 6, j << 6);
0809 
0810     /* configure bit clock */
0811     snd_soc_component_update_bits(component, WM8960_CLOCK2, 0xf, k);
0812 
0813     return 0;
0814 }
0815 
0816 static int wm8960_hw_params(struct snd_pcm_substream *substream,
0817                 struct snd_pcm_hw_params *params,
0818                 struct snd_soc_dai *dai)
0819 {
0820     struct snd_soc_component *component = dai->component;
0821     struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
0822     u16 iface = snd_soc_component_read(component, WM8960_IFACE1) & 0xfff3;
0823     bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
0824     int i;
0825 
0826     wm8960->bclk = snd_soc_params_to_bclk(params);
0827     if (params_channels(params) == 1)
0828         wm8960->bclk *= 2;
0829 
0830     /* bit size */
0831     switch (params_width(params)) {
0832     case 16:
0833         break;
0834     case 20:
0835         iface |= 0x0004;
0836         break;
0837     case 24:
0838         iface |= 0x0008;
0839         break;
0840     case 32:
0841         /* right justify mode does not support 32 word length */
0842         if ((iface & 0x3) != 0) {
0843             iface |= 0x000c;
0844             break;
0845         }
0846         fallthrough;
0847     default:
0848         dev_err(component->dev, "unsupported width %d\n",
0849             params_width(params));
0850         return -EINVAL;
0851     }
0852 
0853     wm8960->lrclk = params_rate(params);
0854     /* Update filters for the new rate */
0855     if (tx) {
0856         wm8960_set_deemph(component);
0857     } else {
0858         for (i = 0; i < ARRAY_SIZE(alc_rates); i++)
0859             if (alc_rates[i].rate == params_rate(params))
0860                 snd_soc_component_update_bits(component,
0861                             WM8960_ADDCTL3, 0x7,
0862                             alc_rates[i].val);
0863     }
0864 
0865     /* set iface */
0866     snd_soc_component_write(component, WM8960_IFACE1, iface);
0867 
0868     wm8960->is_stream_in_use[tx] = true;
0869 
0870     if (!wm8960->is_stream_in_use[!tx])
0871         return wm8960_configure_clocking(component);
0872 
0873     return 0;
0874 }
0875 
0876 static int wm8960_hw_free(struct snd_pcm_substream *substream,
0877         struct snd_soc_dai *dai)
0878 {
0879     struct snd_soc_component *component = dai->component;
0880     struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
0881     bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
0882 
0883     wm8960->is_stream_in_use[tx] = false;
0884 
0885     return 0;
0886 }
0887 
0888 static int wm8960_mute(struct snd_soc_dai *dai, int mute, int direction)
0889 {
0890     struct snd_soc_component *component = dai->component;
0891 
0892     if (mute)
0893         snd_soc_component_update_bits(component, WM8960_DACCTL1, 0x8, 0x8);
0894     else
0895         snd_soc_component_update_bits(component, WM8960_DACCTL1, 0x8, 0);
0896     return 0;
0897 }
0898 
0899 static int wm8960_set_bias_level_out3(struct snd_soc_component *component,
0900                       enum snd_soc_bias_level level)
0901 {
0902     struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
0903     u16 pm2 = snd_soc_component_read(component, WM8960_POWER2);
0904     int ret;
0905     ktime_t tout;
0906 
0907     switch (level) {
0908     case SND_SOC_BIAS_ON:
0909         break;
0910 
0911     case SND_SOC_BIAS_PREPARE:
0912         switch (snd_soc_component_get_bias_level(component)) {
0913         case SND_SOC_BIAS_STANDBY:
0914             if (!IS_ERR(wm8960->mclk)) {
0915                 ret = clk_prepare_enable(wm8960->mclk);
0916                 if (ret) {
0917                     dev_err(component->dev,
0918                         "Failed to enable MCLK: %d\n",
0919                         ret);
0920                     return ret;
0921                 }
0922             }
0923 
0924             ret = wm8960_configure_clocking(component);
0925             if (ret)
0926                 return ret;
0927 
0928             /* Set VMID to 2x50k */
0929             snd_soc_component_update_bits(component, WM8960_POWER1, 0x180, 0x80);
0930             break;
0931 
0932         case SND_SOC_BIAS_ON:
0933             /*
0934              * If it's sysclk auto mode, and the pll is enabled,
0935              * disable the pll
0936              */
0937             if (wm8960->clk_id == WM8960_SYSCLK_AUTO && (pm2 & 0x1))
0938                 wm8960_set_pll(component, 0, 0);
0939 
0940             if (!IS_ERR(wm8960->mclk))
0941                 clk_disable_unprepare(wm8960->mclk);
0942             break;
0943 
0944         default:
0945             break;
0946         }
0947 
0948         break;
0949 
0950     case SND_SOC_BIAS_STANDBY:
0951         if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
0952             /* ensure discharge is complete */
0953             tout = WM8960_DSCH_TOUT - ktime_ms_delta(ktime_get(), wm8960->dsch_start);
0954             if (tout > 0)
0955                 msleep(tout);
0956 
0957             regcache_sync(wm8960->regmap);
0958 
0959             /* Enable anti-pop features */
0960             snd_soc_component_write(component, WM8960_APOP1,
0961                       WM8960_POBCTRL | WM8960_SOFT_ST |
0962                       WM8960_BUFDCOPEN | WM8960_BUFIOEN);
0963 
0964             /* Enable & ramp VMID at 2x50k */
0965             snd_soc_component_update_bits(component, WM8960_POWER1, 0x80, 0x80);
0966             msleep(100);
0967 
0968             /* Enable VREF */
0969             snd_soc_component_update_bits(component, WM8960_POWER1, WM8960_VREF,
0970                         WM8960_VREF);
0971 
0972             /* Disable anti-pop features */
0973             snd_soc_component_write(component, WM8960_APOP1, WM8960_BUFIOEN);
0974         }
0975 
0976         /* Set VMID to 2x250k */
0977         snd_soc_component_update_bits(component, WM8960_POWER1, 0x180, 0x100);
0978         break;
0979 
0980     case SND_SOC_BIAS_OFF:
0981         /* Enable anti-pop features */
0982         snd_soc_component_write(component, WM8960_APOP1,
0983                  WM8960_POBCTRL | WM8960_SOFT_ST |
0984                  WM8960_BUFDCOPEN | WM8960_BUFIOEN);
0985 
0986         /* Disable VMID and VREF, mark discharge */
0987         snd_soc_component_write(component, WM8960_POWER1, 0);
0988         wm8960->dsch_start = ktime_get();
0989         break;
0990     }
0991 
0992     return 0;
0993 }
0994 
0995 static int wm8960_set_bias_level_capless(struct snd_soc_component *component,
0996                      enum snd_soc_bias_level level)
0997 {
0998     struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
0999     u16 pm2 = snd_soc_component_read(component, WM8960_POWER2);
1000     int reg, ret;
1001 
1002     switch (level) {
1003     case SND_SOC_BIAS_ON:
1004         break;
1005 
1006     case SND_SOC_BIAS_PREPARE:
1007         switch (snd_soc_component_get_bias_level(component)) {
1008         case SND_SOC_BIAS_STANDBY:
1009             /* Enable anti pop mode */
1010             snd_soc_component_update_bits(component, WM8960_APOP1,
1011                         WM8960_POBCTRL | WM8960_SOFT_ST |
1012                         WM8960_BUFDCOPEN,
1013                         WM8960_POBCTRL | WM8960_SOFT_ST |
1014                         WM8960_BUFDCOPEN);
1015 
1016             /* Enable LOUT1, ROUT1 and OUT3 if they're enabled */
1017             reg = 0;
1018             if (wm8960->lout1 && wm8960->lout1->power)
1019                 reg |= WM8960_PWR2_LOUT1;
1020             if (wm8960->rout1 && wm8960->rout1->power)
1021                 reg |= WM8960_PWR2_ROUT1;
1022             if (wm8960->out3 && wm8960->out3->power)
1023                 reg |= WM8960_PWR2_OUT3;
1024             snd_soc_component_update_bits(component, WM8960_POWER2,
1025                         WM8960_PWR2_LOUT1 |
1026                         WM8960_PWR2_ROUT1 |
1027                         WM8960_PWR2_OUT3, reg);
1028 
1029             /* Enable VMID at 2*50k */
1030             snd_soc_component_update_bits(component, WM8960_POWER1,
1031                         WM8960_VMID_MASK, 0x80);
1032 
1033             /* Ramp */
1034             msleep(100);
1035 
1036             /* Enable VREF */
1037             snd_soc_component_update_bits(component, WM8960_POWER1,
1038                         WM8960_VREF, WM8960_VREF);
1039 
1040             msleep(100);
1041 
1042             if (!IS_ERR(wm8960->mclk)) {
1043                 ret = clk_prepare_enable(wm8960->mclk);
1044                 if (ret) {
1045                     dev_err(component->dev,
1046                         "Failed to enable MCLK: %d\n",
1047                         ret);
1048                     return ret;
1049                 }
1050             }
1051 
1052             ret = wm8960_configure_clocking(component);
1053             if (ret)
1054                 return ret;
1055 
1056             break;
1057 
1058         case SND_SOC_BIAS_ON:
1059             /*
1060              * If it's sysclk auto mode, and the pll is enabled,
1061              * disable the pll
1062              */
1063             if (wm8960->clk_id == WM8960_SYSCLK_AUTO && (pm2 & 0x1))
1064                 wm8960_set_pll(component, 0, 0);
1065 
1066             if (!IS_ERR(wm8960->mclk))
1067                 clk_disable_unprepare(wm8960->mclk);
1068 
1069             /* Enable anti-pop mode */
1070             snd_soc_component_update_bits(component, WM8960_APOP1,
1071                         WM8960_POBCTRL | WM8960_SOFT_ST |
1072                         WM8960_BUFDCOPEN,
1073                         WM8960_POBCTRL | WM8960_SOFT_ST |
1074                         WM8960_BUFDCOPEN);
1075 
1076             /* Disable VMID and VREF */
1077             snd_soc_component_update_bits(component, WM8960_POWER1,
1078                         WM8960_VREF | WM8960_VMID_MASK, 0);
1079             break;
1080 
1081         case SND_SOC_BIAS_OFF:
1082             regcache_sync(wm8960->regmap);
1083             break;
1084         default:
1085             break;
1086         }
1087         break;
1088 
1089     case SND_SOC_BIAS_STANDBY:
1090         switch (snd_soc_component_get_bias_level(component)) {
1091         case SND_SOC_BIAS_PREPARE:
1092             /* Disable HP discharge */
1093             snd_soc_component_update_bits(component, WM8960_APOP2,
1094                         WM8960_DISOP | WM8960_DRES_MASK,
1095                         0);
1096 
1097             /* Disable anti-pop features */
1098             snd_soc_component_update_bits(component, WM8960_APOP1,
1099                         WM8960_POBCTRL | WM8960_SOFT_ST |
1100                         WM8960_BUFDCOPEN,
1101                         WM8960_POBCTRL | WM8960_SOFT_ST |
1102                         WM8960_BUFDCOPEN);
1103             break;
1104 
1105         default:
1106             break;
1107         }
1108         break;
1109 
1110     case SND_SOC_BIAS_OFF:
1111         break;
1112     }
1113 
1114     return 0;
1115 }
1116 
1117 /* PLL divisors */
1118 struct _pll_div {
1119     u32 pre_div:1;
1120     u32 n:4;
1121     u32 k:24;
1122 };
1123 
1124 static bool is_pll_freq_available(unsigned int source, unsigned int target)
1125 {
1126     unsigned int Ndiv;
1127 
1128     if (source == 0 || target == 0)
1129         return false;
1130 
1131     /* Scale up target to PLL operating frequency */
1132     target *= 4;
1133     Ndiv = target / source;
1134 
1135     if (Ndiv < 6) {
1136         source >>= 1;
1137         Ndiv = target / source;
1138     }
1139 
1140     if ((Ndiv < 6) || (Ndiv > 12))
1141         return false;
1142 
1143     return true;
1144 }
1145 
1146 /* The size in bits of the pll divide multiplied by 10
1147  * to allow rounding later */
1148 #define FIXED_PLL_SIZE ((1 << 24) * 10)
1149 
1150 static int pll_factors(unsigned int source, unsigned int target,
1151                struct _pll_div *pll_div)
1152 {
1153     unsigned long long Kpart;
1154     unsigned int K, Ndiv, Nmod;
1155 
1156     pr_debug("WM8960 PLL: setting %dHz->%dHz\n", source, target);
1157 
1158     /* Scale up target to PLL operating frequency */
1159     target *= 4;
1160 
1161     Ndiv = target / source;
1162     if (Ndiv < 6) {
1163         source >>= 1;
1164         pll_div->pre_div = 1;
1165         Ndiv = target / source;
1166     } else
1167         pll_div->pre_div = 0;
1168 
1169     if ((Ndiv < 6) || (Ndiv > 12)) {
1170         pr_err("WM8960 PLL: Unsupported N=%d\n", Ndiv);
1171         return -EINVAL;
1172     }
1173 
1174     pll_div->n = Ndiv;
1175     Nmod = target % source;
1176     Kpart = FIXED_PLL_SIZE * (long long)Nmod;
1177 
1178     do_div(Kpart, source);
1179 
1180     K = Kpart & 0xFFFFFFFF;
1181 
1182     /* Check if we need to round */
1183     if ((K % 10) >= 5)
1184         K += 5;
1185 
1186     /* Move down to proper range now rounding is done */
1187     K /= 10;
1188 
1189     pll_div->k = K;
1190 
1191     pr_debug("WM8960 PLL: N=%x K=%x pre_div=%d\n",
1192          pll_div->n, pll_div->k, pll_div->pre_div);
1193 
1194     return 0;
1195 }
1196 
1197 static int wm8960_set_pll(struct snd_soc_component *component,
1198         unsigned int freq_in, unsigned int freq_out)
1199 {
1200     u16 reg;
1201     static struct _pll_div pll_div;
1202     int ret;
1203 
1204     if (freq_in && freq_out) {
1205         ret = pll_factors(freq_in, freq_out, &pll_div);
1206         if (ret != 0)
1207             return ret;
1208     }
1209 
1210     /* Disable the PLL: even if we are changing the frequency the
1211      * PLL needs to be disabled while we do so. */
1212     snd_soc_component_update_bits(component, WM8960_CLOCK1, 0x1, 0);
1213     snd_soc_component_update_bits(component, WM8960_POWER2, 0x1, 0);
1214 
1215     if (!freq_in || !freq_out)
1216         return 0;
1217 
1218     reg = snd_soc_component_read(component, WM8960_PLL1) & ~0x3f;
1219     reg |= pll_div.pre_div << 4;
1220     reg |= pll_div.n;
1221 
1222     if (pll_div.k) {
1223         reg |= 0x20;
1224 
1225         snd_soc_component_write(component, WM8960_PLL2, (pll_div.k >> 16) & 0xff);
1226         snd_soc_component_write(component, WM8960_PLL3, (pll_div.k >> 8) & 0xff);
1227         snd_soc_component_write(component, WM8960_PLL4, pll_div.k & 0xff);
1228     }
1229     snd_soc_component_write(component, WM8960_PLL1, reg);
1230 
1231     /* Turn it on */
1232     snd_soc_component_update_bits(component, WM8960_POWER2, 0x1, 0x1);
1233     msleep(250);
1234     snd_soc_component_update_bits(component, WM8960_CLOCK1, 0x1, 0x1);
1235 
1236     return 0;
1237 }
1238 
1239 static int wm8960_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
1240         int source, unsigned int freq_in, unsigned int freq_out)
1241 {
1242     struct snd_soc_component *component = codec_dai->component;
1243     struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
1244 
1245     wm8960->freq_in = freq_in;
1246 
1247     if (pll_id == WM8960_SYSCLK_AUTO)
1248         return 0;
1249 
1250     return wm8960_set_pll(component, freq_in, freq_out);
1251 }
1252 
1253 static int wm8960_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
1254         int div_id, int div)
1255 {
1256     struct snd_soc_component *component = codec_dai->component;
1257     u16 reg;
1258 
1259     switch (div_id) {
1260     case WM8960_SYSCLKDIV:
1261         reg = snd_soc_component_read(component, WM8960_CLOCK1) & 0x1f9;
1262         snd_soc_component_write(component, WM8960_CLOCK1, reg | div);
1263         break;
1264     case WM8960_DACDIV:
1265         reg = snd_soc_component_read(component, WM8960_CLOCK1) & 0x1c7;
1266         snd_soc_component_write(component, WM8960_CLOCK1, reg | div);
1267         break;
1268     case WM8960_OPCLKDIV:
1269         reg = snd_soc_component_read(component, WM8960_PLL1) & 0x03f;
1270         snd_soc_component_write(component, WM8960_PLL1, reg | div);
1271         break;
1272     case WM8960_DCLKDIV:
1273         reg = snd_soc_component_read(component, WM8960_CLOCK2) & 0x03f;
1274         snd_soc_component_write(component, WM8960_CLOCK2, reg | div);
1275         break;
1276     case WM8960_TOCLKSEL:
1277         reg = snd_soc_component_read(component, WM8960_ADDCTL1) & 0x1fd;
1278         snd_soc_component_write(component, WM8960_ADDCTL1, reg | div);
1279         break;
1280     default:
1281         return -EINVAL;
1282     }
1283 
1284     return 0;
1285 }
1286 
1287 static int wm8960_set_bias_level(struct snd_soc_component *component,
1288                  enum snd_soc_bias_level level)
1289 {
1290     struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
1291 
1292     return wm8960->set_bias_level(component, level);
1293 }
1294 
1295 static int wm8960_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id,
1296                     unsigned int freq, int dir)
1297 {
1298     struct snd_soc_component *component = dai->component;
1299     struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
1300 
1301     switch (clk_id) {
1302     case WM8960_SYSCLK_MCLK:
1303         snd_soc_component_update_bits(component, WM8960_CLOCK1,
1304                     0x1, WM8960_SYSCLK_MCLK);
1305         break;
1306     case WM8960_SYSCLK_PLL:
1307         snd_soc_component_update_bits(component, WM8960_CLOCK1,
1308                     0x1, WM8960_SYSCLK_PLL);
1309         break;
1310     case WM8960_SYSCLK_AUTO:
1311         break;
1312     default:
1313         return -EINVAL;
1314     }
1315 
1316     wm8960->sysclk = freq;
1317     wm8960->clk_id = clk_id;
1318 
1319     return 0;
1320 }
1321 
1322 #define WM8960_RATES SNDRV_PCM_RATE_8000_48000
1323 
1324 #define WM8960_FORMATS \
1325     (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
1326     SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
1327 
1328 static const struct snd_soc_dai_ops wm8960_dai_ops = {
1329     .hw_params = wm8960_hw_params,
1330     .hw_free = wm8960_hw_free,
1331     .mute_stream = wm8960_mute,
1332     .set_fmt = wm8960_set_dai_fmt,
1333     .set_clkdiv = wm8960_set_dai_clkdiv,
1334     .set_pll = wm8960_set_dai_pll,
1335     .set_sysclk = wm8960_set_dai_sysclk,
1336     .no_capture_mute = 1,
1337 };
1338 
1339 static struct snd_soc_dai_driver wm8960_dai = {
1340     .name = "wm8960-hifi",
1341     .playback = {
1342         .stream_name = "Playback",
1343         .channels_min = 1,
1344         .channels_max = 2,
1345         .rates = WM8960_RATES,
1346         .formats = WM8960_FORMATS,},
1347     .capture = {
1348         .stream_name = "Capture",
1349         .channels_min = 1,
1350         .channels_max = 2,
1351         .rates = WM8960_RATES,
1352         .formats = WM8960_FORMATS,},
1353     .ops = &wm8960_dai_ops,
1354     .symmetric_rate = 1,
1355 };
1356 
1357 static int wm8960_probe(struct snd_soc_component *component)
1358 {
1359     struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
1360     struct wm8960_data *pdata = &wm8960->pdata;
1361 
1362     if (pdata->capless)
1363         wm8960->set_bias_level = wm8960_set_bias_level_capless;
1364     else
1365         wm8960->set_bias_level = wm8960_set_bias_level_out3;
1366 
1367     snd_soc_add_component_controls(component, wm8960_snd_controls,
1368                      ARRAY_SIZE(wm8960_snd_controls));
1369     wm8960_add_widgets(component);
1370 
1371     return 0;
1372 }
1373 
1374 static const struct snd_soc_component_driver soc_component_dev_wm8960 = {
1375     .probe          = wm8960_probe,
1376     .set_bias_level     = wm8960_set_bias_level,
1377     .suspend_bias_off   = 1,
1378     .idle_bias_on       = 1,
1379     .use_pmdown_time    = 1,
1380     .endianness     = 1,
1381 };
1382 
1383 static const struct regmap_config wm8960_regmap = {
1384     .reg_bits = 7,
1385     .val_bits = 9,
1386     .max_register = WM8960_PLL4,
1387 
1388     .reg_defaults = wm8960_reg_defaults,
1389     .num_reg_defaults = ARRAY_SIZE(wm8960_reg_defaults),
1390     .cache_type = REGCACHE_RBTREE,
1391 
1392     .volatile_reg = wm8960_volatile,
1393 };
1394 
1395 static void wm8960_set_pdata_from_of(struct i2c_client *i2c,
1396                 struct wm8960_data *pdata)
1397 {
1398     const struct device_node *np = i2c->dev.of_node;
1399 
1400     if (of_property_read_bool(np, "wlf,capless"))
1401         pdata->capless = true;
1402 
1403     if (of_property_read_bool(np, "wlf,shared-lrclk"))
1404         pdata->shared_lrclk = true;
1405 
1406     of_property_read_u32_array(np, "wlf,gpio-cfg", pdata->gpio_cfg,
1407                    ARRAY_SIZE(pdata->gpio_cfg));
1408 
1409     of_property_read_u32_array(np, "wlf,hp-cfg", pdata->hp_cfg,
1410                    ARRAY_SIZE(pdata->hp_cfg));
1411 }
1412 
1413 static int wm8960_i2c_probe(struct i2c_client *i2c)
1414 {
1415     struct wm8960_data *pdata = dev_get_platdata(&i2c->dev);
1416     struct wm8960_priv *wm8960;
1417     int ret;
1418 
1419     wm8960 = devm_kzalloc(&i2c->dev, sizeof(struct wm8960_priv),
1420                   GFP_KERNEL);
1421     if (wm8960 == NULL)
1422         return -ENOMEM;
1423 
1424     wm8960->mclk = devm_clk_get(&i2c->dev, "mclk");
1425     if (IS_ERR(wm8960->mclk)) {
1426         if (PTR_ERR(wm8960->mclk) == -EPROBE_DEFER)
1427             return -EPROBE_DEFER;
1428     }
1429 
1430     wm8960->regmap = devm_regmap_init_i2c(i2c, &wm8960_regmap);
1431     if (IS_ERR(wm8960->regmap))
1432         return PTR_ERR(wm8960->regmap);
1433 
1434     if (pdata)
1435         memcpy(&wm8960->pdata, pdata, sizeof(struct wm8960_data));
1436     else if (i2c->dev.of_node)
1437         wm8960_set_pdata_from_of(i2c, &wm8960->pdata);
1438 
1439     ret = wm8960_reset(wm8960->regmap);
1440     if (ret != 0) {
1441         dev_err(&i2c->dev, "Failed to issue reset\n");
1442         return ret;
1443     }
1444 
1445     if (wm8960->pdata.shared_lrclk) {
1446         ret = regmap_update_bits(wm8960->regmap, WM8960_ADDCTL2,
1447                      0x4, 0x4);
1448         if (ret != 0) {
1449             dev_err(&i2c->dev, "Failed to enable LRCM: %d\n",
1450                 ret);
1451             return ret;
1452         }
1453     }
1454 
1455     /* Latch the update bits */
1456     regmap_update_bits(wm8960->regmap, WM8960_LINVOL, 0x100, 0x100);
1457     regmap_update_bits(wm8960->regmap, WM8960_RINVOL, 0x100, 0x100);
1458     regmap_update_bits(wm8960->regmap, WM8960_LADC, 0x100, 0x100);
1459     regmap_update_bits(wm8960->regmap, WM8960_RADC, 0x100, 0x100);
1460     regmap_update_bits(wm8960->regmap, WM8960_LDAC, 0x100, 0x100);
1461     regmap_update_bits(wm8960->regmap, WM8960_RDAC, 0x100, 0x100);
1462     regmap_update_bits(wm8960->regmap, WM8960_LOUT1, 0x100, 0x100);
1463     regmap_update_bits(wm8960->regmap, WM8960_ROUT1, 0x100, 0x100);
1464     regmap_update_bits(wm8960->regmap, WM8960_LOUT2, 0x100, 0x100);
1465     regmap_update_bits(wm8960->regmap, WM8960_ROUT2, 0x100, 0x100);
1466 
1467     /* ADCLRC pin configured as GPIO. */
1468     regmap_update_bits(wm8960->regmap, WM8960_IFACE2, 1 << 6,
1469                wm8960->pdata.gpio_cfg[0] << 6);
1470     regmap_update_bits(wm8960->regmap, WM8960_ADDCTL4, 0xF << 4,
1471                wm8960->pdata.gpio_cfg[1] << 4);
1472 
1473     /* Enable headphone jack detect */
1474     regmap_update_bits(wm8960->regmap, WM8960_ADDCTL4, 3 << 2,
1475                wm8960->pdata.hp_cfg[0] << 2);
1476     regmap_update_bits(wm8960->regmap, WM8960_ADDCTL2, 3 << 5,
1477                wm8960->pdata.hp_cfg[1] << 5);
1478     regmap_update_bits(wm8960->regmap, WM8960_ADDCTL1, 3,
1479                wm8960->pdata.hp_cfg[2]);
1480 
1481     i2c_set_clientdata(i2c, wm8960);
1482 
1483     ret = devm_snd_soc_register_component(&i2c->dev,
1484             &soc_component_dev_wm8960, &wm8960_dai, 1);
1485 
1486     return ret;
1487 }
1488 
1489 static int wm8960_i2c_remove(struct i2c_client *client)
1490 {
1491     return 0;
1492 }
1493 
1494 static const struct i2c_device_id wm8960_i2c_id[] = {
1495     { "wm8960", 0 },
1496     { }
1497 };
1498 MODULE_DEVICE_TABLE(i2c, wm8960_i2c_id);
1499 
1500 #if defined(CONFIG_OF)
1501 static const struct of_device_id wm8960_of_match[] = {
1502        { .compatible = "wlf,wm8960", },
1503        { }
1504 };
1505 MODULE_DEVICE_TABLE(of, wm8960_of_match);
1506 #endif
1507 
1508 #if defined(CONFIG_ACPI)
1509 static const struct acpi_device_id wm8960_acpi_match[] = {
1510     { "1AEC8960", 0 }, /* Wolfson PCI ID + part ID */
1511     { "10138960", 0 }, /* Cirrus Logic PCI ID + part ID */
1512     { },
1513 };
1514 MODULE_DEVICE_TABLE(acpi, wm8960_acpi_match);
1515 #endif
1516 
1517 static struct i2c_driver wm8960_i2c_driver = {
1518     .driver = {
1519         .name = "wm8960",
1520         .of_match_table = of_match_ptr(wm8960_of_match),
1521         .acpi_match_table = ACPI_PTR(wm8960_acpi_match),
1522     },
1523     .probe_new = wm8960_i2c_probe,
1524     .remove =   wm8960_i2c_remove,
1525     .id_table = wm8960_i2c_id,
1526 };
1527 
1528 module_i2c_driver(wm8960_i2c_driver);
1529 
1530 MODULE_DESCRIPTION("ASoC WM8960 driver");
1531 MODULE_AUTHOR("Liam Girdwood");
1532 MODULE_LICENSE("GPL");
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