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0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * wm8955.h  --  WM8904 ASoC driver
0004  *
0005  * Copyright 2009 Wolfson Microelectronics, plc
0006  *
0007  * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
0008  */
0009 
0010 #ifndef _WM8955_H
0011 #define _WM8955_H
0012 
0013 #define WM8955_CLK_MCLK 1
0014 
0015 /*
0016  * Register values.
0017  */
0018 #define WM8955_LOUT1_VOLUME                     0x02
0019 #define WM8955_ROUT1_VOLUME                     0x03
0020 #define WM8955_DAC_CONTROL                      0x05
0021 #define WM8955_AUDIO_INTERFACE                  0x07
0022 #define WM8955_SAMPLE_RATE                      0x08
0023 #define WM8955_LEFT_DAC_VOLUME                  0x0A
0024 #define WM8955_RIGHT_DAC_VOLUME                 0x0B
0025 #define WM8955_BASS_CONTROL                     0x0C
0026 #define WM8955_TREBLE_CONTROL                   0x0D
0027 #define WM8955_RESET                            0x0F
0028 #define WM8955_ADDITIONAL_CONTROL_1             0x17
0029 #define WM8955_ADDITIONAL_CONTROL_2             0x18
0030 #define WM8955_POWER_MANAGEMENT_1               0x19
0031 #define WM8955_POWER_MANAGEMENT_2               0x1A
0032 #define WM8955_ADDITIONAL_CONTROL_3             0x1B
0033 #define WM8955_LEFT_OUT_MIX_1                   0x22
0034 #define WM8955_LEFT_OUT_MIX_2                   0x23
0035 #define WM8955_RIGHT_OUT_MIX_1                  0x24
0036 #define WM8955_RIGHT_OUT_MIX_2                  0x25
0037 #define WM8955_MONO_OUT_MIX_1                   0x26
0038 #define WM8955_MONO_OUT_MIX_2                   0x27
0039 #define WM8955_LOUT2_VOLUME                     0x28
0040 #define WM8955_ROUT2_VOLUME                     0x29
0041 #define WM8955_MONOOUT_VOLUME                   0x2A
0042 #define WM8955_CLOCKING_PLL                     0x2B
0043 #define WM8955_PLL_CONTROL_1                    0x2C
0044 #define WM8955_PLL_CONTROL_2                    0x2D
0045 #define WM8955_PLL_CONTROL_3                    0x2E
0046 #define WM8955_PLL_CONTROL_4                    0x3B
0047 
0048 #define WM8955_REGISTER_COUNT                   29
0049 #define WM8955_MAX_REGISTER                     0x3B
0050 
0051 /*
0052  * Field Definitions.
0053  */
0054 
0055 /*
0056  * R2 (0x02) - LOUT1 volume
0057  */
0058 #define WM8955_LO1VU                            0x0100  /* LO1VU */
0059 #define WM8955_LO1VU_MASK                       0x0100  /* LO1VU */
0060 #define WM8955_LO1VU_SHIFT                           8  /* LO1VU */
0061 #define WM8955_LO1VU_WIDTH                           1  /* LO1VU */
0062 #define WM8955_LO1ZC                            0x0080  /* LO1ZC */
0063 #define WM8955_LO1ZC_MASK                       0x0080  /* LO1ZC */
0064 #define WM8955_LO1ZC_SHIFT                           7  /* LO1ZC */
0065 #define WM8955_LO1ZC_WIDTH                           1  /* LO1ZC */
0066 #define WM8955_LOUTVOL_MASK                     0x007F  /* LOUTVOL - [6:0] */
0067 #define WM8955_LOUTVOL_SHIFT                         0  /* LOUTVOL - [6:0] */
0068 #define WM8955_LOUTVOL_WIDTH                         7  /* LOUTVOL - [6:0] */
0069 
0070 /*
0071  * R3 (0x03) - ROUT1 volume
0072  */
0073 #define WM8955_RO1VU                            0x0100  /* RO1VU */
0074 #define WM8955_RO1VU_MASK                       0x0100  /* RO1VU */
0075 #define WM8955_RO1VU_SHIFT                           8  /* RO1VU */
0076 #define WM8955_RO1VU_WIDTH                           1  /* RO1VU */
0077 #define WM8955_RO1ZC                            0x0080  /* RO1ZC */
0078 #define WM8955_RO1ZC_MASK                       0x0080  /* RO1ZC */
0079 #define WM8955_RO1ZC_SHIFT                           7  /* RO1ZC */
0080 #define WM8955_RO1ZC_WIDTH                           1  /* RO1ZC */
0081 #define WM8955_ROUTVOL_MASK                     0x007F  /* ROUTVOL - [6:0] */
0082 #define WM8955_ROUTVOL_SHIFT                         0  /* ROUTVOL - [6:0] */
0083 #define WM8955_ROUTVOL_WIDTH                         7  /* ROUTVOL - [6:0] */
0084 
0085 /*
0086  * R5 (0x05) - DAC Control
0087  */
0088 #define WM8955_DAT                              0x0080  /* DAT */
0089 #define WM8955_DAT_MASK                         0x0080  /* DAT */
0090 #define WM8955_DAT_SHIFT                             7  /* DAT */
0091 #define WM8955_DAT_WIDTH                             1  /* DAT */
0092 #define WM8955_DACMU                            0x0008  /* DACMU */
0093 #define WM8955_DACMU_MASK                       0x0008  /* DACMU */
0094 #define WM8955_DACMU_SHIFT                           3  /* DACMU */
0095 #define WM8955_DACMU_WIDTH                           1  /* DACMU */
0096 #define WM8955_DEEMPH_MASK                      0x0006  /* DEEMPH - [2:1] */
0097 #define WM8955_DEEMPH_SHIFT                          1  /* DEEMPH - [2:1] */
0098 #define WM8955_DEEMPH_WIDTH                          2  /* DEEMPH - [2:1] */
0099 
0100 /*
0101  * R7 (0x07) - Audio Interface
0102  */
0103 #define WM8955_BCLKINV                          0x0080  /* BCLKINV */
0104 #define WM8955_BCLKINV_MASK                     0x0080  /* BCLKINV */
0105 #define WM8955_BCLKINV_SHIFT                         7  /* BCLKINV */
0106 #define WM8955_BCLKINV_WIDTH                         1  /* BCLKINV */
0107 #define WM8955_MS                               0x0040  /* MS */
0108 #define WM8955_MS_MASK                          0x0040  /* MS */
0109 #define WM8955_MS_SHIFT                              6  /* MS */
0110 #define WM8955_MS_WIDTH                              1  /* MS */
0111 #define WM8955_LRSWAP                           0x0020  /* LRSWAP */
0112 #define WM8955_LRSWAP_MASK                      0x0020  /* LRSWAP */
0113 #define WM8955_LRSWAP_SHIFT                          5  /* LRSWAP */
0114 #define WM8955_LRSWAP_WIDTH                          1  /* LRSWAP */
0115 #define WM8955_LRP                              0x0010  /* LRP */
0116 #define WM8955_LRP_MASK                         0x0010  /* LRP */
0117 #define WM8955_LRP_SHIFT                             4  /* LRP */
0118 #define WM8955_LRP_WIDTH                             1  /* LRP */
0119 #define WM8955_WL_MASK                          0x000C  /* WL - [3:2] */
0120 #define WM8955_WL_SHIFT                              2  /* WL - [3:2] */
0121 #define WM8955_WL_WIDTH                              2  /* WL - [3:2] */
0122 #define WM8955_FORMAT_MASK                      0x0003  /* FORMAT - [1:0] */
0123 #define WM8955_FORMAT_SHIFT                          0  /* FORMAT - [1:0] */
0124 #define WM8955_FORMAT_WIDTH                          2  /* FORMAT - [1:0] */
0125 
0126 /*
0127  * R8 (0x08) - Sample Rate
0128  */
0129 #define WM8955_BCLKDIV2                         0x0080  /* BCLKDIV2 */
0130 #define WM8955_BCLKDIV2_MASK                    0x0080  /* BCLKDIV2 */
0131 #define WM8955_BCLKDIV2_SHIFT                        7  /* BCLKDIV2 */
0132 #define WM8955_BCLKDIV2_WIDTH                        1  /* BCLKDIV2 */
0133 #define WM8955_MCLKDIV2                         0x0040  /* MCLKDIV2 */
0134 #define WM8955_MCLKDIV2_MASK                    0x0040  /* MCLKDIV2 */
0135 #define WM8955_MCLKDIV2_SHIFT                        6  /* MCLKDIV2 */
0136 #define WM8955_MCLKDIV2_WIDTH                        1  /* MCLKDIV2 */
0137 #define WM8955_SR_MASK                          0x003E  /* SR - [5:1] */
0138 #define WM8955_SR_SHIFT                              1  /* SR - [5:1] */
0139 #define WM8955_SR_WIDTH                              5  /* SR - [5:1] */
0140 #define WM8955_USB                              0x0001  /* USB */
0141 #define WM8955_USB_MASK                         0x0001  /* USB */
0142 #define WM8955_USB_SHIFT                             0  /* USB */
0143 #define WM8955_USB_WIDTH                             1  /* USB */
0144 
0145 /*
0146  * R10 (0x0A) - Left DAC volume
0147  */
0148 #define WM8955_LDVU                             0x0100  /* LDVU */
0149 #define WM8955_LDVU_MASK                        0x0100  /* LDVU */
0150 #define WM8955_LDVU_SHIFT                            8  /* LDVU */
0151 #define WM8955_LDVU_WIDTH                            1  /* LDVU */
0152 #define WM8955_LDACVOL_MASK                     0x00FF  /* LDACVOL - [7:0] */
0153 #define WM8955_LDACVOL_SHIFT                         0  /* LDACVOL - [7:0] */
0154 #define WM8955_LDACVOL_WIDTH                         8  /* LDACVOL - [7:0] */
0155 
0156 /*
0157  * R11 (0x0B) - Right DAC volume
0158  */
0159 #define WM8955_RDVU                             0x0100  /* RDVU */
0160 #define WM8955_RDVU_MASK                        0x0100  /* RDVU */
0161 #define WM8955_RDVU_SHIFT                            8  /* RDVU */
0162 #define WM8955_RDVU_WIDTH                            1  /* RDVU */
0163 #define WM8955_RDACVOL_MASK                     0x00FF  /* RDACVOL - [7:0] */
0164 #define WM8955_RDACVOL_SHIFT                         0  /* RDACVOL - [7:0] */
0165 #define WM8955_RDACVOL_WIDTH                         8  /* RDACVOL - [7:0] */
0166 
0167 /*
0168  * R12 (0x0C) - Bass control
0169  */
0170 #define WM8955_BB                               0x0080  /* BB */
0171 #define WM8955_BB_MASK                          0x0080  /* BB */
0172 #define WM8955_BB_SHIFT                              7  /* BB */
0173 #define WM8955_BB_WIDTH                              1  /* BB */
0174 #define WM8955_BC                               0x0040  /* BC */
0175 #define WM8955_BC_MASK                          0x0040  /* BC */
0176 #define WM8955_BC_SHIFT                              6  /* BC */
0177 #define WM8955_BC_WIDTH                              1  /* BC */
0178 #define WM8955_BASS_MASK                        0x000F  /* BASS - [3:0] */
0179 #define WM8955_BASS_SHIFT                            0  /* BASS - [3:0] */
0180 #define WM8955_BASS_WIDTH                            4  /* BASS - [3:0] */
0181 
0182 /*
0183  * R13 (0x0D) - Treble control
0184  */
0185 #define WM8955_TC                               0x0040  /* TC */
0186 #define WM8955_TC_MASK                          0x0040  /* TC */
0187 #define WM8955_TC_SHIFT                              6  /* TC */
0188 #define WM8955_TC_WIDTH                              1  /* TC */
0189 #define WM8955_TRBL_MASK                        0x000F  /* TRBL - [3:0] */
0190 #define WM8955_TRBL_SHIFT                            0  /* TRBL - [3:0] */
0191 #define WM8955_TRBL_WIDTH                            4  /* TRBL - [3:0] */
0192 
0193 /*
0194  * R15 (0x0F) - Reset
0195  */
0196 #define WM8955_RESET_MASK                       0x01FF  /* RESET - [8:0] */
0197 #define WM8955_RESET_SHIFT                           0  /* RESET - [8:0] */
0198 #define WM8955_RESET_WIDTH                           9  /* RESET - [8:0] */
0199 
0200 /*
0201  * R23 (0x17) - Additional control (1)
0202  */
0203 #define WM8955_TSDEN                            0x0100  /* TSDEN */
0204 #define WM8955_TSDEN_MASK                       0x0100  /* TSDEN */
0205 #define WM8955_TSDEN_SHIFT                           8  /* TSDEN */
0206 #define WM8955_TSDEN_WIDTH                           1  /* TSDEN */
0207 #define WM8955_VSEL_MASK                        0x00C0  /* VSEL - [7:6] */
0208 #define WM8955_VSEL_SHIFT                            6  /* VSEL - [7:6] */
0209 #define WM8955_VSEL_WIDTH                            2  /* VSEL - [7:6] */
0210 #define WM8955_DMONOMIX_MASK                    0x0030  /* DMONOMIX - [5:4] */
0211 #define WM8955_DMONOMIX_SHIFT                        4  /* DMONOMIX - [5:4] */
0212 #define WM8955_DMONOMIX_WIDTH                        2  /* DMONOMIX - [5:4] */
0213 #define WM8955_DACINV                           0x0002  /* DACINV */
0214 #define WM8955_DACINV_MASK                      0x0002  /* DACINV */
0215 #define WM8955_DACINV_SHIFT                          1  /* DACINV */
0216 #define WM8955_DACINV_WIDTH                          1  /* DACINV */
0217 #define WM8955_TOEN                             0x0001  /* TOEN */
0218 #define WM8955_TOEN_MASK                        0x0001  /* TOEN */
0219 #define WM8955_TOEN_SHIFT                            0  /* TOEN */
0220 #define WM8955_TOEN_WIDTH                            1  /* TOEN */
0221 
0222 /*
0223  * R24 (0x18) - Additional control (2)
0224  */
0225 #define WM8955_OUT3SW_MASK                      0x0180  /* OUT3SW - [8:7] */
0226 #define WM8955_OUT3SW_SHIFT                          7  /* OUT3SW - [8:7] */
0227 #define WM8955_OUT3SW_WIDTH                          2  /* OUT3SW - [8:7] */
0228 #define WM8955_ROUT2INV                         0x0010  /* ROUT2INV */
0229 #define WM8955_ROUT2INV_MASK                    0x0010  /* ROUT2INV */
0230 #define WM8955_ROUT2INV_SHIFT                        4  /* ROUT2INV */
0231 #define WM8955_ROUT2INV_WIDTH                        1  /* ROUT2INV */
0232 #define WM8955_DACOSR                           0x0001  /* DACOSR */
0233 #define WM8955_DACOSR_MASK                      0x0001  /* DACOSR */
0234 #define WM8955_DACOSR_SHIFT                          0  /* DACOSR */
0235 #define WM8955_DACOSR_WIDTH                          1  /* DACOSR */
0236 
0237 /*
0238  * R25 (0x19) - Power Management (1)
0239  */
0240 #define WM8955_VMIDSEL_MASK                     0x0180  /* VMIDSEL - [8:7] */
0241 #define WM8955_VMIDSEL_SHIFT                         7  /* VMIDSEL - [8:7] */
0242 #define WM8955_VMIDSEL_WIDTH                         2  /* VMIDSEL - [8:7] */
0243 #define WM8955_VREF                             0x0040  /* VREF */
0244 #define WM8955_VREF_MASK                        0x0040  /* VREF */
0245 #define WM8955_VREF_SHIFT                            6  /* VREF */
0246 #define WM8955_VREF_WIDTH                            1  /* VREF */
0247 #define WM8955_DIGENB                           0x0001  /* DIGENB */
0248 #define WM8955_DIGENB_MASK                      0x0001  /* DIGENB */
0249 #define WM8955_DIGENB_SHIFT                          0  /* DIGENB */
0250 #define WM8955_DIGENB_WIDTH                          1  /* DIGENB */
0251 
0252 /*
0253  * R26 (0x1A) - Power Management (2)
0254  */
0255 #define WM8955_DACL                             0x0100  /* DACL */
0256 #define WM8955_DACL_MASK                        0x0100  /* DACL */
0257 #define WM8955_DACL_SHIFT                            8  /* DACL */
0258 #define WM8955_DACL_WIDTH                            1  /* DACL */
0259 #define WM8955_DACR                             0x0080  /* DACR */
0260 #define WM8955_DACR_MASK                        0x0080  /* DACR */
0261 #define WM8955_DACR_SHIFT                            7  /* DACR */
0262 #define WM8955_DACR_WIDTH                            1  /* DACR */
0263 #define WM8955_LOUT1                            0x0040  /* LOUT1 */
0264 #define WM8955_LOUT1_MASK                       0x0040  /* LOUT1 */
0265 #define WM8955_LOUT1_SHIFT                           6  /* LOUT1 */
0266 #define WM8955_LOUT1_WIDTH                           1  /* LOUT1 */
0267 #define WM8955_ROUT1                            0x0020  /* ROUT1 */
0268 #define WM8955_ROUT1_MASK                       0x0020  /* ROUT1 */
0269 #define WM8955_ROUT1_SHIFT                           5  /* ROUT1 */
0270 #define WM8955_ROUT1_WIDTH                           1  /* ROUT1 */
0271 #define WM8955_LOUT2                            0x0010  /* LOUT2 */
0272 #define WM8955_LOUT2_MASK                       0x0010  /* LOUT2 */
0273 #define WM8955_LOUT2_SHIFT                           4  /* LOUT2 */
0274 #define WM8955_LOUT2_WIDTH                           1  /* LOUT2 */
0275 #define WM8955_ROUT2                            0x0008  /* ROUT2 */
0276 #define WM8955_ROUT2_MASK                       0x0008  /* ROUT2 */
0277 #define WM8955_ROUT2_SHIFT                           3  /* ROUT2 */
0278 #define WM8955_ROUT2_WIDTH                           1  /* ROUT2 */
0279 #define WM8955_MONO                             0x0004  /* MONO */
0280 #define WM8955_MONO_MASK                        0x0004  /* MONO */
0281 #define WM8955_MONO_SHIFT                            2  /* MONO */
0282 #define WM8955_MONO_WIDTH                            1  /* MONO */
0283 #define WM8955_OUT3                             0x0002  /* OUT3 */
0284 #define WM8955_OUT3_MASK                        0x0002  /* OUT3 */
0285 #define WM8955_OUT3_SHIFT                            1  /* OUT3 */
0286 #define WM8955_OUT3_WIDTH                            1  /* OUT3 */
0287 
0288 /*
0289  * R27 (0x1B) - Additional Control (3)
0290  */
0291 #define WM8955_VROI                             0x0040  /* VROI */
0292 #define WM8955_VROI_MASK                        0x0040  /* VROI */
0293 #define WM8955_VROI_SHIFT                            6  /* VROI */
0294 #define WM8955_VROI_WIDTH                            1  /* VROI */
0295 
0296 /*
0297  * R34 (0x22) - Left out Mix (1)
0298  */
0299 #define WM8955_LD2LO                            0x0100  /* LD2LO */
0300 #define WM8955_LD2LO_MASK                       0x0100  /* LD2LO */
0301 #define WM8955_LD2LO_SHIFT                           8  /* LD2LO */
0302 #define WM8955_LD2LO_WIDTH                           1  /* LD2LO */
0303 #define WM8955_LI2LO                            0x0080  /* LI2LO */
0304 #define WM8955_LI2LO_MASK                       0x0080  /* LI2LO */
0305 #define WM8955_LI2LO_SHIFT                           7  /* LI2LO */
0306 #define WM8955_LI2LO_WIDTH                           1  /* LI2LO */
0307 #define WM8955_LI2LOVOL_MASK                    0x0070  /* LI2LOVOL - [6:4] */
0308 #define WM8955_LI2LOVOL_SHIFT                        4  /* LI2LOVOL - [6:4] */
0309 #define WM8955_LI2LOVOL_WIDTH                        3  /* LI2LOVOL - [6:4] */
0310 
0311 /*
0312  * R35 (0x23) - Left out Mix (2)
0313  */
0314 #define WM8955_RD2LO                            0x0100  /* RD2LO */
0315 #define WM8955_RD2LO_MASK                       0x0100  /* RD2LO */
0316 #define WM8955_RD2LO_SHIFT                           8  /* RD2LO */
0317 #define WM8955_RD2LO_WIDTH                           1  /* RD2LO */
0318 #define WM8955_RI2LO                            0x0080  /* RI2LO */
0319 #define WM8955_RI2LO_MASK                       0x0080  /* RI2LO */
0320 #define WM8955_RI2LO_SHIFT                           7  /* RI2LO */
0321 #define WM8955_RI2LO_WIDTH                           1  /* RI2LO */
0322 #define WM8955_RI2LOVOL_MASK                    0x0070  /* RI2LOVOL - [6:4] */
0323 #define WM8955_RI2LOVOL_SHIFT                        4  /* RI2LOVOL - [6:4] */
0324 #define WM8955_RI2LOVOL_WIDTH                        3  /* RI2LOVOL - [6:4] */
0325 
0326 /*
0327  * R36 (0x24) - Right out Mix (1)
0328  */
0329 #define WM8955_LD2RO                            0x0100  /* LD2RO */
0330 #define WM8955_LD2RO_MASK                       0x0100  /* LD2RO */
0331 #define WM8955_LD2RO_SHIFT                           8  /* LD2RO */
0332 #define WM8955_LD2RO_WIDTH                           1  /* LD2RO */
0333 #define WM8955_LI2RO                            0x0080  /* LI2RO */
0334 #define WM8955_LI2RO_MASK                       0x0080  /* LI2RO */
0335 #define WM8955_LI2RO_SHIFT                           7  /* LI2RO */
0336 #define WM8955_LI2RO_WIDTH                           1  /* LI2RO */
0337 #define WM8955_LI2ROVOL_MASK                    0x0070  /* LI2ROVOL - [6:4] */
0338 #define WM8955_LI2ROVOL_SHIFT                        4  /* LI2ROVOL - [6:4] */
0339 #define WM8955_LI2ROVOL_WIDTH                        3  /* LI2ROVOL - [6:4] */
0340 
0341 /*
0342  * R37 (0x25) - Right Out Mix (2)
0343  */
0344 #define WM8955_RD2RO                            0x0100  /* RD2RO */
0345 #define WM8955_RD2RO_MASK                       0x0100  /* RD2RO */
0346 #define WM8955_RD2RO_SHIFT                           8  /* RD2RO */
0347 #define WM8955_RD2RO_WIDTH                           1  /* RD2RO */
0348 #define WM8955_RI2RO                            0x0080  /* RI2RO */
0349 #define WM8955_RI2RO_MASK                       0x0080  /* RI2RO */
0350 #define WM8955_RI2RO_SHIFT                           7  /* RI2RO */
0351 #define WM8955_RI2RO_WIDTH                           1  /* RI2RO */
0352 #define WM8955_RI2ROVOL_MASK                    0x0070  /* RI2ROVOL - [6:4] */
0353 #define WM8955_RI2ROVOL_SHIFT                        4  /* RI2ROVOL - [6:4] */
0354 #define WM8955_RI2ROVOL_WIDTH                        3  /* RI2ROVOL - [6:4] */
0355 
0356 /*
0357  * R38 (0x26) - Mono out Mix (1)
0358  */
0359 #define WM8955_LD2MO                            0x0100  /* LD2MO */
0360 #define WM8955_LD2MO_MASK                       0x0100  /* LD2MO */
0361 #define WM8955_LD2MO_SHIFT                           8  /* LD2MO */
0362 #define WM8955_LD2MO_WIDTH                           1  /* LD2MO */
0363 #define WM8955_LI2MO                            0x0080  /* LI2MO */
0364 #define WM8955_LI2MO_MASK                       0x0080  /* LI2MO */
0365 #define WM8955_LI2MO_SHIFT                           7  /* LI2MO */
0366 #define WM8955_LI2MO_WIDTH                           1  /* LI2MO */
0367 #define WM8955_LI2MOVOL_MASK                    0x0070  /* LI2MOVOL - [6:4] */
0368 #define WM8955_LI2MOVOL_SHIFT                        4  /* LI2MOVOL - [6:4] */
0369 #define WM8955_LI2MOVOL_WIDTH                        3  /* LI2MOVOL - [6:4] */
0370 #define WM8955_DMEN                             0x0001  /* DMEN */
0371 #define WM8955_DMEN_MASK                        0x0001  /* DMEN */
0372 #define WM8955_DMEN_SHIFT                            0  /* DMEN */
0373 #define WM8955_DMEN_WIDTH                            1  /* DMEN */
0374 
0375 /*
0376  * R39 (0x27) - Mono out Mix (2)
0377  */
0378 #define WM8955_RD2MO                            0x0100  /* RD2MO */
0379 #define WM8955_RD2MO_MASK                       0x0100  /* RD2MO */
0380 #define WM8955_RD2MO_SHIFT                           8  /* RD2MO */
0381 #define WM8955_RD2MO_WIDTH                           1  /* RD2MO */
0382 #define WM8955_RI2MO                            0x0080  /* RI2MO */
0383 #define WM8955_RI2MO_MASK                       0x0080  /* RI2MO */
0384 #define WM8955_RI2MO_SHIFT                           7  /* RI2MO */
0385 #define WM8955_RI2MO_WIDTH                           1  /* RI2MO */
0386 #define WM8955_RI2MOVOL_MASK                    0x0070  /* RI2MOVOL - [6:4] */
0387 #define WM8955_RI2MOVOL_SHIFT                        4  /* RI2MOVOL - [6:4] */
0388 #define WM8955_RI2MOVOL_WIDTH                        3  /* RI2MOVOL - [6:4] */
0389 
0390 /*
0391  * R40 (0x28) - LOUT2 volume
0392  */
0393 #define WM8955_LO2VU                            0x0100  /* LO2VU */
0394 #define WM8955_LO2VU_MASK                       0x0100  /* LO2VU */
0395 #define WM8955_LO2VU_SHIFT                           8  /* LO2VU */
0396 #define WM8955_LO2VU_WIDTH                           1  /* LO2VU */
0397 #define WM8955_LO2ZC                            0x0080  /* LO2ZC */
0398 #define WM8955_LO2ZC_MASK                       0x0080  /* LO2ZC */
0399 #define WM8955_LO2ZC_SHIFT                           7  /* LO2ZC */
0400 #define WM8955_LO2ZC_WIDTH                           1  /* LO2ZC */
0401 #define WM8955_LOUT2VOL_MASK                    0x007F  /* LOUT2VOL - [6:0] */
0402 #define WM8955_LOUT2VOL_SHIFT                        0  /* LOUT2VOL - [6:0] */
0403 #define WM8955_LOUT2VOL_WIDTH                        7  /* LOUT2VOL - [6:0] */
0404 
0405 /*
0406  * R41 (0x29) - ROUT2 volume
0407  */
0408 #define WM8955_RO2VU                            0x0100  /* RO2VU */
0409 #define WM8955_RO2VU_MASK                       0x0100  /* RO2VU */
0410 #define WM8955_RO2VU_SHIFT                           8  /* RO2VU */
0411 #define WM8955_RO2VU_WIDTH                           1  /* RO2VU */
0412 #define WM8955_RO2ZC                            0x0080  /* RO2ZC */
0413 #define WM8955_RO2ZC_MASK                       0x0080  /* RO2ZC */
0414 #define WM8955_RO2ZC_SHIFT                           7  /* RO2ZC */
0415 #define WM8955_RO2ZC_WIDTH                           1  /* RO2ZC */
0416 #define WM8955_ROUT2VOL_MASK                    0x007F  /* ROUT2VOL - [6:0] */
0417 #define WM8955_ROUT2VOL_SHIFT                        0  /* ROUT2VOL - [6:0] */
0418 #define WM8955_ROUT2VOL_WIDTH                        7  /* ROUT2VOL - [6:0] */
0419 
0420 /*
0421  * R42 (0x2A) - MONOOUT volume
0422  */
0423 #define WM8955_MOZC                             0x0080  /* MOZC */
0424 #define WM8955_MOZC_MASK                        0x0080  /* MOZC */
0425 #define WM8955_MOZC_SHIFT                            7  /* MOZC */
0426 #define WM8955_MOZC_WIDTH                            1  /* MOZC */
0427 #define WM8955_MOUTVOL_MASK                     0x007F  /* MOUTVOL - [6:0] */
0428 #define WM8955_MOUTVOL_SHIFT                         0  /* MOUTVOL - [6:0] */
0429 #define WM8955_MOUTVOL_WIDTH                         7  /* MOUTVOL - [6:0] */
0430 
0431 /*
0432  * R43 (0x2B) - Clocking / PLL
0433  */
0434 #define WM8955_MCLKSEL                          0x0100  /* MCLKSEL */
0435 #define WM8955_MCLKSEL_MASK                     0x0100  /* MCLKSEL */
0436 #define WM8955_MCLKSEL_SHIFT                         8  /* MCLKSEL */
0437 #define WM8955_MCLKSEL_WIDTH                         1  /* MCLKSEL */
0438 #define WM8955_PLLOUTDIV2                       0x0020  /* PLLOUTDIV2 */
0439 #define WM8955_PLLOUTDIV2_MASK                  0x0020  /* PLLOUTDIV2 */
0440 #define WM8955_PLLOUTDIV2_SHIFT                      5  /* PLLOUTDIV2 */
0441 #define WM8955_PLLOUTDIV2_WIDTH                      1  /* PLLOUTDIV2 */
0442 #define WM8955_PLL_RB                           0x0010  /* PLL_RB */
0443 #define WM8955_PLL_RB_MASK                      0x0010  /* PLL_RB */
0444 #define WM8955_PLL_RB_SHIFT                          4  /* PLL_RB */
0445 #define WM8955_PLL_RB_WIDTH                          1  /* PLL_RB */
0446 #define WM8955_PLLEN                            0x0008  /* PLLEN */
0447 #define WM8955_PLLEN_MASK                       0x0008  /* PLLEN */
0448 #define WM8955_PLLEN_SHIFT                           3  /* PLLEN */
0449 #define WM8955_PLLEN_WIDTH                           1  /* PLLEN */
0450 
0451 /*
0452  * R44 (0x2C) - PLL Control 1
0453  */
0454 #define WM8955_N_MASK                           0x01E0  /* N - [8:5] */
0455 #define WM8955_N_SHIFT                               5  /* N - [8:5] */
0456 #define WM8955_N_WIDTH                               4  /* N - [8:5] */
0457 #define WM8955_K_21_18_MASK                     0x000F  /* K(21:18) - [3:0] */
0458 #define WM8955_K_21_18_SHIFT                         0  /* K(21:18) - [3:0] */
0459 #define WM8955_K_21_18_WIDTH                         4  /* K(21:18) - [3:0] */
0460 
0461 /*
0462  * R45 (0x2D) - PLL Control 2
0463  */
0464 #define WM8955_K_17_9_MASK                      0x01FF  /* K(17:9) - [8:0] */
0465 #define WM8955_K_17_9_SHIFT                          0  /* K(17:9) - [8:0] */
0466 #define WM8955_K_17_9_WIDTH                          9  /* K(17:9) - [8:0] */
0467 
0468 /*
0469  * R46 (0x2E) - PLL Control 3
0470  */
0471 #define WM8955_K_8_0_MASK                       0x01FF  /* K(8:0) - [8:0] */
0472 #define WM8955_K_8_0_SHIFT                           0  /* K(8:0) - [8:0] */
0473 #define WM8955_K_8_0_WIDTH                           9  /* K(8:0) - [8:0] */
0474 
0475 /*
0476  * R59 (0x3B) - PLL Control 4
0477  */
0478 #define WM8955_KEN                              0x0080  /* KEN */
0479 #define WM8955_KEN_MASK                         0x0080  /* KEN */
0480 #define WM8955_KEN_SHIFT                             7  /* KEN */
0481 #define WM8955_KEN_WIDTH                             1  /* KEN */
0482 
0483 #endif