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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * wm8940.c  --  WM8940 ALSA Soc Audio driver
0004  *
0005  * Author: Jonathan Cameron <jic23@cam.ac.uk>
0006  *
0007  * Based on wm8510.c
0008  *    Copyright  2006 Wolfson Microelectronics PLC.
0009  *    Author:  Liam Girdwood <lrg@slimlogic.co.uk>
0010  *
0011  * Not currently handled:
0012  * Notch filter control
0013  * AUXMode (inverting vs mixer)
0014  * No means to obtain current gain if alc enabled.
0015  * No use made of gpio
0016  * Fast VMID discharge for power down
0017  * Soft Start
0018  * DLR and ALR Swaps not enabled
0019  * Digital Sidetone not supported
0020  */
0021 #include <linux/module.h>
0022 #include <linux/moduleparam.h>
0023 #include <linux/kernel.h>
0024 #include <linux/init.h>
0025 #include <linux/delay.h>
0026 #include <linux/pm.h>
0027 #include <linux/i2c.h>
0028 #include <linux/regmap.h>
0029 #include <linux/slab.h>
0030 #include <sound/core.h>
0031 #include <sound/pcm.h>
0032 #include <sound/pcm_params.h>
0033 #include <sound/soc.h>
0034 #include <sound/initval.h>
0035 #include <sound/tlv.h>
0036 
0037 #include "wm8940.h"
0038 
0039 struct wm8940_priv {
0040     unsigned int sysclk;
0041     struct regmap *regmap;
0042 };
0043 
0044 static bool wm8940_volatile_register(struct device *dev, unsigned int reg)
0045 {
0046     switch (reg) {
0047     case WM8940_SOFTRESET:
0048         return true;
0049     default:
0050         return false;
0051     }
0052 }
0053 
0054 static bool wm8940_readable_register(struct device *dev, unsigned int reg)
0055 {
0056     switch (reg) {
0057     case WM8940_SOFTRESET:
0058     case WM8940_POWER1:
0059     case WM8940_POWER2:
0060     case WM8940_POWER3:
0061     case WM8940_IFACE:
0062     case WM8940_COMPANDINGCTL:
0063     case WM8940_CLOCK:
0064     case WM8940_ADDCNTRL:
0065     case WM8940_GPIO:
0066     case WM8940_CTLINT:
0067     case WM8940_DAC:
0068     case WM8940_DACVOL:
0069     case WM8940_ADC:
0070     case WM8940_ADCVOL:
0071     case WM8940_NOTCH1:
0072     case WM8940_NOTCH2:
0073     case WM8940_NOTCH3:
0074     case WM8940_NOTCH4:
0075     case WM8940_NOTCH5:
0076     case WM8940_NOTCH6:
0077     case WM8940_NOTCH7:
0078     case WM8940_NOTCH8:
0079     case WM8940_DACLIM1:
0080     case WM8940_DACLIM2:
0081     case WM8940_ALC1:
0082     case WM8940_ALC2:
0083     case WM8940_ALC3:
0084     case WM8940_NOISEGATE:
0085     case WM8940_PLLN:
0086     case WM8940_PLLK1:
0087     case WM8940_PLLK2:
0088     case WM8940_PLLK3:
0089     case WM8940_ALC4:
0090     case WM8940_INPUTCTL:
0091     case WM8940_PGAGAIN:
0092     case WM8940_ADCBOOST:
0093     case WM8940_OUTPUTCTL:
0094     case WM8940_SPKMIX:
0095     case WM8940_SPKVOL:
0096     case WM8940_MONOMIX:
0097         return true;
0098     default:
0099         return false;
0100     }
0101 }
0102 
0103 static const struct reg_default wm8940_reg_defaults[] = {
0104     {  0x1, 0x0000 }, /* Power 1 */
0105     {  0x2, 0x0000 }, /* Power 2 */
0106     {  0x3, 0x0000 }, /* Power 3 */
0107     {  0x4, 0x0010 }, /* Interface Control */
0108     {  0x5, 0x0000 }, /* Companding Control */
0109     {  0x6, 0x0140 }, /* Clock Control */
0110     {  0x7, 0x0000 }, /* Additional Controls */
0111     {  0x8, 0x0000 }, /* GPIO Control */
0112     {  0x9, 0x0002 }, /* Auto Increment Control */
0113     {  0xa, 0x0000 }, /* DAC Control */
0114     {  0xb, 0x00FF }, /* DAC Volume */
0115 
0116     {  0xe, 0x0100 }, /* ADC Control */
0117     {  0xf, 0x00FF }, /* ADC Volume */
0118     { 0x10, 0x0000 }, /* Notch Filter 1 Control 1 */
0119     { 0x11, 0x0000 }, /* Notch Filter 1 Control 2 */
0120     { 0x12, 0x0000 }, /* Notch Filter 2 Control 1 */
0121     { 0x13, 0x0000 }, /* Notch Filter 2 Control 2 */
0122     { 0x14, 0x0000 }, /* Notch Filter 3 Control 1 */
0123     { 0x15, 0x0000 }, /* Notch Filter 3 Control 2 */
0124     { 0x16, 0x0000 }, /* Notch Filter 4 Control 1 */
0125     { 0x17, 0x0000 }, /* Notch Filter 4 Control 2 */
0126     { 0x18, 0x0032 }, /* DAC Limit Control 1 */
0127     { 0x19, 0x0000 }, /* DAC Limit Control 2 */
0128 
0129     { 0x20, 0x0038 }, /* ALC Control 1 */
0130     { 0x21, 0x000B }, /* ALC Control 2 */
0131     { 0x22, 0x0032 }, /* ALC Control 3 */
0132     { 0x23, 0x0000 }, /* Noise Gate */
0133     { 0x24, 0x0041 }, /* PLLN */
0134     { 0x25, 0x000C }, /* PLLK1 */
0135     { 0x26, 0x0093 }, /* PLLK2 */
0136     { 0x27, 0x00E9 }, /* PLLK3 */
0137 
0138     { 0x2a, 0x0030 }, /* ALC Control 4 */
0139 
0140     { 0x2c, 0x0002 }, /* Input Control */
0141     { 0x2d, 0x0050 }, /* PGA Gain */
0142 
0143     { 0x2f, 0x0002 }, /* ADC Boost Control */
0144 
0145     { 0x31, 0x0002 }, /* Output Control */
0146     { 0x32, 0x0000 }, /* Speaker Mixer Control */
0147 
0148     { 0x36, 0x0079 }, /* Speaker Volume */
0149 
0150     { 0x38, 0x0000 }, /* Mono Mixer Control */
0151 };
0152 
0153 static const char *wm8940_companding[] = { "Off", "NC", "u-law", "A-law" };
0154 static SOC_ENUM_SINGLE_DECL(wm8940_adc_companding_enum,
0155                 WM8940_COMPANDINGCTL, 1, wm8940_companding);
0156 static SOC_ENUM_SINGLE_DECL(wm8940_dac_companding_enum,
0157                 WM8940_COMPANDINGCTL, 3, wm8940_companding);
0158 
0159 static const char *wm8940_alc_mode_text[] = {"ALC", "Limiter"};
0160 static SOC_ENUM_SINGLE_DECL(wm8940_alc_mode_enum,
0161                 WM8940_ALC3, 8, wm8940_alc_mode_text);
0162 
0163 static const char *wm8940_mic_bias_level_text[] = {"0.9", "0.65"};
0164 static SOC_ENUM_SINGLE_DECL(wm8940_mic_bias_level_enum,
0165                 WM8940_INPUTCTL, 8, wm8940_mic_bias_level_text);
0166 
0167 static const char *wm8940_filter_mode_text[] = {"Audio", "Application"};
0168 static SOC_ENUM_SINGLE_DECL(wm8940_filter_mode_enum,
0169                 WM8940_ADC, 7, wm8940_filter_mode_text);
0170 
0171 static DECLARE_TLV_DB_SCALE(wm8940_spk_vol_tlv, -5700, 100, 1);
0172 static DECLARE_TLV_DB_SCALE(wm8940_att_tlv, -1000, 1000, 0);
0173 static DECLARE_TLV_DB_SCALE(wm8940_pga_vol_tlv, -1200, 75, 0);
0174 static DECLARE_TLV_DB_SCALE(wm8940_alc_min_tlv, -1200, 600, 0);
0175 static DECLARE_TLV_DB_SCALE(wm8940_alc_max_tlv, 675, 600, 0);
0176 static DECLARE_TLV_DB_SCALE(wm8940_alc_tar_tlv, -2250, 50, 0);
0177 static DECLARE_TLV_DB_SCALE(wm8940_lim_boost_tlv, 0, 100, 0);
0178 static DECLARE_TLV_DB_SCALE(wm8940_lim_thresh_tlv, -600, 100, 0);
0179 static DECLARE_TLV_DB_SCALE(wm8940_adc_tlv, -12750, 50, 1);
0180 static DECLARE_TLV_DB_SCALE(wm8940_capture_boost_vol_tlv, 0, 2000, 0);
0181 
0182 static const struct snd_kcontrol_new wm8940_snd_controls[] = {
0183     SOC_SINGLE("Digital Loopback Switch", WM8940_COMPANDINGCTL,
0184            6, 1, 0),
0185     SOC_ENUM("DAC Companding", wm8940_dac_companding_enum),
0186     SOC_ENUM("ADC Companding", wm8940_adc_companding_enum),
0187 
0188     SOC_ENUM("ALC Mode", wm8940_alc_mode_enum),
0189     SOC_SINGLE("ALC Switch", WM8940_ALC1, 8, 1, 0),
0190     SOC_SINGLE_TLV("ALC Capture Max Gain", WM8940_ALC1,
0191                3, 7, 1, wm8940_alc_max_tlv),
0192     SOC_SINGLE_TLV("ALC Capture Min Gain", WM8940_ALC1,
0193                0, 7, 0, wm8940_alc_min_tlv),
0194     SOC_SINGLE_TLV("ALC Capture Target", WM8940_ALC2,
0195                0, 14, 0, wm8940_alc_tar_tlv),
0196     SOC_SINGLE("ALC Capture Hold", WM8940_ALC2, 4, 10, 0),
0197     SOC_SINGLE("ALC Capture Decay", WM8940_ALC3, 4, 10, 0),
0198     SOC_SINGLE("ALC Capture Attach", WM8940_ALC3, 0, 10, 0),
0199     SOC_SINGLE("ALC ZC Switch", WM8940_ALC4, 1, 1, 0),
0200     SOC_SINGLE("ALC Capture Noise Gate Switch", WM8940_NOISEGATE,
0201            3, 1, 0),
0202     SOC_SINGLE("ALC Capture Noise Gate Threshold", WM8940_NOISEGATE,
0203            0, 7, 0),
0204 
0205     SOC_SINGLE("DAC Playback Limiter Switch", WM8940_DACLIM1, 8, 1, 0),
0206     SOC_SINGLE("DAC Playback Limiter Attack", WM8940_DACLIM1, 0, 9, 0),
0207     SOC_SINGLE("DAC Playback Limiter Decay", WM8940_DACLIM1, 4, 11, 0),
0208     SOC_SINGLE_TLV("DAC Playback Limiter Threshold", WM8940_DACLIM2,
0209                4, 9, 1, wm8940_lim_thresh_tlv),
0210     SOC_SINGLE_TLV("DAC Playback Limiter Boost", WM8940_DACLIM2,
0211                0, 12, 0, wm8940_lim_boost_tlv),
0212 
0213     SOC_SINGLE("Capture PGA ZC Switch", WM8940_PGAGAIN, 7, 1, 0),
0214     SOC_SINGLE_TLV("Capture PGA Volume", WM8940_PGAGAIN,
0215                0, 63, 0, wm8940_pga_vol_tlv),
0216     SOC_SINGLE_TLV("Digital Playback Volume", WM8940_DACVOL,
0217                0, 255, 0, wm8940_adc_tlv),
0218     SOC_SINGLE_TLV("Digital Capture Volume", WM8940_ADCVOL,
0219                0, 255, 0, wm8940_adc_tlv),
0220     SOC_ENUM("Mic Bias Level", wm8940_mic_bias_level_enum),
0221     SOC_SINGLE_TLV("Capture Boost Volue", WM8940_ADCBOOST,
0222                8, 1, 0, wm8940_capture_boost_vol_tlv),
0223     SOC_SINGLE_TLV("Speaker Playback Volume", WM8940_SPKVOL,
0224                0, 63, 0, wm8940_spk_vol_tlv),
0225     SOC_SINGLE("Speaker Playback Switch", WM8940_SPKVOL,  6, 1, 1),
0226 
0227     SOC_SINGLE_TLV("Speaker Mixer Line Bypass Volume", WM8940_SPKVOL,
0228                8, 1, 1, wm8940_att_tlv),
0229     SOC_SINGLE("Speaker Playback ZC Switch", WM8940_SPKVOL, 7, 1, 0),
0230 
0231     SOC_SINGLE("Mono Out Switch", WM8940_MONOMIX, 6, 1, 1),
0232     SOC_SINGLE_TLV("Mono Mixer Line Bypass Volume", WM8940_MONOMIX,
0233                7, 1, 1, wm8940_att_tlv),
0234 
0235     SOC_SINGLE("High Pass Filter Switch", WM8940_ADC, 8, 1, 0),
0236     SOC_ENUM("High Pass Filter Mode", wm8940_filter_mode_enum),
0237     SOC_SINGLE("High Pass Filter Cut Off", WM8940_ADC, 4, 7, 0),
0238     SOC_SINGLE("ADC Inversion Switch", WM8940_ADC, 0, 1, 0),
0239     SOC_SINGLE("DAC Inversion Switch", WM8940_DAC, 0, 1, 0),
0240     SOC_SINGLE("DAC Auto Mute Switch", WM8940_DAC, 2, 1, 0),
0241     SOC_SINGLE("ZC Timeout Clock Switch", WM8940_ADDCNTRL, 0, 1, 0),
0242 };
0243 
0244 static const struct snd_kcontrol_new wm8940_speaker_mixer_controls[] = {
0245     SOC_DAPM_SINGLE("Line Bypass Switch", WM8940_SPKMIX, 1, 1, 0),
0246     SOC_DAPM_SINGLE("Aux Playback Switch", WM8940_SPKMIX, 5, 1, 0),
0247     SOC_DAPM_SINGLE("PCM Playback Switch", WM8940_SPKMIX, 0, 1, 0),
0248 };
0249 
0250 static const struct snd_kcontrol_new wm8940_mono_mixer_controls[] = {
0251     SOC_DAPM_SINGLE("Line Bypass Switch", WM8940_MONOMIX, 1, 1, 0),
0252     SOC_DAPM_SINGLE("Aux Playback Switch", WM8940_MONOMIX, 2, 1, 0),
0253     SOC_DAPM_SINGLE("PCM Playback Switch", WM8940_MONOMIX, 0, 1, 0),
0254 };
0255 
0256 static DECLARE_TLV_DB_SCALE(wm8940_boost_vol_tlv, -1500, 300, 1);
0257 static const struct snd_kcontrol_new wm8940_input_boost_controls[] = {
0258     SOC_DAPM_SINGLE("Mic PGA Switch", WM8940_PGAGAIN, 6, 1, 1),
0259     SOC_DAPM_SINGLE_TLV("Aux Volume", WM8940_ADCBOOST,
0260                 0, 7, 0, wm8940_boost_vol_tlv),
0261     SOC_DAPM_SINGLE_TLV("Mic Volume", WM8940_ADCBOOST,
0262                 4, 7, 0, wm8940_boost_vol_tlv),
0263 };
0264 
0265 static const struct snd_kcontrol_new wm8940_micpga_controls[] = {
0266     SOC_DAPM_SINGLE("AUX Switch", WM8940_INPUTCTL, 2, 1, 0),
0267     SOC_DAPM_SINGLE("MICP Switch", WM8940_INPUTCTL, 0, 1, 0),
0268     SOC_DAPM_SINGLE("MICN Switch", WM8940_INPUTCTL, 1, 1, 0),
0269 };
0270 
0271 static const struct snd_soc_dapm_widget wm8940_dapm_widgets[] = {
0272     SND_SOC_DAPM_MIXER("Speaker Mixer", WM8940_POWER3, 2, 0,
0273                &wm8940_speaker_mixer_controls[0],
0274                ARRAY_SIZE(wm8940_speaker_mixer_controls)),
0275     SND_SOC_DAPM_MIXER("Mono Mixer", WM8940_POWER3, 3, 0,
0276                &wm8940_mono_mixer_controls[0],
0277                ARRAY_SIZE(wm8940_mono_mixer_controls)),
0278     SND_SOC_DAPM_DAC("DAC", "HiFi Playback", WM8940_POWER3, 0, 0),
0279 
0280     SND_SOC_DAPM_PGA("SpkN Out", WM8940_POWER3, 5, 0, NULL, 0),
0281     SND_SOC_DAPM_PGA("SpkP Out", WM8940_POWER3, 6, 0, NULL, 0),
0282     SND_SOC_DAPM_PGA("Mono Out", WM8940_POWER3, 7, 0, NULL, 0),
0283     SND_SOC_DAPM_OUTPUT("MONOOUT"),
0284     SND_SOC_DAPM_OUTPUT("SPKOUTP"),
0285     SND_SOC_DAPM_OUTPUT("SPKOUTN"),
0286 
0287     SND_SOC_DAPM_PGA("Aux Input", WM8940_POWER1, 6, 0, NULL, 0),
0288     SND_SOC_DAPM_ADC("ADC", "HiFi Capture", WM8940_POWER2, 0, 0),
0289     SND_SOC_DAPM_MIXER("Mic PGA", WM8940_POWER2, 2, 0,
0290                &wm8940_micpga_controls[0],
0291                ARRAY_SIZE(wm8940_micpga_controls)),
0292     SND_SOC_DAPM_MIXER("Boost Mixer", WM8940_POWER2, 4, 0,
0293                &wm8940_input_boost_controls[0],
0294                ARRAY_SIZE(wm8940_input_boost_controls)),
0295     SND_SOC_DAPM_MICBIAS("Mic Bias", WM8940_POWER1, 4, 0),
0296 
0297     SND_SOC_DAPM_INPUT("MICN"),
0298     SND_SOC_DAPM_INPUT("MICP"),
0299     SND_SOC_DAPM_INPUT("AUX"),
0300 };
0301 
0302 static const struct snd_soc_dapm_route wm8940_dapm_routes[] = {
0303     /* Mono output mixer */
0304     {"Mono Mixer", "PCM Playback Switch", "DAC"},
0305     {"Mono Mixer", "Aux Playback Switch", "Aux Input"},
0306     {"Mono Mixer", "Line Bypass Switch", "Boost Mixer"},
0307 
0308     /* Speaker output mixer */
0309     {"Speaker Mixer", "PCM Playback Switch", "DAC"},
0310     {"Speaker Mixer", "Aux Playback Switch", "Aux Input"},
0311     {"Speaker Mixer", "Line Bypass Switch", "Boost Mixer"},
0312 
0313     /* Outputs */
0314     {"Mono Out", NULL, "Mono Mixer"},
0315     {"MONOOUT", NULL, "Mono Out"},
0316     {"SpkN Out", NULL, "Speaker Mixer"},
0317     {"SpkP Out", NULL, "Speaker Mixer"},
0318     {"SPKOUTN", NULL, "SpkN Out"},
0319     {"SPKOUTP", NULL, "SpkP Out"},
0320 
0321     /*  Microphone PGA */
0322     {"Mic PGA", "MICN Switch", "MICN"},
0323     {"Mic PGA", "MICP Switch", "MICP"},
0324     {"Mic PGA", "AUX Switch", "AUX"},
0325 
0326     /* Boost Mixer */
0327     {"Boost Mixer", "Mic PGA Switch", "Mic PGA"},
0328     {"Boost Mixer", "Mic Volume",  "MICP"},
0329     {"Boost Mixer", "Aux Volume", "Aux Input"},
0330 
0331     {"ADC", NULL, "Boost Mixer"},
0332 };
0333 
0334 #define wm8940_reset(c) snd_soc_component_write(c, WM8940_SOFTRESET, 0);
0335 
0336 static int wm8940_set_dai_fmt(struct snd_soc_dai *codec_dai,
0337                   unsigned int fmt)
0338 {
0339     struct snd_soc_component *component = codec_dai->component;
0340     u16 iface = snd_soc_component_read(component, WM8940_IFACE) & 0xFE67;
0341     u16 clk = snd_soc_component_read(component, WM8940_CLOCK) & 0x1fe;
0342 
0343     switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
0344     case SND_SOC_DAIFMT_CBM_CFM:
0345         clk |= 1;
0346         break;
0347     case SND_SOC_DAIFMT_CBS_CFS:
0348         break;
0349     default:
0350         return -EINVAL;
0351     }
0352     snd_soc_component_write(component, WM8940_CLOCK, clk);
0353 
0354     switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
0355     case SND_SOC_DAIFMT_I2S:
0356         iface |= (2 << 3);
0357         break;
0358     case SND_SOC_DAIFMT_LEFT_J:
0359         iface |= (1 << 3);
0360         break;
0361     case SND_SOC_DAIFMT_RIGHT_J:
0362         break;
0363     case SND_SOC_DAIFMT_DSP_A:
0364         iface |= (3 << 3);
0365         break;
0366     case SND_SOC_DAIFMT_DSP_B:
0367         iface |= (3 << 3) | (1 << 7);
0368         break;
0369     }
0370 
0371     switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
0372     case SND_SOC_DAIFMT_NB_NF:
0373         break;
0374     case SND_SOC_DAIFMT_NB_IF:
0375         iface |= (1 << 7);
0376         break;
0377     case SND_SOC_DAIFMT_IB_NF:
0378         iface |= (1 << 8);
0379         break;
0380     case SND_SOC_DAIFMT_IB_IF:
0381         iface |= (1 << 8) | (1 << 7);
0382         break;
0383     }
0384 
0385     snd_soc_component_write(component, WM8940_IFACE, iface);
0386 
0387     return 0;
0388 }
0389 
0390 static int wm8940_i2s_hw_params(struct snd_pcm_substream *substream,
0391                 struct snd_pcm_hw_params *params,
0392                 struct snd_soc_dai *dai)
0393 {
0394     struct snd_soc_component *component = dai->component;
0395     u16 iface = snd_soc_component_read(component, WM8940_IFACE) & 0xFD9F;
0396     u16 addcntrl = snd_soc_component_read(component, WM8940_ADDCNTRL) & 0xFFF1;
0397     u16 companding =  snd_soc_component_read(component,
0398                         WM8940_COMPANDINGCTL) & 0xFFDF;
0399     int ret;
0400 
0401     /* LoutR control */
0402     if (substream->stream == SNDRV_PCM_STREAM_CAPTURE
0403         && params_channels(params) == 2)
0404         iface |= (1 << 9);
0405 
0406     switch (params_rate(params)) {
0407     case 8000:
0408         addcntrl |= (0x5 << 1);
0409         break;
0410     case 11025:
0411         addcntrl |= (0x4 << 1);
0412         break;
0413     case 16000:
0414         addcntrl |= (0x3 << 1);
0415         break;
0416     case 22050:
0417         addcntrl |= (0x2 << 1);
0418         break;
0419     case 32000:
0420         addcntrl |= (0x1 << 1);
0421         break;
0422     case 44100:
0423     case 48000:
0424         break;
0425     }
0426     ret = snd_soc_component_write(component, WM8940_ADDCNTRL, addcntrl);
0427     if (ret)
0428         goto error_ret;
0429 
0430     switch (params_width(params)) {
0431     case 8:
0432         companding = companding | (1 << 5);
0433         break;
0434     case 16:
0435         break;
0436     case 20:
0437         iface |= (1 << 5);
0438         break;
0439     case 24:
0440         iface |= (2 << 5);
0441         break;
0442     case 32:
0443         iface |= (3 << 5);
0444         break;
0445     }
0446     ret = snd_soc_component_write(component, WM8940_COMPANDINGCTL, companding);
0447     if (ret)
0448         goto error_ret;
0449     ret = snd_soc_component_write(component, WM8940_IFACE, iface);
0450 
0451 error_ret:
0452     return ret;
0453 }
0454 
0455 static int wm8940_mute(struct snd_soc_dai *dai, int mute, int direction)
0456 {
0457     struct snd_soc_component *component = dai->component;
0458     u16 mute_reg = snd_soc_component_read(component, WM8940_DAC) & 0xffbf;
0459 
0460     if (mute)
0461         mute_reg |= 0x40;
0462 
0463     return snd_soc_component_write(component, WM8940_DAC, mute_reg);
0464 }
0465 
0466 static int wm8940_set_bias_level(struct snd_soc_component *component,
0467                  enum snd_soc_bias_level level)
0468 {
0469     struct wm8940_priv *wm8940 = snd_soc_component_get_drvdata(component);
0470     u16 val;
0471     u16 pwr_reg = snd_soc_component_read(component, WM8940_POWER1) & 0x1F0;
0472     int ret = 0;
0473 
0474     switch (level) {
0475     case SND_SOC_BIAS_ON:
0476         /* ensure bufioen and biasen */
0477         pwr_reg |= (1 << 2) | (1 << 3);
0478         /* Enable thermal shutdown */
0479         val = snd_soc_component_read(component, WM8940_OUTPUTCTL);
0480         ret = snd_soc_component_write(component, WM8940_OUTPUTCTL, val | 0x2);
0481         if (ret)
0482             break;
0483         /* set vmid to 75k */
0484         ret = snd_soc_component_write(component, WM8940_POWER1, pwr_reg | 0x1);
0485         break;
0486     case SND_SOC_BIAS_PREPARE:
0487         /* ensure bufioen and biasen */
0488         pwr_reg |= (1 << 2) | (1 << 3);
0489         ret = snd_soc_component_write(component, WM8940_POWER1, pwr_reg | 0x1);
0490         break;
0491     case SND_SOC_BIAS_STANDBY:
0492         if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
0493             ret = regcache_sync(wm8940->regmap);
0494             if (ret < 0) {
0495                 dev_err(component->dev, "Failed to sync cache: %d\n", ret);
0496                 return ret;
0497             }
0498         }
0499 
0500         /* ensure bufioen and biasen */
0501         pwr_reg |= (1 << 2) | (1 << 3);
0502         /* set vmid to 300k for standby */
0503         ret = snd_soc_component_write(component, WM8940_POWER1, pwr_reg | 0x2);
0504         break;
0505     case SND_SOC_BIAS_OFF:
0506         ret = snd_soc_component_write(component, WM8940_POWER1, pwr_reg);
0507         break;
0508     }
0509 
0510     return ret;
0511 }
0512 
0513 struct pll_ {
0514     unsigned int pre_scale:2;
0515     unsigned int n:4;
0516     unsigned int k;
0517 };
0518 
0519 static struct pll_ pll_div;
0520 
0521 /* The size in bits of the pll divide multiplied by 10
0522  * to allow rounding later */
0523 #define FIXED_PLL_SIZE ((1 << 24) * 10)
0524 static void pll_factors(unsigned int target, unsigned int source)
0525 {
0526     unsigned long long Kpart;
0527     unsigned int K, Ndiv, Nmod;
0528     /* The left shift ist to avoid accuracy loss when right shifting */
0529     Ndiv = target / source;
0530 
0531     if (Ndiv > 12) {
0532         source <<= 1;
0533         /* Multiply by 2 */
0534         pll_div.pre_scale = 0;
0535         Ndiv = target / source;
0536     } else if (Ndiv < 3) {
0537         source >>= 2;
0538         /* Divide by 4 */
0539         pll_div.pre_scale = 3;
0540         Ndiv = target / source;
0541     } else if (Ndiv < 6) {
0542         source >>= 1;
0543         /* divide by 2 */
0544         pll_div.pre_scale = 2;
0545         Ndiv = target / source;
0546     } else
0547         pll_div.pre_scale = 1;
0548 
0549     if ((Ndiv < 6) || (Ndiv > 12))
0550         printk(KERN_WARNING
0551             "WM8940 N value %d outwith recommended range!d\n",
0552             Ndiv);
0553 
0554     pll_div.n = Ndiv;
0555     Nmod = target % source;
0556     Kpart = FIXED_PLL_SIZE * (long long)Nmod;
0557 
0558     do_div(Kpart, source);
0559 
0560     K = Kpart & 0xFFFFFFFF;
0561 
0562     /* Check if we need to round */
0563     if ((K % 10) >= 5)
0564         K += 5;
0565 
0566     /* Move down to proper range now rounding is done */
0567     K /= 10;
0568 
0569     pll_div.k = K;
0570 }
0571 
0572 /* Untested at the moment */
0573 static int wm8940_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
0574         int source, unsigned int freq_in, unsigned int freq_out)
0575 {
0576     struct snd_soc_component *component = codec_dai->component;
0577     u16 reg;
0578 
0579     /* Turn off PLL */
0580     reg = snd_soc_component_read(component, WM8940_POWER1);
0581     snd_soc_component_write(component, WM8940_POWER1, reg & 0x1df);
0582 
0583     if (freq_in == 0 || freq_out == 0) {
0584         /* Clock CODEC directly from MCLK */
0585         reg = snd_soc_component_read(component, WM8940_CLOCK);
0586         snd_soc_component_write(component, WM8940_CLOCK, reg & 0x0ff);
0587         /* Pll power down */
0588         snd_soc_component_write(component, WM8940_PLLN, (1 << 7));
0589         return 0;
0590     }
0591 
0592     /* Pll is followed by a frequency divide by 4 */
0593     pll_factors(freq_out*4, freq_in);
0594     if (pll_div.k)
0595         snd_soc_component_write(component, WM8940_PLLN,
0596                  (pll_div.pre_scale << 4) | pll_div.n | (1 << 6));
0597     else /* No factional component */
0598         snd_soc_component_write(component, WM8940_PLLN,
0599                  (pll_div.pre_scale << 4) | pll_div.n);
0600     snd_soc_component_write(component, WM8940_PLLK1, pll_div.k >> 18);
0601     snd_soc_component_write(component, WM8940_PLLK2, (pll_div.k >> 9) & 0x1ff);
0602     snd_soc_component_write(component, WM8940_PLLK3, pll_div.k & 0x1ff);
0603     /* Enable the PLL */
0604     reg = snd_soc_component_read(component, WM8940_POWER1);
0605     snd_soc_component_write(component, WM8940_POWER1, reg | 0x020);
0606 
0607     /* Run CODEC from PLL instead of MCLK */
0608     reg = snd_soc_component_read(component, WM8940_CLOCK);
0609     snd_soc_component_write(component, WM8940_CLOCK, reg | 0x100);
0610 
0611     return 0;
0612 }
0613 
0614 static int wm8940_set_dai_sysclk(struct snd_soc_dai *codec_dai,
0615                  int clk_id, unsigned int freq, int dir)
0616 {
0617     struct snd_soc_component *component = codec_dai->component;
0618     struct wm8940_priv *wm8940 = snd_soc_component_get_drvdata(component);
0619 
0620     switch (freq) {
0621     case 11289600:
0622     case 12000000:
0623     case 12288000:
0624     case 16934400:
0625     case 18432000:
0626         wm8940->sysclk = freq;
0627         return 0;
0628     }
0629     return -EINVAL;
0630 }
0631 
0632 static int wm8940_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
0633                  int div_id, int div)
0634 {
0635     struct snd_soc_component *component = codec_dai->component;
0636     u16 reg;
0637     int ret = 0;
0638 
0639     switch (div_id) {
0640     case WM8940_BCLKDIV:
0641         reg = snd_soc_component_read(component, WM8940_CLOCK) & 0xFFE3;
0642         ret = snd_soc_component_write(component, WM8940_CLOCK, reg | (div << 2));
0643         break;
0644     case WM8940_MCLKDIV:
0645         reg = snd_soc_component_read(component, WM8940_CLOCK) & 0xFF1F;
0646         ret = snd_soc_component_write(component, WM8940_CLOCK, reg | (div << 5));
0647         break;
0648     case WM8940_OPCLKDIV:
0649         reg = snd_soc_component_read(component, WM8940_GPIO) & 0xFFCF;
0650         ret = snd_soc_component_write(component, WM8940_GPIO, reg | (div << 4));
0651         break;
0652     }
0653     return ret;
0654 }
0655 
0656 #define WM8940_RATES SNDRV_PCM_RATE_8000_48000
0657 
0658 #define WM8940_FORMATS (SNDRV_PCM_FMTBIT_S8 |               \
0659             SNDRV_PCM_FMTBIT_S16_LE |           \
0660             SNDRV_PCM_FMTBIT_S20_3LE |          \
0661             SNDRV_PCM_FMTBIT_S24_LE |           \
0662             SNDRV_PCM_FMTBIT_S32_LE)
0663 
0664 static const struct snd_soc_dai_ops wm8940_dai_ops = {
0665     .hw_params = wm8940_i2s_hw_params,
0666     .set_sysclk = wm8940_set_dai_sysclk,
0667     .mute_stream = wm8940_mute,
0668     .set_fmt = wm8940_set_dai_fmt,
0669     .set_clkdiv = wm8940_set_dai_clkdiv,
0670     .set_pll = wm8940_set_dai_pll,
0671     .no_capture_mute = 1,
0672 };
0673 
0674 static struct snd_soc_dai_driver wm8940_dai = {
0675     .name = "wm8940-hifi",
0676     .playback = {
0677         .stream_name = "Playback",
0678         .channels_min = 1,
0679         .channels_max = 2,
0680         .rates = WM8940_RATES,
0681         .formats = WM8940_FORMATS,
0682     },
0683     .capture = {
0684         .stream_name = "Capture",
0685         .channels_min = 1,
0686         .channels_max = 2,
0687         .rates = WM8940_RATES,
0688         .formats = WM8940_FORMATS,
0689     },
0690     .ops = &wm8940_dai_ops,
0691     .symmetric_rate = 1,
0692 };
0693 
0694 static int wm8940_probe(struct snd_soc_component *component)
0695 {
0696     struct wm8940_setup_data *pdata = component->dev->platform_data;
0697     int ret;
0698     u16 reg;
0699 
0700     ret = wm8940_reset(component);
0701     if (ret < 0) {
0702         dev_err(component->dev, "Failed to issue reset\n");
0703         return ret;
0704     }
0705 
0706     snd_soc_component_force_bias_level(component, SND_SOC_BIAS_STANDBY);
0707 
0708     ret = snd_soc_component_write(component, WM8940_POWER1, 0x180);
0709     if (ret < 0)
0710         return ret;
0711 
0712     if (!pdata)
0713         dev_warn(component->dev, "No platform data supplied\n");
0714     else {
0715         reg = snd_soc_component_read(component, WM8940_OUTPUTCTL);
0716         ret = snd_soc_component_write(component, WM8940_OUTPUTCTL, reg | pdata->vroi);
0717         if (ret < 0)
0718             return ret;
0719     }
0720 
0721     return ret;
0722 }
0723 
0724 static const struct snd_soc_component_driver soc_component_dev_wm8940 = {
0725     .probe          = wm8940_probe,
0726     .set_bias_level     = wm8940_set_bias_level,
0727     .controls       = wm8940_snd_controls,
0728     .num_controls       = ARRAY_SIZE(wm8940_snd_controls),
0729     .dapm_widgets       = wm8940_dapm_widgets,
0730     .num_dapm_widgets   = ARRAY_SIZE(wm8940_dapm_widgets),
0731     .dapm_routes        = wm8940_dapm_routes,
0732     .num_dapm_routes    = ARRAY_SIZE(wm8940_dapm_routes),
0733     .suspend_bias_off   = 1,
0734     .idle_bias_on       = 1,
0735     .use_pmdown_time    = 1,
0736     .endianness     = 1,
0737 };
0738 
0739 static const struct regmap_config wm8940_regmap = {
0740     .reg_bits = 8,
0741     .val_bits = 16,
0742 
0743     .max_register = WM8940_MONOMIX,
0744     .reg_defaults = wm8940_reg_defaults,
0745     .num_reg_defaults = ARRAY_SIZE(wm8940_reg_defaults),
0746     .cache_type = REGCACHE_RBTREE,
0747 
0748     .readable_reg = wm8940_readable_register,
0749     .volatile_reg = wm8940_volatile_register,
0750 };
0751 
0752 static int wm8940_i2c_probe(struct i2c_client *i2c)
0753 {
0754     struct wm8940_priv *wm8940;
0755     int ret;
0756 
0757     wm8940 = devm_kzalloc(&i2c->dev, sizeof(struct wm8940_priv),
0758                   GFP_KERNEL);
0759     if (wm8940 == NULL)
0760         return -ENOMEM;
0761 
0762     wm8940->regmap = devm_regmap_init_i2c(i2c, &wm8940_regmap);
0763     if (IS_ERR(wm8940->regmap))
0764         return PTR_ERR(wm8940->regmap);
0765 
0766     i2c_set_clientdata(i2c, wm8940);
0767 
0768     ret = devm_snd_soc_register_component(&i2c->dev,
0769             &soc_component_dev_wm8940, &wm8940_dai, 1);
0770 
0771     return ret;
0772 }
0773 
0774 static const struct i2c_device_id wm8940_i2c_id[] = {
0775     { "wm8940", 0 },
0776     { }
0777 };
0778 MODULE_DEVICE_TABLE(i2c, wm8940_i2c_id);
0779 
0780 static const struct of_device_id wm8940_of_match[] = {
0781     { .compatible = "wlf,wm8940", },
0782     { }
0783 };
0784 MODULE_DEVICE_TABLE(of, wm8940_of_match);
0785 
0786 static struct i2c_driver wm8940_i2c_driver = {
0787     .driver = {
0788         .name = "wm8940",
0789         .of_match_table = wm8940_of_match,
0790     },
0791     .probe_new = wm8940_i2c_probe,
0792     .id_table = wm8940_i2c_id,
0793 };
0794 
0795 module_i2c_driver(wm8940_i2c_driver);
0796 
0797 MODULE_DESCRIPTION("ASoC WM8940 driver");
0798 MODULE_AUTHOR("Jonathan Cameron");
0799 MODULE_LICENSE("GPL");
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