soc/codecs/wm8731.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * wm8731.c  --  WM8731 ALSA SoC Audio driver
0004  *
0005  * Copyright 2005 Openedhand Ltd.
0006  * Copyright 2006-12 Wolfson Microelectronics, plc
0007  *
0008  * Author: Richard Purdie <richard@openedhand.com>
0009  *
0010  * Based on wm8753.c by Liam Girdwood
0011  */
0012
0013 #include <linux/module.h>
0014 #include <linux/moduleparam.h>
0015 #include <linux/init.h>
0016 #include <linux/delay.h>
0017 #include <linux/pm.h>
0018 #include <linux/slab.h>
0019 #include <linux/regmap.h>
0020 #include <linux/regulator/consumer.h>
0021 #include <linux/clk.h>
0022 #include <sound/core.h>
0023 #include <sound/pcm.h>
0024 #include <sound/pcm_params.h>
0025 #include <sound/soc.h>
0026 #include <sound/initval.h>
0027 #include <sound/tlv.h>
0028
0029 #include "wm8731.h"
0030
0031 static const char *wm8731_supply_names[WM8731_NUM_SUPPLIES] = {
0032     "AVDD",
0033     "HPVDD",
0034     "DCVDD",
0035     "DBVDD",
0036 };
0037
0038 /*
0039  * wm8731 register cache
0040  */
0041 static const struct reg_default wm8731_reg_defaults[] = {
0042     { 0, 0x0097 },
0043     { 1, 0x0097 },
0044     { 2, 0x0079 },
0045     { 3, 0x0079 },
0046     { 4, 0x000a },
0047     { 5, 0x0008 },
0048     { 6, 0x009f },
0049     { 7, 0x000a },
0050     { 8, 0x0000 },
0051     { 9, 0x0000 },
0052 };
0053
0054 static bool wm8731_volatile(struct device *dev, unsigned int reg)
0055 {
0056     return reg == WM8731_RESET;
0057 }
0058
0059 #define wm8731_reset(m) regmap_write(m, WM8731_RESET, 0)
0060
0061 static const char *wm8731_input_select[] = {"Line In", "Mic"};
0062
0063 static SOC_ENUM_SINGLE_DECL(wm8731_insel_enum,
0064                 WM8731_APANA, 2, wm8731_input_select);
0065
0066 static int wm8731_deemph[] = { 0, 32000, 44100, 48000 };
0067
0068 static int wm8731_set_deemph(struct snd_soc_component *component)
0069 {
0070     struct wm8731_priv *wm8731 = snd_soc_component_get_drvdata(component);
0071     int val, i, best;
0072
0073     /* If we're using deemphasis select the nearest available sample
0074      * rate.
0075      */
0076     if (wm8731->deemph) {
0077         best = 1;
0078         for (i = 2; i < ARRAY_SIZE(wm8731_deemph); i++) {
0079             if (abs(wm8731_deemph[i] - wm8731->playback_fs) <
0080                 abs(wm8731_deemph[best] - wm8731->playback_fs))
0081                 best = i;
0082         }
0083
0084         val = best << 1;
0085     } else {
0086         best = 0;
0087         val = 0;
0088     }
0089
0090     dev_dbg(component->dev, "Set deemphasis %d (%dHz)\n",
0091         best, wm8731_deemph[best]);
0092
0093     return snd_soc_component_update_bits(component, WM8731_APDIGI, 0x6, val);
0094 }
0095
0096 static int wm8731_get_deemph(struct snd_kcontrol *kcontrol,
0097                  struct snd_ctl_elem_value *ucontrol)
0098 {
0099     struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
0100     struct wm8731_priv *wm8731 = snd_soc_component_get_drvdata(component);
0101
0102     ucontrol->value.integer.value[0] = wm8731->deemph;
0103
0104     return 0;
0105 }
0106
0107 static int wm8731_put_deemph(struct snd_kcontrol *kcontrol,
0108                  struct snd_ctl_elem_value *ucontrol)
0109 {
0110     struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
0111     struct wm8731_priv *wm8731 = snd_soc_component_get_drvdata(component);
0112     unsigned int deemph = ucontrol->value.integer.value[0];
0113     int ret = 0;
0114
0115     if (deemph > 1)
0116         return -EINVAL;
0117
0118     mutex_lock(&wm8731->lock);
0119     if (wm8731->deemph != deemph) {
0120         wm8731->deemph = deemph;
0121
0122         wm8731_set_deemph(component);
0123
0124         ret = 1;
0125     }
0126     mutex_unlock(&wm8731->lock);
0127
0128     return ret;
0129 }
0130
0131 static const DECLARE_TLV_DB_SCALE(in_tlv, -3450, 150, 0);
0132 static const DECLARE_TLV_DB_SCALE(sidetone_tlv, -1500, 300, 0);
0133 static const DECLARE_TLV_DB_SCALE(out_tlv, -12100, 100, 1);
0134 static const DECLARE_TLV_DB_SCALE(mic_tlv, 0, 2000, 0);
0135
0136 static const struct snd_kcontrol_new wm8731_snd_controls[] = {
0137
0138 SOC_DOUBLE_R_TLV("Master Playback Volume", WM8731_LOUT1V, WM8731_ROUT1V,
0139          0, 127, 0, out_tlv),
0140 SOC_DOUBLE_R("Master Playback ZC Switch", WM8731_LOUT1V, WM8731_ROUT1V,
0141     7, 1, 0),
0142
0143 SOC_DOUBLE_R_TLV("Capture Volume", WM8731_LINVOL, WM8731_RINVOL, 0, 31, 0,
0144          in_tlv),
0145 SOC_DOUBLE_R("Line Capture Switch", WM8731_LINVOL, WM8731_RINVOL, 7, 1, 1),
0146
0147 SOC_SINGLE_TLV("Mic Boost Volume", WM8731_APANA, 0, 1, 0, mic_tlv),
0148 SOC_SINGLE("Mic Capture Switch", WM8731_APANA, 1, 1, 1),
0149
0150 SOC_SINGLE_TLV("Sidetone Playback Volume", WM8731_APANA, 6, 3, 1,
0151            sidetone_tlv),
0152
0153 SOC_SINGLE("ADC High Pass Filter Switch", WM8731_APDIGI, 0, 1, 1),
0154 SOC_SINGLE("Store DC Offset Switch", WM8731_APDIGI, 4, 1, 0),
0155
0156 SOC_SINGLE_BOOL_EXT("Playback Deemphasis Switch", 0,
0157             wm8731_get_deemph, wm8731_put_deemph),
0158 };
0159
0160 /* Output Mixer */
0161 static const struct snd_kcontrol_new wm8731_output_mixer_controls[] = {
0162 SOC_DAPM_SINGLE("Line Bypass Switch", WM8731_APANA, 3, 1, 0),
0163 SOC_DAPM_SINGLE("Mic Sidetone Switch", WM8731_APANA, 5, 1, 0),
0164 SOC_DAPM_SINGLE("HiFi Playback Switch", WM8731_APANA, 4, 1, 0),
0165 };
0166
0167 /* Input mux */
0168 static const struct snd_kcontrol_new wm8731_input_mux_controls =
0169 SOC_DAPM_ENUM("Input Select", wm8731_insel_enum);
0170
0171 static const struct snd_soc_dapm_widget wm8731_dapm_widgets[] = {
0172 SND_SOC_DAPM_SUPPLY("ACTIVE",WM8731_ACTIVE, 0, 0, NULL, 0),
0173 SND_SOC_DAPM_SUPPLY("OSC", WM8731_PWR, 5, 1, NULL, 0),
0174 SND_SOC_DAPM_MIXER("Output Mixer", WM8731_PWR, 4, 1,
0175     &wm8731_output_mixer_controls[0],
0176     ARRAY_SIZE(wm8731_output_mixer_controls)),
0177 SND_SOC_DAPM_DAC("DAC", "HiFi Playback", WM8731_PWR, 3, 1),
0178 SND_SOC_DAPM_OUTPUT("LOUT"),
0179 SND_SOC_DAPM_OUTPUT("LHPOUT"),
0180 SND_SOC_DAPM_OUTPUT("ROUT"),
0181 SND_SOC_DAPM_OUTPUT("RHPOUT"),
0182 SND_SOC_DAPM_ADC("ADC", "HiFi Capture", WM8731_PWR, 2, 1),
0183 SND_SOC_DAPM_MUX("Input Mux", SND_SOC_NOPM, 0, 0, &wm8731_input_mux_controls),
0184 SND_SOC_DAPM_PGA("Line Input", WM8731_PWR, 0, 1, NULL, 0),
0185 SND_SOC_DAPM_MICBIAS("Mic Bias", WM8731_PWR, 1, 1),
0186 SND_SOC_DAPM_INPUT("MICIN"),
0187 SND_SOC_DAPM_INPUT("RLINEIN"),
0188 SND_SOC_DAPM_INPUT("LLINEIN"),
0189 };
0190
0191 static int wm8731_check_osc(struct snd_soc_dapm_widget *source,
0192                 struct snd_soc_dapm_widget *sink)
0193 {
0194     struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm);
0195     struct wm8731_priv *wm8731 = snd_soc_component_get_drvdata(component);
0196
0197     return wm8731->sysclk_type == WM8731_SYSCLK_XTAL;
0198 }
0199
0200 static const struct snd_soc_dapm_route wm8731_intercon[] = {
0201     {"DAC", NULL, "OSC", wm8731_check_osc},
0202     {"ADC", NULL, "OSC", wm8731_check_osc},
0203     {"DAC", NULL, "ACTIVE"},
0204     {"ADC", NULL, "ACTIVE"},
0205
0206     /* output mixer */
0207     {"Output Mixer", "Line Bypass Switch", "Line Input"},
0208     {"Output Mixer", "HiFi Playback Switch", "DAC"},
0209     {"Output Mixer", "Mic Sidetone Switch", "Mic Bias"},
0210
0211     /* outputs */
0212     {"RHPOUT", NULL, "Output Mixer"},
0213     {"ROUT", NULL, "Output Mixer"},
0214     {"LHPOUT", NULL, "Output Mixer"},
0215     {"LOUT", NULL, "Output Mixer"},
0216
0217     /* input mux */
0218     {"Input Mux", "Line In", "Line Input"},
0219     {"Input Mux", "Mic", "Mic Bias"},
0220     {"ADC", NULL, "Input Mux"},
0221
0222     /* inputs */
0223     {"Line Input", NULL, "LLINEIN"},
0224     {"Line Input", NULL, "RLINEIN"},
0225     {"Mic Bias", NULL, "MICIN"},
0226 };
0227
0228 struct _coeff_div {
0229     u32 mclk;
0230     u32 rate;
0231     u16 fs;
0232     u8 sr:4;
0233     u8 bosr:1;
0234     u8 usb:1;
0235 };
0236
0237 /* codec mclk clock divider coefficients */
0238 static const struct _coeff_div coeff_div[] = {
0239     /* 48k */
0240     {12288000, 48000, 256, 0x0, 0x0, 0x0},
0241     {18432000, 48000, 384, 0x0, 0x1, 0x0},
0242     {12000000, 48000, 250, 0x0, 0x0, 0x1},
0243
0244     /* 32k */
0245     {12288000, 32000, 384, 0x6, 0x0, 0x0},
0246     {18432000, 32000, 576, 0x6, 0x1, 0x0},
0247     {12000000, 32000, 375, 0x6, 0x0, 0x1},
0248
0249     /* 8k */
0250     {12288000, 8000, 1536, 0x3, 0x0, 0x0},
0251     {18432000, 8000, 2304, 0x3, 0x1, 0x0},
0252     {11289600, 8000, 1408, 0xb, 0x0, 0x0},
0253     {16934400, 8000, 2112, 0xb, 0x1, 0x0},
0254     {12000000, 8000, 1500, 0x3, 0x0, 0x1},
0255
0256     /* 96k */
0257     {12288000, 96000, 128, 0x7, 0x0, 0x0},
0258     {18432000, 96000, 192, 0x7, 0x1, 0x0},
0259     {12000000, 96000, 125, 0x7, 0x0, 0x1},
0260
0261     /* 44.1k */
0262     {11289600, 44100, 256, 0x8, 0x0, 0x0},
0263     {16934400, 44100, 384, 0x8, 0x1, 0x0},
0264     {12000000, 44100, 272, 0x8, 0x1, 0x1},
0265
0266     /* 88.2k */
0267     {11289600, 88200, 128, 0xf, 0x0, 0x0},
0268     {16934400, 88200, 192, 0xf, 0x1, 0x0},
0269     {12000000, 88200, 136, 0xf, 0x1, 0x1},
0270 };
0271
0272 /* rates constraints */
0273 static const unsigned int wm8731_rates_12000000[] = {
0274     8000, 32000, 44100, 48000, 96000, 88200,
0275 };
0276
0277 static const unsigned int wm8731_rates_12288000_18432000[] = {
0278     8000, 32000, 48000, 96000,
0279 };
0280
0281 static const unsigned int wm8731_rates_11289600_16934400[] = {
0282     8000, 44100, 88200,
0283 };
0284
0285 static const struct snd_pcm_hw_constraint_list wm8731_constraints_12000000 = {
0286     .list = wm8731_rates_12000000,
0287     .count = ARRAY_SIZE(wm8731_rates_12000000),
0288 };
0289
0290 static const
0291 struct snd_pcm_hw_constraint_list wm8731_constraints_12288000_18432000 = {
0292     .list = wm8731_rates_12288000_18432000,
0293     .count = ARRAY_SIZE(wm8731_rates_12288000_18432000),
0294 };
0295
0296 static const
0297 struct snd_pcm_hw_constraint_list wm8731_constraints_11289600_16934400 = {
0298     .list = wm8731_rates_11289600_16934400,
0299     .count = ARRAY_SIZE(wm8731_rates_11289600_16934400),
0300 };
0301
0302 static inline int get_coeff(int mclk, int rate)
0303 {
0304     int i;
0305
0306     for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
0307         if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
0308             return i;
0309     }
0310     return 0;
0311 }
0312
0313 static int wm8731_hw_params(struct snd_pcm_substream *substream,
0314                 struct snd_pcm_hw_params *params,
0315                 struct snd_soc_dai *dai)
0316 {
0317     struct snd_soc_component *component = dai->component;
0318     struct wm8731_priv *wm8731 = snd_soc_component_get_drvdata(component);
0319     u16 iface = snd_soc_component_read(component, WM8731_IFACE) & 0xfff3;
0320     int i = get_coeff(wm8731->sysclk, params_rate(params));
0321     u16 srate = (coeff_div[i].sr << 2) |
0322         (coeff_div[i].bosr << 1) | coeff_div[i].usb;
0323
0324     wm8731->playback_fs = params_rate(params);
0325
0326     snd_soc_component_write(component, WM8731_SRATE, srate);
0327
0328     /* bit size */
0329     switch (params_width(params)) {
0330     case 16:
0331         break;
0332     case 20:
0333         iface |= 0x0004;
0334         break;
0335     case 24:
0336         iface |= 0x0008;
0337         break;
0338     case 32:
0339         iface |= 0x000c;
0340         break;
0341     }
0342
0343     wm8731_set_deemph(component);
0344
0345     snd_soc_component_write(component, WM8731_IFACE, iface);
0346     return 0;
0347 }
0348
0349 static int wm8731_mute(struct snd_soc_dai *dai, int mute, int direction)
0350 {
0351     struct snd_soc_component *component = dai->component;
0352     u16 mute_reg = snd_soc_component_read(component, WM8731_APDIGI) & 0xfff7;
0353
0354     if (mute)
0355         snd_soc_component_write(component, WM8731_APDIGI, mute_reg | 0x8);
0356     else
0357         snd_soc_component_write(component, WM8731_APDIGI, mute_reg);
0358     return 0;
0359 }
0360
0361 static int wm8731_set_dai_sysclk(struct snd_soc_dai *codec_dai,
0362         int clk_id, unsigned int freq, int dir)
0363 {
0364     struct snd_soc_component *component = codec_dai->component;
0365     struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
0366     struct wm8731_priv *wm8731 = snd_soc_component_get_drvdata(component);
0367
0368     switch (clk_id) {
0369     case WM8731_SYSCLK_XTAL:
0370     case WM8731_SYSCLK_MCLK:
0371         if (wm8731->mclk && clk_set_rate(wm8731->mclk, freq))
0372             return -EINVAL;
0373         wm8731->sysclk_type = clk_id;
0374         break;
0375     default:
0376         return -EINVAL;
0377     }
0378
0379     switch (freq) {
0380     case 0:
0381         wm8731->constraints = NULL;
0382         break;
0383     case 12000000:
0384         wm8731->constraints = &wm8731_constraints_12000000;
0385         break;
0386     case 12288000:
0387     case 18432000:
0388         wm8731->constraints = &wm8731_constraints_12288000_18432000;
0389         break;
0390     case 16934400:
0391     case 11289600:
0392         wm8731->constraints = &wm8731_constraints_11289600_16934400;
0393         break;
0394     default:
0395         return -EINVAL;
0396     }
0397
0398     wm8731->sysclk = freq;
0399
0400     snd_soc_dapm_sync(dapm);
0401
0402     return 0;
0403 }
0404
0405
0406 static int wm8731_set_dai_fmt(struct snd_soc_dai *codec_dai,
0407         unsigned int fmt)
0408 {
0409     struct snd_soc_component *component = codec_dai->component;
0410     u16 iface = 0;
0411
0412     switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
0413     case SND_SOC_DAIFMT_CBP_CFP:
0414         iface |= 0x0040;
0415         break;
0416     case SND_SOC_DAIFMT_CBC_CFC:
0417         break;
0418     default:
0419         return -EINVAL;
0420     }
0421
0422     /* interface format */
0423     switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
0424     case SND_SOC_DAIFMT_I2S:
0425         iface |= 0x0002;
0426         break;
0427     case SND_SOC_DAIFMT_RIGHT_J:
0428         break;
0429     case SND_SOC_DAIFMT_LEFT_J:
0430         iface |= 0x0001;
0431         break;
0432     case SND_SOC_DAIFMT_DSP_A:
0433         iface |= 0x0013;
0434         break;
0435     case SND_SOC_DAIFMT_DSP_B:
0436         iface |= 0x0003;
0437         break;
0438     default:
0439         return -EINVAL;
0440     }
0441
0442     /* clock inversion */
0443     switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
0444     case SND_SOC_DAIFMT_NB_NF:
0445         break;
0446     case SND_SOC_DAIFMT_IB_IF:
0447         iface |= 0x0090;
0448         break;
0449     case SND_SOC_DAIFMT_IB_NF:
0450         iface |= 0x0080;
0451         break;
0452     case SND_SOC_DAIFMT_NB_IF:
0453         iface |= 0x0010;
0454         break;
0455     default:
0456         return -EINVAL;
0457     }
0458
0459     /* set iface */
0460     snd_soc_component_write(component, WM8731_IFACE, iface);
0461     return 0;
0462 }
0463
0464 static int wm8731_set_bias_level(struct snd_soc_component *component,
0465                  enum snd_soc_bias_level level)
0466 {
0467     struct wm8731_priv *wm8731 = snd_soc_component_get_drvdata(component);
0468     int ret;
0469     u16 reg;
0470
0471     switch (level) {
0472     case SND_SOC_BIAS_ON:
0473         if (wm8731->mclk) {
0474             ret = clk_prepare_enable(wm8731->mclk);
0475             if (ret)
0476                 return ret;
0477         }
0478         break;
0479     case SND_SOC_BIAS_PREPARE:
0480         break;
0481     case SND_SOC_BIAS_STANDBY:
0482         if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
0483             ret = regulator_bulk_enable(ARRAY_SIZE(wm8731->supplies),
0484                             wm8731->supplies);
0485             if (ret != 0)
0486                 return ret;
0487
0488             regcache_sync(wm8731->regmap);
0489         }
0490
0491         /* Clear PWROFF, gate CLKOUT, everything else as-is */
0492         reg = snd_soc_component_read(component, WM8731_PWR) & 0xff7f;
0493         snd_soc_component_write(component, WM8731_PWR, reg | 0x0040);
0494         break;
0495     case SND_SOC_BIAS_OFF:
0496         if (wm8731->mclk)
0497             clk_disable_unprepare(wm8731->mclk);
0498         snd_soc_component_write(component, WM8731_PWR, 0xffff);
0499         regulator_bulk_disable(ARRAY_SIZE(wm8731->supplies),
0500                        wm8731->supplies);
0501         regcache_mark_dirty(wm8731->regmap);
0502         break;
0503     }
0504     return 0;
0505 }
0506
0507 static int wm8731_startup(struct snd_pcm_substream *substream,
0508     struct snd_soc_dai *dai)
0509 {
0510     struct wm8731_priv *wm8731 = snd_soc_component_get_drvdata(dai->component);
0511
0512     if (wm8731->constraints)
0513         snd_pcm_hw_constraint_list(substream->runtime, 0,
0514                        SNDRV_PCM_HW_PARAM_RATE,
0515                        wm8731->constraints);
0516
0517     return 0;
0518 }
0519
0520 #define WM8731_RATES SNDRV_PCM_RATE_8000_96000
0521
0522 #define WM8731_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
0523     SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
0524
0525 static const struct snd_soc_dai_ops wm8731_dai_ops = {
0526     .startup    = wm8731_startup,
0527     .hw_params  = wm8731_hw_params,
0528     .mute_stream    = wm8731_mute,
0529     .set_sysclk = wm8731_set_dai_sysclk,
0530     .set_fmt    = wm8731_set_dai_fmt,
0531     .no_capture_mute = 1,
0532 };
0533
0534 static struct snd_soc_dai_driver wm8731_dai = {
0535     .name = "wm8731-hifi",
0536     .playback = {
0537         .stream_name = "Playback",
0538         .channels_min = 1,
0539         .channels_max = 2,
0540         .rates = WM8731_RATES,
0541         .formats = WM8731_FORMATS,},
0542     .capture = {
0543         .stream_name = "Capture",
0544         .channels_min = 1,
0545         .channels_max = 2,
0546         .rates = WM8731_RATES,
0547         .formats = WM8731_FORMATS,},
0548     .ops = &wm8731_dai_ops,
0549     .symmetric_rate = 1,
0550 };
0551
0552 static const struct snd_soc_component_driver soc_component_dev_wm8731 = {
0553     .set_bias_level     = wm8731_set_bias_level,
0554     .controls       = wm8731_snd_controls,
0555     .num_controls       = ARRAY_SIZE(wm8731_snd_controls),
0556     .dapm_widgets       = wm8731_dapm_widgets,
0557     .num_dapm_widgets   = ARRAY_SIZE(wm8731_dapm_widgets),
0558     .dapm_routes        = wm8731_intercon,
0559     .num_dapm_routes    = ARRAY_SIZE(wm8731_intercon),
0560     .suspend_bias_off   = 1,
0561     .idle_bias_on       = 1,
0562     .use_pmdown_time    = 1,
0563     .endianness     = 1,
0564 };
0565
0566 int wm8731_init(struct device *dev, struct wm8731_priv *wm8731)
0567 {
0568     int ret = 0, i;
0569
0570     wm8731->mclk = devm_clk_get(dev, "mclk");
0571     if (IS_ERR(wm8731->mclk)) {
0572         ret = PTR_ERR(wm8731->mclk);
0573         if (ret == -ENOENT) {
0574             wm8731->mclk = NULL;
0575             dev_warn(dev, "Assuming static MCLK\n");
0576         } else {
0577             dev_err(dev, "Failed to get MCLK: %d\n", ret);
0578             return ret;
0579         }
0580     }
0581
0582     mutex_init(&wm8731->lock);
0583
0584     for (i = 0; i < ARRAY_SIZE(wm8731->supplies); i++)
0585         wm8731->supplies[i].supply = wm8731_supply_names[i];
0586
0587     ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(wm8731->supplies),
0588                  wm8731->supplies);
0589     if (ret != 0) {
0590         dev_err(dev, "Failed to request supplies: %d\n", ret);
0591         return ret;
0592     }
0593
0594     ret = regulator_bulk_enable(ARRAY_SIZE(wm8731->supplies),
0595                     wm8731->supplies);
0596     if (ret != 0) {
0597         dev_err(dev, "Failed to enable supplies: %d\n", ret);
0598         return ret;
0599     }
0600
0601     ret = wm8731_reset(wm8731->regmap);
0602     if (ret < 0) {
0603         dev_err(dev, "Failed to issue reset: %d\n", ret);
0604         goto err_regulator_enable;
0605     }
0606
0607     /* Clear POWEROFF, keep everything else disabled */
0608     regmap_write(wm8731->regmap, WM8731_PWR, 0x7f);
0609
0610     /* Latch the update bits */
0611     regmap_update_bits(wm8731->regmap, WM8731_LOUT1V, 0x100, 0);
0612     regmap_update_bits(wm8731->regmap, WM8731_ROUT1V, 0x100, 0);
0613     regmap_update_bits(wm8731->regmap, WM8731_LINVOL, 0x100, 0);
0614     regmap_update_bits(wm8731->regmap, WM8731_RINVOL, 0x100, 0);
0615
0616     /* Disable bypass path by default */
0617     regmap_update_bits(wm8731->regmap, WM8731_APANA, 0x8, 0);
0618
0619     regcache_mark_dirty(wm8731->regmap);
0620
0621     ret = devm_snd_soc_register_component(dev,
0622             &soc_component_dev_wm8731, &wm8731_dai, 1);
0623     if (ret != 0) {
0624         dev_err(dev, "Failed to register CODEC: %d\n", ret);
0625         goto err_regulator_enable;
0626     }
0627
0628     return 0;
0629
0630 err_regulator_enable:
0631     /* Regulators will be enabled by bias management */
0632     regulator_bulk_disable(ARRAY_SIZE(wm8731->supplies), wm8731->supplies);
0633
0634     return ret;
0635 }
0636 EXPORT_SYMBOL_GPL(wm8731_init);
0637
0638 const struct regmap_config wm8731_regmap = {
0639     .reg_bits = 7,
0640     .val_bits = 9,
0641
0642     .max_register = WM8731_RESET,
0643     .volatile_reg = wm8731_volatile,
0644
0645     .cache_type = REGCACHE_RBTREE,
0646     .reg_defaults = wm8731_reg_defaults,
0647     .num_reg_defaults = ARRAY_SIZE(wm8731_reg_defaults),
0648 };
0649 EXPORT_SYMBOL_GPL(wm8731_regmap);
0650
0651 MODULE_DESCRIPTION("ASoC WM8731 driver");
0652 MODULE_AUTHOR("Richard Purdie");
0653 MODULE_LICENSE("GPL");