soc/codecs/wm8510.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * wm8510.h  --  WM8510 Soc Audio driver
0004  */
0005
0006 #ifndef _WM8510_H
0007 #define _WM8510_H
0008
0009 /* WM8510 register space */
0010
0011 #define WM8510_RESET        0x0
0012 #define WM8510_POWER1       0x1
0013 #define WM8510_POWER2       0x2
0014 #define WM8510_POWER3       0x3
0015 #define WM8510_IFACE        0x4
0016 #define WM8510_COMP         0x5
0017 #define WM8510_CLOCK        0x6
0018 #define WM8510_ADD          0x7
0019 #define WM8510_GPIO         0x8
0020 #define WM8510_DAC          0xa
0021 #define WM8510_DACVOL       0xb
0022 #define WM8510_ADC          0xe
0023 #define WM8510_ADCVOL       0xf
0024 #define WM8510_EQ1          0x12
0025 #define WM8510_EQ2          0x13
0026 #define WM8510_EQ3          0x14
0027 #define WM8510_EQ4          0x15
0028 #define WM8510_EQ5          0x16
0029 #define WM8510_DACLIM1      0x18
0030 #define WM8510_DACLIM2      0x19
0031 #define WM8510_NOTCH1       0x1b
0032 #define WM8510_NOTCH2       0x1c
0033 #define WM8510_NOTCH3       0x1d
0034 #define WM8510_NOTCH4       0x1e
0035 #define WM8510_ALC1         0x20
0036 #define WM8510_ALC2         0x21
0037 #define WM8510_ALC3         0x22
0038 #define WM8510_NGATE        0x23
0039 #define WM8510_PLLN         0x24
0040 #define WM8510_PLLK1        0x25
0041 #define WM8510_PLLK2        0x26
0042 #define WM8510_PLLK3        0x27
0043 #define WM8510_ATTEN        0x28
0044 #define WM8510_INPUT        0x2c
0045 #define WM8510_INPPGA       0x2d
0046 #define WM8510_ADCBOOST     0x2f
0047 #define WM8510_OUTPUT       0x31
0048 #define WM8510_SPKMIX       0x32
0049 #define WM8510_SPKVOL       0x36
0050 #define WM8510_MONOMIX      0x38
0051
0052 #define WM8510_CACHEREGNUM  57
0053
0054 /* Clock divider Id's */
0055 #define WM8510_OPCLKDIV     0
0056 #define WM8510_MCLKDIV      1
0057 #define WM8510_ADCCLK       2
0058 #define WM8510_DACCLK       3
0059 #define WM8510_BCLKDIV      4
0060
0061 /* DAC clock dividers */
0062 #define WM8510_DACCLK_F2    (1 << 3)
0063 #define WM8510_DACCLK_F4    (0 << 3)
0064
0065 /* ADC clock dividers */
0066 #define WM8510_ADCCLK_F2    (1 << 3)
0067 #define WM8510_ADCCLK_F4    (0 << 3)
0068
0069 /* PLL Out dividers */
0070 #define WM8510_OPCLKDIV_1   (0 << 4)
0071 #define WM8510_OPCLKDIV_2   (1 << 4)
0072 #define WM8510_OPCLKDIV_3   (2 << 4)
0073 #define WM8510_OPCLKDIV_4   (3 << 4)
0074
0075 /* BCLK clock dividers */
0076 #define WM8510_BCLKDIV_1    (0 << 2)
0077 #define WM8510_BCLKDIV_2    (1 << 2)
0078 #define WM8510_BCLKDIV_4    (2 << 2)
0079 #define WM8510_BCLKDIV_8    (3 << 2)
0080 #define WM8510_BCLKDIV_16   (4 << 2)
0081 #define WM8510_BCLKDIV_32   (5 << 2)
0082
0083 /* MCLK clock dividers */
0084 #define WM8510_MCLKDIV_1    (0 << 5)
0085 #define WM8510_MCLKDIV_1_5  (1 << 5)
0086 #define WM8510_MCLKDIV_2    (2 << 5)
0087 #define WM8510_MCLKDIV_3    (3 << 5)
0088 #define WM8510_MCLKDIV_4    (4 << 5)
0089 #define WM8510_MCLKDIV_6    (5 << 5)
0090 #define WM8510_MCLKDIV_8    (6 << 5)
0091 #define WM8510_MCLKDIV_12   (7 << 5)
0092
0093 struct wm8510_setup_data {
0094     int spi;
0095     int i2c_bus;
0096     unsigned short i2c_address;
0097 };
0098
0099 #endif