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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * uda134x.c  --  UDA134X ALSA SoC Codec driver
0004  *
0005  * Modifications by Christian Pellegrin <chripell@evolware.org>
0006  *
0007  * Copyright 2007 Dension Audio Systems Ltd.
0008  * Author: Zoltan Devai
0009  *
0010  * Based on the WM87xx drivers by Liam Girdwood and Richard Purdie
0011  */
0012 
0013 #include <linux/module.h>
0014 #include <linux/delay.h>
0015 #include <linux/slab.h>
0016 #include <sound/pcm.h>
0017 #include <sound/pcm_params.h>
0018 #include <sound/soc.h>
0019 #include <sound/initval.h>
0020 
0021 #include <sound/uda134x.h>
0022 #include <sound/l3.h>
0023 
0024 #include "uda134x.h"
0025 
0026 
0027 #define UDA134X_RATES SNDRV_PCM_RATE_8000_48000
0028 #define UDA134X_FORMATS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE | \
0029         SNDRV_PCM_FMTBIT_S18_3LE | SNDRV_PCM_FMTBIT_S20_3LE)
0030 
0031 struct uda134x_priv {
0032     int sysclk;
0033     int dai_fmt;
0034 
0035     struct snd_pcm_substream *master_substream;
0036     struct snd_pcm_substream *slave_substream;
0037 
0038     struct regmap *regmap;
0039     struct uda134x_platform_data *pd;
0040 };
0041 
0042 static const struct reg_default uda134x_reg_defaults[] = {
0043     { UDA134X_EA000, 0x04 },
0044     { UDA134X_EA001, 0x04 },
0045     { UDA134X_EA010, 0x04 },
0046     { UDA134X_EA011, 0x00 },
0047     { UDA134X_EA100, 0x00 },
0048     { UDA134X_EA101, 0x00 },
0049     { UDA134X_EA110, 0x00 },
0050     { UDA134X_EA111, 0x00 },
0051     { UDA134X_STATUS0, 0x00 },
0052     { UDA134X_STATUS1, 0x03 },
0053     { UDA134X_DATA000, 0x00 },
0054     { UDA134X_DATA001, 0x00 },
0055     { UDA134X_DATA010, 0x00 },
0056     { UDA134X_DATA011, 0x00 },
0057     { UDA134X_DATA1, 0x00 },
0058 };
0059 
0060 /*
0061  * Write to the uda134x registers
0062  *
0063  */
0064 static int uda134x_regmap_write(void *context, unsigned int reg,
0065     unsigned int value)
0066 {
0067     struct uda134x_platform_data *pd = context;
0068     int ret;
0069     u8 addr;
0070     u8 data = value;
0071 
0072     switch (reg) {
0073     case UDA134X_STATUS0:
0074     case UDA134X_STATUS1:
0075         addr = UDA134X_STATUS_ADDR;
0076         data |= (reg - UDA134X_STATUS0) << 7;
0077         break;
0078     case UDA134X_DATA000:
0079     case UDA134X_DATA001:
0080     case UDA134X_DATA010:
0081     case UDA134X_DATA011:
0082         addr = UDA134X_DATA0_ADDR;
0083         data |= (reg - UDA134X_DATA000) << 6;
0084         break;
0085     case UDA134X_DATA1:
0086         addr = UDA134X_DATA1_ADDR;
0087         break;
0088     default:
0089         /* It's an extended address register */
0090         addr =  (reg | UDA134X_EXTADDR_PREFIX);
0091 
0092         ret = l3_write(&pd->l3,
0093                    UDA134X_DATA0_ADDR, &addr, 1);
0094         if (ret != 1)
0095             return -EIO;
0096 
0097         addr = UDA134X_DATA0_ADDR;
0098         data = (value | UDA134X_EXTDATA_PREFIX);
0099         break;
0100     }
0101 
0102     ret = l3_write(&pd->l3,
0103                addr, &data, 1);
0104     if (ret != 1)
0105         return -EIO;
0106 
0107     return 0;
0108 }
0109 
0110 static inline void uda134x_reset(struct snd_soc_component *component)
0111 {
0112     struct uda134x_priv *uda134x = snd_soc_component_get_drvdata(component);
0113     unsigned int mask = 1<<6;
0114 
0115     regmap_update_bits(uda134x->regmap, UDA134X_STATUS0, mask, mask);
0116     msleep(1);
0117     regmap_update_bits(uda134x->regmap, UDA134X_STATUS0, mask, 0);
0118 }
0119 
0120 static int uda134x_mute(struct snd_soc_dai *dai, int mute, int direction)
0121 {
0122     struct uda134x_priv *uda134x = snd_soc_component_get_drvdata(dai->component);
0123     unsigned int mask = 1<<2;
0124     unsigned int val;
0125 
0126     pr_debug("%s mute: %d\n", __func__, mute);
0127 
0128     if (mute)
0129         val = mask;
0130     else
0131         val = 0;
0132 
0133     return regmap_update_bits(uda134x->regmap, UDA134X_DATA010, mask, val);
0134 }
0135 
0136 static int uda134x_startup(struct snd_pcm_substream *substream,
0137     struct snd_soc_dai *dai)
0138 {
0139     struct snd_soc_component *component = dai->component;
0140     struct uda134x_priv *uda134x = snd_soc_component_get_drvdata(component);
0141     struct snd_pcm_runtime *master_runtime;
0142 
0143     if (uda134x->master_substream) {
0144         master_runtime = uda134x->master_substream->runtime;
0145 
0146         pr_debug("%s constraining to %d bits at %d\n", __func__,
0147              master_runtime->sample_bits,
0148              master_runtime->rate);
0149 
0150         snd_pcm_hw_constraint_single(substream->runtime,
0151                          SNDRV_PCM_HW_PARAM_RATE,
0152                          master_runtime->rate);
0153 
0154         snd_pcm_hw_constraint_single(substream->runtime,
0155                          SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
0156                          master_runtime->sample_bits);
0157 
0158         uda134x->slave_substream = substream;
0159     } else
0160         uda134x->master_substream = substream;
0161 
0162     return 0;
0163 }
0164 
0165 static void uda134x_shutdown(struct snd_pcm_substream *substream,
0166     struct snd_soc_dai *dai)
0167 {
0168     struct snd_soc_component *component = dai->component;
0169     struct uda134x_priv *uda134x = snd_soc_component_get_drvdata(component);
0170 
0171     if (uda134x->master_substream == substream)
0172         uda134x->master_substream = uda134x->slave_substream;
0173 
0174     uda134x->slave_substream = NULL;
0175 }
0176 
0177 static int uda134x_hw_params(struct snd_pcm_substream *substream,
0178     struct snd_pcm_hw_params *params,
0179     struct snd_soc_dai *dai)
0180 {
0181     struct snd_soc_component *component = dai->component;
0182     struct uda134x_priv *uda134x = snd_soc_component_get_drvdata(component);
0183     unsigned int hw_params = 0;
0184 
0185     if (substream == uda134x->slave_substream) {
0186         pr_debug("%s ignoring hw_params for slave substream\n",
0187              __func__);
0188         return 0;
0189     }
0190 
0191     pr_debug("%s sysclk: %d, rate:%d\n", __func__,
0192          uda134x->sysclk, params_rate(params));
0193 
0194     /* set SYSCLK / fs ratio */
0195     switch (uda134x->sysclk / params_rate(params)) {
0196     case 512:
0197         break;
0198     case 384:
0199         hw_params |= (1<<4);
0200         break;
0201     case 256:
0202         hw_params |= (1<<5);
0203         break;
0204     default:
0205         printk(KERN_ERR "%s unsupported fs\n", __func__);
0206         return -EINVAL;
0207     }
0208 
0209     pr_debug("%s dai_fmt: %d, params_format:%d\n", __func__,
0210          uda134x->dai_fmt, params_format(params));
0211 
0212     /* set DAI format and word length */
0213     switch (uda134x->dai_fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
0214     case SND_SOC_DAIFMT_I2S:
0215         break;
0216     case SND_SOC_DAIFMT_RIGHT_J:
0217         switch (params_width(params)) {
0218         case 16:
0219             hw_params |= (1<<1);
0220             break;
0221         case 18:
0222             hw_params |= (1<<2);
0223             break;
0224         case 20:
0225             hw_params |= ((1<<2) | (1<<1));
0226             break;
0227         default:
0228             printk(KERN_ERR "%s unsupported format (right)\n",
0229                    __func__);
0230             return -EINVAL;
0231         }
0232         break;
0233     case SND_SOC_DAIFMT_LEFT_J:
0234         hw_params |= (1<<3);
0235         break;
0236     default:
0237         printk(KERN_ERR "%s unsupported format\n", __func__);
0238         return -EINVAL;
0239     }
0240 
0241     return regmap_update_bits(uda134x->regmap, UDA134X_STATUS0,
0242         STATUS0_SYSCLK_MASK | STATUS0_DAIFMT_MASK, hw_params);
0243 }
0244 
0245 static int uda134x_set_dai_sysclk(struct snd_soc_dai *codec_dai,
0246                   int clk_id, unsigned int freq, int dir)
0247 {
0248     struct snd_soc_component *component = codec_dai->component;
0249     struct uda134x_priv *uda134x = snd_soc_component_get_drvdata(component);
0250 
0251     pr_debug("%s clk_id: %d, freq: %u, dir: %d\n", __func__,
0252          clk_id, freq, dir);
0253 
0254     /* Anything between 256fs*8Khz and 512fs*48Khz should be acceptable
0255        because the codec is slave. Of course limitations of the clock
0256        master (the IIS controller) apply.
0257        We'll error out on set_hw_params if it's not OK */
0258     if ((freq >= (256 * 8000)) && (freq <= (512 * 48000))) {
0259         uda134x->sysclk = freq;
0260         return 0;
0261     }
0262 
0263     printk(KERN_ERR "%s unsupported sysclk\n", __func__);
0264     return -EINVAL;
0265 }
0266 
0267 static int uda134x_set_dai_fmt(struct snd_soc_dai *codec_dai,
0268                    unsigned int fmt)
0269 {
0270     struct snd_soc_component *component = codec_dai->component;
0271     struct uda134x_priv *uda134x = snd_soc_component_get_drvdata(component);
0272 
0273     pr_debug("%s fmt: %08X\n", __func__, fmt);
0274 
0275     /* codec supports only full consumer mode */
0276     if ((fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) != SND_SOC_DAIFMT_CBC_CFC) {
0277         printk(KERN_ERR "%s unsupported clocking mode\n", __func__);
0278         return -EINVAL;
0279     }
0280 
0281     /* no support for clock inversion */
0282     if ((fmt & SND_SOC_DAIFMT_INV_MASK) != SND_SOC_DAIFMT_NB_NF) {
0283         printk(KERN_ERR "%s unsupported clock inversion\n", __func__);
0284         return -EINVAL;
0285     }
0286 
0287     /* We can't setup DAI format here as it depends on the word bit num */
0288     /* so let's just store the value for later */
0289     uda134x->dai_fmt = fmt;
0290 
0291     return 0;
0292 }
0293 
0294 static int uda134x_set_bias_level(struct snd_soc_component *component,
0295                   enum snd_soc_bias_level level)
0296 {
0297     struct uda134x_priv *uda134x = snd_soc_component_get_drvdata(component);
0298     struct uda134x_platform_data *pd = uda134x->pd;
0299     pr_debug("%s bias level %d\n", __func__, level);
0300 
0301     switch (level) {
0302     case SND_SOC_BIAS_ON:
0303         break;
0304     case SND_SOC_BIAS_PREPARE:
0305         /* power on */
0306         if (pd->power) {
0307             pd->power(1);
0308             regcache_sync(uda134x->regmap);
0309         }
0310         break;
0311     case SND_SOC_BIAS_STANDBY:
0312         break;
0313     case SND_SOC_BIAS_OFF:
0314         /* power off */
0315         if (pd->power) {
0316             pd->power(0);
0317             regcache_mark_dirty(uda134x->regmap);
0318         }
0319         break;
0320     }
0321     return 0;
0322 }
0323 
0324 static const char *uda134x_dsp_setting[] = {"Flat", "Minimum1",
0325                         "Minimum2", "Maximum"};
0326 static const char *uda134x_deemph[] = {"None", "32Khz", "44.1Khz", "48Khz"};
0327 static const char *uda134x_mixmode[] = {"Differential", "Analog1",
0328                     "Analog2", "Both"};
0329 
0330 static const struct soc_enum uda134x_mixer_enum[] = {
0331 SOC_ENUM_SINGLE(UDA134X_DATA010, 0, 0x04, uda134x_dsp_setting),
0332 SOC_ENUM_SINGLE(UDA134X_DATA010, 3, 0x04, uda134x_deemph),
0333 SOC_ENUM_SINGLE(UDA134X_EA010, 0, 0x04, uda134x_mixmode),
0334 };
0335 
0336 static const struct snd_kcontrol_new uda1341_snd_controls[] = {
0337 SOC_SINGLE("Master Playback Volume", UDA134X_DATA000, 0, 0x3F, 1),
0338 SOC_SINGLE("Capture Volume", UDA134X_EA010, 2, 0x07, 0),
0339 SOC_SINGLE("Analog1 Volume", UDA134X_EA000, 0, 0x1F, 1),
0340 SOC_SINGLE("Analog2 Volume", UDA134X_EA001, 0, 0x1F, 1),
0341 
0342 SOC_SINGLE("Mic Sensitivity", UDA134X_EA010, 2, 7, 0),
0343 SOC_SINGLE("Mic Volume", UDA134X_EA101, 0, 0x1F, 0),
0344 
0345 SOC_SINGLE("Tone Control - Bass", UDA134X_DATA001, 2, 0xF, 0),
0346 SOC_SINGLE("Tone Control - Treble", UDA134X_DATA001, 0, 3, 0),
0347 
0348 SOC_ENUM("Sound Processing Filter", uda134x_mixer_enum[0]),
0349 SOC_ENUM("PCM Playback De-emphasis", uda134x_mixer_enum[1]),
0350 SOC_ENUM("Input Mux", uda134x_mixer_enum[2]),
0351 
0352 SOC_SINGLE("AGC Switch", UDA134X_EA100, 4, 1, 0),
0353 SOC_SINGLE("AGC Target Volume", UDA134X_EA110, 0, 0x03, 1),
0354 SOC_SINGLE("AGC Timing", UDA134X_EA110, 2, 0x07, 0),
0355 
0356 SOC_SINGLE("DAC +6dB Switch", UDA134X_STATUS1, 6, 1, 0),
0357 SOC_SINGLE("ADC +6dB Switch", UDA134X_STATUS1, 5, 1, 0),
0358 SOC_SINGLE("ADC Polarity Switch", UDA134X_STATUS1, 4, 1, 0),
0359 SOC_SINGLE("DAC Polarity Switch", UDA134X_STATUS1, 3, 1, 0),
0360 SOC_SINGLE("Double Speed Playback Switch", UDA134X_STATUS1, 2, 1, 0),
0361 SOC_SINGLE("DC Filter Enable Switch", UDA134X_STATUS0, 0, 1, 0),
0362 };
0363 
0364 static const struct snd_kcontrol_new uda1340_snd_controls[] = {
0365 SOC_SINGLE("Master Playback Volume", UDA134X_DATA000, 0, 0x3F, 1),
0366 
0367 SOC_SINGLE("Tone Control - Bass", UDA134X_DATA001, 2, 0xF, 0),
0368 SOC_SINGLE("Tone Control - Treble", UDA134X_DATA001, 0, 3, 0),
0369 
0370 SOC_ENUM("Sound Processing Filter", uda134x_mixer_enum[0]),
0371 SOC_ENUM("PCM Playback De-emphasis", uda134x_mixer_enum[1]),
0372 
0373 SOC_SINGLE("DC Filter Enable Switch", UDA134X_STATUS0, 0, 1, 0),
0374 };
0375 
0376 static const struct snd_kcontrol_new uda1345_snd_controls[] = {
0377 SOC_SINGLE("Master Playback Volume", UDA134X_DATA000, 0, 0x3F, 1),
0378 
0379 SOC_ENUM("PCM Playback De-emphasis", uda134x_mixer_enum[1]),
0380 
0381 SOC_SINGLE("DC Filter Enable Switch", UDA134X_STATUS0, 0, 1, 0),
0382 };
0383 
0384 /* UDA1341 has the DAC/ADC power down in STATUS1 */
0385 static const struct snd_soc_dapm_widget uda1341_dapm_widgets[] = {
0386     SND_SOC_DAPM_DAC("DAC", "Playback", UDA134X_STATUS1, 0, 0),
0387     SND_SOC_DAPM_ADC("ADC", "Capture", UDA134X_STATUS1, 1, 0),
0388 };
0389 
0390 /* UDA1340/4/5 has the DAC/ADC pwoer down in DATA0 11 */
0391 static const struct snd_soc_dapm_widget uda1340_dapm_widgets[] = {
0392     SND_SOC_DAPM_DAC("DAC", "Playback", UDA134X_DATA011, 0, 0),
0393     SND_SOC_DAPM_ADC("ADC", "Capture", UDA134X_DATA011, 1, 0),
0394 };
0395 
0396 /* Common DAPM widgets */
0397 static const struct snd_soc_dapm_widget uda134x_dapm_widgets[] = {
0398     SND_SOC_DAPM_INPUT("VINL1"),
0399     SND_SOC_DAPM_INPUT("VINR1"),
0400     SND_SOC_DAPM_INPUT("VINL2"),
0401     SND_SOC_DAPM_INPUT("VINR2"),
0402     SND_SOC_DAPM_OUTPUT("VOUTL"),
0403     SND_SOC_DAPM_OUTPUT("VOUTR"),
0404 };
0405 
0406 static const struct snd_soc_dapm_route uda134x_dapm_routes[] = {
0407     { "ADC", NULL, "VINL1" },
0408     { "ADC", NULL, "VINR1" },
0409     { "ADC", NULL, "VINL2" },
0410     { "ADC", NULL, "VINR2" },
0411     { "VOUTL", NULL, "DAC" },
0412     { "VOUTR", NULL, "DAC" },
0413 };
0414 
0415 static const struct snd_soc_dai_ops uda134x_dai_ops = {
0416     .startup    = uda134x_startup,
0417     .shutdown   = uda134x_shutdown,
0418     .hw_params  = uda134x_hw_params,
0419     .mute_stream    = uda134x_mute,
0420     .set_sysclk = uda134x_set_dai_sysclk,
0421     .set_fmt    = uda134x_set_dai_fmt,
0422     .no_capture_mute = 1,
0423 };
0424 
0425 static struct snd_soc_dai_driver uda134x_dai = {
0426     .name = "uda134x-hifi",
0427     /* playback capabilities */
0428     .playback = {
0429         .stream_name = "Playback",
0430         .channels_min = 1,
0431         .channels_max = 2,
0432         .rates = UDA134X_RATES,
0433         .formats = UDA134X_FORMATS,
0434     },
0435     /* capture capabilities */
0436     .capture = {
0437         .stream_name = "Capture",
0438         .channels_min = 1,
0439         .channels_max = 2,
0440         .rates = UDA134X_RATES,
0441         .formats = UDA134X_FORMATS,
0442     },
0443     /* pcm operations */
0444     .ops = &uda134x_dai_ops,
0445 };
0446 
0447 static int uda134x_soc_probe(struct snd_soc_component *component)
0448 {
0449     struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
0450     struct uda134x_priv *uda134x = snd_soc_component_get_drvdata(component);
0451     struct uda134x_platform_data *pd = uda134x->pd;
0452     const struct snd_soc_dapm_widget *widgets;
0453     unsigned num_widgets;
0454     int ret;
0455 
0456     printk(KERN_INFO "UDA134X SoC Audio Codec\n");
0457 
0458     switch (pd->model) {
0459     case UDA134X_UDA1340:
0460     case UDA134X_UDA1341:
0461     case UDA134X_UDA1344:
0462     case UDA134X_UDA1345:
0463         break;
0464     default:
0465         printk(KERN_ERR "UDA134X SoC codec: "
0466                "unsupported model %d\n",
0467             pd->model);
0468         return -EINVAL;
0469     }
0470 
0471     if (pd->power)
0472         pd->power(1);
0473 
0474     uda134x_reset(component);
0475 
0476     if (pd->model == UDA134X_UDA1341) {
0477         widgets = uda1341_dapm_widgets;
0478         num_widgets = ARRAY_SIZE(uda1341_dapm_widgets);
0479     } else {
0480         widgets = uda1340_dapm_widgets;
0481         num_widgets = ARRAY_SIZE(uda1340_dapm_widgets);
0482     }
0483 
0484     ret = snd_soc_dapm_new_controls(dapm, widgets, num_widgets);
0485     if (ret) {
0486         printk(KERN_ERR "%s failed to register dapm controls: %d",
0487             __func__, ret);
0488         return ret;
0489     }
0490 
0491     switch (pd->model) {
0492     case UDA134X_UDA1340:
0493     case UDA134X_UDA1344:
0494         ret = snd_soc_add_component_controls(component, uda1340_snd_controls,
0495                     ARRAY_SIZE(uda1340_snd_controls));
0496     break;
0497     case UDA134X_UDA1341:
0498         ret = snd_soc_add_component_controls(component, uda1341_snd_controls,
0499                     ARRAY_SIZE(uda1341_snd_controls));
0500     break;
0501     case UDA134X_UDA1345:
0502         ret = snd_soc_add_component_controls(component, uda1345_snd_controls,
0503                     ARRAY_SIZE(uda1345_snd_controls));
0504     break;
0505     default:
0506         printk(KERN_ERR "%s unknown codec type: %d",
0507             __func__, pd->model);
0508         return -EINVAL;
0509     }
0510 
0511     if (ret < 0) {
0512         printk(KERN_ERR "UDA134X: failed to register controls\n");
0513         return ret;
0514     }
0515 
0516     return 0;
0517 }
0518 
0519 static const struct snd_soc_component_driver soc_component_dev_uda134x = {
0520     .probe          = uda134x_soc_probe,
0521     .set_bias_level     = uda134x_set_bias_level,
0522     .dapm_widgets       = uda134x_dapm_widgets,
0523     .num_dapm_widgets   = ARRAY_SIZE(uda134x_dapm_widgets),
0524     .dapm_routes        = uda134x_dapm_routes,
0525     .num_dapm_routes    = ARRAY_SIZE(uda134x_dapm_routes),
0526     .suspend_bias_off   = 1,
0527     .idle_bias_on       = 1,
0528     .use_pmdown_time    = 1,
0529     .endianness     = 1,
0530 };
0531 
0532 static const struct regmap_config uda134x_regmap_config = {
0533     .reg_bits = 8,
0534     .val_bits = 8,
0535     .max_register = UDA134X_DATA1,
0536     .reg_defaults = uda134x_reg_defaults,
0537     .num_reg_defaults = ARRAY_SIZE(uda134x_reg_defaults),
0538     .cache_type = REGCACHE_RBTREE,
0539 
0540     .reg_write = uda134x_regmap_write,
0541 };
0542 
0543 static int uda134x_codec_probe(struct platform_device *pdev)
0544 {
0545     struct uda134x_platform_data *pd = pdev->dev.platform_data;
0546     struct uda134x_priv *uda134x;
0547     int ret;
0548 
0549     if (!pd) {
0550         dev_err(&pdev->dev, "Missing L3 bitbang function\n");
0551         return -ENODEV;
0552     }
0553 
0554     uda134x = devm_kzalloc(&pdev->dev, sizeof(*uda134x), GFP_KERNEL);
0555     if (!uda134x)
0556         return -ENOMEM;
0557 
0558     uda134x->pd = pd;
0559     platform_set_drvdata(pdev, uda134x);
0560 
0561     if (pd->l3.use_gpios) {
0562         ret = l3_set_gpio_ops(&pdev->dev, &uda134x->pd->l3);
0563         if (ret < 0)
0564             return ret;
0565     }
0566 
0567     uda134x->regmap = devm_regmap_init(&pdev->dev, NULL, pd,
0568         &uda134x_regmap_config);
0569     if (IS_ERR(uda134x->regmap))
0570         return PTR_ERR(uda134x->regmap);
0571 
0572     return devm_snd_soc_register_component(&pdev->dev,
0573             &soc_component_dev_uda134x, &uda134x_dai, 1);
0574 }
0575 
0576 static struct platform_driver uda134x_codec_driver = {
0577     .driver = {
0578         .name = "uda134x-codec",
0579     },
0580     .probe = uda134x_codec_probe,
0581 };
0582 
0583 module_platform_driver(uda134x_codec_driver);
0584 
0585 MODULE_DESCRIPTION("UDA134X ALSA soc codec driver");
0586 MODULE_AUTHOR("Zoltan Devai, Christian Pellegrin <chripell@evolware.org>");
0587 MODULE_LICENSE("GPL");
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