soc/codecs/tlv320aic26.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * Texas Instruments TLV320AIC26 low power audio CODEC
0004  * register definitions
0005  *
0006  * Copyright (C) 2008 Secret Lab Technologies Ltd.
0007  */
0008
0009 #ifndef _TLV320AIC26_H_
0010 #define _TLV320AIC26_H_
0011
0012 /* AIC26 Registers */
0013 #define AIC26_PAGE_ADDR(page, offset)   ((page << 11) | offset << 5)
0014
0015 /* Page 0: Auxiliary data registers */
0016 #define AIC26_REG_BAT1          AIC26_PAGE_ADDR(0, 0x05)
0017 #define AIC26_REG_BAT2          AIC26_PAGE_ADDR(0, 0x06)
0018 #define AIC26_REG_AUX           AIC26_PAGE_ADDR(0, 0x07)
0019 #define AIC26_REG_TEMP1         AIC26_PAGE_ADDR(0, 0x09)
0020 #define AIC26_REG_TEMP2         AIC26_PAGE_ADDR(0, 0x0A)
0021
0022 /* Page 1: Auxiliary control registers */
0023 #define AIC26_REG_AUX_ADC       AIC26_PAGE_ADDR(1, 0x00)
0024 #define AIC26_REG_STATUS        AIC26_PAGE_ADDR(1, 0x01)
0025 #define AIC26_REG_REFERENCE     AIC26_PAGE_ADDR(1, 0x03)
0026 #define AIC26_REG_RESET         AIC26_PAGE_ADDR(1, 0x04)
0027
0028 /* Page 2: Audio control registers */
0029 #define AIC26_REG_AUDIO_CTRL1       AIC26_PAGE_ADDR(2, 0x00)
0030 #define AIC26_REG_ADC_GAIN      AIC26_PAGE_ADDR(2, 0x01)
0031 #define AIC26_REG_DAC_GAIN      AIC26_PAGE_ADDR(2, 0x02)
0032 #define AIC26_REG_SIDETONE      AIC26_PAGE_ADDR(2, 0x03)
0033 #define AIC26_REG_AUDIO_CTRL2       AIC26_PAGE_ADDR(2, 0x04)
0034 #define AIC26_REG_POWER_CTRL        AIC26_PAGE_ADDR(2, 0x05)
0035 #define AIC26_REG_AUDIO_CTRL3       AIC26_PAGE_ADDR(2, 0x06)
0036
0037 #define AIC26_REG_FILTER_COEFF_L_N0 AIC26_PAGE_ADDR(2, 0x07)
0038 #define AIC26_REG_FILTER_COEFF_L_N1 AIC26_PAGE_ADDR(2, 0x08)
0039 #define AIC26_REG_FILTER_COEFF_L_N2 AIC26_PAGE_ADDR(2, 0x09)
0040 #define AIC26_REG_FILTER_COEFF_L_N3 AIC26_PAGE_ADDR(2, 0x0A)
0041 #define AIC26_REG_FILTER_COEFF_L_N4 AIC26_PAGE_ADDR(2, 0x0B)
0042 #define AIC26_REG_FILTER_COEFF_L_N5 AIC26_PAGE_ADDR(2, 0x0C)
0043 #define AIC26_REG_FILTER_COEFF_L_D1 AIC26_PAGE_ADDR(2, 0x0D)
0044 #define AIC26_REG_FILTER_COEFF_L_D2 AIC26_PAGE_ADDR(2, 0x0E)
0045 #define AIC26_REG_FILTER_COEFF_L_D4 AIC26_PAGE_ADDR(2, 0x0F)
0046 #define AIC26_REG_FILTER_COEFF_L_D5 AIC26_PAGE_ADDR(2, 0x10)
0047 #define AIC26_REG_FILTER_COEFF_R_N0 AIC26_PAGE_ADDR(2, 0x11)
0048 #define AIC26_REG_FILTER_COEFF_R_N1 AIC26_PAGE_ADDR(2, 0x12)
0049 #define AIC26_REG_FILTER_COEFF_R_N2 AIC26_PAGE_ADDR(2, 0x13)
0050 #define AIC26_REG_FILTER_COEFF_R_N3 AIC26_PAGE_ADDR(2, 0x14)
0051 #define AIC26_REG_FILTER_COEFF_R_N4 AIC26_PAGE_ADDR(2, 0x15)
0052 #define AIC26_REG_FILTER_COEFF_R_N5 AIC26_PAGE_ADDR(2, 0x16)
0053 #define AIC26_REG_FILTER_COEFF_R_D1 AIC26_PAGE_ADDR(2, 0x17)
0054 #define AIC26_REG_FILTER_COEFF_R_D2 AIC26_PAGE_ADDR(2, 0x18)
0055 #define AIC26_REG_FILTER_COEFF_R_D4 AIC26_PAGE_ADDR(2, 0x19)
0056 #define AIC26_REG_FILTER_COEFF_R_D5 AIC26_PAGE_ADDR(2, 0x1A)
0057
0058 #define AIC26_REG_PLL_PROG1     AIC26_PAGE_ADDR(2, 0x1B)
0059 #define AIC26_REG_PLL_PROG2     AIC26_PAGE_ADDR(2, 0x1C)
0060 #define AIC26_REG_AUDIO_CTRL4       AIC26_PAGE_ADDR(2, 0x1D)
0061 #define AIC26_REG_AUDIO_CTRL5       AIC26_PAGE_ADDR(2, 0x1E)
0062
0063 /* fsref dividers; used in register 'Audio Control 1' */
0064 enum aic26_divisors {
0065     AIC26_DIV_1 = 0,
0066     AIC26_DIV_1_5   = 1,
0067     AIC26_DIV_2 = 2,
0068     AIC26_DIV_3 = 3,
0069     AIC26_DIV_4 = 4,
0070     AIC26_DIV_5 = 5,
0071     AIC26_DIV_5_5   = 6,
0072     AIC26_DIV_6 = 7,
0073 };
0074
0075 /* Digital data format */
0076 enum aic26_datfm {
0077     AIC26_DATFM_I2S     = 0 << 8,
0078     AIC26_DATFM_DSP     = 1 << 8,
0079     AIC26_DATFM_RIGHTJ  = 2 << 8, /* right justified */
0080     AIC26_DATFM_LEFTJ   = 3 << 8, /* left justified */
0081 };
0082
0083 /* Sample word length in bits; used in register 'Audio Control 1' */
0084 enum aic26_wlen {
0085     AIC26_WLEN_16   = 0 << 10,
0086     AIC26_WLEN_20   = 1 << 10,
0087     AIC26_WLEN_24   = 2 << 10,
0088     AIC26_WLEN_32   = 3 << 10,
0089 };
0090
0091 #endif /* _TLV320AIC26_H_ */