soc/codecs/tlv320aic26.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Texas Instruments TLV320AIC26 low power audio CODEC
0004  * ALSA SoC CODEC driver
0005  *
0006  * Copyright (C) 2008 Secret Lab Technologies Ltd.
0007  */
0008
0009 #include <linux/module.h>
0010 #include <linux/moduleparam.h>
0011 #include <linux/init.h>
0012 #include <linux/delay.h>
0013 #include <linux/pm.h>
0014 #include <linux/device.h>
0015 #include <linux/sysfs.h>
0016 #include <linux/spi/spi.h>
0017 #include <linux/slab.h>
0018 #include <sound/core.h>
0019 #include <sound/pcm.h>
0020 #include <sound/pcm_params.h>
0021 #include <sound/soc.h>
0022 #include <sound/initval.h>
0023
0024 #include "tlv320aic26.h"
0025
0026 MODULE_DESCRIPTION("ASoC TLV320AIC26 codec driver");
0027 MODULE_AUTHOR("Grant Likely <grant.likely@secretlab.ca>");
0028 MODULE_LICENSE("GPL");
0029
0030 /* AIC26 driver private data */
0031 struct aic26 {
0032     struct spi_device *spi;
0033     struct regmap *regmap;
0034     struct snd_soc_component *component;
0035     int clock_provider;
0036     int datfm;
0037     int mclk;
0038
0039     /* Keyclick parameters */
0040     int keyclick_amplitude;
0041     int keyclick_freq;
0042     int keyclick_len;
0043 };
0044
0045 static const struct snd_soc_dapm_widget tlv320aic26_dapm_widgets[] = {
0046 SND_SOC_DAPM_INPUT("MICIN"),
0047 SND_SOC_DAPM_INPUT("AUX"),
0048
0049 SND_SOC_DAPM_OUTPUT("HPL"),
0050 SND_SOC_DAPM_OUTPUT("HPR"),
0051 };
0052
0053 static const struct snd_soc_dapm_route tlv320aic26_dapm_routes[] = {
0054     { "Capture", NULL, "MICIN" },
0055     { "Capture", NULL, "AUX" },
0056
0057     { "HPL", NULL, "Playback" },
0058     { "HPR", NULL, "Playback" },
0059 };
0060
0061 /* ---------------------------------------------------------------------
0062  * Digital Audio Interface Operations
0063  */
0064 static int aic26_hw_params(struct snd_pcm_substream *substream,
0065                struct snd_pcm_hw_params *params,
0066                struct snd_soc_dai *dai)
0067 {
0068     struct snd_soc_component *component = dai->component;
0069     struct aic26 *aic26 = snd_soc_component_get_drvdata(component);
0070     int fsref, divisor, wlen, pval, jval, dval, qval;
0071     u16 reg;
0072
0073     dev_dbg(&aic26->spi->dev, "aic26_hw_params(substream=%p, params=%p)\n",
0074         substream, params);
0075     dev_dbg(&aic26->spi->dev, "rate=%i width=%d\n", params_rate(params),
0076         params_width(params));
0077
0078     switch (params_rate(params)) {
0079     case 8000:  fsref = 48000; divisor = AIC26_DIV_6; break;
0080     case 11025: fsref = 44100; divisor = AIC26_DIV_4; break;
0081     case 12000: fsref = 48000; divisor = AIC26_DIV_4; break;
0082     case 16000: fsref = 48000; divisor = AIC26_DIV_3; break;
0083     case 22050: fsref = 44100; divisor = AIC26_DIV_2; break;
0084     case 24000: fsref = 48000; divisor = AIC26_DIV_2; break;
0085     case 32000: fsref = 48000; divisor = AIC26_DIV_1_5; break;
0086     case 44100: fsref = 44100; divisor = AIC26_DIV_1; break;
0087     case 48000: fsref = 48000; divisor = AIC26_DIV_1; break;
0088     default:
0089         dev_dbg(&aic26->spi->dev, "bad rate\n"); return -EINVAL;
0090     }
0091
0092     /* select data word length */
0093     switch (params_width(params)) {
0094     case 8:  wlen = AIC26_WLEN_16; break;
0095     case 16: wlen = AIC26_WLEN_16; break;
0096     case 24: wlen = AIC26_WLEN_24; break;
0097     case 32: wlen = AIC26_WLEN_32; break;
0098     default:
0099         dev_dbg(&aic26->spi->dev, "bad format\n"); return -EINVAL;
0100     }
0101
0102     /**
0103      * Configure PLL
0104      * fsref = (mclk * PLLM) / 2048
0105      * where PLLM = J.DDDD (DDDD register ranges from 0 to 9999, decimal)
0106      */
0107     pval = 1;
0108     /* compute J portion of multiplier */
0109     jval = fsref / (aic26->mclk / 2048);
0110     /* compute fractional DDDD component of multiplier */
0111     dval = fsref - (jval * (aic26->mclk / 2048));
0112     dval = (10000 * dval) / (aic26->mclk / 2048);
0113     dev_dbg(&aic26->spi->dev, "Setting PLLM to %d.%04d\n", jval, dval);
0114     qval = 0;
0115     reg = 0x8000 | qval << 11 | pval << 8 | jval << 2;
0116     snd_soc_component_write(component, AIC26_REG_PLL_PROG1, reg);
0117     reg = dval << 2;
0118     snd_soc_component_write(component, AIC26_REG_PLL_PROG2, reg);
0119
0120     /* Audio Control 3 (clock provider mode, fsref rate) */
0121     if (aic26->clock_provider)
0122         reg = 0x0800;
0123     if (fsref == 48000)
0124         reg = 0x2000;
0125     snd_soc_component_update_bits(component, AIC26_REG_AUDIO_CTRL3, 0xf800, reg);
0126
0127     /* Audio Control 1 (FSref divisor) */
0128     reg = wlen | aic26->datfm | (divisor << 3) | divisor;
0129     snd_soc_component_update_bits(component, AIC26_REG_AUDIO_CTRL1, 0xfff, reg);
0130
0131     return 0;
0132 }
0133
0134 /*
0135  * aic26_mute - Mute control to reduce noise when changing audio format
0136  */
0137 static int aic26_mute(struct snd_soc_dai *dai, int mute, int direction)
0138 {
0139     struct snd_soc_component *component = dai->component;
0140     struct aic26 *aic26 = snd_soc_component_get_drvdata(component);
0141     u16 reg;
0142
0143     dev_dbg(&aic26->spi->dev, "aic26_mute(dai=%p, mute=%i)\n",
0144         dai, mute);
0145
0146     if (mute)
0147         reg = 0x8080;
0148     else
0149         reg = 0;
0150     snd_soc_component_update_bits(component, AIC26_REG_DAC_GAIN, 0x8000, reg);
0151
0152     return 0;
0153 }
0154
0155 static int aic26_set_sysclk(struct snd_soc_dai *codec_dai,
0156                 int clk_id, unsigned int freq, int dir)
0157 {
0158     struct snd_soc_component *component = codec_dai->component;
0159     struct aic26 *aic26 = snd_soc_component_get_drvdata(component);
0160
0161     dev_dbg(&aic26->spi->dev, "aic26_set_sysclk(dai=%p, clk_id==%i,"
0162         " freq=%i, dir=%i)\n",
0163         codec_dai, clk_id, freq, dir);
0164
0165     /* MCLK needs to fall between 2MHz and 50 MHz */
0166     if ((freq < 2000000) || (freq > 50000000))
0167         return -EINVAL;
0168
0169     aic26->mclk = freq;
0170     return 0;
0171 }
0172
0173 static int aic26_set_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
0174 {
0175     struct snd_soc_component *component = codec_dai->component;
0176     struct aic26 *aic26 = snd_soc_component_get_drvdata(component);
0177
0178     dev_dbg(&aic26->spi->dev, "aic26_set_fmt(dai=%p, fmt==%i)\n",
0179         codec_dai, fmt);
0180
0181     switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
0182     case SND_SOC_DAIFMT_CBP_CFP: aic26->clock_provider = 1; break;
0183     case SND_SOC_DAIFMT_CBC_CFC: aic26->clock_provider = 0; break;
0184     default:
0185         dev_dbg(&aic26->spi->dev, "bad master\n"); return -EINVAL;
0186     }
0187
0188     /* interface format */
0189     switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
0190     case SND_SOC_DAIFMT_I2S:     aic26->datfm = AIC26_DATFM_I2S; break;
0191     case SND_SOC_DAIFMT_DSP_A:   aic26->datfm = AIC26_DATFM_DSP; break;
0192     case SND_SOC_DAIFMT_RIGHT_J: aic26->datfm = AIC26_DATFM_RIGHTJ; break;
0193     case SND_SOC_DAIFMT_LEFT_J:  aic26->datfm = AIC26_DATFM_LEFTJ; break;
0194     default:
0195         dev_dbg(&aic26->spi->dev, "bad format\n"); return -EINVAL;
0196     }
0197
0198     return 0;
0199 }
0200
0201 /* ---------------------------------------------------------------------
0202  * Digital Audio Interface Definition
0203  */
0204 #define AIC26_RATES (SNDRV_PCM_RATE_8000  | SNDRV_PCM_RATE_11025 |\
0205              SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\
0206              SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |\
0207              SNDRV_PCM_RATE_48000)
0208 #define AIC26_FORMATS   (SNDRV_PCM_FMTBIT_S8     | SNDRV_PCM_FMTBIT_S16_BE |\
0209              SNDRV_PCM_FMTBIT_S24_BE | SNDRV_PCM_FMTBIT_S32_BE)
0210
0211 static const struct snd_soc_dai_ops aic26_dai_ops = {
0212     .hw_params  = aic26_hw_params,
0213     .mute_stream    = aic26_mute,
0214     .set_sysclk = aic26_set_sysclk,
0215     .set_fmt    = aic26_set_fmt,
0216     .no_capture_mute = 1,
0217 };
0218
0219 static struct snd_soc_dai_driver aic26_dai = {
0220     .name = "tlv320aic26-hifi",
0221     .playback = {
0222         .stream_name = "Playback",
0223         .channels_min = 2,
0224         .channels_max = 2,
0225         .rates = AIC26_RATES,
0226         .formats = AIC26_FORMATS,
0227     },
0228     .capture = {
0229         .stream_name = "Capture",
0230         .channels_min = 2,
0231         .channels_max = 2,
0232         .rates = AIC26_RATES,
0233         .formats = AIC26_FORMATS,
0234     },
0235     .ops = &aic26_dai_ops,
0236 };
0237
0238 /* ---------------------------------------------------------------------
0239  * ALSA controls
0240  */
0241 static const char *aic26_capture_src_text[] = {"Mic", "Aux"};
0242 static SOC_ENUM_SINGLE_DECL(aic26_capture_src_enum,
0243                 AIC26_REG_AUDIO_CTRL1, 12,
0244                 aic26_capture_src_text);
0245
0246 static const struct snd_kcontrol_new aic26_snd_controls[] = {
0247     /* Output */
0248     SOC_DOUBLE("PCM Playback Volume", AIC26_REG_DAC_GAIN, 8, 0, 0x7f, 1),
0249     SOC_DOUBLE("PCM Playback Switch", AIC26_REG_DAC_GAIN, 15, 7, 1, 1),
0250     SOC_SINGLE("PCM Capture Volume", AIC26_REG_ADC_GAIN, 8, 0x7f, 0),
0251     SOC_SINGLE("PCM Capture Mute", AIC26_REG_ADC_GAIN, 15, 1, 1),
0252     SOC_SINGLE("Keyclick activate", AIC26_REG_AUDIO_CTRL2, 15, 0x1, 0),
0253     SOC_SINGLE("Keyclick amplitude", AIC26_REG_AUDIO_CTRL2, 12, 0x7, 0),
0254     SOC_SINGLE("Keyclick frequency", AIC26_REG_AUDIO_CTRL2, 8, 0x7, 0),
0255     SOC_SINGLE("Keyclick period", AIC26_REG_AUDIO_CTRL2, 4, 0xf, 0),
0256     SOC_ENUM("Capture Source", aic26_capture_src_enum),
0257 };
0258
0259 /* ---------------------------------------------------------------------
0260  * SPI device portion of driver: sysfs files for debugging
0261  */
0262
0263 static ssize_t keyclick_show(struct device *dev,
0264                  struct device_attribute *attr, char *buf)
0265 {
0266     struct aic26 *aic26 = dev_get_drvdata(dev);
0267     int val, amp, freq, len;
0268
0269     val = snd_soc_component_read(aic26->component, AIC26_REG_AUDIO_CTRL2);
0270     amp = (val >> 12) & 0x7;
0271     freq = (125 << ((val >> 8) & 0x7)) >> 1;
0272     len = 2 * (1 + ((val >> 4) & 0xf));
0273
0274     return sprintf(buf, "amp=%x freq=%iHz len=%iclks\n", amp, freq, len);
0275 }
0276
0277 /* Any write to the keyclick attribute will trigger the keyclick event */
0278 static ssize_t keyclick_store(struct device *dev,
0279                   struct device_attribute *attr,
0280                   const char *buf, size_t count)
0281 {
0282     struct aic26 *aic26 = dev_get_drvdata(dev);
0283
0284     snd_soc_component_update_bits(aic26->component, AIC26_REG_AUDIO_CTRL2,
0285                 0x8000, 0x800);
0286
0287     return count;
0288 }
0289
0290 static DEVICE_ATTR_RW(keyclick);
0291
0292 /* ---------------------------------------------------------------------
0293  * SoC CODEC portion of driver: probe and release routines
0294  */
0295 static int aic26_probe(struct snd_soc_component *component)
0296 {
0297     struct aic26 *aic26 = dev_get_drvdata(component->dev);
0298     int ret, reg;
0299
0300     aic26->component = component;
0301
0302     /* Reset the codec to power on defaults */
0303     snd_soc_component_write(component, AIC26_REG_RESET, 0xBB00);
0304
0305     /* Power up CODEC */
0306     snd_soc_component_write(component, AIC26_REG_POWER_CTRL, 0);
0307
0308     /* Audio Control 3 (master mode, fsref rate) */
0309     reg = snd_soc_component_read(component, AIC26_REG_AUDIO_CTRL3);
0310     reg &= ~0xf800;
0311     reg |= 0x0800; /* set master mode */
0312     snd_soc_component_write(component, AIC26_REG_AUDIO_CTRL3, reg);
0313
0314     /* Register the sysfs files for debugging */
0315     /* Create SysFS files */
0316     ret = device_create_file(component->dev, &dev_attr_keyclick);
0317     if (ret)
0318         dev_info(component->dev, "error creating sysfs files\n");
0319
0320     return 0;
0321 }
0322
0323 static const struct snd_soc_component_driver aic26_soc_component_dev = {
0324     .probe          = aic26_probe,
0325     .controls       = aic26_snd_controls,
0326     .num_controls       = ARRAY_SIZE(aic26_snd_controls),
0327     .dapm_widgets       = tlv320aic26_dapm_widgets,
0328     .num_dapm_widgets   = ARRAY_SIZE(tlv320aic26_dapm_widgets),
0329     .dapm_routes        = tlv320aic26_dapm_routes,
0330     .num_dapm_routes    = ARRAY_SIZE(tlv320aic26_dapm_routes),
0331     .idle_bias_on       = 1,
0332     .use_pmdown_time    = 1,
0333     .endianness     = 1,
0334 };
0335
0336 static const struct regmap_config aic26_regmap = {
0337     .reg_bits = 16,
0338     .val_bits = 16,
0339 };
0340
0341 /* ---------------------------------------------------------------------
0342  * SPI device portion of driver: probe and release routines and SPI
0343  *               driver registration.
0344  */
0345 static int aic26_spi_probe(struct spi_device *spi)
0346 {
0347     struct aic26 *aic26;
0348     int ret;
0349
0350     dev_dbg(&spi->dev, "probing tlv320aic26 spi device\n");
0351
0352     /* Allocate driver data */
0353     aic26 = devm_kzalloc(&spi->dev, sizeof *aic26, GFP_KERNEL);
0354     if (!aic26)
0355         return -ENOMEM;
0356
0357     aic26->regmap = devm_regmap_init_spi(spi, &aic26_regmap);
0358     if (IS_ERR(aic26->regmap))
0359         return PTR_ERR(aic26->regmap);
0360
0361     /* Initialize the driver data */
0362     aic26->spi = spi;
0363     dev_set_drvdata(&spi->dev, aic26);
0364     aic26->clock_provider = 1;
0365
0366     ret = devm_snd_soc_register_component(&spi->dev,
0367             &aic26_soc_component_dev, &aic26_dai, 1);
0368     return ret;
0369 }
0370
0371 static struct spi_driver aic26_spi = {
0372     .driver = {
0373         .name = "tlv320aic26-codec",
0374     },
0375     .probe = aic26_spi_probe,
0376 };
0377
0378 module_spi_driver(aic26_spi);