soc/codecs/tas2780.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * TAS2780.h - ALSA SoC Texas Instruments TAS2780 Mono Audio Amplifier
0004  *
0005  * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com
0006  *
0007  * Author: Raphael Xu <raphael-xu@ti.com>
0008  */
0009
0010 #ifndef __TAS2780_H__
0011 #define __TAS2780_H__
0012
0013 /* Book Control Register */
0014 #define TAS2780_BOOKCTL_PAGE    0
0015 #define TAS2780_BOOKCTL_REG 127
0016 #define TAS2780_REG(page, reg)  ((page * 128) + reg)
0017
0018 /* Page */
0019 #define TAS2780_PAGE        TAS2780_REG(0X0, 0x00)
0020 #define TAS2780_PAGE_PAGE_MASK  255
0021
0022 /* Software Reset */
0023 #define TAS2780_SW_RST  TAS2780_REG(0X0, 0x01)
0024 #define TAS2780_RST BIT(0)
0025
0026 /* Power Control */
0027 #define TAS2780_PWR_CTRL        TAS2780_REG(0X0, 0x02)
0028 #define TAS2780_PWR_CTRL_MASK       GENMASK(1, 0)
0029 #define TAS2780_PWR_CTRL_ACTIVE     0x0
0030 #define TAS2780_PWR_CTRL_MUTE       BIT(0)
0031 #define TAS2780_PWR_CTRL_SHUTDOWN   BIT(1)
0032
0033 #define TAS2780_VSENSE_POWER_EN     3
0034 #define TAS2780_ISENSE_POWER_EN     4
0035
0036 /* Digital Volume Control */
0037 #define TAS2780_DVC TAS2780_REG(0X0, 0x1a)
0038 #define TAS2780_DVC_MAX 0xc9
0039
0040 #define TAS2780_CHNL_0  TAS2780_REG(0X0, 0x03)
0041
0042 /* TDM Configuration Reg0 */
0043 #define TAS2780_TDM_CFG0        TAS2780_REG(0X0, 0x08)
0044 #define TAS2780_TDM_CFG0_SMP_MASK   BIT(5)
0045 #define TAS2780_TDM_CFG0_SMP_48KHZ  0x0
0046 #define TAS2780_TDM_CFG0_SMP_44_1KHZ    BIT(5)
0047 #define TAS2780_TDM_CFG0_MASK       GENMASK(3, 1)
0048 #define TAS2780_TDM_CFG0_44_1_48KHZ BIT(3)
0049 #define TAS2780_TDM_CFG0_88_2_96KHZ (BIT(3) | BIT(1))
0050
0051 /* TDM Configuration Reg1 */
0052 #define TAS2780_TDM_CFG1        TAS2780_REG(0X0, 0x09)
0053 #define TAS2780_TDM_CFG1_MASK       GENMASK(5, 1)
0054 #define TAS2780_TDM_CFG1_51_SHIFT   1
0055 #define TAS2780_TDM_CFG1_RX_MASK    BIT(0)
0056 #define TAS2780_TDM_CFG1_RX_RISING  0x0
0057 #define TAS2780_TDM_CFG1_RX_FALLING BIT(0)
0058
0059 /* TDM Configuration Reg2 */
0060 #define TAS2780_TDM_CFG2        TAS2780_REG(0X0, 0x0a)
0061 #define TAS2780_TDM_CFG2_RXW_MASK   GENMASK(3, 2)
0062 #define TAS2780_TDM_CFG2_RXW_16BITS 0x0
0063 #define TAS2780_TDM_CFG2_RXW_24BITS BIT(3)
0064 #define TAS2780_TDM_CFG2_RXW_32BITS (BIT(3) | BIT(2))
0065 #define TAS2780_TDM_CFG2_RXS_MASK   GENMASK(1, 0)
0066 #define TAS2780_TDM_CFG2_RXS_16BITS 0x0
0067 #define TAS2780_TDM_CFG2_RXS_24BITS BIT(0)
0068 #define TAS2780_TDM_CFG2_RXS_32BITS BIT(1)
0069 #define TAS2780_TDM_CFG2_SCFG_MASK  GENMASK(5, 4)
0070 #define TAS2780_TDM_CFG2_SCFG_I2S   0x0
0071 #define TAS2780_TDM_CFG2_SCFG_LEFT_J    BIT(4)
0072 #define TAS2780_TDM_CFG2_SCFG_RIGHT_J   BIT(5)
0073
0074 /* TDM Configuration Reg3 */
0075 #define TAS2780_TDM_CFG3        TAS2780_REG(0X0, 0x0c)
0076 #define TAS2780_TDM_CFG3_RXS_MASK   GENMASK(7, 4)
0077 #define TAS2780_TDM_CFG3_RXS_SHIFT  0x4
0078 #define TAS2780_TDM_CFG3_MASK       GENMASK(3, 0)
0079
0080 /* TDM Configuration Reg4 */
0081 #define TAS2780_TDM_CFG4        TAS2780_REG(0X0, 0x0d)
0082 #define TAS2780_TDM_CFG4_TX_OFFSET_MASK GENMASK(3, 1)
0083
0084 /* TDM Configuration Reg5 */
0085 #define TAS2780_TDM_CFG5        TAS2780_REG(0X0, 0x0e)
0086 #define TAS2780_TDM_CFG5_VSNS_MASK  BIT(6)
0087 #define TAS2780_TDM_CFG5_VSNS_ENABLE    BIT(6)
0088 #define TAS2780_TDM_CFG5_50_MASK    GENMASK(5, 0)
0089
0090 /* TDM Configuration Reg6 */
0091 #define TAS2780_TDM_CFG6        TAS2780_REG(0X0, 0x0f)
0092 #define TAS2780_TDM_CFG6_ISNS_MASK  BIT(6)
0093 #define TAS2780_TDM_CFG6_ISNS_ENABLE    BIT(6)
0094 #define TAS2780_TDM_CFG6_50_MASK    GENMASK(5, 0)
0095
0096 /* IC CFG */
0097 #define TAS2780_IC_CFG          TAS2780_REG(0X0, 0x5c)
0098 #define TAS2780_IC_CFG_MASK     GENMASK(7, 6)
0099 #define TAS2780_IC_CFG_ENABLE       (BIT(7) | BIT(6))
0100
0101 #endif /* __TAS2780_H__ */