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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 //
0003 // rt715-sdca.c -- rt715 ALSA SoC audio driver
0004 //
0005 // Copyright(c) 2020 Realtek Semiconductor Corp.
0006 //
0007 //
0008 //
0009 
0010 #include <linux/module.h>
0011 #include <linux/moduleparam.h>
0012 #include <linux/kernel.h>
0013 #include <linux/init.h>
0014 #include <linux/pm_runtime.h>
0015 #include <linux/pm.h>
0016 #include <linux/soundwire/sdw.h>
0017 #include <linux/regmap.h>
0018 #include <linux/slab.h>
0019 #include <linux/platform_device.h>
0020 #include <sound/core.h>
0021 #include <sound/pcm.h>
0022 #include <sound/pcm_params.h>
0023 #include <sound/soc.h>
0024 #include <sound/soc-dapm.h>
0025 #include <sound/initval.h>
0026 #include <sound/tlv.h>
0027 #include <linux/soundwire/sdw_registers.h>
0028 
0029 #include "rt715-sdca.h"
0030 
0031 static int rt715_sdca_index_write(struct rt715_sdca_priv *rt715,
0032         unsigned int nid, unsigned int reg, unsigned int value)
0033 {
0034     struct regmap *regmap = rt715->mbq_regmap;
0035     unsigned int addr;
0036     int ret;
0037 
0038     addr = (nid << 20) | reg;
0039 
0040     ret = regmap_write(regmap, addr, value);
0041     if (ret < 0)
0042         dev_err(&rt715->slave->dev,
0043                 "Failed to set private value: %08x <= %04x %d\n", ret, addr,
0044                 value);
0045 
0046     return ret;
0047 }
0048 
0049 static int rt715_sdca_index_read(struct rt715_sdca_priv *rt715,
0050         unsigned int nid, unsigned int reg, unsigned int *value)
0051 {
0052     struct regmap *regmap = rt715->mbq_regmap;
0053     unsigned int addr;
0054     int ret;
0055 
0056     addr = (nid << 20) | reg;
0057 
0058     ret = regmap_read(regmap, addr, value);
0059     if (ret < 0)
0060         dev_err(&rt715->slave->dev,
0061                 "Failed to get private value: %06x => %04x ret=%d\n",
0062                 addr, *value, ret);
0063 
0064     return ret;
0065 }
0066 
0067 static int rt715_sdca_index_update_bits(struct rt715_sdca_priv *rt715,
0068     unsigned int nid, unsigned int reg, unsigned int mask, unsigned int val)
0069 {
0070     unsigned int tmp;
0071     int ret;
0072 
0073     ret = rt715_sdca_index_read(rt715, nid, reg, &tmp);
0074     if (ret < 0)
0075         return ret;
0076 
0077     set_mask_bits(&tmp, mask, val);
0078 
0079     return rt715_sdca_index_write(rt715, nid, reg, tmp);
0080 }
0081 
0082 static inline unsigned int rt715_sdca_vol_gain(unsigned int u_ctrl_val,
0083         unsigned int vol_max, unsigned int vol_gain_sft)
0084 {
0085     unsigned int val;
0086 
0087     if (u_ctrl_val > vol_max)
0088         u_ctrl_val = vol_max;
0089     val = u_ctrl_val;
0090     u_ctrl_val =
0091         ((abs(u_ctrl_val - vol_gain_sft) * RT715_SDCA_DB_STEP) << 8) / 1000;
0092     if (val <= vol_gain_sft) {
0093         u_ctrl_val = ~u_ctrl_val;
0094         u_ctrl_val += 1;
0095     }
0096     u_ctrl_val &= 0xffff;
0097 
0098     return u_ctrl_val;
0099 }
0100 
0101 static inline unsigned int rt715_sdca_boost_gain(unsigned int u_ctrl_val,
0102         unsigned int b_max, unsigned int b_gain_sft)
0103 {
0104     if (u_ctrl_val > b_max)
0105         u_ctrl_val = b_max;
0106 
0107     return (u_ctrl_val * 10) << b_gain_sft;
0108 }
0109 
0110 static inline unsigned int rt715_sdca_get_gain(unsigned int reg_val,
0111         unsigned int gain_sft)
0112 {
0113     unsigned int neg_flag = 0;
0114 
0115     if (reg_val & BIT(15)) {
0116         reg_val = ~(reg_val - 1) & 0xffff;
0117         neg_flag = 1;
0118     }
0119     reg_val *= 1000;
0120     reg_val >>= 8;
0121     if (neg_flag)
0122         reg_val = gain_sft - reg_val / RT715_SDCA_DB_STEP;
0123     else
0124         reg_val = gain_sft + reg_val / RT715_SDCA_DB_STEP;
0125 
0126     return reg_val;
0127 }
0128 
0129 /* SDCA Volume/Boost control */
0130 static int rt715_sdca_set_amp_gain_put(struct snd_kcontrol *kcontrol,
0131         struct snd_ctl_elem_value *ucontrol)
0132 {
0133     struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
0134     struct soc_mixer_control *mc =
0135         (struct soc_mixer_control *)kcontrol->private_value;
0136     struct rt715_sdca_priv *rt715 = snd_soc_component_get_drvdata(component);
0137     unsigned int gain_val, i, k_changed = 0;
0138     int ret;
0139 
0140     for (i = 0; i < 2; i++) {
0141         if (ucontrol->value.integer.value[i] != rt715->kctl_2ch_orig[i]) {
0142             k_changed = 1;
0143             break;
0144         }
0145     }
0146 
0147     for (i = 0; i < 2; i++) {
0148         rt715->kctl_2ch_orig[i] = ucontrol->value.integer.value[i];
0149         gain_val =
0150             rt715_sdca_vol_gain(ucontrol->value.integer.value[i], mc->max,
0151                 mc->shift);
0152         ret = regmap_write(rt715->mbq_regmap, mc->reg + i, gain_val);
0153         if (ret != 0) {
0154             dev_err(component->dev, "Failed to write 0x%x=0x%x\n",
0155                 mc->reg + i, gain_val);
0156             return ret;
0157         }
0158     }
0159 
0160     return k_changed;
0161 }
0162 
0163 static int rt715_sdca_set_amp_gain_4ch_put(struct snd_kcontrol *kcontrol,
0164         struct snd_ctl_elem_value *ucontrol)
0165 {
0166     struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
0167     struct rt715_sdca_priv *rt715 = snd_soc_component_get_drvdata(component);
0168     struct rt715_sdca_kcontrol_private *p =
0169         (struct rt715_sdca_kcontrol_private *)kcontrol->private_value;
0170     unsigned int reg_base = p->reg_base, k_changed = 0;
0171     const unsigned int gain_sft = 0x2f;
0172     unsigned int gain_val, i;
0173     int ret;
0174 
0175     for (i = 0; i < 4; i++) {
0176         if (ucontrol->value.integer.value[i] != rt715->kctl_4ch_orig[i]) {
0177             k_changed = 1;
0178             break;
0179         }
0180     }
0181 
0182     for (i = 0; i < 4; i++) {
0183         rt715->kctl_4ch_orig[i] = ucontrol->value.integer.value[i];
0184         gain_val =
0185             rt715_sdca_vol_gain(ucontrol->value.integer.value[i], p->max,
0186                 gain_sft);
0187         ret = regmap_write(rt715->mbq_regmap, reg_base + i,
0188                 gain_val);
0189         if (ret != 0) {
0190             dev_err(component->dev, "Failed to write 0x%x=0x%x\n",
0191                 reg_base + i, gain_val);
0192             return ret;
0193         }
0194     }
0195 
0196     return k_changed;
0197 }
0198 
0199 static int rt715_sdca_set_amp_gain_8ch_put(struct snd_kcontrol *kcontrol,
0200         struct snd_ctl_elem_value *ucontrol)
0201 {
0202     struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
0203     struct rt715_sdca_priv *rt715 = snd_soc_component_get_drvdata(component);
0204     struct rt715_sdca_kcontrol_private *p =
0205         (struct rt715_sdca_kcontrol_private *)kcontrol->private_value;
0206     unsigned int reg_base = p->reg_base, i, k_changed = 0;
0207     const unsigned int gain_sft = 8;
0208     unsigned int gain_val, reg;
0209     int ret;
0210 
0211     for (i = 0; i < 8; i++) {
0212         if (ucontrol->value.integer.value[i] != rt715->kctl_8ch_orig[i]) {
0213             k_changed = 1;
0214             break;
0215         }
0216     }
0217 
0218     for (i = 0; i < 8; i++) {
0219         rt715->kctl_8ch_orig[i] = ucontrol->value.integer.value[i];
0220         gain_val =
0221             rt715_sdca_boost_gain(ucontrol->value.integer.value[i], p->max,
0222                 gain_sft);
0223         reg = i < 7 ? reg_base + i : (reg_base - 1) | BIT(15);
0224         ret = regmap_write(rt715->mbq_regmap, reg, gain_val);
0225         if (ret != 0) {
0226             dev_err(component->dev, "Failed to write 0x%x=0x%x\n",
0227                 reg, gain_val);
0228             return ret;
0229         }
0230     }
0231 
0232     return k_changed;
0233 }
0234 
0235 static int rt715_sdca_set_amp_gain_get(struct snd_kcontrol *kcontrol,
0236         struct snd_ctl_elem_value *ucontrol)
0237 {
0238     struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
0239     struct soc_mixer_control *mc =
0240         (struct soc_mixer_control *)kcontrol->private_value;
0241     struct rt715_sdca_priv *rt715 = snd_soc_component_get_drvdata(component);
0242     unsigned int val, i;
0243     int ret;
0244 
0245     for (i = 0; i < 2; i++) {
0246         ret = regmap_read(rt715->mbq_regmap, mc->reg + i, &val);
0247         if (ret < 0) {
0248             dev_err(component->dev, "Failed to read 0x%x, ret=%d\n",
0249                 mc->reg + i, ret);
0250             return ret;
0251         }
0252         ucontrol->value.integer.value[i] = rt715_sdca_get_gain(val, mc->shift);
0253     }
0254 
0255     return 0;
0256 }
0257 
0258 static int rt715_sdca_set_amp_gain_4ch_get(struct snd_kcontrol *kcontrol,
0259         struct snd_ctl_elem_value *ucontrol)
0260 {
0261     struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
0262     struct rt715_sdca_priv *rt715 = snd_soc_component_get_drvdata(component);
0263     struct rt715_sdca_kcontrol_private *p =
0264         (struct rt715_sdca_kcontrol_private *)kcontrol->private_value;
0265     unsigned int reg_base = p->reg_base, i;
0266     const unsigned int gain_sft = 0x2f;
0267     unsigned int val;
0268     int ret;
0269 
0270     for (i = 0; i < 4; i++) {
0271         ret = regmap_read(rt715->mbq_regmap, reg_base + i, &val);
0272         if (ret < 0) {
0273             dev_err(component->dev, "Failed to read 0x%x, ret=%d\n",
0274                 reg_base + i, ret);
0275             return ret;
0276         }
0277         ucontrol->value.integer.value[i] = rt715_sdca_get_gain(val, gain_sft);
0278     }
0279 
0280     return 0;
0281 }
0282 
0283 static int rt715_sdca_set_amp_gain_8ch_get(struct snd_kcontrol *kcontrol,
0284         struct snd_ctl_elem_value *ucontrol)
0285 {
0286     struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
0287     struct rt715_sdca_priv *rt715 = snd_soc_component_get_drvdata(component);
0288     struct rt715_sdca_kcontrol_private *p =
0289         (struct rt715_sdca_kcontrol_private *)kcontrol->private_value;
0290     unsigned int reg_base = p->reg_base;
0291     const unsigned int gain_sft = 8;
0292     unsigned int val_l, val_r;
0293     unsigned int i, reg;
0294     int ret;
0295 
0296     for (i = 0; i < 8; i += 2) {
0297         ret = regmap_read(rt715->mbq_regmap, reg_base + i, &val_l);
0298         if (ret < 0) {
0299             dev_err(component->dev, "Failed to read 0x%x, ret=%d\n",
0300                     reg_base + i, ret);
0301             return ret;
0302         }
0303         ucontrol->value.integer.value[i] = (val_l >> gain_sft) / 10;
0304 
0305         reg = (i == 6) ? (reg_base - 1) | BIT(15) : reg_base + 1 + i;
0306         ret = regmap_read(rt715->mbq_regmap, reg, &val_r);
0307         if (ret < 0) {
0308             dev_err(component->dev, "Failed to read 0x%x, ret=%d\n",
0309                     reg, ret);
0310             return ret;
0311         }
0312         ucontrol->value.integer.value[i + 1] = (val_r >> gain_sft) / 10;
0313     }
0314 
0315     return 0;
0316 }
0317 
0318 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -17625, 375, 0);
0319 static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, 0, 1000, 0);
0320 
0321 static int rt715_sdca_get_volsw(struct snd_kcontrol *kcontrol,
0322     struct snd_ctl_elem_value *ucontrol)
0323 {
0324     struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
0325     struct rt715_sdca_kcontrol_private *p =
0326         (struct rt715_sdca_kcontrol_private *)kcontrol->private_value;
0327     unsigned int reg_base = p->reg_base;
0328     unsigned int invert = p->invert, i;
0329     int val;
0330 
0331     for (i = 0; i < p->count; i += 2) {
0332         val = snd_soc_component_read(component, reg_base + i);
0333         if (val < 0)
0334             return -EINVAL;
0335         ucontrol->value.integer.value[i] = invert ? p->max - val : val;
0336 
0337         val = snd_soc_component_read(component, reg_base + 1 + i);
0338         if (val < 0)
0339             return -EINVAL;
0340         ucontrol->value.integer.value[i + 1] =
0341             invert ? p->max - val : val;
0342     }
0343 
0344     return 0;
0345 }
0346 
0347 static int rt715_sdca_put_volsw(struct snd_kcontrol *kcontrol,
0348     struct snd_ctl_elem_value *ucontrol)
0349 {
0350     struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
0351     struct rt715_sdca_priv *rt715 = snd_soc_component_get_drvdata(component);
0352     struct rt715_sdca_kcontrol_private *p =
0353         (struct rt715_sdca_kcontrol_private *)kcontrol->private_value;
0354     unsigned int val[4] = {0}, val_mask, i, k_changed = 0;
0355     unsigned int reg = p->reg_base;
0356     unsigned int shift = p->shift;
0357     unsigned int max = p->max;
0358     unsigned int mask = (1 << fls(max)) - 1;
0359     unsigned int invert = p->invert;
0360     int err;
0361 
0362     for (i = 0; i < 4; i++) {
0363         if (ucontrol->value.integer.value[i] != rt715->kctl_switch_orig[i]) {
0364             k_changed = 1;
0365             break;
0366         }
0367     }
0368 
0369     for (i = 0; i < 2; i++) {
0370         rt715->kctl_switch_orig[i * 2] = ucontrol->value.integer.value[i * 2];
0371         val[i * 2] = ucontrol->value.integer.value[i * 2] & mask;
0372         if (invert)
0373             val[i * 2] = max - val[i * 2];
0374         val_mask = mask << shift;
0375         val[i * 2] <<= shift;
0376 
0377         rt715->kctl_switch_orig[i * 2 + 1] =
0378             ucontrol->value.integer.value[i * 2 + 1];
0379         val[i * 2 + 1] =
0380             ucontrol->value.integer.value[i * 2 + 1] & mask;
0381         if (invert)
0382             val[i * 2 + 1] = max - val[i * 2 + 1];
0383 
0384         val[i * 2 + 1] <<=  shift;
0385 
0386         err = snd_soc_component_update_bits(component, reg + i * 2, val_mask,
0387                 val[i * 2]);
0388         if (err < 0)
0389             return err;
0390 
0391         err = snd_soc_component_update_bits(component, reg + 1 + i * 2,
0392             val_mask, val[i * 2 + 1]);
0393         if (err < 0)
0394             return err;
0395     }
0396 
0397     return k_changed;
0398 }
0399 
0400 static int rt715_sdca_fu_info(struct snd_kcontrol *kcontrol,
0401     struct snd_ctl_elem_info *uinfo)
0402 {
0403     struct rt715_sdca_kcontrol_private *p =
0404         (struct rt715_sdca_kcontrol_private *)kcontrol->private_value;
0405 
0406     if (p->max == 1)
0407         uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
0408     else
0409         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
0410     uinfo->count = p->count;
0411     uinfo->value.integer.min = 0;
0412     uinfo->value.integer.max = p->max;
0413     return 0;
0414 }
0415 
0416 #define RT715_SDCA_PR_VALUE(xreg_base, xcount, xmax, xshift, xinvert) \
0417     ((unsigned long)&(struct rt715_sdca_kcontrol_private) \
0418         {.reg_base = xreg_base, .count = xcount, .max = xmax, \
0419         .shift = xshift, .invert = xinvert})
0420 
0421 #define RT715_SDCA_FU_CTRL(xname, reg_base, xshift, xmax, xinvert, xcount) \
0422 {   .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
0423     .info = rt715_sdca_fu_info, \
0424     .get = rt715_sdca_get_volsw, \
0425     .put = rt715_sdca_put_volsw, \
0426     .private_value = RT715_SDCA_PR_VALUE(reg_base, xcount, xmax, \
0427                     xshift, xinvert)}
0428 
0429 #define SOC_DOUBLE_R_EXT(xname, reg_left, reg_right, xshift, xmax, xinvert,\
0430      xhandler_get, xhandler_put) \
0431 {   .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
0432     .info = snd_soc_info_volsw, \
0433     .get = xhandler_get, .put = xhandler_put, \
0434     .private_value = SOC_DOUBLE_R_VALUE(reg_left, reg_right, xshift, \
0435                         xmax, xinvert) }
0436 
0437 #define RT715_SDCA_EXT_TLV(xname, reg_base, xhandler_get,\
0438      xhandler_put, tlv_array, xcount, xmax) \
0439 {   .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
0440     .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
0441          SNDRV_CTL_ELEM_ACCESS_READWRITE, \
0442     .tlv.p = (tlv_array), \
0443     .info = rt715_sdca_fu_info, \
0444     .get = xhandler_get, .put = xhandler_put, \
0445     .private_value = RT715_SDCA_PR_VALUE(reg_base, xcount, xmax, 0, 0) }
0446 
0447 #define RT715_SDCA_BOOST_EXT_TLV(xname, reg_base, xhandler_get,\
0448      xhandler_put, tlv_array, xcount, xmax) \
0449 {   .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
0450     .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
0451          SNDRV_CTL_ELEM_ACCESS_READWRITE, \
0452     .tlv.p = (tlv_array), \
0453     .info = rt715_sdca_fu_info, \
0454     .get = xhandler_get, .put = xhandler_put, \
0455     .private_value = RT715_SDCA_PR_VALUE(reg_base, xcount, xmax, 0, 0) }
0456 
0457 static const struct snd_kcontrol_new rt715_sdca_snd_controls[] = {
0458     /* Capture switch */
0459     SOC_DOUBLE_R("FU0A Capture Switch",
0460         SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_ADC7_27_VOL,
0461             RT715_SDCA_FU_MUTE_CTRL, CH_01),
0462         SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_ADC7_27_VOL,
0463             RT715_SDCA_FU_MUTE_CTRL, CH_02),
0464             0, 1, 1),
0465     RT715_SDCA_FU_CTRL("FU02 Capture Switch",
0466         SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_ADC8_9_VOL,
0467             RT715_SDCA_FU_MUTE_CTRL, CH_01),
0468             0, 1, 1, 4),
0469     RT715_SDCA_FU_CTRL("FU06 Capture Switch",
0470         SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_ADC10_11_VOL,
0471             RT715_SDCA_FU_MUTE_CTRL, CH_01),
0472             0, 1, 1, 4),
0473     /* Volume Control */
0474     SOC_DOUBLE_R_EXT_TLV("FU0A Capture Volume",
0475         SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_ADC7_27_VOL,
0476             RT715_SDCA_FU_VOL_CTRL, CH_01),
0477         SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_ADC7_27_VOL,
0478             RT715_SDCA_FU_VOL_CTRL, CH_02),
0479             0x2f, 0x7f, 0,
0480         rt715_sdca_set_amp_gain_get, rt715_sdca_set_amp_gain_put,
0481         in_vol_tlv),
0482     RT715_SDCA_EXT_TLV("FU02 Capture Volume",
0483         SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_ADC8_9_VOL,
0484             RT715_SDCA_FU_VOL_CTRL, CH_01),
0485         rt715_sdca_set_amp_gain_4ch_get,
0486         rt715_sdca_set_amp_gain_4ch_put,
0487         in_vol_tlv, 4, 0x7f),
0488     RT715_SDCA_EXT_TLV("FU06 Capture Volume",
0489         SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_ADC10_11_VOL,
0490             RT715_SDCA_FU_VOL_CTRL, CH_01),
0491         rt715_sdca_set_amp_gain_4ch_get,
0492         rt715_sdca_set_amp_gain_4ch_put,
0493         in_vol_tlv, 4, 0x7f),
0494     /* MIC Boost Control */
0495     RT715_SDCA_BOOST_EXT_TLV("FU0E Boost",
0496         SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_DMIC_GAIN_EN,
0497             RT715_SDCA_FU_DMIC_GAIN_CTRL, CH_01),
0498             rt715_sdca_set_amp_gain_8ch_get,
0499             rt715_sdca_set_amp_gain_8ch_put,
0500             mic_vol_tlv, 8, 3),
0501     RT715_SDCA_BOOST_EXT_TLV("FU0C Boost",
0502         SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_AMIC_GAIN_EN,
0503             RT715_SDCA_FU_DMIC_GAIN_CTRL, CH_01),
0504             rt715_sdca_set_amp_gain_8ch_get,
0505             rt715_sdca_set_amp_gain_8ch_put,
0506             mic_vol_tlv, 8, 3),
0507 };
0508 
0509 static int rt715_sdca_mux_get(struct snd_kcontrol *kcontrol,
0510             struct snd_ctl_elem_value *ucontrol)
0511 {
0512     struct snd_soc_component *component =
0513         snd_soc_dapm_kcontrol_component(kcontrol);
0514     struct rt715_sdca_priv *rt715 = snd_soc_component_get_drvdata(component);
0515     unsigned int val, mask_sft;
0516 
0517     if (strstr(ucontrol->id.name, "ADC 22 Mux"))
0518         mask_sft = 12;
0519     else if (strstr(ucontrol->id.name, "ADC 23 Mux"))
0520         mask_sft = 8;
0521     else if (strstr(ucontrol->id.name, "ADC 24 Mux"))
0522         mask_sft = 4;
0523     else if (strstr(ucontrol->id.name, "ADC 25 Mux"))
0524         mask_sft = 0;
0525     else
0526         return -EINVAL;
0527 
0528     rt715_sdca_index_read(rt715, RT715_VENDOR_HDA_CTL,
0529         RT715_HDA_LEGACY_MUX_CTL1, &val);
0530     val = (val >> mask_sft) & 0xf;
0531 
0532     /*
0533      * The first two indices of ADC Mux 24/25 are routed to the same
0534      * hardware source. ie, ADC Mux 24 0/1 will both connect to MIC2.
0535      * To have a unique set of inputs, we skip the index1 of the muxes.
0536      */
0537     if ((strstr(ucontrol->id.name, "ADC 24 Mux") ||
0538         strstr(ucontrol->id.name, "ADC 25 Mux")) && val > 0)
0539         val -= 1;
0540     ucontrol->value.enumerated.item[0] = val;
0541 
0542     return 0;
0543 }
0544 
0545 static int rt715_sdca_mux_put(struct snd_kcontrol *kcontrol,
0546             struct snd_ctl_elem_value *ucontrol)
0547 {
0548     struct snd_soc_component *component =
0549         snd_soc_dapm_kcontrol_component(kcontrol);
0550     struct snd_soc_dapm_context *dapm =
0551                 snd_soc_dapm_kcontrol_dapm(kcontrol);
0552     struct rt715_sdca_priv *rt715 = snd_soc_component_get_drvdata(component);
0553     struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
0554     unsigned int *item = ucontrol->value.enumerated.item;
0555     unsigned int val, val2 = 0, change, mask_sft;
0556 
0557     if (item[0] >= e->items)
0558         return -EINVAL;
0559 
0560     if (strstr(ucontrol->id.name, "ADC 22 Mux"))
0561         mask_sft = 12;
0562     else if (strstr(ucontrol->id.name, "ADC 23 Mux"))
0563         mask_sft = 8;
0564     else if (strstr(ucontrol->id.name, "ADC 24 Mux"))
0565         mask_sft = 4;
0566     else if (strstr(ucontrol->id.name, "ADC 25 Mux"))
0567         mask_sft = 0;
0568     else
0569         return -EINVAL;
0570 
0571     /* Verb ID = 0x701h, nid = e->reg */
0572     val = snd_soc_enum_item_to_val(e, item[0]) << e->shift_l;
0573 
0574     rt715_sdca_index_read(rt715, RT715_VENDOR_HDA_CTL,
0575         RT715_HDA_LEGACY_MUX_CTL1, &val2);
0576     val2 = (val2 >> mask_sft) & 0xf;
0577 
0578     change = val != val2;
0579 
0580     if (change)
0581         rt715_sdca_index_update_bits(rt715, RT715_VENDOR_HDA_CTL,
0582             RT715_HDA_LEGACY_MUX_CTL1, 0xf << mask_sft, val << mask_sft);
0583 
0584     snd_soc_dapm_mux_update_power(dapm, kcontrol, item[0], e, NULL);
0585 
0586     return change;
0587 }
0588 
0589 static const char * const adc_22_23_mux_text[] = {
0590     "MIC1",
0591     "MIC2",
0592     "LINE1",
0593     "LINE2",
0594     "DMIC1",
0595     "DMIC2",
0596     "DMIC3",
0597     "DMIC4",
0598 };
0599 
0600 /*
0601  * Due to mux design for nid 24 (MUX_IN3)/25 (MUX_IN4), connection index 0 and
0602  * 1 will be connected to the same dmic source, therefore we skip index 1 to
0603  * avoid misunderstanding on usage of dapm routing.
0604  */
0605 static int rt715_adc_24_25_values[] = {
0606     0,
0607     2,
0608     3,
0609     4,
0610     5,
0611 };
0612 
0613 static const char * const adc_24_mux_text[] = {
0614     "MIC2",
0615     "DMIC1",
0616     "DMIC2",
0617     "DMIC3",
0618     "DMIC4",
0619 };
0620 
0621 static const char * const adc_25_mux_text[] = {
0622     "MIC1",
0623     "DMIC1",
0624     "DMIC2",
0625     "DMIC3",
0626     "DMIC4",
0627 };
0628 
0629 static SOC_ENUM_SINGLE_DECL(rt715_adc22_enum, SND_SOC_NOPM, 0,
0630     adc_22_23_mux_text);
0631 
0632 static SOC_ENUM_SINGLE_DECL(rt715_adc23_enum, SND_SOC_NOPM, 0,
0633     adc_22_23_mux_text);
0634 
0635 static SOC_VALUE_ENUM_SINGLE_DECL(rt715_adc24_enum,
0636     SND_SOC_NOPM, 0, 0xf,
0637     adc_24_mux_text, rt715_adc_24_25_values);
0638 static SOC_VALUE_ENUM_SINGLE_DECL(rt715_adc25_enum,
0639     SND_SOC_NOPM, 0, 0xf,
0640     adc_25_mux_text, rt715_adc_24_25_values);
0641 
0642 static const struct snd_kcontrol_new rt715_adc22_mux =
0643     SOC_DAPM_ENUM_EXT("ADC 22 Mux", rt715_adc22_enum,
0644             rt715_sdca_mux_get, rt715_sdca_mux_put);
0645 
0646 static const struct snd_kcontrol_new rt715_adc23_mux =
0647     SOC_DAPM_ENUM_EXT("ADC 23 Mux", rt715_adc23_enum,
0648             rt715_sdca_mux_get, rt715_sdca_mux_put);
0649 
0650 static const struct snd_kcontrol_new rt715_adc24_mux =
0651     SOC_DAPM_ENUM_EXT("ADC 24 Mux", rt715_adc24_enum,
0652             rt715_sdca_mux_get, rt715_sdca_mux_put);
0653 
0654 static const struct snd_kcontrol_new rt715_adc25_mux =
0655     SOC_DAPM_ENUM_EXT("ADC 25 Mux", rt715_adc25_enum,
0656             rt715_sdca_mux_get, rt715_sdca_mux_put);
0657 
0658 static int rt715_sdca_pde23_24_event(struct snd_soc_dapm_widget *w,
0659     struct snd_kcontrol *kcontrol, int event)
0660 {
0661     struct snd_soc_component *component =
0662         snd_soc_dapm_to_component(w->dapm);
0663     struct rt715_sdca_priv *rt715 = snd_soc_component_get_drvdata(component);
0664 
0665     switch (event) {
0666     case SND_SOC_DAPM_POST_PMU:
0667         regmap_write(rt715->regmap,
0668             SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_CREQ_POW_EN,
0669                 RT715_SDCA_REQ_POW_CTRL,
0670                 CH_00), 0x00);
0671         break;
0672     case SND_SOC_DAPM_PRE_PMD:
0673         regmap_write(rt715->regmap,
0674             SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_CREQ_POW_EN,
0675                 RT715_SDCA_REQ_POW_CTRL,
0676                 CH_00), 0x03);
0677         break;
0678     }
0679     return 0;
0680 }
0681 
0682 static const struct snd_soc_dapm_widget rt715_sdca_dapm_widgets[] = {
0683     SND_SOC_DAPM_INPUT("DMIC1"),
0684     SND_SOC_DAPM_INPUT("DMIC2"),
0685     SND_SOC_DAPM_INPUT("DMIC3"),
0686     SND_SOC_DAPM_INPUT("DMIC4"),
0687     SND_SOC_DAPM_INPUT("MIC1"),
0688     SND_SOC_DAPM_INPUT("MIC2"),
0689     SND_SOC_DAPM_INPUT("LINE1"),
0690     SND_SOC_DAPM_INPUT("LINE2"),
0691 
0692     SND_SOC_DAPM_SUPPLY("PDE23_24", SND_SOC_NOPM, 0, 0,
0693         rt715_sdca_pde23_24_event,
0694         SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
0695 
0696     SND_SOC_DAPM_ADC("ADC 07", NULL, SND_SOC_NOPM, 4, 0),
0697     SND_SOC_DAPM_ADC("ADC 08", NULL, SND_SOC_NOPM, 4, 0),
0698     SND_SOC_DAPM_ADC("ADC 09", NULL, SND_SOC_NOPM, 4, 0),
0699     SND_SOC_DAPM_ADC("ADC 27", NULL, SND_SOC_NOPM, 4, 0),
0700     SND_SOC_DAPM_MUX("ADC 22 Mux", SND_SOC_NOPM, 0, 0,
0701         &rt715_adc22_mux),
0702     SND_SOC_DAPM_MUX("ADC 23 Mux", SND_SOC_NOPM, 0, 0,
0703         &rt715_adc23_mux),
0704     SND_SOC_DAPM_MUX("ADC 24 Mux", SND_SOC_NOPM, 0, 0,
0705         &rt715_adc24_mux),
0706     SND_SOC_DAPM_MUX("ADC 25 Mux", SND_SOC_NOPM, 0, 0,
0707         &rt715_adc25_mux),
0708     SND_SOC_DAPM_AIF_OUT("DP4TX", "DP4 Capture", 0, SND_SOC_NOPM, 0, 0),
0709     SND_SOC_DAPM_AIF_OUT("DP6TX", "DP6 Capture", 0, SND_SOC_NOPM, 0, 0),
0710 };
0711 
0712 static const struct snd_soc_dapm_route rt715_sdca_audio_map[] = {
0713     {"DP6TX", NULL, "ADC 09"},
0714     {"DP6TX", NULL, "ADC 08"},
0715     {"DP4TX", NULL, "ADC 07"},
0716     {"DP4TX", NULL, "ADC 27"},
0717     {"DP4TX", NULL, "ADC 09"},
0718     {"DP4TX", NULL, "ADC 08"},
0719 
0720     {"LINE1", NULL, "PDE23_24"},
0721     {"LINE2", NULL, "PDE23_24"},
0722     {"MIC1", NULL, "PDE23_24"},
0723     {"MIC2", NULL, "PDE23_24"},
0724     {"DMIC1", NULL, "PDE23_24"},
0725     {"DMIC2", NULL, "PDE23_24"},
0726     {"DMIC3", NULL, "PDE23_24"},
0727     {"DMIC4", NULL, "PDE23_24"},
0728 
0729     {"ADC 09", NULL, "ADC 22 Mux"},
0730     {"ADC 08", NULL, "ADC 23 Mux"},
0731     {"ADC 07", NULL, "ADC 24 Mux"},
0732     {"ADC 27", NULL, "ADC 25 Mux"},
0733     {"ADC 22 Mux", "MIC1", "MIC1"},
0734     {"ADC 22 Mux", "MIC2", "MIC2"},
0735     {"ADC 22 Mux", "LINE1", "LINE1"},
0736     {"ADC 22 Mux", "LINE2", "LINE2"},
0737     {"ADC 22 Mux", "DMIC1", "DMIC1"},
0738     {"ADC 22 Mux", "DMIC2", "DMIC2"},
0739     {"ADC 22 Mux", "DMIC3", "DMIC3"},
0740     {"ADC 22 Mux", "DMIC4", "DMIC4"},
0741     {"ADC 23 Mux", "MIC1", "MIC1"},
0742     {"ADC 23 Mux", "MIC2", "MIC2"},
0743     {"ADC 23 Mux", "LINE1", "LINE1"},
0744     {"ADC 23 Mux", "LINE2", "LINE2"},
0745     {"ADC 23 Mux", "DMIC1", "DMIC1"},
0746     {"ADC 23 Mux", "DMIC2", "DMIC2"},
0747     {"ADC 23 Mux", "DMIC3", "DMIC3"},
0748     {"ADC 23 Mux", "DMIC4", "DMIC4"},
0749     {"ADC 24 Mux", "MIC2", "MIC2"},
0750     {"ADC 24 Mux", "DMIC1", "DMIC1"},
0751     {"ADC 24 Mux", "DMIC2", "DMIC2"},
0752     {"ADC 24 Mux", "DMIC3", "DMIC3"},
0753     {"ADC 24 Mux", "DMIC4", "DMIC4"},
0754     {"ADC 25 Mux", "MIC1", "MIC1"},
0755     {"ADC 25 Mux", "DMIC1", "DMIC1"},
0756     {"ADC 25 Mux", "DMIC2", "DMIC2"},
0757     {"ADC 25 Mux", "DMIC3", "DMIC3"},
0758     {"ADC 25 Mux", "DMIC4", "DMIC4"},
0759 };
0760 
0761 static int rt715_sdca_probe(struct snd_soc_component *component)
0762 {
0763     int ret;
0764 
0765     ret = pm_runtime_resume(component->dev);
0766     if (ret < 0 && ret != -EACCES)
0767         return ret;
0768 
0769     return 0;
0770 }
0771 
0772 static const struct snd_soc_component_driver soc_codec_dev_rt715_sdca = {
0773     .probe = rt715_sdca_probe,
0774     .controls = rt715_sdca_snd_controls,
0775     .num_controls = ARRAY_SIZE(rt715_sdca_snd_controls),
0776     .dapm_widgets = rt715_sdca_dapm_widgets,
0777     .num_dapm_widgets = ARRAY_SIZE(rt715_sdca_dapm_widgets),
0778     .dapm_routes = rt715_sdca_audio_map,
0779     .num_dapm_routes = ARRAY_SIZE(rt715_sdca_audio_map),
0780     .endianness = 1,
0781 };
0782 
0783 static int rt715_sdca_set_sdw_stream(struct snd_soc_dai *dai, void *sdw_stream,
0784                 int direction)
0785 {
0786     struct rt715_sdw_stream_data *stream;
0787 
0788     stream = kzalloc(sizeof(*stream), GFP_KERNEL);
0789     if (!stream)
0790         return -ENOMEM;
0791 
0792     stream->sdw_stream = sdw_stream;
0793 
0794     /* Use tx_mask or rx_mask to configure stream tag and set dma_data */
0795     if (direction == SNDRV_PCM_STREAM_PLAYBACK)
0796         dai->playback_dma_data = stream;
0797     else
0798         dai->capture_dma_data = stream;
0799 
0800     return 0;
0801 }
0802 
0803 static void rt715_sdca_shutdown(struct snd_pcm_substream *substream,
0804                 struct snd_soc_dai *dai)
0805 
0806 {
0807     struct rt715_sdw_stream_data *stream;
0808 
0809     stream = snd_soc_dai_get_dma_data(dai, substream);
0810     if (!stream)
0811         return;
0812 
0813     snd_soc_dai_set_dma_data(dai, substream, NULL);
0814     kfree(stream);
0815 }
0816 
0817 static int rt715_sdca_pcm_hw_params(struct snd_pcm_substream *substream,
0818                 struct snd_pcm_hw_params *params,
0819                 struct snd_soc_dai *dai)
0820 {
0821     struct snd_soc_component *component = dai->component;
0822     struct rt715_sdca_priv *rt715 = snd_soc_component_get_drvdata(component);
0823     struct sdw_stream_config stream_config;
0824     struct sdw_port_config port_config;
0825     enum sdw_data_direction direction;
0826     struct rt715_sdw_stream_data *stream;
0827     int retval, port, num_channels;
0828     unsigned int val;
0829 
0830     stream = snd_soc_dai_get_dma_data(dai, substream);
0831 
0832     if (!stream)
0833         return -EINVAL;
0834 
0835     if (!rt715->slave)
0836         return -EINVAL;
0837 
0838     switch (dai->id) {
0839     case RT715_AIF1:
0840         direction = SDW_DATA_DIR_TX;
0841         port = 6;
0842         rt715_sdca_index_write(rt715, RT715_VENDOR_REG, RT715_SDW_INPUT_SEL,
0843             0xa500);
0844         break;
0845     case RT715_AIF2:
0846         direction = SDW_DATA_DIR_TX;
0847         port = 4;
0848         rt715_sdca_index_write(rt715, RT715_VENDOR_REG, RT715_SDW_INPUT_SEL,
0849             0xaf00);
0850         break;
0851     default:
0852         dev_err(component->dev, "Invalid DAI id %d\n", dai->id);
0853         return -EINVAL;
0854     }
0855 
0856     stream_config.frame_rate =  params_rate(params);
0857     stream_config.ch_count = params_channels(params);
0858     stream_config.bps = snd_pcm_format_width(params_format(params));
0859     stream_config.direction = direction;
0860 
0861     num_channels = params_channels(params);
0862     port_config.ch_mask = GENMASK(num_channels - 1, 0);
0863     port_config.num = port;
0864 
0865     retval = sdw_stream_add_slave(rt715->slave, &stream_config,
0866                     &port_config, 1, stream->sdw_stream);
0867     if (retval) {
0868         dev_err(component->dev, "Unable to configure port, retval:%d\n",
0869             retval);
0870         return retval;
0871     }
0872 
0873     switch (params_rate(params)) {
0874     case 8000:
0875         val = 0x1;
0876         break;
0877     case 11025:
0878         val = 0x2;
0879         break;
0880     case 12000:
0881         val = 0x3;
0882         break;
0883     case 16000:
0884         val = 0x4;
0885         break;
0886     case 22050:
0887         val = 0x5;
0888         break;
0889     case 24000:
0890         val = 0x6;
0891         break;
0892     case 32000:
0893         val = 0x7;
0894         break;
0895     case 44100:
0896         val = 0x8;
0897         break;
0898     case 48000:
0899         val = 0x9;
0900         break;
0901     case 88200:
0902         val = 0xa;
0903         break;
0904     case 96000:
0905         val = 0xb;
0906         break;
0907     case 176400:
0908         val = 0xc;
0909         break;
0910     case 192000:
0911         val = 0xd;
0912         break;
0913     case 384000:
0914         val = 0xe;
0915         break;
0916     case 768000:
0917         val = 0xf;
0918         break;
0919     default:
0920         dev_err(component->dev, "Unsupported sample rate %d\n",
0921             params_rate(params));
0922         return -EINVAL;
0923     }
0924 
0925     regmap_write(rt715->regmap,
0926         SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_CS_FREQ_IND_EN,
0927             RT715_SDCA_FREQ_IND_CTRL, CH_00), val);
0928 
0929     return 0;
0930 }
0931 
0932 static int rt715_sdca_pcm_hw_free(struct snd_pcm_substream *substream,
0933                 struct snd_soc_dai *dai)
0934 {
0935     struct snd_soc_component *component = dai->component;
0936     struct rt715_sdca_priv *rt715 = snd_soc_component_get_drvdata(component);
0937     struct rt715_sdw_stream_data *stream =
0938         snd_soc_dai_get_dma_data(dai, substream);
0939 
0940     if (!rt715->slave)
0941         return -EINVAL;
0942 
0943     sdw_stream_remove_slave(rt715->slave, stream->sdw_stream);
0944     return 0;
0945 }
0946 
0947 #define RT715_STEREO_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000)
0948 #define RT715_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
0949             SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
0950 
0951 static const struct snd_soc_dai_ops rt715_sdca_ops = {
0952     .hw_params  = rt715_sdca_pcm_hw_params,
0953     .hw_free    = rt715_sdca_pcm_hw_free,
0954     .set_stream = rt715_sdca_set_sdw_stream,
0955     .shutdown   = rt715_sdca_shutdown,
0956 };
0957 
0958 static struct snd_soc_dai_driver rt715_sdca_dai[] = {
0959     {
0960         .name = "rt715-aif1",
0961         .id = RT715_AIF1,
0962         .capture = {
0963             .stream_name = "DP6 Capture",
0964             .channels_min = 1,
0965             .channels_max = 2,
0966             .rates = RT715_STEREO_RATES,
0967             .formats = RT715_FORMATS,
0968         },
0969         .ops = &rt715_sdca_ops,
0970     },
0971     {
0972         .name = "rt715-aif2",
0973         .id = RT715_AIF2,
0974         .capture = {
0975             .stream_name = "DP4 Capture",
0976             .channels_min = 1,
0977             .channels_max = 2,
0978             .rates = RT715_STEREO_RATES,
0979             .formats = RT715_FORMATS,
0980         },
0981         .ops = &rt715_sdca_ops,
0982     },
0983 };
0984 
0985 /* Bus clock frequency */
0986 #define RT715_CLK_FREQ_9600000HZ 9600000
0987 #define RT715_CLK_FREQ_12000000HZ 12000000
0988 #define RT715_CLK_FREQ_6000000HZ 6000000
0989 #define RT715_CLK_FREQ_4800000HZ 4800000
0990 #define RT715_CLK_FREQ_2400000HZ 2400000
0991 #define RT715_CLK_FREQ_12288000HZ 12288000
0992 
0993 int rt715_sdca_init(struct device *dev, struct regmap *mbq_regmap,
0994     struct regmap *regmap, struct sdw_slave *slave)
0995 {
0996     struct rt715_sdca_priv *rt715;
0997     int ret;
0998 
0999     rt715 = devm_kzalloc(dev, sizeof(*rt715), GFP_KERNEL);
1000     if (!rt715)
1001         return -ENOMEM;
1002 
1003     dev_set_drvdata(dev, rt715);
1004     rt715->slave = slave;
1005     rt715->regmap = regmap;
1006     rt715->mbq_regmap = mbq_regmap;
1007     rt715->hw_sdw_ver = slave->id.sdw_version;
1008     /*
1009      * Mark hw_init to false
1010      * HW init will be performed when device reports present
1011      */
1012     rt715->hw_init = false;
1013     rt715->first_hw_init = false;
1014 
1015     ret = devm_snd_soc_register_component(dev,
1016             &soc_codec_dev_rt715_sdca,
1017             rt715_sdca_dai,
1018             ARRAY_SIZE(rt715_sdca_dai));
1019 
1020     return ret;
1021 }
1022 
1023 int rt715_sdca_io_init(struct device *dev, struct sdw_slave *slave)
1024 {
1025     struct rt715_sdca_priv *rt715 = dev_get_drvdata(dev);
1026     unsigned int hw_ver;
1027 
1028     if (rt715->hw_init)
1029         return 0;
1030 
1031     /*
1032      * PM runtime is only enabled when a Slave reports as Attached
1033      */
1034     if (!rt715->first_hw_init) {
1035         /* set autosuspend parameters */
1036         pm_runtime_set_autosuspend_delay(&slave->dev, 3000);
1037         pm_runtime_use_autosuspend(&slave->dev);
1038 
1039         /* update count of parent 'active' children */
1040         pm_runtime_set_active(&slave->dev);
1041 
1042         /* make sure the device does not suspend immediately */
1043         pm_runtime_mark_last_busy(&slave->dev);
1044 
1045         pm_runtime_enable(&slave->dev);
1046 
1047         rt715->first_hw_init = true;
1048     }
1049 
1050     pm_runtime_get_noresume(&slave->dev);
1051 
1052     rt715_sdca_index_read(rt715, RT715_VENDOR_REG,
1053         RT715_PRODUCT_NUM, &hw_ver);
1054     hw_ver = hw_ver & 0x000f;
1055 
1056     /* set clock selector = external */
1057     regmap_write(rt715->regmap,
1058         SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_CX_CLK_SEL_EN,
1059             RT715_SDCA_CX_CLK_SEL_CTRL, CH_00), 0x1);
1060     /* set GPIO_4/5/6 to be 3rd/4th DMIC usage */
1061     if (hw_ver == 0x0)
1062         rt715_sdca_index_update_bits(rt715, RT715_VENDOR_REG,
1063             RT715_AD_FUNC_EN, 0x54, 0x54);
1064     else if (hw_ver == 0x1) {
1065         rt715_sdca_index_update_bits(rt715, RT715_VENDOR_REG,
1066             RT715_AD_FUNC_EN, 0x55, 0x55);
1067         rt715_sdca_index_update_bits(rt715, RT715_VENDOR_REG,
1068             RT715_REV_1, 0x40, 0x40);
1069     }
1070     /* DFLL Calibration trigger */
1071     rt715_sdca_index_update_bits(rt715, RT715_VENDOR_REG,
1072             RT715_DFLL_VAD, 0x1, 0x1);
1073     /* trigger mode = VAD enable */
1074     regmap_write(rt715->regmap,
1075         SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_SMPU_TRIG_ST_EN,
1076             RT715_SDCA_SMPU_TRIG_EN_CTRL, CH_00), 0x2);
1077     /* SMPU-1 interrupt enable mask */
1078     regmap_update_bits(rt715->regmap, RT715_INT_MASK, 0x1, 0x1);
1079 
1080     /* Mark Slave initialization complete */
1081     rt715->hw_init = true;
1082 
1083     pm_runtime_mark_last_busy(&slave->dev);
1084     pm_runtime_put_autosuspend(&slave->dev);
1085 
1086     return 0;
1087 }
1088 
1089 MODULE_DESCRIPTION("ASoC rt715 driver SDW SDCA");
1090 MODULE_AUTHOR("Jack Yu <jack.yu@realtek.com>");
1091 MODULE_LICENSE("GPL v2");
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