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0001 // SPDX-License-Identifier: GPL-2.0
0002 //
0003 // rt711-sdw.c -- rt711 ALSA SoC audio driver
0004 //
0005 // Copyright(c) 2019 Realtek Semiconductor Corp.
0006 //
0007 //
0008 
0009 #include <linux/delay.h>
0010 #include <linux/device.h>
0011 #include <linux/mod_devicetable.h>
0012 #include <linux/soundwire/sdw.h>
0013 #include <linux/soundwire/sdw_type.h>
0014 #include <linux/soundwire/sdw_registers.h>
0015 #include <linux/module.h>
0016 #include <linux/pm_runtime.h>
0017 #include <linux/regmap.h>
0018 #include <sound/soc.h>
0019 #include "rt711.h"
0020 #include "rt711-sdw.h"
0021 
0022 static bool rt711_readable_register(struct device *dev, unsigned int reg)
0023 {
0024     switch (reg) {
0025     case 0x00e0:
0026     case 0x00f0:
0027     case 0x2012 ... 0x2016:
0028     case 0x201a ... 0x2027:
0029     case 0x2029 ... 0x202a:
0030     case 0x202d ... 0x2034:
0031     case 0x2201 ... 0x2204:
0032     case 0x2206 ... 0x2212:
0033     case 0x2220 ... 0x2223:
0034     case 0x2230 ... 0x2239:
0035     case 0x2f01 ... 0x2f0f:
0036     case 0x3000 ... 0x3fff:
0037     case 0x7000 ... 0x7fff:
0038     case 0x8300 ... 0x83ff:
0039     case 0x9c00 ... 0x9cff:
0040     case 0xb900 ... 0xb9ff:
0041     case 0x752009:
0042     case 0x752011:
0043     case 0x75201a:
0044     case 0x752045:
0045     case 0x752046:
0046     case 0x752048:
0047     case 0x75204a:
0048     case 0x75206b:
0049     case 0x75206f:
0050     case 0x752080:
0051     case 0x752081:
0052     case 0x752091:
0053     case 0x755800:
0054         return true;
0055     default:
0056         return false;
0057     }
0058 }
0059 
0060 static bool rt711_volatile_register(struct device *dev, unsigned int reg)
0061 {
0062     switch (reg) {
0063     case 0x2016:
0064     case 0x201b:
0065     case 0x201c:
0066     case 0x201d:
0067     case 0x201f:
0068     case 0x2021:
0069     case 0x2023:
0070     case 0x2230:
0071     case 0x2012 ... 0x2015: /* HD-A read */
0072     case 0x202d ... 0x202f: /* BRA */
0073     case 0x2201 ... 0x2212: /* i2c debug */
0074     case 0x2220 ... 0x2223: /* decoded HD-A */
0075     case 0x9c00 ... 0x9cff:
0076     case 0xb900 ... 0xb9ff:
0077     case 0xff01:
0078     case 0x75201a:
0079     case 0x752046:
0080     case 0x752080:
0081     case 0x752081:
0082     case 0x755800:
0083         return true;
0084     default:
0085         return false;
0086     }
0087 }
0088 
0089 static int rt711_sdw_read(void *context, unsigned int reg, unsigned int *val)
0090 {
0091     struct device *dev = context;
0092     struct rt711_priv *rt711 = dev_get_drvdata(dev);
0093     unsigned int sdw_data_3, sdw_data_2, sdw_data_1, sdw_data_0;
0094     unsigned int reg2 = 0, reg3 = 0, reg4 = 0, mask, nid, val2;
0095     unsigned int is_hda_reg = 1, is_index_reg = 0;
0096     int ret;
0097 
0098     if (reg > 0xffff)
0099         is_index_reg = 1;
0100 
0101     mask = reg & 0xf000;
0102 
0103     if (is_index_reg) { /* index registers */
0104         val2 = reg & 0xff;
0105         reg = reg >> 8;
0106         nid = reg & 0xff;
0107         ret = regmap_write(rt711->sdw_regmap, reg, 0);
0108         if (ret < 0)
0109             return ret;
0110         reg2 = reg + 0x1000;
0111         reg2 |= 0x80;
0112         ret = regmap_write(rt711->sdw_regmap, reg2, val2);
0113         if (ret < 0)
0114             return ret;
0115 
0116         reg3 = RT711_PRIV_DATA_R_H | nid;
0117         ret = regmap_write(rt711->sdw_regmap,
0118             reg3, ((*val >> 8) & 0xff));
0119         if (ret < 0)
0120             return ret;
0121         reg4 = reg3 + 0x1000;
0122         reg4 |= 0x80;
0123         ret = regmap_write(rt711->sdw_regmap, reg4, (*val & 0xff));
0124         if (ret < 0)
0125             return ret;
0126     } else if (mask   == 0x3000) {
0127         reg += 0x8000;
0128         ret = regmap_write(rt711->sdw_regmap, reg, *val);
0129         if (ret < 0)
0130             return ret;
0131     } else if (mask == 0x7000) {
0132         reg += 0x2000;
0133         reg |= 0x800;
0134         ret = regmap_write(rt711->sdw_regmap,
0135             reg, ((*val >> 8) & 0xff));
0136         if (ret < 0)
0137             return ret;
0138         reg2 = reg + 0x1000;
0139         reg2 |= 0x80;
0140         ret = regmap_write(rt711->sdw_regmap, reg2, (*val & 0xff));
0141         if (ret < 0)
0142             return ret;
0143     } else if ((reg & 0xff00) == 0x8300) { /* for R channel */
0144         reg2 = reg - 0x1000;
0145         reg2 &= ~0x80;
0146         ret = regmap_write(rt711->sdw_regmap,
0147             reg2, ((*val >> 8) & 0xff));
0148         if (ret < 0)
0149             return ret;
0150         ret = regmap_write(rt711->sdw_regmap, reg, (*val & 0xff));
0151         if (ret < 0)
0152             return ret;
0153     } else if (mask == 0x9000) {
0154         ret = regmap_write(rt711->sdw_regmap,
0155             reg, ((*val >> 8) & 0xff));
0156         if (ret < 0)
0157             return ret;
0158         reg2 = reg + 0x1000;
0159         reg2 |= 0x80;
0160         ret = regmap_write(rt711->sdw_regmap, reg2, (*val & 0xff));
0161         if (ret < 0)
0162             return ret;
0163     } else if (mask == 0xb000) {
0164         ret = regmap_write(rt711->sdw_regmap, reg, *val);
0165         if (ret < 0)
0166             return ret;
0167     } else {
0168         ret = regmap_read(rt711->sdw_regmap, reg, val);
0169         if (ret < 0)
0170             return ret;
0171         is_hda_reg = 0;
0172     }
0173 
0174     if (is_hda_reg || is_index_reg) {
0175         sdw_data_3 = 0;
0176         sdw_data_2 = 0;
0177         sdw_data_1 = 0;
0178         sdw_data_0 = 0;
0179         ret = regmap_read(rt711->sdw_regmap,
0180             RT711_READ_HDA_3, &sdw_data_3);
0181         if (ret < 0)
0182             return ret;
0183         ret = regmap_read(rt711->sdw_regmap,
0184             RT711_READ_HDA_2, &sdw_data_2);
0185         if (ret < 0)
0186             return ret;
0187         ret = regmap_read(rt711->sdw_regmap,
0188             RT711_READ_HDA_1, &sdw_data_1);
0189         if (ret < 0)
0190             return ret;
0191         ret = regmap_read(rt711->sdw_regmap,
0192             RT711_READ_HDA_0, &sdw_data_0);
0193         if (ret < 0)
0194             return ret;
0195         *val = ((sdw_data_3 & 0xff) << 24) |
0196             ((sdw_data_2 & 0xff) << 16) |
0197             ((sdw_data_1 & 0xff) << 8) | (sdw_data_0 & 0xff);
0198     }
0199 
0200     if (is_hda_reg == 0)
0201         dev_dbg(dev, "[%s] %04x => %08x\n", __func__, reg, *val);
0202     else if (is_index_reg)
0203         dev_dbg(dev, "[%s] %04x %04x %04x %04x => %08x\n",
0204             __func__, reg, reg2, reg3, reg4, *val);
0205     else
0206         dev_dbg(dev, "[%s] %04x %04x => %08x\n",
0207             __func__, reg, reg2, *val);
0208 
0209     return 0;
0210 }
0211 
0212 static int rt711_sdw_write(void *context, unsigned int reg, unsigned int val)
0213 {
0214     struct device *dev = context;
0215     struct rt711_priv *rt711 = dev_get_drvdata(dev);
0216     unsigned int reg2 = 0, reg3, reg4, nid, mask, val2;
0217     unsigned int is_index_reg = 0;
0218     int ret;
0219 
0220     if (reg > 0xffff)
0221         is_index_reg = 1;
0222 
0223     mask = reg & 0xf000;
0224 
0225     if (is_index_reg) { /* index registers */
0226         val2 = reg & 0xff;
0227         reg = reg >> 8;
0228         nid = reg & 0xff;
0229         ret = regmap_write(rt711->sdw_regmap, reg, 0);
0230         if (ret < 0)
0231             return ret;
0232         reg2 = reg + 0x1000;
0233         reg2 |= 0x80;
0234         ret = regmap_write(rt711->sdw_regmap, reg2, val2);
0235         if (ret < 0)
0236             return ret;
0237 
0238         reg3 = RT711_PRIV_DATA_W_H | nid;
0239         ret = regmap_write(rt711->sdw_regmap,
0240             reg3, ((val >> 8) & 0xff));
0241         if (ret < 0)
0242             return ret;
0243         reg4 = reg3 + 0x1000;
0244         reg4 |= 0x80;
0245         ret = regmap_write(rt711->sdw_regmap, reg4, (val & 0xff));
0246         if (ret < 0)
0247             return ret;
0248         is_index_reg = 1;
0249     } else if (reg < 0x4fff) {
0250         ret = regmap_write(rt711->sdw_regmap, reg, val);
0251         if (ret < 0)
0252             return ret;
0253     } else if (reg == RT711_FUNC_RESET) {
0254         ret = regmap_write(rt711->sdw_regmap, reg, val);
0255         if (ret < 0)
0256             return ret;
0257     } else if (mask == 0x7000) {
0258         ret = regmap_write(rt711->sdw_regmap,
0259             reg, ((val >> 8) & 0xff));
0260         if (ret < 0)
0261             return ret;
0262         reg2 = reg + 0x1000;
0263         reg2 |= 0x80;
0264         ret = regmap_write(rt711->sdw_regmap, reg2, (val & 0xff));
0265         if (ret < 0)
0266             return ret;
0267     } else if ((reg & 0xff00) == 0x8300) {  /* for R channel */
0268         reg2 = reg - 0x1000;
0269         reg2 &= ~0x80;
0270         ret = regmap_write(rt711->sdw_regmap,
0271             reg2, ((val >> 8) & 0xff));
0272         if (ret < 0)
0273             return ret;
0274         ret = regmap_write(rt711->sdw_regmap, reg, (val & 0xff));
0275         if (ret < 0)
0276             return ret;
0277     }
0278 
0279     if (reg2 == 0)
0280         dev_dbg(dev, "[%s] %04x <= %04x\n", __func__, reg, val);
0281     else if (is_index_reg)
0282         dev_dbg(dev, "[%s] %04x %04x %04x %04x <= %04x %04x\n",
0283             __func__, reg, reg2, reg3, reg4, val2, val);
0284     else
0285         dev_dbg(dev, "[%s] %04x %04x <= %04x\n",
0286             __func__, reg, reg2, val);
0287 
0288     return 0;
0289 }
0290 
0291 static const struct regmap_config rt711_regmap = {
0292     .reg_bits = 24,
0293     .val_bits = 32,
0294     .readable_reg = rt711_readable_register,
0295     .volatile_reg = rt711_volatile_register,
0296     .max_register = 0x755800,
0297     .reg_defaults = rt711_reg_defaults,
0298     .num_reg_defaults = ARRAY_SIZE(rt711_reg_defaults),
0299     .cache_type = REGCACHE_RBTREE,
0300     .use_single_read = true,
0301     .use_single_write = true,
0302     .reg_read = rt711_sdw_read,
0303     .reg_write = rt711_sdw_write,
0304 };
0305 
0306 static const struct regmap_config rt711_sdw_regmap = {
0307     .name = "sdw",
0308     .reg_bits = 32,
0309     .val_bits = 8,
0310     .readable_reg = rt711_readable_register,
0311     .max_register = 0xff01,
0312     .cache_type = REGCACHE_NONE,
0313     .use_single_read = true,
0314     .use_single_write = true,
0315 };
0316 
0317 static int rt711_update_status(struct sdw_slave *slave,
0318                 enum sdw_slave_status status)
0319 {
0320     struct rt711_priv *rt711 = dev_get_drvdata(&slave->dev);
0321 
0322     /* Update the status */
0323     rt711->status = status;
0324 
0325     if (status == SDW_SLAVE_UNATTACHED)
0326         rt711->hw_init = false;
0327 
0328     /*
0329      * Perform initialization only if slave status is present and
0330      * hw_init flag is false
0331      */
0332     if (rt711->hw_init || rt711->status != SDW_SLAVE_ATTACHED)
0333         return 0;
0334 
0335     /* perform I/O transfers required for Slave initialization */
0336     return rt711_io_init(&slave->dev, slave);
0337 }
0338 
0339 static int rt711_read_prop(struct sdw_slave *slave)
0340 {
0341     struct sdw_slave_prop *prop = &slave->prop;
0342     int nval;
0343     int i, j;
0344     u32 bit;
0345     unsigned long addr;
0346     struct sdw_dpn_prop *dpn;
0347 
0348     prop->scp_int1_mask = SDW_SCP_INT1_IMPL_DEF | SDW_SCP_INT1_BUS_CLASH |
0349         SDW_SCP_INT1_PARITY;
0350     prop->quirks = SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY;
0351 
0352     prop->paging_support = false;
0353 
0354     /* first we need to allocate memory for set bits in port lists */
0355     prop->source_ports = 0x14; /* BITMAP: 00010100 */
0356     prop->sink_ports = 0x8; /* BITMAP:  00001000 */
0357 
0358     nval = hweight32(prop->source_ports);
0359     prop->src_dpn_prop = devm_kcalloc(&slave->dev, nval,
0360                         sizeof(*prop->src_dpn_prop),
0361                         GFP_KERNEL);
0362     if (!prop->src_dpn_prop)
0363         return -ENOMEM;
0364 
0365     i = 0;
0366     dpn = prop->src_dpn_prop;
0367     addr = prop->source_ports;
0368     for_each_set_bit(bit, &addr, 32) {
0369         dpn[i].num = bit;
0370         dpn[i].type = SDW_DPN_FULL;
0371         dpn[i].simple_ch_prep_sm = true;
0372         dpn[i].ch_prep_timeout = 10;
0373         i++;
0374     }
0375 
0376     /* do this again for sink now */
0377     nval = hweight32(prop->sink_ports);
0378     prop->sink_dpn_prop = devm_kcalloc(&slave->dev, nval,
0379                         sizeof(*prop->sink_dpn_prop),
0380                         GFP_KERNEL);
0381     if (!prop->sink_dpn_prop)
0382         return -ENOMEM;
0383 
0384     j = 0;
0385     dpn = prop->sink_dpn_prop;
0386     addr = prop->sink_ports;
0387     for_each_set_bit(bit, &addr, 32) {
0388         dpn[j].num = bit;
0389         dpn[j].type = SDW_DPN_FULL;
0390         dpn[j].simple_ch_prep_sm = true;
0391         dpn[j].ch_prep_timeout = 10;
0392         j++;
0393     }
0394 
0395     /* set the timeout values */
0396     prop->clk_stop_timeout = 20;
0397 
0398     /* wake-up event */
0399     prop->wake_capable = 1;
0400 
0401     return 0;
0402 }
0403 
0404 static int rt711_bus_config(struct sdw_slave *slave,
0405                 struct sdw_bus_params *params)
0406 {
0407     struct rt711_priv *rt711 = dev_get_drvdata(&slave->dev);
0408     int ret;
0409 
0410     memcpy(&rt711->params, params, sizeof(*params));
0411 
0412     ret = rt711_clock_config(&slave->dev);
0413     if (ret < 0)
0414         dev_err(&slave->dev, "Invalid clk config");
0415 
0416     return ret;
0417 }
0418 
0419 static int rt711_interrupt_callback(struct sdw_slave *slave,
0420                     struct sdw_slave_intr_status *status)
0421 {
0422     struct rt711_priv *rt711 = dev_get_drvdata(&slave->dev);
0423 
0424     dev_dbg(&slave->dev,
0425         "%s control_port_stat=%x", __func__, status->control_port);
0426 
0427     mutex_lock(&rt711->disable_irq_lock);
0428     if (status->control_port & 0x4 && !rt711->disable_irq) {
0429         mod_delayed_work(system_power_efficient_wq,
0430             &rt711->jack_detect_work, msecs_to_jiffies(250));
0431     }
0432     mutex_unlock(&rt711->disable_irq_lock);
0433 
0434     return 0;
0435 }
0436 
0437 static const struct sdw_slave_ops rt711_slave_ops = {
0438     .read_prop = rt711_read_prop,
0439     .interrupt_callback = rt711_interrupt_callback,
0440     .update_status = rt711_update_status,
0441     .bus_config = rt711_bus_config,
0442 };
0443 
0444 static int rt711_sdw_probe(struct sdw_slave *slave,
0445                 const struct sdw_device_id *id)
0446 {
0447     struct regmap *sdw_regmap, *regmap;
0448 
0449     /* Regmap Initialization */
0450     sdw_regmap = devm_regmap_init_sdw(slave, &rt711_sdw_regmap);
0451     if (IS_ERR(sdw_regmap))
0452         return PTR_ERR(sdw_regmap);
0453 
0454     regmap = devm_regmap_init(&slave->dev, NULL,
0455         &slave->dev, &rt711_regmap);
0456     if (IS_ERR(regmap))
0457         return PTR_ERR(regmap);
0458 
0459     rt711_init(&slave->dev, sdw_regmap, regmap, slave);
0460 
0461     return 0;
0462 }
0463 
0464 static int rt711_sdw_remove(struct sdw_slave *slave)
0465 {
0466     struct rt711_priv *rt711 = dev_get_drvdata(&slave->dev);
0467 
0468     if (rt711->hw_init) {
0469         cancel_delayed_work_sync(&rt711->jack_detect_work);
0470         cancel_delayed_work_sync(&rt711->jack_btn_check_work);
0471         cancel_work_sync(&rt711->calibration_work);
0472     }
0473 
0474     if (rt711->first_hw_init)
0475         pm_runtime_disable(&slave->dev);
0476 
0477     mutex_destroy(&rt711->calibrate_mutex);
0478     mutex_destroy(&rt711->disable_irq_lock);
0479 
0480     return 0;
0481 }
0482 
0483 static const struct sdw_device_id rt711_id[] = {
0484     SDW_SLAVE_ENTRY_EXT(0x025d, 0x711, 0x2, 0, 0),
0485     {},
0486 };
0487 MODULE_DEVICE_TABLE(sdw, rt711_id);
0488 
0489 static int __maybe_unused rt711_dev_suspend(struct device *dev)
0490 {
0491     struct rt711_priv *rt711 = dev_get_drvdata(dev);
0492 
0493     if (!rt711->hw_init)
0494         return 0;
0495 
0496     cancel_delayed_work_sync(&rt711->jack_detect_work);
0497     cancel_delayed_work_sync(&rt711->jack_btn_check_work);
0498     cancel_work_sync(&rt711->calibration_work);
0499 
0500     regcache_cache_only(rt711->regmap, true);
0501 
0502     return 0;
0503 }
0504 
0505 static int __maybe_unused rt711_dev_system_suspend(struct device *dev)
0506 {
0507     struct rt711_priv *rt711 = dev_get_drvdata(dev);
0508     struct sdw_slave *slave = dev_to_sdw_dev(dev);
0509     int ret;
0510 
0511     if (!rt711->hw_init)
0512         return 0;
0513 
0514     /*
0515      * prevent new interrupts from being handled after the
0516      * deferred work completes and before the parent disables
0517      * interrupts on the link
0518      */
0519     mutex_lock(&rt711->disable_irq_lock);
0520     rt711->disable_irq = true;
0521     ret = sdw_update_no_pm(slave, SDW_SCP_INTMASK1,
0522                    SDW_SCP_INT1_IMPL_DEF, 0);
0523     mutex_unlock(&rt711->disable_irq_lock);
0524 
0525     if (ret < 0) {
0526         /* log but don't prevent suspend from happening */
0527         dev_dbg(&slave->dev, "%s: could not disable imp-def interrupts\n:", __func__);
0528     }
0529 
0530     return rt711_dev_suspend(dev);
0531 }
0532 
0533 #define RT711_PROBE_TIMEOUT 5000
0534 
0535 static int __maybe_unused rt711_dev_resume(struct device *dev)
0536 {
0537     struct sdw_slave *slave = dev_to_sdw_dev(dev);
0538     struct rt711_priv *rt711 = dev_get_drvdata(dev);
0539     unsigned long time;
0540 
0541     if (!rt711->first_hw_init)
0542         return 0;
0543 
0544     if (!slave->unattach_request)
0545         goto regmap_sync;
0546 
0547     time = wait_for_completion_timeout(&slave->initialization_complete,
0548                 msecs_to_jiffies(RT711_PROBE_TIMEOUT));
0549     if (!time) {
0550         dev_err(&slave->dev, "Initialization not complete, timed out\n");
0551         return -ETIMEDOUT;
0552     }
0553 
0554 regmap_sync:
0555     slave->unattach_request = 0;
0556     regcache_cache_only(rt711->regmap, false);
0557     regcache_sync_region(rt711->regmap, 0x3000, 0x8fff);
0558     regcache_sync_region(rt711->regmap, 0x752009, 0x752091);
0559 
0560     return 0;
0561 }
0562 
0563 static const struct dev_pm_ops rt711_pm = {
0564     SET_SYSTEM_SLEEP_PM_OPS(rt711_dev_system_suspend, rt711_dev_resume)
0565     SET_RUNTIME_PM_OPS(rt711_dev_suspend, rt711_dev_resume, NULL)
0566 };
0567 
0568 static struct sdw_driver rt711_sdw_driver = {
0569     .driver = {
0570         .name = "rt711",
0571         .owner = THIS_MODULE,
0572         .pm = &rt711_pm,
0573     },
0574     .probe = rt711_sdw_probe,
0575     .remove = rt711_sdw_remove,
0576     .ops = &rt711_slave_ops,
0577     .id_table = rt711_id,
0578 };
0579 module_sdw_driver(rt711_sdw_driver);
0580 
0581 MODULE_DESCRIPTION("ASoC RT711 SDW driver");
0582 MODULE_AUTHOR("Shuming Fan <shumingf@realtek.com>");
0583 MODULE_LICENSE("GPL");
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