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0001 // SPDX-License-Identifier: GPL-2.0
0002 //
0003 // rt700-sdw.c -- rt700 ALSA SoC audio driver
0004 //
0005 // Copyright(c) 2019 Realtek Semiconductor Corp.
0006 //
0007 //
0008 
0009 #include <linux/delay.h>
0010 #include <linux/device.h>
0011 #include <linux/mod_devicetable.h>
0012 #include <linux/soundwire/sdw.h>
0013 #include <linux/soundwire/sdw_type.h>
0014 #include <linux/soundwire/sdw_registers.h>
0015 #include <linux/module.h>
0016 #include <linux/pm_runtime.h>
0017 #include <linux/regmap.h>
0018 #include <sound/soc.h>
0019 #include "rt700.h"
0020 #include "rt700-sdw.h"
0021 
0022 static bool rt700_readable_register(struct device *dev, unsigned int reg)
0023 {
0024     switch (reg) {
0025     case 0x00e0:
0026     case 0x00f0:
0027     case 0x2000 ... 0x200e:
0028     case 0x2012 ... 0x2016:
0029     case 0x201a ... 0x2027:
0030     case 0x2029 ... 0x202a:
0031     case 0x202d ... 0x2034:
0032     case 0x2200 ... 0x2204:
0033     case 0x2206 ... 0x2212:
0034     case 0x2220 ... 0x2223:
0035     case 0x2230 ... 0x2231:
0036     case 0x3000 ... 0x3fff:
0037     case 0x7000 ... 0x7fff:
0038     case 0x8300 ... 0x83ff:
0039     case 0x9c00 ... 0x9cff:
0040     case 0xb900 ... 0xb9ff:
0041     case 0x75201a:
0042     case 0x752045:
0043     case 0x752046:
0044     case 0x752048:
0045     case 0x75204a:
0046     case 0x75206b:
0047     case 0x752080:
0048     case 0x752081:
0049         return true;
0050     default:
0051         return false;
0052     }
0053 }
0054 
0055 static bool rt700_volatile_register(struct device *dev, unsigned int reg)
0056 {
0057     switch (reg) {
0058     case 0x2009:
0059     case 0x2016:
0060     case 0x201b:
0061     case 0x201c:
0062     case 0x201d:
0063     case 0x201f:
0064     case 0x2021:
0065     case 0x2023:
0066     case 0x2230:
0067     case 0x200b ... 0x200e: /* i2c read */
0068     case 0x2012 ... 0x2015: /* HD-A read */
0069     case 0x202d ... 0x202f: /* BRA */
0070     case 0x2201 ... 0x2212: /* i2c debug */
0071     case 0x2220 ... 0x2223: /* decoded HD-A */
0072     case 0x9c00 ... 0x9cff:
0073     case 0xb900 ... 0xb9ff:
0074     case 0xff01:
0075     case 0x75201a:
0076     case 0x752046:
0077     case 0x752080:
0078     case 0x752081:
0079         return true;
0080     default:
0081         return false;
0082     }
0083 }
0084 
0085 static int rt700_sdw_read(void *context, unsigned int reg, unsigned int *val)
0086 {
0087     struct device *dev = context;
0088     struct rt700_priv *rt700 = dev_get_drvdata(dev);
0089     unsigned int sdw_data_3, sdw_data_2, sdw_data_1, sdw_data_0;
0090     unsigned int reg2 = 0, reg3 = 0, reg4 = 0, mask, nid, val2;
0091     unsigned int is_hda_reg = 1, is_index_reg = 0;
0092     int ret;
0093 
0094     if (reg > 0xffff)
0095         is_index_reg = 1;
0096 
0097     mask = reg & 0xf000;
0098 
0099     if (is_index_reg) { /* index registers */
0100         val2 = reg & 0xff;
0101         reg = reg >> 8;
0102         nid = reg & 0xff;
0103         ret = regmap_write(rt700->sdw_regmap, reg, 0);
0104         if (ret < 0)
0105             return ret;
0106         reg2 = reg + 0x1000;
0107         reg2 |= 0x80;
0108         ret = regmap_write(rt700->sdw_regmap, reg2, val2);
0109         if (ret < 0)
0110             return ret;
0111 
0112         reg3 = RT700_PRIV_DATA_R_H | nid;
0113         ret = regmap_write(rt700->sdw_regmap,
0114             reg3, ((*val >> 8) & 0xff));
0115         if (ret < 0)
0116             return ret;
0117         reg4 = reg3 + 0x1000;
0118         reg4 |= 0x80;
0119         ret = regmap_write(rt700->sdw_regmap, reg4, (*val & 0xff));
0120         if (ret < 0)
0121             return ret;
0122     } else if (mask   == 0x3000) {
0123         reg += 0x8000;
0124         ret = regmap_write(rt700->sdw_regmap, reg, *val);
0125         if (ret < 0)
0126             return ret;
0127     } else if (mask == 0x7000) {
0128         reg += 0x2000;
0129         reg |= 0x800;
0130         ret = regmap_write(rt700->sdw_regmap,
0131             reg, ((*val >> 8) & 0xff));
0132         if (ret < 0)
0133             return ret;
0134         reg2 = reg + 0x1000;
0135         reg2 |= 0x80;
0136         ret = regmap_write(rt700->sdw_regmap, reg2, (*val & 0xff));
0137         if (ret < 0)
0138             return ret;
0139     } else if ((reg & 0xff00) == 0x8300) { /* for R channel */
0140         reg2 = reg - 0x1000;
0141         reg2 &= ~0x80;
0142         ret = regmap_write(rt700->sdw_regmap,
0143             reg2, ((*val >> 8) & 0xff));
0144         if (ret < 0)
0145             return ret;
0146         ret = regmap_write(rt700->sdw_regmap, reg, (*val & 0xff));
0147         if (ret < 0)
0148             return ret;
0149     } else if (mask == 0x9000) {
0150         ret = regmap_write(rt700->sdw_regmap,
0151             reg, ((*val >> 8) & 0xff));
0152         if (ret < 0)
0153             return ret;
0154         reg2 = reg + 0x1000;
0155         reg2 |= 0x80;
0156         ret = regmap_write(rt700->sdw_regmap, reg2, (*val & 0xff));
0157         if (ret < 0)
0158             return ret;
0159     } else if (mask == 0xb000) {
0160         ret = regmap_write(rt700->sdw_regmap, reg, *val);
0161         if (ret < 0)
0162             return ret;
0163     } else {
0164         ret = regmap_read(rt700->sdw_regmap, reg, val);
0165         if (ret < 0)
0166             return ret;
0167         is_hda_reg = 0;
0168     }
0169 
0170     if (is_hda_reg || is_index_reg) {
0171         sdw_data_3 = 0;
0172         sdw_data_2 = 0;
0173         sdw_data_1 = 0;
0174         sdw_data_0 = 0;
0175         ret = regmap_read(rt700->sdw_regmap,
0176             RT700_READ_HDA_3, &sdw_data_3);
0177         if (ret < 0)
0178             return ret;
0179         ret = regmap_read(rt700->sdw_regmap,
0180             RT700_READ_HDA_2, &sdw_data_2);
0181         if (ret < 0)
0182             return ret;
0183         ret = regmap_read(rt700->sdw_regmap,
0184             RT700_READ_HDA_1, &sdw_data_1);
0185         if (ret < 0)
0186             return ret;
0187         ret = regmap_read(rt700->sdw_regmap,
0188             RT700_READ_HDA_0, &sdw_data_0);
0189         if (ret < 0)
0190             return ret;
0191         *val = ((sdw_data_3 & 0xff) << 24) |
0192             ((sdw_data_2 & 0xff) << 16) |
0193             ((sdw_data_1 & 0xff) << 8) | (sdw_data_0 & 0xff);
0194     }
0195 
0196     if (is_hda_reg == 0)
0197         dev_dbg(dev, "[%s] %04x => %08x\n", __func__, reg, *val);
0198     else if (is_index_reg)
0199         dev_dbg(dev, "[%s] %04x %04x %04x %04x => %08x\n",
0200             __func__, reg, reg2, reg3, reg4, *val);
0201     else
0202         dev_dbg(dev, "[%s] %04x %04x => %08x\n",
0203             __func__, reg, reg2, *val);
0204 
0205     return 0;
0206 }
0207 
0208 static int rt700_sdw_write(void *context, unsigned int reg, unsigned int val)
0209 {
0210     struct device *dev = context;
0211     struct rt700_priv *rt700 = dev_get_drvdata(dev);
0212     unsigned int reg2 = 0, reg3, reg4, nid, mask, val2;
0213     unsigned int is_index_reg = 0;
0214     int ret;
0215 
0216     if (reg > 0xffff)
0217         is_index_reg = 1;
0218 
0219     mask = reg & 0xf000;
0220 
0221     if (is_index_reg) { /* index registers */
0222         val2 = reg & 0xff;
0223         reg = reg >> 8;
0224         nid = reg & 0xff;
0225         ret = regmap_write(rt700->sdw_regmap, reg, 0);
0226         if (ret < 0)
0227             return ret;
0228         reg2 = reg + 0x1000;
0229         reg2 |= 0x80;
0230         ret = regmap_write(rt700->sdw_regmap, reg2, val2);
0231         if (ret < 0)
0232             return ret;
0233 
0234         reg3 = RT700_PRIV_DATA_W_H | nid;
0235         ret = regmap_write(rt700->sdw_regmap,
0236             reg3, ((val >> 8) & 0xff));
0237         if (ret < 0)
0238             return ret;
0239         reg4 = reg3 + 0x1000;
0240         reg4 |= 0x80;
0241         ret = regmap_write(rt700->sdw_regmap, reg4, (val & 0xff));
0242         if (ret < 0)
0243             return ret;
0244         is_index_reg = 1;
0245     } else if (reg < 0x4fff) {
0246         ret = regmap_write(rt700->sdw_regmap, reg, val);
0247         if (ret < 0)
0248             return ret;
0249     } else if (reg == 0xff01) {
0250         ret = regmap_write(rt700->sdw_regmap, reg, val);
0251         if (ret < 0)
0252             return ret;
0253     } else if (mask == 0x7000) {
0254         ret = regmap_write(rt700->sdw_regmap,
0255             reg, ((val >> 8) & 0xff));
0256         if (ret < 0)
0257             return ret;
0258         reg2 = reg + 0x1000;
0259         reg2 |= 0x80;
0260         ret = regmap_write(rt700->sdw_regmap, reg2, (val & 0xff));
0261         if (ret < 0)
0262             return ret;
0263     } else if ((reg & 0xff00) == 0x8300) {  /* for R channel */
0264         reg2 = reg - 0x1000;
0265         reg2 &= ~0x80;
0266         ret = regmap_write(rt700->sdw_regmap,
0267             reg2, ((val >> 8) & 0xff));
0268         if (ret < 0)
0269             return ret;
0270         ret = regmap_write(rt700->sdw_regmap, reg, (val & 0xff));
0271         if (ret < 0)
0272             return ret;
0273     }
0274 
0275     if (reg2 == 0)
0276         dev_dbg(dev, "[%s] %04x <= %04x\n", __func__, reg, val);
0277     else if (is_index_reg)
0278         dev_dbg(dev, "[%s] %04x %04x %04x %04x <= %04x %04x\n",
0279             __func__, reg, reg2, reg3, reg4, val2, val);
0280     else
0281         dev_dbg(dev, "[%s] %04x %04x <= %04x\n",
0282             __func__, reg, reg2, val);
0283 
0284     return 0;
0285 }
0286 
0287 static const struct regmap_config rt700_regmap = {
0288     .reg_bits = 24,
0289     .val_bits = 32,
0290     .readable_reg = rt700_readable_register,
0291     .volatile_reg = rt700_volatile_register,
0292     .max_register = 0x755800,
0293     .reg_defaults = rt700_reg_defaults,
0294     .num_reg_defaults = ARRAY_SIZE(rt700_reg_defaults),
0295     .cache_type = REGCACHE_RBTREE,
0296     .use_single_read = true,
0297     .use_single_write = true,
0298     .reg_read = rt700_sdw_read,
0299     .reg_write = rt700_sdw_write,
0300 };
0301 
0302 static const struct regmap_config rt700_sdw_regmap = {
0303     .name = "sdw",
0304     .reg_bits = 32,
0305     .val_bits = 8,
0306     .readable_reg = rt700_readable_register,
0307     .max_register = 0xff01,
0308     .cache_type = REGCACHE_NONE,
0309     .use_single_read = true,
0310     .use_single_write = true,
0311 };
0312 
0313 static int rt700_update_status(struct sdw_slave *slave,
0314                     enum sdw_slave_status status)
0315 {
0316     struct rt700_priv *rt700 = dev_get_drvdata(&slave->dev);
0317 
0318     /* Update the status */
0319     rt700->status = status;
0320 
0321     if (status == SDW_SLAVE_UNATTACHED)
0322         rt700->hw_init = false;
0323 
0324     /*
0325      * Perform initialization only if slave status is present and
0326      * hw_init flag is false
0327      */
0328     if (rt700->hw_init || rt700->status != SDW_SLAVE_ATTACHED)
0329         return 0;
0330 
0331     /* perform I/O transfers required for Slave initialization */
0332     return rt700_io_init(&slave->dev, slave);
0333 }
0334 
0335 static int rt700_read_prop(struct sdw_slave *slave)
0336 {
0337     struct sdw_slave_prop *prop = &slave->prop;
0338     int nval, i;
0339     u32 bit;
0340     unsigned long addr;
0341     struct sdw_dpn_prop *dpn;
0342 
0343     prop->scp_int1_mask = SDW_SCP_INT1_IMPL_DEF | SDW_SCP_INT1_BUS_CLASH |
0344         SDW_SCP_INT1_PARITY;
0345     prop->quirks = SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY;
0346 
0347     prop->paging_support = false;
0348 
0349     /* first we need to allocate memory for set bits in port lists */
0350     prop->source_ports = 0x14; /* BITMAP: 00010100 */
0351     prop->sink_ports = 0xA; /* BITMAP:  00001010 */
0352 
0353     nval = hweight32(prop->source_ports);
0354     prop->src_dpn_prop = devm_kcalloc(&slave->dev, nval,
0355                         sizeof(*prop->src_dpn_prop),
0356                         GFP_KERNEL);
0357     if (!prop->src_dpn_prop)
0358         return -ENOMEM;
0359 
0360     i = 0;
0361     dpn = prop->src_dpn_prop;
0362     addr = prop->source_ports;
0363     for_each_set_bit(bit, &addr, 32) {
0364         dpn[i].num = bit;
0365         dpn[i].type = SDW_DPN_FULL;
0366         dpn[i].simple_ch_prep_sm = true;
0367         dpn[i].ch_prep_timeout = 10;
0368         i++;
0369     }
0370 
0371     /* do this again for sink now */
0372     nval = hweight32(prop->sink_ports);
0373     prop->sink_dpn_prop = devm_kcalloc(&slave->dev, nval,
0374                         sizeof(*prop->sink_dpn_prop),
0375                         GFP_KERNEL);
0376     if (!prop->sink_dpn_prop)
0377         return -ENOMEM;
0378 
0379     i = 0;
0380     dpn = prop->sink_dpn_prop;
0381     addr = prop->sink_ports;
0382     for_each_set_bit(bit, &addr, 32) {
0383         dpn[i].num = bit;
0384         dpn[i].type = SDW_DPN_FULL;
0385         dpn[i].simple_ch_prep_sm = true;
0386         dpn[i].ch_prep_timeout = 10;
0387         i++;
0388     }
0389 
0390     /* set the timeout values */
0391     prop->clk_stop_timeout = 20;
0392 
0393     /* wake-up event */
0394     prop->wake_capable = 1;
0395 
0396     return 0;
0397 }
0398 
0399 static int rt700_bus_config(struct sdw_slave *slave,
0400                 struct sdw_bus_params *params)
0401 {
0402     struct rt700_priv *rt700 = dev_get_drvdata(&slave->dev);
0403     int ret;
0404 
0405     memcpy(&rt700->params, params, sizeof(*params));
0406 
0407     ret = rt700_clock_config(&slave->dev);
0408     if (ret < 0)
0409         dev_err(&slave->dev, "Invalid clk config");
0410 
0411     return ret;
0412 }
0413 
0414 static int rt700_interrupt_callback(struct sdw_slave *slave,
0415                     struct sdw_slave_intr_status *status)
0416 {
0417     struct rt700_priv *rt700 = dev_get_drvdata(&slave->dev);
0418 
0419     dev_dbg(&slave->dev,
0420         "%s control_port_stat=%x", __func__, status->control_port);
0421 
0422     mutex_lock(&rt700->disable_irq_lock);
0423     if (status->control_port & 0x4 && !rt700->disable_irq) {
0424         mod_delayed_work(system_power_efficient_wq,
0425             &rt700->jack_detect_work, msecs_to_jiffies(250));
0426     }
0427     mutex_unlock(&rt700->disable_irq_lock);
0428 
0429     return 0;
0430 }
0431 
0432 /*
0433  * slave_ops: callbacks for get_clock_stop_mode, clock_stop and
0434  * port_prep are not defined for now
0435  */
0436 static const struct sdw_slave_ops rt700_slave_ops = {
0437     .read_prop = rt700_read_prop,
0438     .interrupt_callback = rt700_interrupt_callback,
0439     .update_status = rt700_update_status,
0440     .bus_config = rt700_bus_config,
0441 };
0442 
0443 static int rt700_sdw_probe(struct sdw_slave *slave,
0444                 const struct sdw_device_id *id)
0445 {
0446     struct regmap *sdw_regmap, *regmap;
0447 
0448     /* Regmap Initialization */
0449     sdw_regmap = devm_regmap_init_sdw(slave, &rt700_sdw_regmap);
0450     if (IS_ERR(sdw_regmap))
0451         return PTR_ERR(sdw_regmap);
0452 
0453     regmap = devm_regmap_init(&slave->dev, NULL,
0454         &slave->dev, &rt700_regmap);
0455     if (IS_ERR(regmap))
0456         return PTR_ERR(regmap);
0457 
0458     rt700_init(&slave->dev, sdw_regmap, regmap, slave);
0459 
0460     return 0;
0461 }
0462 
0463 static int rt700_sdw_remove(struct sdw_slave *slave)
0464 {
0465     struct rt700_priv *rt700 = dev_get_drvdata(&slave->dev);
0466 
0467     if (rt700->hw_init) {
0468         cancel_delayed_work_sync(&rt700->jack_detect_work);
0469         cancel_delayed_work_sync(&rt700->jack_btn_check_work);
0470     }
0471 
0472     if (rt700->first_hw_init)
0473         pm_runtime_disable(&slave->dev);
0474 
0475     return 0;
0476 }
0477 
0478 static const struct sdw_device_id rt700_id[] = {
0479     SDW_SLAVE_ENTRY_EXT(0x025d, 0x700, 0x1, 0, 0),
0480     {},
0481 };
0482 MODULE_DEVICE_TABLE(sdw, rt700_id);
0483 
0484 static int __maybe_unused rt700_dev_suspend(struct device *dev)
0485 {
0486     struct rt700_priv *rt700 = dev_get_drvdata(dev);
0487 
0488     if (!rt700->hw_init)
0489         return 0;
0490 
0491     cancel_delayed_work_sync(&rt700->jack_detect_work);
0492     cancel_delayed_work_sync(&rt700->jack_btn_check_work);
0493 
0494     regcache_cache_only(rt700->regmap, true);
0495 
0496     return 0;
0497 }
0498 
0499 static int __maybe_unused rt700_dev_system_suspend(struct device *dev)
0500 {
0501     struct sdw_slave *slave = dev_to_sdw_dev(dev);
0502     struct rt700_priv *rt700 = dev_get_drvdata(dev);
0503     int ret;
0504 
0505     if (!rt700->hw_init)
0506         return 0;
0507 
0508     /*
0509      * prevent new interrupts from being handled after the
0510      * deferred work completes and before the parent disables
0511      * interrupts on the link
0512      */
0513     mutex_lock(&rt700->disable_irq_lock);
0514     rt700->disable_irq = true;
0515     ret = sdw_update_no_pm(slave, SDW_SCP_INTMASK1,
0516                    SDW_SCP_INT1_IMPL_DEF, 0);
0517     mutex_unlock(&rt700->disable_irq_lock);
0518 
0519     if (ret < 0) {
0520         /* log but don't prevent suspend from happening */
0521         dev_dbg(&slave->dev, "%s: could not disable imp-def interrupts\n:", __func__);
0522     }
0523 
0524     return rt700_dev_suspend(dev);
0525 }
0526 
0527 #define RT700_PROBE_TIMEOUT 5000
0528 
0529 static int __maybe_unused rt700_dev_resume(struct device *dev)
0530 {
0531     struct sdw_slave *slave = dev_to_sdw_dev(dev);
0532     struct rt700_priv *rt700 = dev_get_drvdata(dev);
0533     unsigned long time;
0534 
0535     if (!rt700->first_hw_init)
0536         return 0;
0537 
0538     if (!slave->unattach_request)
0539         goto regmap_sync;
0540 
0541     time = wait_for_completion_timeout(&slave->initialization_complete,
0542                 msecs_to_jiffies(RT700_PROBE_TIMEOUT));
0543     if (!time) {
0544         dev_err(&slave->dev, "Initialization not complete, timed out\n");
0545         return -ETIMEDOUT;
0546     }
0547 
0548 regmap_sync:
0549     slave->unattach_request = 0;
0550     regcache_cache_only(rt700->regmap, false);
0551     regcache_sync_region(rt700->regmap, 0x3000, 0x8fff);
0552     regcache_sync_region(rt700->regmap, 0x752010, 0x75206b);
0553 
0554     return 0;
0555 }
0556 
0557 static const struct dev_pm_ops rt700_pm = {
0558     SET_SYSTEM_SLEEP_PM_OPS(rt700_dev_system_suspend, rt700_dev_resume)
0559     SET_RUNTIME_PM_OPS(rt700_dev_suspend, rt700_dev_resume, NULL)
0560 };
0561 
0562 static struct sdw_driver rt700_sdw_driver = {
0563     .driver = {
0564         .name = "rt700",
0565         .owner = THIS_MODULE,
0566         .pm = &rt700_pm,
0567     },
0568     .probe = rt700_sdw_probe,
0569     .remove = rt700_sdw_remove,
0570     .ops = &rt700_slave_ops,
0571     .id_table = rt700_id,
0572 };
0573 module_sdw_driver(rt700_sdw_driver);
0574 
0575 MODULE_DESCRIPTION("ASoC RT700 driver SDW");
0576 MODULE_AUTHOR("Shuming Fan <shumingf@realtek.com>");
0577 MODULE_LICENSE("GPL v2");
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