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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 //
0003 // rt5682-sdw.c  --  RT5682 ALSA SoC audio component driver
0004 //
0005 // Copyright 2019 Realtek Semiconductor Corp.
0006 // Author: Oder Chiou <oder_chiou@realtek.com>
0007 //
0008 
0009 #include <linux/module.h>
0010 #include <linux/moduleparam.h>
0011 #include <linux/init.h>
0012 #include <linux/delay.h>
0013 #include <linux/pm.h>
0014 #include <linux/acpi.h>
0015 #include <linux/gpio.h>
0016 #include <linux/of_gpio.h>
0017 #include <linux/pm_runtime.h>
0018 #include <linux/regulator/consumer.h>
0019 #include <linux/mutex.h>
0020 #include <linux/soundwire/sdw.h>
0021 #include <linux/soundwire/sdw_type.h>
0022 #include <linux/soundwire/sdw_registers.h>
0023 #include <sound/core.h>
0024 #include <sound/pcm.h>
0025 #include <sound/pcm_params.h>
0026 #include <sound/jack.h>
0027 #include <sound/soc.h>
0028 #include <sound/soc-dapm.h>
0029 #include <sound/initval.h>
0030 #include <sound/tlv.h>
0031 
0032 #include "rt5682.h"
0033 
0034 #define RT5682_SDW_ADDR_L           0x3000
0035 #define RT5682_SDW_ADDR_H           0x3001
0036 #define RT5682_SDW_DATA_L           0x3004
0037 #define RT5682_SDW_DATA_H           0x3005
0038 #define RT5682_SDW_CMD              0x3008
0039 
0040 static int rt5682_sdw_read(void *context, unsigned int reg, unsigned int *val)
0041 {
0042     struct device *dev = context;
0043     struct rt5682_priv *rt5682 = dev_get_drvdata(dev);
0044     unsigned int data_l, data_h;
0045 
0046     regmap_write(rt5682->sdw_regmap, RT5682_SDW_CMD, 0);
0047     regmap_write(rt5682->sdw_regmap, RT5682_SDW_ADDR_H, (reg >> 8) & 0xff);
0048     regmap_write(rt5682->sdw_regmap, RT5682_SDW_ADDR_L, (reg & 0xff));
0049     regmap_read(rt5682->sdw_regmap, RT5682_SDW_DATA_H, &data_h);
0050     regmap_read(rt5682->sdw_regmap, RT5682_SDW_DATA_L, &data_l);
0051 
0052     *val = (data_h << 8) | data_l;
0053 
0054     dev_vdbg(dev, "[%s] %04x => %04x\n", __func__, reg, *val);
0055 
0056     return 0;
0057 }
0058 
0059 static int rt5682_sdw_write(void *context, unsigned int reg, unsigned int val)
0060 {
0061     struct device *dev = context;
0062     struct rt5682_priv *rt5682 = dev_get_drvdata(dev);
0063 
0064     regmap_write(rt5682->sdw_regmap, RT5682_SDW_CMD, 1);
0065     regmap_write(rt5682->sdw_regmap, RT5682_SDW_ADDR_H, (reg >> 8) & 0xff);
0066     regmap_write(rt5682->sdw_regmap, RT5682_SDW_ADDR_L, (reg & 0xff));
0067     regmap_write(rt5682->sdw_regmap, RT5682_SDW_DATA_H, (val >> 8) & 0xff);
0068     regmap_write(rt5682->sdw_regmap, RT5682_SDW_DATA_L, (val & 0xff));
0069 
0070     dev_vdbg(dev, "[%s] %04x <= %04x\n", __func__, reg, val);
0071 
0072     return 0;
0073 }
0074 
0075 static const struct regmap_config rt5682_sdw_indirect_regmap = {
0076     .reg_bits = 16,
0077     .val_bits = 16,
0078     .max_register = RT5682_I2C_MODE,
0079     .volatile_reg = rt5682_volatile_register,
0080     .readable_reg = rt5682_readable_register,
0081     .cache_type = REGCACHE_RBTREE,
0082     .reg_defaults = rt5682_reg,
0083     .num_reg_defaults = RT5682_REG_NUM,
0084     .use_single_read = true,
0085     .use_single_write = true,
0086     .reg_read = rt5682_sdw_read,
0087     .reg_write = rt5682_sdw_write,
0088 };
0089 
0090 struct sdw_stream_data {
0091     struct sdw_stream_runtime *sdw_stream;
0092 };
0093 
0094 static int rt5682_set_sdw_stream(struct snd_soc_dai *dai, void *sdw_stream,
0095                  int direction)
0096 {
0097     struct sdw_stream_data *stream;
0098 
0099     if (!sdw_stream)
0100         return 0;
0101 
0102     stream = kzalloc(sizeof(*stream), GFP_KERNEL);
0103     if (!stream)
0104         return -ENOMEM;
0105 
0106     stream->sdw_stream = sdw_stream;
0107 
0108     /* Use tx_mask or rx_mask to configure stream tag and set dma_data */
0109     if (direction == SNDRV_PCM_STREAM_PLAYBACK)
0110         dai->playback_dma_data = stream;
0111     else
0112         dai->capture_dma_data = stream;
0113 
0114     return 0;
0115 }
0116 
0117 static void rt5682_sdw_shutdown(struct snd_pcm_substream *substream,
0118                 struct snd_soc_dai *dai)
0119 {
0120     struct sdw_stream_data *stream;
0121 
0122     stream = snd_soc_dai_get_dma_data(dai, substream);
0123     snd_soc_dai_set_dma_data(dai, substream, NULL);
0124     kfree(stream);
0125 }
0126 
0127 static int rt5682_sdw_hw_params(struct snd_pcm_substream *substream,
0128                 struct snd_pcm_hw_params *params,
0129                 struct snd_soc_dai *dai)
0130 {
0131     struct snd_soc_component *component = dai->component;
0132     struct rt5682_priv *rt5682 = snd_soc_component_get_drvdata(component);
0133     struct sdw_stream_config stream_config;
0134     struct sdw_port_config port_config;
0135     enum sdw_data_direction direction;
0136     struct sdw_stream_data *stream;
0137     int retval, port, num_channels;
0138     unsigned int val_p = 0, val_c = 0, osr_p = 0, osr_c = 0;
0139 
0140     dev_dbg(dai->dev, "%s %s", __func__, dai->name);
0141 
0142     stream = snd_soc_dai_get_dma_data(dai, substream);
0143     if (!stream)
0144         return -ENOMEM;
0145 
0146     if (!rt5682->slave)
0147         return -EINVAL;
0148 
0149     /* SoundWire specific configuration */
0150     if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
0151         direction = SDW_DATA_DIR_RX;
0152         port = 1;
0153     } else {
0154         direction = SDW_DATA_DIR_TX;
0155         port = 2;
0156     }
0157 
0158     stream_config.frame_rate = params_rate(params);
0159     stream_config.ch_count = params_channels(params);
0160     stream_config.bps = snd_pcm_format_width(params_format(params));
0161     stream_config.direction = direction;
0162 
0163     num_channels = params_channels(params);
0164     port_config.ch_mask = (1 << (num_channels)) - 1;
0165     port_config.num = port;
0166 
0167     retval = sdw_stream_add_slave(rt5682->slave, &stream_config,
0168                       &port_config, 1, stream->sdw_stream);
0169     if (retval) {
0170         dev_err(dai->dev, "Unable to configure port\n");
0171         return retval;
0172     }
0173 
0174     switch (params_rate(params)) {
0175     case 48000:
0176         val_p = RT5682_SDW_REF_1_48K;
0177         val_c = RT5682_SDW_REF_2_48K;
0178         break;
0179     case 96000:
0180         val_p = RT5682_SDW_REF_1_96K;
0181         val_c = RT5682_SDW_REF_2_96K;
0182         break;
0183     case 192000:
0184         val_p = RT5682_SDW_REF_1_192K;
0185         val_c = RT5682_SDW_REF_2_192K;
0186         break;
0187     case 32000:
0188         val_p = RT5682_SDW_REF_1_32K;
0189         val_c = RT5682_SDW_REF_2_32K;
0190         break;
0191     case 24000:
0192         val_p = RT5682_SDW_REF_1_24K;
0193         val_c = RT5682_SDW_REF_2_24K;
0194         break;
0195     case 16000:
0196         val_p = RT5682_SDW_REF_1_16K;
0197         val_c = RT5682_SDW_REF_2_16K;
0198         break;
0199     case 12000:
0200         val_p = RT5682_SDW_REF_1_12K;
0201         val_c = RT5682_SDW_REF_2_12K;
0202         break;
0203     case 8000:
0204         val_p = RT5682_SDW_REF_1_8K;
0205         val_c = RT5682_SDW_REF_2_8K;
0206         break;
0207     case 44100:
0208         val_p = RT5682_SDW_REF_1_44K;
0209         val_c = RT5682_SDW_REF_2_44K;
0210         break;
0211     case 88200:
0212         val_p = RT5682_SDW_REF_1_88K;
0213         val_c = RT5682_SDW_REF_2_88K;
0214         break;
0215     case 176400:
0216         val_p = RT5682_SDW_REF_1_176K;
0217         val_c = RT5682_SDW_REF_2_176K;
0218         break;
0219     case 22050:
0220         val_p = RT5682_SDW_REF_1_22K;
0221         val_c = RT5682_SDW_REF_2_22K;
0222         break;
0223     case 11025:
0224         val_p = RT5682_SDW_REF_1_11K;
0225         val_c = RT5682_SDW_REF_2_11K;
0226         break;
0227     default:
0228         return -EINVAL;
0229     }
0230 
0231     if (params_rate(params) <= 48000) {
0232         osr_p = RT5682_DAC_OSR_D_8;
0233         osr_c = RT5682_ADC_OSR_D_8;
0234     } else if (params_rate(params) <= 96000) {
0235         osr_p = RT5682_DAC_OSR_D_4;
0236         osr_c = RT5682_ADC_OSR_D_4;
0237     } else {
0238         osr_p = RT5682_DAC_OSR_D_2;
0239         osr_c = RT5682_ADC_OSR_D_2;
0240     }
0241 
0242     if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
0243         regmap_update_bits(rt5682->regmap, RT5682_SDW_REF_CLK,
0244             RT5682_SDW_REF_1_MASK, val_p);
0245         regmap_update_bits(rt5682->regmap, RT5682_ADDA_CLK_1,
0246             RT5682_DAC_OSR_MASK, osr_p);
0247     } else {
0248         regmap_update_bits(rt5682->regmap, RT5682_SDW_REF_CLK,
0249             RT5682_SDW_REF_2_MASK, val_c);
0250         regmap_update_bits(rt5682->regmap, RT5682_ADDA_CLK_1,
0251             RT5682_ADC_OSR_MASK, osr_c);
0252     }
0253 
0254     return retval;
0255 }
0256 
0257 static int rt5682_sdw_hw_free(struct snd_pcm_substream *substream,
0258                   struct snd_soc_dai *dai)
0259 {
0260     struct snd_soc_component *component = dai->component;
0261     struct rt5682_priv *rt5682 = snd_soc_component_get_drvdata(component);
0262     struct sdw_stream_data *stream =
0263         snd_soc_dai_get_dma_data(dai, substream);
0264 
0265     if (!rt5682->slave)
0266         return -EINVAL;
0267 
0268     sdw_stream_remove_slave(rt5682->slave, stream->sdw_stream);
0269     return 0;
0270 }
0271 
0272 static const struct snd_soc_dai_ops rt5682_sdw_ops = {
0273     .hw_params  = rt5682_sdw_hw_params,
0274     .hw_free    = rt5682_sdw_hw_free,
0275     .set_stream = rt5682_set_sdw_stream,
0276     .shutdown   = rt5682_sdw_shutdown,
0277 };
0278 
0279 static struct snd_soc_dai_driver rt5682_dai[] = {
0280     {
0281         .name = "rt5682-aif1",
0282         .id = RT5682_AIF1,
0283         .playback = {
0284             .stream_name = "AIF1 Playback",
0285             .channels_min = 1,
0286             .channels_max = 2,
0287             .rates = RT5682_STEREO_RATES,
0288             .formats = RT5682_FORMATS,
0289         },
0290         .capture = {
0291             .stream_name = "AIF1 Capture",
0292             .channels_min = 1,
0293             .channels_max = 2,
0294             .rates = RT5682_STEREO_RATES,
0295             .formats = RT5682_FORMATS,
0296         },
0297         .ops = &rt5682_aif1_dai_ops,
0298     },
0299     {
0300         .name = "rt5682-aif2",
0301         .id = RT5682_AIF2,
0302         .capture = {
0303             .stream_name = "AIF2 Capture",
0304             .channels_min = 1,
0305             .channels_max = 2,
0306             .rates = RT5682_STEREO_RATES,
0307             .formats = RT5682_FORMATS,
0308         },
0309         .ops = &rt5682_aif2_dai_ops,
0310     },
0311     {
0312         .name = "rt5682-sdw",
0313         .id = RT5682_SDW,
0314         .playback = {
0315             .stream_name = "SDW Playback",
0316             .channels_min = 1,
0317             .channels_max = 2,
0318             .rates = RT5682_STEREO_RATES,
0319             .formats = RT5682_FORMATS,
0320         },
0321         .capture = {
0322             .stream_name = "SDW Capture",
0323             .channels_min = 1,
0324             .channels_max = 2,
0325             .rates = RT5682_STEREO_RATES,
0326             .formats = RT5682_FORMATS,
0327         },
0328         .ops = &rt5682_sdw_ops,
0329     },
0330 };
0331 
0332 static int rt5682_sdw_init(struct device *dev, struct regmap *regmap,
0333                struct sdw_slave *slave)
0334 {
0335     struct rt5682_priv *rt5682;
0336     int ret;
0337 
0338     rt5682 = devm_kzalloc(dev, sizeof(*rt5682), GFP_KERNEL);
0339     if (!rt5682)
0340         return -ENOMEM;
0341 
0342     dev_set_drvdata(dev, rt5682);
0343     rt5682->slave = slave;
0344     rt5682->sdw_regmap = regmap;
0345     rt5682->is_sdw = true;
0346 
0347     mutex_init(&rt5682->disable_irq_lock);
0348 
0349     rt5682->regmap = devm_regmap_init(dev, NULL, dev,
0350                       &rt5682_sdw_indirect_regmap);
0351     if (IS_ERR(rt5682->regmap)) {
0352         ret = PTR_ERR(rt5682->regmap);
0353         dev_err(dev, "Failed to allocate register map: %d\n",
0354             ret);
0355         return ret;
0356     }
0357 
0358     /*
0359      * Mark hw_init to false
0360      * HW init will be performed when device reports present
0361      */
0362     rt5682->hw_init = false;
0363     rt5682->first_hw_init = false;
0364 
0365     mutex_init(&rt5682->calibrate_mutex);
0366     INIT_DELAYED_WORK(&rt5682->jack_detect_work,
0367         rt5682_jack_detect_handler);
0368 
0369     ret = devm_snd_soc_register_component(dev,
0370                           &rt5682_soc_component_dev,
0371                           rt5682_dai, ARRAY_SIZE(rt5682_dai));
0372     dev_dbg(&slave->dev, "%s\n", __func__);
0373 
0374     return ret;
0375 }
0376 
0377 static int rt5682_io_init(struct device *dev, struct sdw_slave *slave)
0378 {
0379     struct rt5682_priv *rt5682 = dev_get_drvdata(dev);
0380     int ret = 0, loop = 10;
0381     unsigned int val;
0382 
0383     rt5682->disable_irq = false;
0384 
0385     if (rt5682->hw_init)
0386         return 0;
0387 
0388     /*
0389      * PM runtime is only enabled when a Slave reports as Attached
0390      */
0391     if (!rt5682->first_hw_init) {
0392         /* set autosuspend parameters */
0393         pm_runtime_set_autosuspend_delay(&slave->dev, 3000);
0394         pm_runtime_use_autosuspend(&slave->dev);
0395 
0396         /* update count of parent 'active' children */
0397         pm_runtime_set_active(&slave->dev);
0398 
0399         /* make sure the device does not suspend immediately */
0400         pm_runtime_mark_last_busy(&slave->dev);
0401 
0402         pm_runtime_enable(&slave->dev);
0403     }
0404 
0405     pm_runtime_get_noresume(&slave->dev);
0406 
0407     if (rt5682->first_hw_init) {
0408         regcache_cache_only(rt5682->regmap, false);
0409         regcache_cache_bypass(rt5682->regmap, true);
0410     }
0411 
0412     while (loop > 0) {
0413         regmap_read(rt5682->regmap, RT5682_DEVICE_ID, &val);
0414         if (val == DEVICE_ID)
0415             break;
0416         dev_warn(dev, "Device with ID register %x is not rt5682\n", val);
0417         usleep_range(30000, 30005);
0418         loop--;
0419     }
0420 
0421     if (val != DEVICE_ID) {
0422         dev_err(dev, "Device with ID register %x is not rt5682\n", val);
0423         ret = -ENODEV;
0424         goto err_nodev;
0425     }
0426 
0427     rt5682_calibrate(rt5682);
0428 
0429     if (rt5682->first_hw_init) {
0430         regcache_cache_bypass(rt5682->regmap, false);
0431         regcache_mark_dirty(rt5682->regmap);
0432         regcache_sync(rt5682->regmap);
0433 
0434         /* volatile registers */
0435         regmap_update_bits(rt5682->regmap, RT5682_CBJ_CTRL_2,
0436             RT5682_EXT_JD_SRC, RT5682_EXT_JD_SRC_MANUAL);
0437 
0438         goto reinit;
0439     }
0440 
0441     rt5682_apply_patch_list(rt5682, dev);
0442 
0443     regmap_write(rt5682->regmap, RT5682_DEPOP_1, 0x0000);
0444 
0445     regmap_update_bits(rt5682->regmap, RT5682_PWR_ANLG_1,
0446         RT5682_LDO1_DVO_MASK | RT5682_HP_DRIVER_MASK,
0447         RT5682_LDO1_DVO_12 | RT5682_HP_DRIVER_5X);
0448     regmap_write(rt5682->regmap, RT5682_MICBIAS_2, 0x0080);
0449     regmap_write(rt5682->regmap, RT5682_TEST_MODE_CTRL_1, 0x0000);
0450     regmap_update_bits(rt5682->regmap, RT5682_BIAS_CUR_CTRL_8,
0451         RT5682_HPA_CP_BIAS_CTRL_MASK, RT5682_HPA_CP_BIAS_3UA);
0452     regmap_update_bits(rt5682->regmap, RT5682_CHARGE_PUMP_1,
0453         RT5682_CP_CLK_HP_MASK, RT5682_CP_CLK_HP_300KHZ);
0454     regmap_update_bits(rt5682->regmap, RT5682_HP_CHARGE_PUMP_1,
0455         RT5682_PM_HP_MASK, RT5682_PM_HP_HV);
0456 
0457     /* Soundwire */
0458     regmap_write(rt5682->regmap, RT5682_PLL2_INTERNAL, 0xa266);
0459     regmap_write(rt5682->regmap, RT5682_PLL2_CTRL_1, 0x1700);
0460     regmap_write(rt5682->regmap, RT5682_PLL2_CTRL_2, 0x0006);
0461     regmap_write(rt5682->regmap, RT5682_PLL2_CTRL_3, 0x2600);
0462     regmap_write(rt5682->regmap, RT5682_PLL2_CTRL_4, 0x0c8f);
0463     regmap_write(rt5682->regmap, RT5682_PLL_TRACK_2, 0x3000);
0464     regmap_write(rt5682->regmap, RT5682_PLL_TRACK_3, 0x4000);
0465     regmap_update_bits(rt5682->regmap, RT5682_GLB_CLK,
0466         RT5682_SCLK_SRC_MASK | RT5682_PLL2_SRC_MASK,
0467         RT5682_SCLK_SRC_PLL2 | RT5682_PLL2_SRC_SDW);
0468 
0469     regmap_update_bits(rt5682->regmap, RT5682_CBJ_CTRL_2,
0470         RT5682_EXT_JD_SRC, RT5682_EXT_JD_SRC_MANUAL);
0471     regmap_write(rt5682->regmap, RT5682_CBJ_CTRL_1, 0xd142);
0472     regmap_update_bits(rt5682->regmap, RT5682_CBJ_CTRL_5, 0x0700, 0x0600);
0473     regmap_update_bits(rt5682->regmap, RT5682_CBJ_CTRL_3,
0474         RT5682_CBJ_IN_BUF_EN, RT5682_CBJ_IN_BUF_EN);
0475     regmap_update_bits(rt5682->regmap, RT5682_SAR_IL_CMD_1,
0476         RT5682_SAR_POW_MASK, RT5682_SAR_POW_EN);
0477     regmap_update_bits(rt5682->regmap, RT5682_RC_CLK_CTRL,
0478         RT5682_POW_IRQ | RT5682_POW_JDH |
0479         RT5682_POW_ANA, RT5682_POW_IRQ |
0480         RT5682_POW_JDH | RT5682_POW_ANA);
0481     regmap_update_bits(rt5682->regmap, RT5682_PWR_ANLG_2,
0482         RT5682_PWR_JDH, RT5682_PWR_JDH);
0483     regmap_update_bits(rt5682->regmap, RT5682_IRQ_CTRL_2,
0484         RT5682_JD1_EN_MASK | RT5682_JD1_IRQ_MASK,
0485         RT5682_JD1_EN | RT5682_JD1_IRQ_PUL);
0486 
0487 reinit:
0488     mod_delayed_work(system_power_efficient_wq,
0489         &rt5682->jack_detect_work, msecs_to_jiffies(250));
0490 
0491     /* Mark Slave initialization complete */
0492     rt5682->hw_init = true;
0493     rt5682->first_hw_init = true;
0494 
0495 err_nodev:
0496     pm_runtime_mark_last_busy(&slave->dev);
0497     pm_runtime_put_autosuspend(&slave->dev);
0498 
0499     dev_dbg(&slave->dev, "%s hw_init complete: %d\n", __func__, ret);
0500 
0501     return ret;
0502 }
0503 
0504 static bool rt5682_sdw_readable_register(struct device *dev, unsigned int reg)
0505 {
0506     switch (reg) {
0507     case 0x00e0:
0508     case 0x00f0:
0509     case 0x3000:
0510     case 0x3001:
0511     case 0x3004:
0512     case 0x3005:
0513     case 0x3008:
0514         return true;
0515     default:
0516         return false;
0517     }
0518 }
0519 
0520 static const struct regmap_config rt5682_sdw_regmap = {
0521     .name = "sdw",
0522     .reg_bits = 32,
0523     .val_bits = 8,
0524     .max_register = RT5682_I2C_MODE,
0525     .readable_reg = rt5682_sdw_readable_register,
0526     .cache_type = REGCACHE_NONE,
0527     .use_single_read = true,
0528     .use_single_write = true,
0529 };
0530 
0531 static int rt5682_update_status(struct sdw_slave *slave,
0532                     enum sdw_slave_status status)
0533 {
0534     struct rt5682_priv *rt5682 = dev_get_drvdata(&slave->dev);
0535 
0536     /* Update the status */
0537     rt5682->status = status;
0538 
0539     if (status == SDW_SLAVE_UNATTACHED)
0540         rt5682->hw_init = false;
0541 
0542     /*
0543      * Perform initialization only if slave status is present and
0544      * hw_init flag is false
0545      */
0546     if (rt5682->hw_init || rt5682->status != SDW_SLAVE_ATTACHED)
0547         return 0;
0548 
0549     /* perform I/O transfers required for Slave initialization */
0550     return rt5682_io_init(&slave->dev, slave);
0551 }
0552 
0553 static int rt5682_read_prop(struct sdw_slave *slave)
0554 {
0555     struct sdw_slave_prop *prop = &slave->prop;
0556     int nval, i;
0557     u32 bit;
0558     unsigned long addr;
0559     struct sdw_dpn_prop *dpn;
0560 
0561     prop->scp_int1_mask = SDW_SCP_INT1_IMPL_DEF | SDW_SCP_INT1_BUS_CLASH |
0562         SDW_SCP_INT1_PARITY;
0563     prop->quirks = SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY;
0564 
0565     prop->paging_support = false;
0566 
0567     /* first we need to allocate memory for set bits in port lists */
0568     prop->source_ports = 0x4;   /* BITMAP: 00000100 */
0569     prop->sink_ports = 0x2;     /* BITMAP: 00000010 */
0570 
0571     nval = hweight32(prop->source_ports);
0572     prop->src_dpn_prop = devm_kcalloc(&slave->dev, nval,
0573                       sizeof(*prop->src_dpn_prop),
0574                       GFP_KERNEL);
0575     if (!prop->src_dpn_prop)
0576         return -ENOMEM;
0577 
0578     i = 0;
0579     dpn = prop->src_dpn_prop;
0580     addr = prop->source_ports;
0581     for_each_set_bit(bit, &addr, 32) {
0582         dpn[i].num = bit;
0583         dpn[i].type = SDW_DPN_FULL;
0584         dpn[i].simple_ch_prep_sm = true;
0585         dpn[i].ch_prep_timeout = 10;
0586         i++;
0587     }
0588 
0589     /* do this again for sink now */
0590     nval = hweight32(prop->sink_ports);
0591     prop->sink_dpn_prop = devm_kcalloc(&slave->dev, nval,
0592                        sizeof(*prop->sink_dpn_prop),
0593                        GFP_KERNEL);
0594     if (!prop->sink_dpn_prop)
0595         return -ENOMEM;
0596 
0597     i = 0;
0598     dpn = prop->sink_dpn_prop;
0599     addr = prop->sink_ports;
0600     for_each_set_bit(bit, &addr, 32) {
0601         dpn[i].num = bit;
0602         dpn[i].type = SDW_DPN_FULL;
0603         dpn[i].simple_ch_prep_sm = true;
0604         dpn[i].ch_prep_timeout = 10;
0605         i++;
0606     }
0607 
0608     /* set the timeout values */
0609     prop->clk_stop_timeout = 20;
0610 
0611     /* wake-up event */
0612     prop->wake_capable = 1;
0613 
0614     return 0;
0615 }
0616 
0617 /* Bus clock frequency */
0618 #define RT5682_CLK_FREQ_9600000HZ 9600000
0619 #define RT5682_CLK_FREQ_12000000HZ 12000000
0620 #define RT5682_CLK_FREQ_6000000HZ 6000000
0621 #define RT5682_CLK_FREQ_4800000HZ 4800000
0622 #define RT5682_CLK_FREQ_2400000HZ 2400000
0623 #define RT5682_CLK_FREQ_12288000HZ 12288000
0624 
0625 static int rt5682_clock_config(struct device *dev)
0626 {
0627     struct rt5682_priv *rt5682 = dev_get_drvdata(dev);
0628     unsigned int clk_freq, value;
0629 
0630     clk_freq = (rt5682->params.curr_dr_freq >> 1);
0631 
0632     switch (clk_freq) {
0633     case RT5682_CLK_FREQ_12000000HZ:
0634         value = 0x0;
0635         break;
0636     case RT5682_CLK_FREQ_6000000HZ:
0637         value = 0x1;
0638         break;
0639     case RT5682_CLK_FREQ_9600000HZ:
0640         value = 0x2;
0641         break;
0642     case RT5682_CLK_FREQ_4800000HZ:
0643         value = 0x3;
0644         break;
0645     case RT5682_CLK_FREQ_2400000HZ:
0646         value = 0x4;
0647         break;
0648     case RT5682_CLK_FREQ_12288000HZ:
0649         value = 0x5;
0650         break;
0651     default:
0652         return -EINVAL;
0653     }
0654 
0655     regmap_write(rt5682->sdw_regmap, 0xe0, value);
0656     regmap_write(rt5682->sdw_regmap, 0xf0, value);
0657 
0658     dev_dbg(dev, "%s complete, clk_freq=%d\n", __func__, clk_freq);
0659 
0660     return 0;
0661 }
0662 
0663 static int rt5682_bus_config(struct sdw_slave *slave,
0664                     struct sdw_bus_params *params)
0665 {
0666     struct rt5682_priv *rt5682 = dev_get_drvdata(&slave->dev);
0667     int ret;
0668 
0669     memcpy(&rt5682->params, params, sizeof(*params));
0670 
0671     ret = rt5682_clock_config(&slave->dev);
0672     if (ret < 0)
0673         dev_err(&slave->dev, "Invalid clk config");
0674 
0675     return ret;
0676 }
0677 
0678 static int rt5682_interrupt_callback(struct sdw_slave *slave,
0679                     struct sdw_slave_intr_status *status)
0680 {
0681     struct rt5682_priv *rt5682 = dev_get_drvdata(&slave->dev);
0682 
0683     dev_dbg(&slave->dev,
0684         "%s control_port_stat=%x", __func__, status->control_port);
0685 
0686     mutex_lock(&rt5682->disable_irq_lock);
0687     if (status->control_port & 0x4 && !rt5682->disable_irq) {
0688         mod_delayed_work(system_power_efficient_wq,
0689             &rt5682->jack_detect_work, msecs_to_jiffies(rt5682->irq_work_delay_time));
0690     }
0691     mutex_unlock(&rt5682->disable_irq_lock);
0692 
0693     return 0;
0694 }
0695 
0696 static const struct sdw_slave_ops rt5682_slave_ops = {
0697     .read_prop = rt5682_read_prop,
0698     .interrupt_callback = rt5682_interrupt_callback,
0699     .update_status = rt5682_update_status,
0700     .bus_config = rt5682_bus_config,
0701 };
0702 
0703 static int rt5682_sdw_probe(struct sdw_slave *slave,
0704                const struct sdw_device_id *id)
0705 {
0706     struct regmap *regmap;
0707 
0708     /* Regmap Initialization */
0709     regmap = devm_regmap_init_sdw(slave, &rt5682_sdw_regmap);
0710     if (IS_ERR(regmap))
0711         return -EINVAL;
0712 
0713     rt5682_sdw_init(&slave->dev, regmap, slave);
0714 
0715     return 0;
0716 }
0717 
0718 static int rt5682_sdw_remove(struct sdw_slave *slave)
0719 {
0720     struct rt5682_priv *rt5682 = dev_get_drvdata(&slave->dev);
0721 
0722     if (rt5682->hw_init)
0723         cancel_delayed_work_sync(&rt5682->jack_detect_work);
0724 
0725     if (rt5682->first_hw_init)
0726         pm_runtime_disable(&slave->dev);
0727 
0728     return 0;
0729 }
0730 
0731 static const struct sdw_device_id rt5682_id[] = {
0732     SDW_SLAVE_ENTRY_EXT(0x025d, 0x5682, 0x2, 0, 0),
0733     {},
0734 };
0735 MODULE_DEVICE_TABLE(sdw, rt5682_id);
0736 
0737 static int __maybe_unused rt5682_dev_suspend(struct device *dev)
0738 {
0739     struct rt5682_priv *rt5682 = dev_get_drvdata(dev);
0740 
0741     if (!rt5682->hw_init)
0742         return 0;
0743 
0744     cancel_delayed_work_sync(&rt5682->jack_detect_work);
0745 
0746     regcache_cache_only(rt5682->regmap, true);
0747     regcache_mark_dirty(rt5682->regmap);
0748 
0749     return 0;
0750 }
0751 
0752 static int __maybe_unused rt5682_dev_system_suspend(struct device *dev)
0753 {
0754     struct rt5682_priv *rt5682 = dev_get_drvdata(dev);
0755     struct sdw_slave *slave = dev_to_sdw_dev(dev);
0756     int ret;
0757 
0758     if (!rt5682->hw_init)
0759         return 0;
0760 
0761     /*
0762      * prevent new interrupts from being handled after the
0763      * deferred work completes and before the parent disables
0764      * interrupts on the link
0765      */
0766     mutex_lock(&rt5682->disable_irq_lock);
0767     rt5682->disable_irq = true;
0768     ret = sdw_update_no_pm(slave, SDW_SCP_INTMASK1,
0769                    SDW_SCP_INT1_IMPL_DEF, 0);
0770     mutex_unlock(&rt5682->disable_irq_lock);
0771 
0772     if (ret < 0) {
0773         /* log but don't prevent suspend from happening */
0774         dev_dbg(&slave->dev, "%s: could not disable imp-def interrupts\n:", __func__);
0775     }
0776 
0777     return rt5682_dev_suspend(dev);
0778 }
0779 
0780 static int __maybe_unused rt5682_dev_resume(struct device *dev)
0781 {
0782     struct sdw_slave *slave = dev_to_sdw_dev(dev);
0783     struct rt5682_priv *rt5682 = dev_get_drvdata(dev);
0784     unsigned long time;
0785 
0786     if (!rt5682->first_hw_init)
0787         return 0;
0788 
0789     if (!slave->unattach_request)
0790         goto regmap_sync;
0791 
0792     time = wait_for_completion_timeout(&slave->initialization_complete,
0793                 msecs_to_jiffies(RT5682_PROBE_TIMEOUT));
0794     if (!time) {
0795         dev_err(&slave->dev, "Initialization not complete, timed out\n");
0796         return -ETIMEDOUT;
0797     }
0798 
0799 regmap_sync:
0800     slave->unattach_request = 0;
0801     regcache_cache_only(rt5682->regmap, false);
0802     regcache_sync(rt5682->regmap);
0803 
0804     return 0;
0805 }
0806 
0807 static const struct dev_pm_ops rt5682_pm = {
0808     SET_SYSTEM_SLEEP_PM_OPS(rt5682_dev_system_suspend, rt5682_dev_resume)
0809     SET_RUNTIME_PM_OPS(rt5682_dev_suspend, rt5682_dev_resume, NULL)
0810 };
0811 
0812 static struct sdw_driver rt5682_sdw_driver = {
0813     .driver = {
0814         .name = "rt5682",
0815         .owner = THIS_MODULE,
0816         .pm = &rt5682_pm,
0817     },
0818     .probe = rt5682_sdw_probe,
0819     .remove = rt5682_sdw_remove,
0820     .ops = &rt5682_slave_ops,
0821     .id_table = rt5682_id,
0822 };
0823 module_sdw_driver(rt5682_sdw_driver);
0824 
0825 MODULE_DESCRIPTION("ASoC RT5682 driver SDW");
0826 MODULE_AUTHOR("Oder Chiou <oder_chiou@realtek.com>");
0827 MODULE_LICENSE("GPL v2");
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