soc/codecs/rt5651.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * rt5651.c  --  RT5651 ALSA SoC audio codec driver
0004  *
0005  * Copyright 2014 Realtek Semiconductor Corp.
0006  * Author: Bard Liao <bardliao@realtek.com>
0007  */
0008
0009 #include <linux/module.h>
0010 #include <linux/init.h>
0011 #include <linux/delay.h>
0012 #include <linux/pm.h>
0013 #include <linux/gpio/consumer.h>
0014 #include <linux/i2c.h>
0015 #include <linux/regmap.h>
0016 #include <linux/platform_device.h>
0017 #include <linux/spi/spi.h>
0018 #include <linux/acpi.h>
0019 #include <sound/core.h>
0020 #include <sound/pcm.h>
0021 #include <sound/pcm_params.h>
0022 #include <sound/soc.h>
0023 #include <sound/soc-dapm.h>
0024 #include <sound/initval.h>
0025 #include <sound/tlv.h>
0026 #include <sound/jack.h>
0027
0028 #include "rl6231.h"
0029 #include "rt5651.h"
0030
0031 #define RT5651_DEVICE_ID_VALUE 0x6281
0032
0033 #define RT5651_PR_RANGE_BASE (0xff + 1)
0034 #define RT5651_PR_SPACING 0x100
0035
0036 #define RT5651_PR_BASE (RT5651_PR_RANGE_BASE + (0 * RT5651_PR_SPACING))
0037
0038 static const struct regmap_range_cfg rt5651_ranges[] = {
0039     { .name = "PR", .range_min = RT5651_PR_BASE,
0040       .range_max = RT5651_PR_BASE + 0xb4,
0041       .selector_reg = RT5651_PRIV_INDEX,
0042       .selector_mask = 0xff,
0043       .selector_shift = 0x0,
0044       .window_start = RT5651_PRIV_DATA,
0045       .window_len = 0x1, },
0046 };
0047
0048 static const struct reg_sequence init_list[] = {
0049     {RT5651_PR_BASE + 0x3d, 0x3e00},
0050 };
0051
0052 static const struct reg_default rt5651_reg[] = {
0053     { 0x00, 0x0000 },
0054     { 0x02, 0xc8c8 },
0055     { 0x03, 0xc8c8 },
0056     { 0x05, 0x0000 },
0057     { 0x0d, 0x0000 },
0058     { 0x0e, 0x0000 },
0059     { 0x0f, 0x0808 },
0060     { 0x10, 0x0808 },
0061     { 0x19, 0xafaf },
0062     { 0x1a, 0xafaf },
0063     { 0x1b, 0x0c00 },
0064     { 0x1c, 0x2f2f },
0065     { 0x1d, 0x2f2f },
0066     { 0x1e, 0x0000 },
0067     { 0x27, 0x7860 },
0068     { 0x28, 0x7070 },
0069     { 0x29, 0x8080 },
0070     { 0x2a, 0x5252 },
0071     { 0x2b, 0x5454 },
0072     { 0x2f, 0x0000 },
0073     { 0x30, 0x5000 },
0074     { 0x3b, 0x0000 },
0075     { 0x3c, 0x006f },
0076     { 0x3d, 0x0000 },
0077     { 0x3e, 0x006f },
0078     { 0x45, 0x6000 },
0079     { 0x4d, 0x0000 },
0080     { 0x4e, 0x0000 },
0081     { 0x4f, 0x0279 },
0082     { 0x50, 0x0000 },
0083     { 0x51, 0x0000 },
0084     { 0x52, 0x0279 },
0085     { 0x53, 0xf000 },
0086     { 0x61, 0x0000 },
0087     { 0x62, 0x0000 },
0088     { 0x63, 0x00c0 },
0089     { 0x64, 0x0000 },
0090     { 0x65, 0x0000 },
0091     { 0x66, 0x0000 },
0092     { 0x70, 0x8000 },
0093     { 0x71, 0x8000 },
0094     { 0x73, 0x1104 },
0095     { 0x74, 0x0c00 },
0096     { 0x75, 0x1400 },
0097     { 0x77, 0x0c00 },
0098     { 0x78, 0x4000 },
0099     { 0x79, 0x0123 },
0100     { 0x80, 0x0000 },
0101     { 0x81, 0x0000 },
0102     { 0x82, 0x0000 },
0103     { 0x83, 0x0800 },
0104     { 0x84, 0x0000 },
0105     { 0x85, 0x0008 },
0106     { 0x89, 0x0000 },
0107     { 0x8e, 0x0004 },
0108     { 0x8f, 0x1100 },
0109     { 0x90, 0x0000 },
0110     { 0x93, 0x2000 },
0111     { 0x94, 0x0200 },
0112     { 0xb0, 0x2080 },
0113     { 0xb1, 0x0000 },
0114     { 0xb4, 0x2206 },
0115     { 0xb5, 0x1f00 },
0116     { 0xb6, 0x0000 },
0117     { 0xbb, 0x0000 },
0118     { 0xbc, 0x0000 },
0119     { 0xbd, 0x0000 },
0120     { 0xbe, 0x0000 },
0121     { 0xbf, 0x0000 },
0122     { 0xc0, 0x0400 },
0123     { 0xc1, 0x0000 },
0124     { 0xc2, 0x0000 },
0125     { 0xcf, 0x0013 },
0126     { 0xd0, 0x0680 },
0127     { 0xd1, 0x1c17 },
0128     { 0xd3, 0xb320 },
0129     { 0xd9, 0x0809 },
0130     { 0xfa, 0x0010 },
0131     { 0xfe, 0x10ec },
0132     { 0xff, 0x6281 },
0133 };
0134
0135 static bool rt5651_volatile_register(struct device *dev,  unsigned int reg)
0136 {
0137     int i;
0138
0139     for (i = 0; i < ARRAY_SIZE(rt5651_ranges); i++) {
0140         if ((reg >= rt5651_ranges[i].window_start &&
0141              reg <= rt5651_ranges[i].window_start +
0142              rt5651_ranges[i].window_len) ||
0143             (reg >= rt5651_ranges[i].range_min &&
0144              reg <= rt5651_ranges[i].range_max)) {
0145             return true;
0146         }
0147     }
0148
0149     switch (reg) {
0150     case RT5651_RESET:
0151     case RT5651_PRIV_DATA:
0152     case RT5651_EQ_CTRL1:
0153     case RT5651_ALC_1:
0154     case RT5651_IRQ_CTRL2:
0155     case RT5651_INT_IRQ_ST:
0156     case RT5651_PGM_REG_ARR1:
0157     case RT5651_PGM_REG_ARR3:
0158     case RT5651_VENDOR_ID:
0159     case RT5651_DEVICE_ID:
0160         return true;
0161     default:
0162         return false;
0163     }
0164 }
0165
0166 static bool rt5651_readable_register(struct device *dev, unsigned int reg)
0167 {
0168     int i;
0169
0170     for (i = 0; i < ARRAY_SIZE(rt5651_ranges); i++) {
0171         if ((reg >= rt5651_ranges[i].window_start &&
0172              reg <= rt5651_ranges[i].window_start +
0173              rt5651_ranges[i].window_len) ||
0174             (reg >= rt5651_ranges[i].range_min &&
0175              reg <= rt5651_ranges[i].range_max)) {
0176             return true;
0177         }
0178     }
0179
0180     switch (reg) {
0181     case RT5651_RESET:
0182     case RT5651_VERSION_ID:
0183     case RT5651_VENDOR_ID:
0184     case RT5651_DEVICE_ID:
0185     case RT5651_HP_VOL:
0186     case RT5651_LOUT_CTRL1:
0187     case RT5651_LOUT_CTRL2:
0188     case RT5651_IN1_IN2:
0189     case RT5651_IN3:
0190     case RT5651_INL1_INR1_VOL:
0191     case RT5651_INL2_INR2_VOL:
0192     case RT5651_DAC1_DIG_VOL:
0193     case RT5651_DAC2_DIG_VOL:
0194     case RT5651_DAC2_CTRL:
0195     case RT5651_ADC_DIG_VOL:
0196     case RT5651_ADC_DATA:
0197     case RT5651_ADC_BST_VOL:
0198     case RT5651_STO1_ADC_MIXER:
0199     case RT5651_STO2_ADC_MIXER:
0200     case RT5651_AD_DA_MIXER:
0201     case RT5651_STO_DAC_MIXER:
0202     case RT5651_DD_MIXER:
0203     case RT5651_DIG_INF_DATA:
0204     case RT5651_PDM_CTL:
0205     case RT5651_REC_L1_MIXER:
0206     case RT5651_REC_L2_MIXER:
0207     case RT5651_REC_R1_MIXER:
0208     case RT5651_REC_R2_MIXER:
0209     case RT5651_HPO_MIXER:
0210     case RT5651_OUT_L1_MIXER:
0211     case RT5651_OUT_L2_MIXER:
0212     case RT5651_OUT_L3_MIXER:
0213     case RT5651_OUT_R1_MIXER:
0214     case RT5651_OUT_R2_MIXER:
0215     case RT5651_OUT_R3_MIXER:
0216     case RT5651_LOUT_MIXER:
0217     case RT5651_PWR_DIG1:
0218     case RT5651_PWR_DIG2:
0219     case RT5651_PWR_ANLG1:
0220     case RT5651_PWR_ANLG2:
0221     case RT5651_PWR_MIXER:
0222     case RT5651_PWR_VOL:
0223     case RT5651_PRIV_INDEX:
0224     case RT5651_PRIV_DATA:
0225     case RT5651_I2S1_SDP:
0226     case RT5651_I2S2_SDP:
0227     case RT5651_ADDA_CLK1:
0228     case RT5651_ADDA_CLK2:
0229     case RT5651_DMIC:
0230     case RT5651_TDM_CTL_1:
0231     case RT5651_TDM_CTL_2:
0232     case RT5651_TDM_CTL_3:
0233     case RT5651_GLB_CLK:
0234     case RT5651_PLL_CTRL1:
0235     case RT5651_PLL_CTRL2:
0236     case RT5651_PLL_MODE_1:
0237     case RT5651_PLL_MODE_2:
0238     case RT5651_PLL_MODE_3:
0239     case RT5651_PLL_MODE_4:
0240     case RT5651_PLL_MODE_5:
0241     case RT5651_PLL_MODE_6:
0242     case RT5651_PLL_MODE_7:
0243     case RT5651_DEPOP_M1:
0244     case RT5651_DEPOP_M2:
0245     case RT5651_DEPOP_M3:
0246     case RT5651_CHARGE_PUMP:
0247     case RT5651_MICBIAS:
0248     case RT5651_A_JD_CTL1:
0249     case RT5651_EQ_CTRL1:
0250     case RT5651_EQ_CTRL2:
0251     case RT5651_ALC_1:
0252     case RT5651_ALC_2:
0253     case RT5651_ALC_3:
0254     case RT5651_JD_CTRL1:
0255     case RT5651_JD_CTRL2:
0256     case RT5651_IRQ_CTRL1:
0257     case RT5651_IRQ_CTRL2:
0258     case RT5651_INT_IRQ_ST:
0259     case RT5651_GPIO_CTRL1:
0260     case RT5651_GPIO_CTRL2:
0261     case RT5651_GPIO_CTRL3:
0262     case RT5651_PGM_REG_ARR1:
0263     case RT5651_PGM_REG_ARR2:
0264     case RT5651_PGM_REG_ARR3:
0265     case RT5651_PGM_REG_ARR4:
0266     case RT5651_PGM_REG_ARR5:
0267     case RT5651_SCB_FUNC:
0268     case RT5651_SCB_CTRL:
0269     case RT5651_BASE_BACK:
0270     case RT5651_MP3_PLUS1:
0271     case RT5651_MP3_PLUS2:
0272     case RT5651_ADJ_HPF_CTRL1:
0273     case RT5651_ADJ_HPF_CTRL2:
0274     case RT5651_HP_CALIB_AMP_DET:
0275     case RT5651_HP_CALIB2:
0276     case RT5651_SV_ZCD1:
0277     case RT5651_SV_ZCD2:
0278     case RT5651_D_MISC:
0279     case RT5651_DUMMY2:
0280     case RT5651_DUMMY3:
0281         return true;
0282     default:
0283         return false;
0284     }
0285 }
0286
0287 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
0288 static const DECLARE_TLV_DB_MINMAX(dac_vol_tlv, -6562, 0);
0289 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
0290 static const DECLARE_TLV_DB_MINMAX(adc_vol_tlv, -1762, 3000);
0291 static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
0292
0293 /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
0294 static const DECLARE_TLV_DB_RANGE(bst_tlv,
0295     0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
0296     1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
0297     2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
0298     3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
0299     6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
0300     7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
0301     8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0)
0302 );
0303
0304 /* Interface data select */
0305 static const char * const rt5651_data_select[] = {
0306     "Normal", "Swap", "left copy to right", "right copy to left"};
0307
0308 static SOC_ENUM_SINGLE_DECL(rt5651_if2_dac_enum, RT5651_DIG_INF_DATA,
0309                 RT5651_IF2_DAC_SEL_SFT, rt5651_data_select);
0310
0311 static SOC_ENUM_SINGLE_DECL(rt5651_if2_adc_enum, RT5651_DIG_INF_DATA,
0312                 RT5651_IF2_ADC_SEL_SFT, rt5651_data_select);
0313
0314 static const struct snd_kcontrol_new rt5651_snd_controls[] = {
0315     /* Headphone Output Volume */
0316     SOC_DOUBLE_TLV("HP Playback Volume", RT5651_HP_VOL,
0317         RT5651_L_VOL_SFT, RT5651_R_VOL_SFT, 39, 1, out_vol_tlv),
0318     /* OUTPUT Control */
0319     SOC_DOUBLE_TLV("OUT Playback Volume", RT5651_LOUT_CTRL1,
0320         RT5651_L_VOL_SFT, RT5651_R_VOL_SFT, 39, 1, out_vol_tlv),
0321
0322     /* DAC Digital Volume */
0323     SOC_DOUBLE("DAC2 Playback Switch", RT5651_DAC2_CTRL,
0324         RT5651_M_DAC_L2_VOL_SFT, RT5651_M_DAC_R2_VOL_SFT, 1, 1),
0325     SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5651_DAC1_DIG_VOL,
0326             RT5651_L_VOL_SFT, RT5651_R_VOL_SFT,
0327             175, 0, dac_vol_tlv),
0328     SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5651_DAC2_DIG_VOL,
0329             RT5651_L_VOL_SFT, RT5651_R_VOL_SFT,
0330             175, 0, dac_vol_tlv),
0331     /* IN1/IN2/IN3 Control */
0332     SOC_SINGLE_TLV("IN1 Boost", RT5651_IN1_IN2,
0333         RT5651_BST_SFT1, 8, 0, bst_tlv),
0334     SOC_SINGLE_TLV("IN2 Boost", RT5651_IN1_IN2,
0335         RT5651_BST_SFT2, 8, 0, bst_tlv),
0336     SOC_SINGLE_TLV("IN3 Boost", RT5651_IN3,
0337         RT5651_BST_SFT1, 8, 0, bst_tlv),
0338     /* INL/INR Volume Control */
0339     SOC_DOUBLE_TLV("IN Capture Volume", RT5651_INL1_INR1_VOL,
0340             RT5651_INL_VOL_SFT, RT5651_INR_VOL_SFT,
0341             31, 1, in_vol_tlv),
0342     /* ADC Digital Volume Control */
0343     SOC_DOUBLE("ADC Capture Switch", RT5651_ADC_DIG_VOL,
0344         RT5651_L_MUTE_SFT, RT5651_R_MUTE_SFT, 1, 1),
0345     SOC_DOUBLE_TLV("ADC Capture Volume", RT5651_ADC_DIG_VOL,
0346             RT5651_L_VOL_SFT, RT5651_R_VOL_SFT,
0347             127, 0, adc_vol_tlv),
0348     SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5651_ADC_DATA,
0349             RT5651_L_VOL_SFT, RT5651_R_VOL_SFT,
0350             127, 0, adc_vol_tlv),
0351     /* ADC Boost Volume Control */
0352     SOC_DOUBLE_TLV("ADC Boost Gain", RT5651_ADC_BST_VOL,
0353             RT5651_ADC_L_BST_SFT, RT5651_ADC_R_BST_SFT,
0354             3, 0, adc_bst_tlv),
0355
0356     /* ASRC */
0357     SOC_SINGLE("IF1 ASRC Switch", RT5651_PLL_MODE_1,
0358         RT5651_STO1_T_SFT, 1, 0),
0359     SOC_SINGLE("IF2 ASRC Switch", RT5651_PLL_MODE_1,
0360         RT5651_STO2_T_SFT, 1, 0),
0361     SOC_SINGLE("DMIC ASRC Switch", RT5651_PLL_MODE_1,
0362         RT5651_DMIC_1_M_SFT, 1, 0),
0363
0364     SOC_ENUM("ADC IF2 Data Switch", rt5651_if2_adc_enum),
0365     SOC_ENUM("DAC IF2 Data Switch", rt5651_if2_dac_enum),
0366 };
0367
0368 /**
0369  * set_dmic_clk - Set parameter of dmic.
0370  *
0371  * @w: DAPM widget.
0372  * @kcontrol: The kcontrol of this widget.
0373  * @event: Event id.
0374  *
0375  */
0376 static int set_dmic_clk(struct snd_soc_dapm_widget *w,
0377     struct snd_kcontrol *kcontrol, int event)
0378 {
0379     struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
0380     struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component);
0381     int idx, rate;
0382
0383     rate = rt5651->sysclk / rl6231_get_pre_div(rt5651->regmap,
0384         RT5651_ADDA_CLK1, RT5651_I2S_PD1_SFT);
0385     idx = rl6231_calc_dmic_clk(rate);
0386     if (idx < 0)
0387         dev_err(component->dev, "Failed to set DMIC clock\n");
0388     else
0389         snd_soc_component_update_bits(component, RT5651_DMIC, RT5651_DMIC_CLK_MASK,
0390                     idx << RT5651_DMIC_CLK_SFT);
0391
0392     return idx;
0393 }
0394
0395 /* Digital Mixer */
0396 static const struct snd_kcontrol_new rt5651_sto1_adc_l_mix[] = {
0397     SOC_DAPM_SINGLE("ADC1 Switch", RT5651_STO1_ADC_MIXER,
0398             RT5651_M_STO1_ADC_L1_SFT, 1, 1),
0399     SOC_DAPM_SINGLE("ADC2 Switch", RT5651_STO1_ADC_MIXER,
0400             RT5651_M_STO1_ADC_L2_SFT, 1, 1),
0401 };
0402
0403 static const struct snd_kcontrol_new rt5651_sto1_adc_r_mix[] = {
0404     SOC_DAPM_SINGLE("ADC1 Switch", RT5651_STO1_ADC_MIXER,
0405             RT5651_M_STO1_ADC_R1_SFT, 1, 1),
0406     SOC_DAPM_SINGLE("ADC2 Switch", RT5651_STO1_ADC_MIXER,
0407             RT5651_M_STO1_ADC_R2_SFT, 1, 1),
0408 };
0409
0410 static const struct snd_kcontrol_new rt5651_sto2_adc_l_mix[] = {
0411     SOC_DAPM_SINGLE("ADC1 Switch", RT5651_STO2_ADC_MIXER,
0412             RT5651_M_STO2_ADC_L1_SFT, 1, 1),
0413     SOC_DAPM_SINGLE("ADC2 Switch", RT5651_STO2_ADC_MIXER,
0414             RT5651_M_STO2_ADC_L2_SFT, 1, 1),
0415 };
0416
0417 static const struct snd_kcontrol_new rt5651_sto2_adc_r_mix[] = {
0418     SOC_DAPM_SINGLE("ADC1 Switch", RT5651_STO2_ADC_MIXER,
0419             RT5651_M_STO2_ADC_R1_SFT, 1, 1),
0420     SOC_DAPM_SINGLE("ADC2 Switch", RT5651_STO2_ADC_MIXER,
0421             RT5651_M_STO2_ADC_R2_SFT, 1, 1),
0422 };
0423
0424 static const struct snd_kcontrol_new rt5651_dac_l_mix[] = {
0425     SOC_DAPM_SINGLE("Stereo ADC Switch", RT5651_AD_DA_MIXER,
0426             RT5651_M_ADCMIX_L_SFT, 1, 1),
0427     SOC_DAPM_SINGLE("INF1 Switch", RT5651_AD_DA_MIXER,
0428             RT5651_M_IF1_DAC_L_SFT, 1, 1),
0429 };
0430
0431 static const struct snd_kcontrol_new rt5651_dac_r_mix[] = {
0432     SOC_DAPM_SINGLE("Stereo ADC Switch", RT5651_AD_DA_MIXER,
0433             RT5651_M_ADCMIX_R_SFT, 1, 1),
0434     SOC_DAPM_SINGLE("INF1 Switch", RT5651_AD_DA_MIXER,
0435             RT5651_M_IF1_DAC_R_SFT, 1, 1),
0436 };
0437
0438 static const struct snd_kcontrol_new rt5651_sto_dac_l_mix[] = {
0439     SOC_DAPM_SINGLE("DAC L1 Switch", RT5651_STO_DAC_MIXER,
0440             RT5651_M_DAC_L1_MIXL_SFT, 1, 1),
0441     SOC_DAPM_SINGLE("DAC L2 Switch", RT5651_STO_DAC_MIXER,
0442             RT5651_M_DAC_L2_MIXL_SFT, 1, 1),
0443     SOC_DAPM_SINGLE("DAC R1 Switch", RT5651_STO_DAC_MIXER,
0444             RT5651_M_DAC_R1_MIXL_SFT, 1, 1),
0445 };
0446
0447 static const struct snd_kcontrol_new rt5651_sto_dac_r_mix[] = {
0448     SOC_DAPM_SINGLE("DAC R1 Switch", RT5651_STO_DAC_MIXER,
0449             RT5651_M_DAC_R1_MIXR_SFT, 1, 1),
0450     SOC_DAPM_SINGLE("DAC R2 Switch", RT5651_STO_DAC_MIXER,
0451             RT5651_M_DAC_R2_MIXR_SFT, 1, 1),
0452     SOC_DAPM_SINGLE("DAC L1 Switch", RT5651_STO_DAC_MIXER,
0453             RT5651_M_DAC_L1_MIXR_SFT, 1, 1),
0454 };
0455
0456 static const struct snd_kcontrol_new rt5651_dd_dac_l_mix[] = {
0457     SOC_DAPM_SINGLE("DAC L1 Switch", RT5651_DD_MIXER,
0458             RT5651_M_STO_DD_L1_SFT, 1, 1),
0459     SOC_DAPM_SINGLE("DAC L2 Switch", RT5651_DD_MIXER,
0460             RT5651_M_STO_DD_L2_SFT, 1, 1),
0461     SOC_DAPM_SINGLE("DAC R2 Switch", RT5651_DD_MIXER,
0462             RT5651_M_STO_DD_R2_L_SFT, 1, 1),
0463 };
0464
0465 static const struct snd_kcontrol_new rt5651_dd_dac_r_mix[] = {
0466     SOC_DAPM_SINGLE("DAC R1 Switch", RT5651_DD_MIXER,
0467             RT5651_M_STO_DD_R1_SFT, 1, 1),
0468     SOC_DAPM_SINGLE("DAC R2 Switch", RT5651_DD_MIXER,
0469             RT5651_M_STO_DD_R2_SFT, 1, 1),
0470     SOC_DAPM_SINGLE("DAC L2 Switch", RT5651_DD_MIXER,
0471             RT5651_M_STO_DD_L2_R_SFT, 1, 1),
0472 };
0473
0474 /* Analog Input Mixer */
0475 static const struct snd_kcontrol_new rt5651_rec_l_mix[] = {
0476     SOC_DAPM_SINGLE("INL1 Switch", RT5651_REC_L2_MIXER,
0477             RT5651_M_IN1_L_RM_L_SFT, 1, 1),
0478     SOC_DAPM_SINGLE("BST3 Switch", RT5651_REC_L2_MIXER,
0479             RT5651_M_BST3_RM_L_SFT, 1, 1),
0480     SOC_DAPM_SINGLE("BST2 Switch", RT5651_REC_L2_MIXER,
0481             RT5651_M_BST2_RM_L_SFT, 1, 1),
0482     SOC_DAPM_SINGLE("BST1 Switch", RT5651_REC_L2_MIXER,
0483             RT5651_M_BST1_RM_L_SFT, 1, 1),
0484 };
0485
0486 static const struct snd_kcontrol_new rt5651_rec_r_mix[] = {
0487     SOC_DAPM_SINGLE("INR1 Switch", RT5651_REC_R2_MIXER,
0488             RT5651_M_IN1_R_RM_R_SFT, 1, 1),
0489     SOC_DAPM_SINGLE("BST3 Switch", RT5651_REC_R2_MIXER,
0490             RT5651_M_BST3_RM_R_SFT, 1, 1),
0491     SOC_DAPM_SINGLE("BST2 Switch", RT5651_REC_R2_MIXER,
0492             RT5651_M_BST2_RM_R_SFT, 1, 1),
0493     SOC_DAPM_SINGLE("BST1 Switch", RT5651_REC_R2_MIXER,
0494             RT5651_M_BST1_RM_R_SFT, 1, 1),
0495 };
0496
0497 /* Analog Output Mixer */
0498
0499 static const struct snd_kcontrol_new rt5651_out_l_mix[] = {
0500     SOC_DAPM_SINGLE("BST1 Switch", RT5651_OUT_L3_MIXER,
0501             RT5651_M_BST1_OM_L_SFT, 1, 1),
0502     SOC_DAPM_SINGLE("BST2 Switch", RT5651_OUT_L3_MIXER,
0503             RT5651_M_BST2_OM_L_SFT, 1, 1),
0504     SOC_DAPM_SINGLE("INL1 Switch", RT5651_OUT_L3_MIXER,
0505             RT5651_M_IN1_L_OM_L_SFT, 1, 1),
0506     SOC_DAPM_SINGLE("REC MIXL Switch", RT5651_OUT_L3_MIXER,
0507             RT5651_M_RM_L_OM_L_SFT, 1, 1),
0508     SOC_DAPM_SINGLE("DAC L1 Switch", RT5651_OUT_L3_MIXER,
0509             RT5651_M_DAC_L1_OM_L_SFT, 1, 1),
0510 };
0511
0512 static const struct snd_kcontrol_new rt5651_out_r_mix[] = {
0513     SOC_DAPM_SINGLE("BST2 Switch", RT5651_OUT_R3_MIXER,
0514             RT5651_M_BST2_OM_R_SFT, 1, 1),
0515     SOC_DAPM_SINGLE("BST1 Switch", RT5651_OUT_R3_MIXER,
0516             RT5651_M_BST1_OM_R_SFT, 1, 1),
0517     SOC_DAPM_SINGLE("INR1 Switch", RT5651_OUT_R3_MIXER,
0518             RT5651_M_IN1_R_OM_R_SFT, 1, 1),
0519     SOC_DAPM_SINGLE("REC MIXR Switch", RT5651_OUT_R3_MIXER,
0520             RT5651_M_RM_R_OM_R_SFT, 1, 1),
0521     SOC_DAPM_SINGLE("DAC R1 Switch", RT5651_OUT_R3_MIXER,
0522             RT5651_M_DAC_R1_OM_R_SFT, 1, 1),
0523 };
0524
0525 static const struct snd_kcontrol_new rt5651_hpo_mix[] = {
0526     SOC_DAPM_SINGLE("HPO MIX DAC1 Switch", RT5651_HPO_MIXER,
0527             RT5651_M_DAC1_HM_SFT, 1, 1),
0528     SOC_DAPM_SINGLE("HPO MIX HPVOL Switch", RT5651_HPO_MIXER,
0529             RT5651_M_HPVOL_HM_SFT, 1, 1),
0530 };
0531
0532 static const struct snd_kcontrol_new rt5651_lout_mix[] = {
0533     SOC_DAPM_SINGLE("DAC L1 Switch", RT5651_LOUT_MIXER,
0534             RT5651_M_DAC_L1_LM_SFT, 1, 1),
0535     SOC_DAPM_SINGLE("DAC R1 Switch", RT5651_LOUT_MIXER,
0536             RT5651_M_DAC_R1_LM_SFT, 1, 1),
0537     SOC_DAPM_SINGLE("OUTVOL L Switch", RT5651_LOUT_MIXER,
0538             RT5651_M_OV_L_LM_SFT, 1, 1),
0539     SOC_DAPM_SINGLE("OUTVOL R Switch", RT5651_LOUT_MIXER,
0540             RT5651_M_OV_R_LM_SFT, 1, 1),
0541 };
0542
0543 static const struct snd_kcontrol_new outvol_l_control =
0544     SOC_DAPM_SINGLE("Switch", RT5651_LOUT_CTRL1,
0545             RT5651_VOL_L_SFT, 1, 1);
0546
0547 static const struct snd_kcontrol_new outvol_r_control =
0548     SOC_DAPM_SINGLE("Switch", RT5651_LOUT_CTRL1,
0549             RT5651_VOL_R_SFT, 1, 1);
0550
0551 static const struct snd_kcontrol_new lout_l_mute_control =
0552     SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5651_LOUT_CTRL1,
0553                     RT5651_L_MUTE_SFT, 1, 1);
0554
0555 static const struct snd_kcontrol_new lout_r_mute_control =
0556     SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5651_LOUT_CTRL1,
0557                     RT5651_R_MUTE_SFT, 1, 1);
0558
0559 static const struct snd_kcontrol_new hpovol_l_control =
0560     SOC_DAPM_SINGLE("Switch", RT5651_HP_VOL,
0561             RT5651_VOL_L_SFT, 1, 1);
0562
0563 static const struct snd_kcontrol_new hpovol_r_control =
0564     SOC_DAPM_SINGLE("Switch", RT5651_HP_VOL,
0565             RT5651_VOL_R_SFT, 1, 1);
0566
0567 static const struct snd_kcontrol_new hpo_l_mute_control =
0568     SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5651_HP_VOL,
0569                     RT5651_L_MUTE_SFT, 1, 1);
0570
0571 static const struct snd_kcontrol_new hpo_r_mute_control =
0572     SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5651_HP_VOL,
0573                     RT5651_R_MUTE_SFT, 1, 1);
0574
0575 /* Stereo ADC source */
0576 static const char * const rt5651_stereo1_adc1_src[] = {"DD MIX", "ADC"};
0577
0578 static SOC_ENUM_SINGLE_DECL(
0579     rt5651_stereo1_adc1_enum, RT5651_STO1_ADC_MIXER,
0580     RT5651_STO1_ADC_1_SRC_SFT, rt5651_stereo1_adc1_src);
0581
0582 static const struct snd_kcontrol_new rt5651_sto1_adc_l1_mux =
0583     SOC_DAPM_ENUM("Stereo1 ADC L1 source", rt5651_stereo1_adc1_enum);
0584
0585 static const struct snd_kcontrol_new rt5651_sto1_adc_r1_mux =
0586     SOC_DAPM_ENUM("Stereo1 ADC R1 source", rt5651_stereo1_adc1_enum);
0587
0588 static const char * const rt5651_stereo1_adc2_src[] = {"DMIC", "DD MIX"};
0589
0590 static SOC_ENUM_SINGLE_DECL(
0591     rt5651_stereo1_adc2_enum, RT5651_STO1_ADC_MIXER,
0592     RT5651_STO1_ADC_2_SRC_SFT, rt5651_stereo1_adc2_src);
0593
0594 static const struct snd_kcontrol_new rt5651_sto1_adc_l2_mux =
0595     SOC_DAPM_ENUM("Stereo1 ADC L2 source", rt5651_stereo1_adc2_enum);
0596
0597 static const struct snd_kcontrol_new rt5651_sto1_adc_r2_mux =
0598     SOC_DAPM_ENUM("Stereo1 ADC R2 source", rt5651_stereo1_adc2_enum);
0599
0600 /* Mono ADC source */
0601 static const char * const rt5651_sto2_adc_l1_src[] = {"DD MIXL", "ADCL"};
0602
0603 static SOC_ENUM_SINGLE_DECL(
0604     rt5651_sto2_adc_l1_enum, RT5651_STO1_ADC_MIXER,
0605     RT5651_STO2_ADC_L1_SRC_SFT, rt5651_sto2_adc_l1_src);
0606
0607 static const struct snd_kcontrol_new rt5651_sto2_adc_l1_mux =
0608     SOC_DAPM_ENUM("Stereo2 ADC1 left source", rt5651_sto2_adc_l1_enum);
0609
0610 static const char * const rt5651_sto2_adc_l2_src[] = {"DMIC L", "DD MIXL"};
0611
0612 static SOC_ENUM_SINGLE_DECL(
0613     rt5651_sto2_adc_l2_enum, RT5651_STO1_ADC_MIXER,
0614     RT5651_STO2_ADC_L2_SRC_SFT, rt5651_sto2_adc_l2_src);
0615
0616 static const struct snd_kcontrol_new rt5651_sto2_adc_l2_mux =
0617     SOC_DAPM_ENUM("Stereo2 ADC2 left source", rt5651_sto2_adc_l2_enum);
0618
0619 static const char * const rt5651_sto2_adc_r1_src[] = {"DD MIXR", "ADCR"};
0620
0621 static SOC_ENUM_SINGLE_DECL(
0622     rt5651_sto2_adc_r1_enum, RT5651_STO1_ADC_MIXER,
0623     RT5651_STO2_ADC_R1_SRC_SFT, rt5651_sto2_adc_r1_src);
0624
0625 static const struct snd_kcontrol_new rt5651_sto2_adc_r1_mux =
0626     SOC_DAPM_ENUM("Stereo2 ADC1 right source", rt5651_sto2_adc_r1_enum);
0627
0628 static const char * const rt5651_sto2_adc_r2_src[] = {"DMIC R", "DD MIXR"};
0629
0630 static SOC_ENUM_SINGLE_DECL(
0631     rt5651_sto2_adc_r2_enum, RT5651_STO1_ADC_MIXER,
0632     RT5651_STO2_ADC_R2_SRC_SFT, rt5651_sto2_adc_r2_src);
0633
0634 static const struct snd_kcontrol_new rt5651_sto2_adc_r2_mux =
0635     SOC_DAPM_ENUM("Stereo2 ADC2 right source", rt5651_sto2_adc_r2_enum);
0636
0637 /* DAC2 channel source */
0638
0639 static const char * const rt5651_dac_src[] = {"IF1", "IF2"};
0640
0641 static SOC_ENUM_SINGLE_DECL(rt5651_dac_l2_enum, RT5651_DAC2_CTRL,
0642                 RT5651_SEL_DAC_L2_SFT, rt5651_dac_src);
0643
0644 static const struct snd_kcontrol_new rt5651_dac_l2_mux =
0645     SOC_DAPM_ENUM("DAC2 left channel source", rt5651_dac_l2_enum);
0646
0647 static SOC_ENUM_SINGLE_DECL(
0648     rt5651_dac_r2_enum, RT5651_DAC2_CTRL,
0649     RT5651_SEL_DAC_R2_SFT, rt5651_dac_src);
0650
0651 static const struct snd_kcontrol_new rt5651_dac_r2_mux =
0652     SOC_DAPM_ENUM("DAC2 right channel source", rt5651_dac_r2_enum);
0653
0654 /* IF2_ADC channel source */
0655
0656 static const char * const rt5651_adc_src[] = {"IF1 ADC1", "IF1 ADC2"};
0657
0658 static SOC_ENUM_SINGLE_DECL(rt5651_if2_adc_src_enum, RT5651_DIG_INF_DATA,
0659                 RT5651_IF2_ADC_SRC_SFT, rt5651_adc_src);
0660
0661 static const struct snd_kcontrol_new rt5651_if2_adc_src_mux =
0662     SOC_DAPM_ENUM("IF2 ADC channel source", rt5651_if2_adc_src_enum);
0663
0664 /* PDM select */
0665 static const char * const rt5651_pdm_sel[] = {"DD MIX", "Stereo DAC MIX"};
0666
0667 static SOC_ENUM_SINGLE_DECL(
0668     rt5651_pdm_l_sel_enum, RT5651_PDM_CTL,
0669     RT5651_PDM_L_SEL_SFT, rt5651_pdm_sel);
0670
0671 static SOC_ENUM_SINGLE_DECL(
0672     rt5651_pdm_r_sel_enum, RT5651_PDM_CTL,
0673     RT5651_PDM_R_SEL_SFT, rt5651_pdm_sel);
0674
0675 static const struct snd_kcontrol_new rt5651_pdm_l_mux =
0676     SOC_DAPM_ENUM("PDM L select", rt5651_pdm_l_sel_enum);
0677
0678 static const struct snd_kcontrol_new rt5651_pdm_r_mux =
0679     SOC_DAPM_ENUM("PDM R select", rt5651_pdm_r_sel_enum);
0680
0681 static int rt5651_amp_power_event(struct snd_soc_dapm_widget *w,
0682     struct snd_kcontrol *kcontrol, int event)
0683 {
0684     struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
0685     struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component);
0686
0687     switch (event) {
0688     case SND_SOC_DAPM_POST_PMU:
0689         /* depop parameters */
0690         regmap_update_bits(rt5651->regmap, RT5651_PR_BASE +
0691             RT5651_CHPUMP_INT_REG1, 0x0700, 0x0200);
0692         regmap_update_bits(rt5651->regmap, RT5651_DEPOP_M2,
0693             RT5651_DEPOP_MASK, RT5651_DEPOP_MAN);
0694         regmap_update_bits(rt5651->regmap, RT5651_DEPOP_M1,
0695             RT5651_HP_CP_MASK | RT5651_HP_SG_MASK |
0696             RT5651_HP_CB_MASK, RT5651_HP_CP_PU |
0697             RT5651_HP_SG_DIS | RT5651_HP_CB_PU);
0698         regmap_write(rt5651->regmap, RT5651_PR_BASE +
0699                 RT5651_HP_DCC_INT1, 0x9f00);
0700         /* headphone amp power on */
0701         regmap_update_bits(rt5651->regmap, RT5651_PWR_ANLG1,
0702             RT5651_PWR_FV1 | RT5651_PWR_FV2, 0);
0703         regmap_update_bits(rt5651->regmap, RT5651_PWR_ANLG1,
0704             RT5651_PWR_HA,
0705             RT5651_PWR_HA);
0706         usleep_range(10000, 15000);
0707         regmap_update_bits(rt5651->regmap, RT5651_PWR_ANLG1,
0708             RT5651_PWR_FV1 | RT5651_PWR_FV2 ,
0709             RT5651_PWR_FV1 | RT5651_PWR_FV2);
0710         break;
0711
0712     default:
0713         return 0;
0714     }
0715
0716     return 0;
0717 }
0718
0719 static int rt5651_hp_event(struct snd_soc_dapm_widget *w,
0720     struct snd_kcontrol *kcontrol, int event)
0721 {
0722     struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
0723     struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component);
0724
0725     switch (event) {
0726     case SND_SOC_DAPM_POST_PMU:
0727         /* headphone unmute sequence */
0728         regmap_update_bits(rt5651->regmap, RT5651_DEPOP_M2,
0729             RT5651_DEPOP_MASK | RT5651_DIG_DP_MASK,
0730             RT5651_DEPOP_AUTO | RT5651_DIG_DP_EN);
0731         regmap_update_bits(rt5651->regmap, RT5651_CHARGE_PUMP,
0732             RT5651_PM_HP_MASK, RT5651_PM_HP_HV);
0733
0734         regmap_update_bits(rt5651->regmap, RT5651_DEPOP_M3,
0735             RT5651_CP_FQ1_MASK | RT5651_CP_FQ2_MASK |
0736             RT5651_CP_FQ3_MASK,
0737             (RT5651_CP_FQ_192_KHZ << RT5651_CP_FQ1_SFT) |
0738             (RT5651_CP_FQ_12_KHZ << RT5651_CP_FQ2_SFT) |
0739             (RT5651_CP_FQ_192_KHZ << RT5651_CP_FQ3_SFT));
0740
0741         regmap_write(rt5651->regmap, RT5651_PR_BASE +
0742             RT5651_MAMP_INT_REG2, 0x1c00);
0743         regmap_update_bits(rt5651->regmap, RT5651_DEPOP_M1,
0744             RT5651_HP_CP_MASK | RT5651_HP_SG_MASK,
0745             RT5651_HP_CP_PD | RT5651_HP_SG_EN);
0746         regmap_update_bits(rt5651->regmap, RT5651_PR_BASE +
0747             RT5651_CHPUMP_INT_REG1, 0x0700, 0x0400);
0748         rt5651->hp_mute = false;
0749         break;
0750
0751     case SND_SOC_DAPM_PRE_PMD:
0752         rt5651->hp_mute = true;
0753         usleep_range(70000, 75000);
0754         break;
0755
0756     default:
0757         return 0;
0758     }
0759
0760     return 0;
0761 }
0762
0763 static int rt5651_hp_post_event(struct snd_soc_dapm_widget *w,
0764                struct snd_kcontrol *kcontrol, int event)
0765 {
0766
0767     struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
0768     struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component);
0769
0770     switch (event) {
0771     case SND_SOC_DAPM_POST_PMU:
0772         if (!rt5651->hp_mute)
0773             usleep_range(80000, 85000);
0774
0775         break;
0776
0777     default:
0778         return 0;
0779     }
0780
0781     return 0;
0782 }
0783
0784 static int rt5651_bst1_event(struct snd_soc_dapm_widget *w,
0785     struct snd_kcontrol *kcontrol, int event)
0786 {
0787     struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
0788
0789     switch (event) {
0790     case SND_SOC_DAPM_POST_PMU:
0791         snd_soc_component_update_bits(component, RT5651_PWR_ANLG2,
0792             RT5651_PWR_BST1_OP2, RT5651_PWR_BST1_OP2);
0793         break;
0794
0795     case SND_SOC_DAPM_PRE_PMD:
0796         snd_soc_component_update_bits(component, RT5651_PWR_ANLG2,
0797             RT5651_PWR_BST1_OP2, 0);
0798         break;
0799
0800     default:
0801         return 0;
0802     }
0803
0804     return 0;
0805 }
0806
0807 static int rt5651_bst2_event(struct snd_soc_dapm_widget *w,
0808     struct snd_kcontrol *kcontrol, int event)
0809 {
0810     struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
0811
0812     switch (event) {
0813     case SND_SOC_DAPM_POST_PMU:
0814         snd_soc_component_update_bits(component, RT5651_PWR_ANLG2,
0815             RT5651_PWR_BST2_OP2, RT5651_PWR_BST2_OP2);
0816         break;
0817
0818     case SND_SOC_DAPM_PRE_PMD:
0819         snd_soc_component_update_bits(component, RT5651_PWR_ANLG2,
0820             RT5651_PWR_BST2_OP2, 0);
0821         break;
0822
0823     default:
0824         return 0;
0825     }
0826
0827     return 0;
0828 }
0829
0830 static int rt5651_bst3_event(struct snd_soc_dapm_widget *w,
0831     struct snd_kcontrol *kcontrol, int event)
0832 {
0833     struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
0834
0835     switch (event) {
0836     case SND_SOC_DAPM_POST_PMU:
0837         snd_soc_component_update_bits(component, RT5651_PWR_ANLG2,
0838             RT5651_PWR_BST3_OP2, RT5651_PWR_BST3_OP2);
0839         break;
0840
0841     case SND_SOC_DAPM_PRE_PMD:
0842         snd_soc_component_update_bits(component, RT5651_PWR_ANLG2,
0843             RT5651_PWR_BST3_OP2, 0);
0844         break;
0845
0846     default:
0847         return 0;
0848     }
0849
0850     return 0;
0851 }
0852
0853 static const struct snd_soc_dapm_widget rt5651_dapm_widgets[] = {
0854     /* ASRC */
0855     SND_SOC_DAPM_SUPPLY_S("I2S1 ASRC", 1, RT5651_PLL_MODE_2,
0856                   15, 0, NULL, 0),
0857     SND_SOC_DAPM_SUPPLY_S("I2S2 ASRC", 1, RT5651_PLL_MODE_2,
0858                   14, 0, NULL, 0),
0859     SND_SOC_DAPM_SUPPLY_S("STO1 DAC ASRC", 1, RT5651_PLL_MODE_2,
0860                   13, 0, NULL, 0),
0861     SND_SOC_DAPM_SUPPLY_S("STO2 DAC ASRC", 1, RT5651_PLL_MODE_2,
0862                   12, 0, NULL, 0),
0863     SND_SOC_DAPM_SUPPLY_S("ADC ASRC", 1, RT5651_PLL_MODE_2,
0864                   11, 0, NULL, 0),
0865
0866     /* micbias */
0867     SND_SOC_DAPM_SUPPLY("LDO", RT5651_PWR_ANLG1,
0868             RT5651_PWR_LDO_BIT, 0, NULL, 0),
0869     SND_SOC_DAPM_SUPPLY("micbias1", RT5651_PWR_ANLG2,
0870             RT5651_PWR_MB1_BIT, 0, NULL, 0),
0871     /* Input Lines */
0872     SND_SOC_DAPM_INPUT("MIC1"),
0873     SND_SOC_DAPM_INPUT("MIC2"),
0874     SND_SOC_DAPM_INPUT("MIC3"),
0875
0876     SND_SOC_DAPM_INPUT("IN1P"),
0877     SND_SOC_DAPM_INPUT("IN2P"),
0878     SND_SOC_DAPM_INPUT("IN2N"),
0879     SND_SOC_DAPM_INPUT("IN3P"),
0880     SND_SOC_DAPM_INPUT("DMIC L1"),
0881     SND_SOC_DAPM_INPUT("DMIC R1"),
0882     SND_SOC_DAPM_SUPPLY("DMIC CLK", RT5651_DMIC, RT5651_DMIC_1_EN_SFT,
0883                 0, set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
0884     /* Boost */
0885     SND_SOC_DAPM_PGA_E("BST1", RT5651_PWR_ANLG2,
0886         RT5651_PWR_BST1_BIT, 0, NULL, 0, rt5651_bst1_event,
0887         SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
0888     SND_SOC_DAPM_PGA_E("BST2", RT5651_PWR_ANLG2,
0889         RT5651_PWR_BST2_BIT, 0, NULL, 0, rt5651_bst2_event,
0890         SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
0891     SND_SOC_DAPM_PGA_E("BST3", RT5651_PWR_ANLG2,
0892         RT5651_PWR_BST3_BIT, 0, NULL, 0, rt5651_bst3_event,
0893         SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
0894     /* Input Volume */
0895     SND_SOC_DAPM_PGA("INL1 VOL", RT5651_PWR_VOL,
0896              RT5651_PWR_IN1_L_BIT, 0, NULL, 0),
0897     SND_SOC_DAPM_PGA("INR1 VOL", RT5651_PWR_VOL,
0898              RT5651_PWR_IN1_R_BIT, 0, NULL, 0),
0899     SND_SOC_DAPM_PGA("INL2 VOL", RT5651_PWR_VOL,
0900              RT5651_PWR_IN2_L_BIT, 0, NULL, 0),
0901     SND_SOC_DAPM_PGA("INR2 VOL", RT5651_PWR_VOL,
0902              RT5651_PWR_IN2_R_BIT, 0, NULL, 0),
0903
0904     /* REC Mixer */
0905     SND_SOC_DAPM_MIXER("RECMIXL", RT5651_PWR_MIXER, RT5651_PWR_RM_L_BIT, 0,
0906                rt5651_rec_l_mix, ARRAY_SIZE(rt5651_rec_l_mix)),
0907     SND_SOC_DAPM_MIXER("RECMIXR", RT5651_PWR_MIXER, RT5651_PWR_RM_R_BIT, 0,
0908                rt5651_rec_r_mix, ARRAY_SIZE(rt5651_rec_r_mix)),
0909     /* ADCs */
0910     SND_SOC_DAPM_ADC("ADC L", NULL, SND_SOC_NOPM, 0, 0),
0911     SND_SOC_DAPM_ADC("ADC R", NULL, SND_SOC_NOPM, 0, 0),
0912     SND_SOC_DAPM_SUPPLY("ADC L Power", RT5651_PWR_DIG1,
0913                 RT5651_PWR_ADC_L_BIT, 0, NULL, 0),
0914     SND_SOC_DAPM_SUPPLY("ADC R Power", RT5651_PWR_DIG1,
0915                 RT5651_PWR_ADC_R_BIT, 0, NULL, 0),
0916     /* ADC Mux */
0917     SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
0918              &rt5651_sto1_adc_l2_mux),
0919     SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
0920              &rt5651_sto1_adc_r2_mux),
0921     SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
0922              &rt5651_sto1_adc_l1_mux),
0923     SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
0924              &rt5651_sto1_adc_r1_mux),
0925     SND_SOC_DAPM_MUX("Stereo2 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
0926              &rt5651_sto2_adc_l2_mux),
0927     SND_SOC_DAPM_MUX("Stereo2 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
0928              &rt5651_sto2_adc_l1_mux),
0929     SND_SOC_DAPM_MUX("Stereo2 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
0930              &rt5651_sto2_adc_r1_mux),
0931     SND_SOC_DAPM_MUX("Stereo2 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
0932              &rt5651_sto2_adc_r2_mux),
0933     /* ADC Mixer */
0934     SND_SOC_DAPM_SUPPLY("Stereo1 Filter", RT5651_PWR_DIG2,
0935                 RT5651_PWR_ADC_STO1_F_BIT, 0, NULL, 0),
0936     SND_SOC_DAPM_SUPPLY("Stereo2 Filter", RT5651_PWR_DIG2,
0937                 RT5651_PWR_ADC_STO2_F_BIT, 0, NULL, 0),
0938     SND_SOC_DAPM_MIXER("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0,
0939                rt5651_sto1_adc_l_mix,
0940                ARRAY_SIZE(rt5651_sto1_adc_l_mix)),
0941     SND_SOC_DAPM_MIXER("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0,
0942                rt5651_sto1_adc_r_mix,
0943                ARRAY_SIZE(rt5651_sto1_adc_r_mix)),
0944     SND_SOC_DAPM_MIXER("Stereo2 ADC MIXL", SND_SOC_NOPM, 0, 0,
0945                rt5651_sto2_adc_l_mix,
0946                ARRAY_SIZE(rt5651_sto2_adc_l_mix)),
0947     SND_SOC_DAPM_MIXER("Stereo2 ADC MIXR", SND_SOC_NOPM, 0, 0,
0948                rt5651_sto2_adc_r_mix,
0949                ARRAY_SIZE(rt5651_sto2_adc_r_mix)),
0950
0951     /* Digital Interface */
0952     SND_SOC_DAPM_SUPPLY("I2S1", RT5651_PWR_DIG1,
0953                 RT5651_PWR_I2S1_BIT, 0, NULL, 0),
0954     SND_SOC_DAPM_PGA("IF1 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
0955     SND_SOC_DAPM_PGA("IF1 DAC1 L", SND_SOC_NOPM, 0, 0, NULL, 0),
0956     SND_SOC_DAPM_PGA("IF1 DAC1 R", SND_SOC_NOPM, 0, 0, NULL, 0),
0957     SND_SOC_DAPM_PGA("IF1 ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
0958     SND_SOC_DAPM_PGA("IF1 DAC2 L", SND_SOC_NOPM, 0, 0, NULL, 0),
0959     SND_SOC_DAPM_PGA("IF1 DAC2 R", SND_SOC_NOPM, 0, 0, NULL, 0),
0960     SND_SOC_DAPM_PGA("IF1 ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
0961     SND_SOC_DAPM_SUPPLY("I2S2", RT5651_PWR_DIG1,
0962                 RT5651_PWR_I2S2_BIT, 0, NULL, 0),
0963     SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
0964     SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
0965     SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
0966     SND_SOC_DAPM_MUX("IF2 ADC", SND_SOC_NOPM, 0, 0,
0967              &rt5651_if2_adc_src_mux),
0968
0969     /* Digital Interface Select */
0970
0971     SND_SOC_DAPM_MUX("PDM L Mux", RT5651_PDM_CTL,
0972              RT5651_M_PDM_L_SFT, 1, &rt5651_pdm_l_mux),
0973     SND_SOC_DAPM_MUX("PDM R Mux", RT5651_PDM_CTL,
0974              RT5651_M_PDM_R_SFT, 1, &rt5651_pdm_r_mux),
0975     /* Audio Interface */
0976     SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
0977     SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
0978     SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
0979     SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
0980
0981     /* Audio DSP */
0982     SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0),
0983
0984     /* Output Side */
0985     /* DAC mixer before sound effect  */
0986     SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
0987                rt5651_dac_l_mix, ARRAY_SIZE(rt5651_dac_l_mix)),
0988     SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
0989                rt5651_dac_r_mix, ARRAY_SIZE(rt5651_dac_r_mix)),
0990
0991     /* DAC2 channel Mux */
0992     SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0, &rt5651_dac_l2_mux),
0993     SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0, &rt5651_dac_r2_mux),
0994     SND_SOC_DAPM_PGA("DAC L2 Volume", SND_SOC_NOPM, 0, 0, NULL, 0),
0995     SND_SOC_DAPM_PGA("DAC R2 Volume", SND_SOC_NOPM, 0, 0, NULL, 0),
0996
0997     SND_SOC_DAPM_SUPPLY("Stero1 DAC Power", RT5651_PWR_DIG2,
0998                 RT5651_PWR_DAC_STO1_F_BIT, 0, NULL, 0),
0999     SND_SOC_DAPM_SUPPLY("Stero2 DAC Power", RT5651_PWR_DIG2,
1000                 RT5651_PWR_DAC_STO2_F_BIT, 0, NULL, 0),
1001     /* DAC Mixer */
1002     SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
1003                rt5651_sto_dac_l_mix,
1004                ARRAY_SIZE(rt5651_sto_dac_l_mix)),
1005     SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
1006                rt5651_sto_dac_r_mix,
1007                ARRAY_SIZE(rt5651_sto_dac_r_mix)),
1008     SND_SOC_DAPM_MIXER("DD MIXL", SND_SOC_NOPM, 0, 0,
1009                rt5651_dd_dac_l_mix,
1010                ARRAY_SIZE(rt5651_dd_dac_l_mix)),
1011     SND_SOC_DAPM_MIXER("DD MIXR", SND_SOC_NOPM, 0, 0,
1012                rt5651_dd_dac_r_mix,
1013                ARRAY_SIZE(rt5651_dd_dac_r_mix)),
1014
1015     /* DACs */
1016     SND_SOC_DAPM_DAC("DAC L1", NULL, SND_SOC_NOPM, 0, 0),
1017     SND_SOC_DAPM_DAC("DAC R1", NULL, SND_SOC_NOPM, 0, 0),
1018     SND_SOC_DAPM_SUPPLY("DAC L1 Power", RT5651_PWR_DIG1,
1019                 RT5651_PWR_DAC_L1_BIT, 0, NULL, 0),
1020     SND_SOC_DAPM_SUPPLY("DAC R1 Power", RT5651_PWR_DIG1,
1021                 RT5651_PWR_DAC_R1_BIT, 0, NULL, 0),
1022     /* OUT Mixer */
1023     SND_SOC_DAPM_MIXER("OUT MIXL", RT5651_PWR_MIXER, RT5651_PWR_OM_L_BIT,
1024                0, rt5651_out_l_mix, ARRAY_SIZE(rt5651_out_l_mix)),
1025     SND_SOC_DAPM_MIXER("OUT MIXR", RT5651_PWR_MIXER, RT5651_PWR_OM_R_BIT,
1026                0, rt5651_out_r_mix, ARRAY_SIZE(rt5651_out_r_mix)),
1027     /* Ouput Volume */
1028     SND_SOC_DAPM_SWITCH("OUTVOL L", RT5651_PWR_VOL,
1029                 RT5651_PWR_OV_L_BIT, 0, &outvol_l_control),
1030     SND_SOC_DAPM_SWITCH("OUTVOL R", RT5651_PWR_VOL,
1031                 RT5651_PWR_OV_R_BIT, 0, &outvol_r_control),
1032     SND_SOC_DAPM_SWITCH("HPOVOL L", RT5651_PWR_VOL,
1033                 RT5651_PWR_HV_L_BIT, 0, &hpovol_l_control),
1034     SND_SOC_DAPM_SWITCH("HPOVOL R", RT5651_PWR_VOL,
1035                 RT5651_PWR_HV_R_BIT, 0, &hpovol_r_control),
1036     SND_SOC_DAPM_PGA("INL1", RT5651_PWR_VOL,
1037              RT5651_PWR_IN1_L_BIT, 0, NULL, 0),
1038     SND_SOC_DAPM_PGA("INR1", RT5651_PWR_VOL,
1039              RT5651_PWR_IN1_R_BIT, 0, NULL, 0),
1040     SND_SOC_DAPM_PGA("INL2", RT5651_PWR_VOL,
1041              RT5651_PWR_IN2_L_BIT, 0, NULL, 0),
1042     SND_SOC_DAPM_PGA("INR2", RT5651_PWR_VOL,
1043              RT5651_PWR_IN2_R_BIT, 0, NULL, 0),
1044     /* HPO/LOUT/Mono Mixer */
1045     SND_SOC_DAPM_MIXER("HPOL MIX", SND_SOC_NOPM, 0, 0,
1046                rt5651_hpo_mix, ARRAY_SIZE(rt5651_hpo_mix)),
1047     SND_SOC_DAPM_MIXER("HPOR MIX", SND_SOC_NOPM, 0, 0,
1048                rt5651_hpo_mix, ARRAY_SIZE(rt5651_hpo_mix)),
1049     SND_SOC_DAPM_SUPPLY("HP L Amp", RT5651_PWR_ANLG1,
1050                 RT5651_PWR_HP_L_BIT, 0, NULL, 0),
1051     SND_SOC_DAPM_SUPPLY("HP R Amp", RT5651_PWR_ANLG1,
1052                 RT5651_PWR_HP_R_BIT, 0, NULL, 0),
1053     SND_SOC_DAPM_MIXER("LOUT MIX", RT5651_PWR_ANLG1, RT5651_PWR_LM_BIT, 0,
1054                rt5651_lout_mix, ARRAY_SIZE(rt5651_lout_mix)),
1055
1056     SND_SOC_DAPM_SUPPLY("Amp Power", RT5651_PWR_ANLG1,
1057                 RT5651_PWR_HA_BIT, 0, rt5651_amp_power_event,
1058                 SND_SOC_DAPM_POST_PMU),
1059     SND_SOC_DAPM_PGA_S("HP Amp", 1, SND_SOC_NOPM, 0, 0, rt5651_hp_event,
1060                SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1061     SND_SOC_DAPM_SWITCH("HPO L Playback", SND_SOC_NOPM, 0, 0,
1062                 &hpo_l_mute_control),
1063     SND_SOC_DAPM_SWITCH("HPO R Playback", SND_SOC_NOPM, 0, 0,
1064                 &hpo_r_mute_control),
1065     SND_SOC_DAPM_SWITCH("LOUT L Playback", SND_SOC_NOPM, 0, 0,
1066                 &lout_l_mute_control),
1067     SND_SOC_DAPM_SWITCH("LOUT R Playback", SND_SOC_NOPM, 0, 0,
1068                 &lout_r_mute_control),
1069     SND_SOC_DAPM_POST("HP Post", rt5651_hp_post_event),
1070
1071     /* Output Lines */
1072     SND_SOC_DAPM_OUTPUT("HPOL"),
1073     SND_SOC_DAPM_OUTPUT("HPOR"),
1074     SND_SOC_DAPM_OUTPUT("LOUTL"),
1075     SND_SOC_DAPM_OUTPUT("LOUTR"),
1076     SND_SOC_DAPM_OUTPUT("PDML"),
1077     SND_SOC_DAPM_OUTPUT("PDMR"),
1078 };
1079
1080 static const struct snd_soc_dapm_route rt5651_dapm_routes[] = {
1081     {"Stero1 DAC Power", NULL, "STO1 DAC ASRC"},
1082     {"Stero2 DAC Power", NULL, "STO2 DAC ASRC"},
1083     {"I2S1", NULL, "I2S1 ASRC"},
1084     {"I2S2", NULL, "I2S2 ASRC"},
1085
1086     {"IN1P", NULL, "LDO"},
1087     {"IN2P", NULL, "LDO"},
1088     {"IN3P", NULL, "LDO"},
1089
1090     {"IN1P", NULL, "MIC1"},
1091     {"IN2P", NULL, "MIC2"},
1092     {"IN2N", NULL, "MIC2"},
1093     {"IN3P", NULL, "MIC3"},
1094
1095     {"BST1", NULL, "IN1P"},
1096     {"BST2", NULL, "IN2P"},
1097     {"BST2", NULL, "IN2N"},
1098     {"BST3", NULL, "IN3P"},
1099
1100     {"INL1 VOL", NULL, "IN2P"},
1101     {"INR1 VOL", NULL, "IN2N"},
1102
1103     {"RECMIXL", "INL1 Switch", "INL1 VOL"},
1104     {"RECMIXL", "BST3 Switch", "BST3"},
1105     {"RECMIXL", "BST2 Switch", "BST2"},
1106     {"RECMIXL", "BST1 Switch", "BST1"},
1107
1108     {"RECMIXR", "INR1 Switch", "INR1 VOL"},
1109     {"RECMIXR", "BST3 Switch", "BST3"},
1110     {"RECMIXR", "BST2 Switch", "BST2"},
1111     {"RECMIXR", "BST1 Switch", "BST1"},
1112
1113     {"ADC L", NULL, "RECMIXL"},
1114     {"ADC L", NULL, "ADC L Power"},
1115     {"ADC R", NULL, "RECMIXR"},
1116     {"ADC R", NULL, "ADC R Power"},
1117
1118     {"DMIC L1", NULL, "DMIC CLK"},
1119     {"DMIC R1", NULL, "DMIC CLK"},
1120
1121     {"Stereo1 ADC L2 Mux", "DMIC", "DMIC L1"},
1122     {"Stereo1 ADC L2 Mux", "DD MIX", "DD MIXL"},
1123     {"Stereo1 ADC L1 Mux", "ADC", "ADC L"},
1124     {"Stereo1 ADC L1 Mux", "DD MIX", "DD MIXL"},
1125
1126     {"Stereo1 ADC R1 Mux", "ADC", "ADC R"},
1127     {"Stereo1 ADC R1 Mux", "DD MIX", "DD MIXR"},
1128     {"Stereo1 ADC R2 Mux", "DMIC", "DMIC R1"},
1129     {"Stereo1 ADC R2 Mux", "DD MIX", "DD MIXR"},
1130
1131     {"Stereo2 ADC L2 Mux", "DMIC L", "DMIC L1"},
1132     {"Stereo2 ADC L2 Mux", "DD MIXL", "DD MIXL"},
1133     {"Stereo2 ADC L1 Mux", "DD MIXL", "DD MIXL"},
1134     {"Stereo2 ADC L1 Mux", "ADCL", "ADC L"},
1135
1136     {"Stereo2 ADC R1 Mux", "DD MIXR", "DD MIXR"},
1137     {"Stereo2 ADC R1 Mux", "ADCR", "ADC R"},
1138     {"Stereo2 ADC R2 Mux", "DMIC R", "DMIC R1"},
1139     {"Stereo2 ADC R2 Mux", "DD MIXR", "DD MIXR"},
1140
1141     {"Stereo1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux"},
1142     {"Stereo1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux"},
1143     {"Stereo1 ADC MIXL", NULL, "Stereo1 Filter"},
1144     {"Stereo1 Filter", NULL, "ADC ASRC"},
1145
1146     {"Stereo1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux"},
1147     {"Stereo1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux"},
1148     {"Stereo1 ADC MIXR", NULL, "Stereo1 Filter"},
1149
1150     {"Stereo2 ADC MIXL", "ADC1 Switch", "Stereo2 ADC L1 Mux"},
1151     {"Stereo2 ADC MIXL", "ADC2 Switch", "Stereo2 ADC L2 Mux"},
1152     {"Stereo2 ADC MIXL", NULL, "Stereo2 Filter"},
1153     {"Stereo2 Filter", NULL, "ADC ASRC"},
1154
1155     {"Stereo2 ADC MIXR", "ADC1 Switch", "Stereo2 ADC R1 Mux"},
1156     {"Stereo2 ADC MIXR", "ADC2 Switch", "Stereo2 ADC R2 Mux"},
1157     {"Stereo2 ADC MIXR", NULL, "Stereo2 Filter"},
1158
1159     {"IF1 ADC2", NULL, "Stereo2 ADC MIXL"},
1160     {"IF1 ADC2", NULL, "Stereo2 ADC MIXR"},
1161     {"IF1 ADC1", NULL, "Stereo1 ADC MIXL"},
1162     {"IF1 ADC1", NULL, "Stereo1 ADC MIXR"},
1163
1164     {"IF1 ADC1", NULL, "I2S1"},
1165
1166     {"IF2 ADC", "IF1 ADC1", "IF1 ADC1"},
1167     {"IF2 ADC", "IF1 ADC2", "IF1 ADC2"},
1168     {"IF2 ADC", NULL, "I2S2"},
1169
1170     {"AIF1TX", NULL, "IF1 ADC1"},
1171     {"AIF1TX", NULL, "IF1 ADC2"},
1172     {"AIF2TX", NULL, "IF2 ADC"},
1173
1174     {"IF1 DAC", NULL, "AIF1RX"},
1175     {"IF1 DAC", NULL, "I2S1"},
1176     {"IF2 DAC", NULL, "AIF2RX"},
1177     {"IF2 DAC", NULL, "I2S2"},
1178
1179     {"IF1 DAC1 L", NULL, "IF1 DAC"},
1180     {"IF1 DAC1 R", NULL, "IF1 DAC"},
1181     {"IF1 DAC2 L", NULL, "IF1 DAC"},
1182     {"IF1 DAC2 R", NULL, "IF1 DAC"},
1183     {"IF2 DAC L", NULL, "IF2 DAC"},
1184     {"IF2 DAC R", NULL, "IF2 DAC"},
1185
1186     {"DAC MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL"},
1187     {"DAC MIXL", "INF1 Switch", "IF1 DAC1 L"},
1188     {"DAC MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR"},
1189     {"DAC MIXR", "INF1 Switch", "IF1 DAC1 R"},
1190
1191     {"Audio DSP", NULL, "DAC MIXL"},
1192     {"Audio DSP", NULL, "DAC MIXR"},
1193
1194     {"DAC L2 Mux", "IF1", "IF1 DAC2 L"},
1195     {"DAC L2 Mux", "IF2", "IF2 DAC L"},
1196     {"DAC L2 Volume", NULL, "DAC L2 Mux"},
1197
1198     {"DAC R2 Mux", "IF1", "IF1 DAC2 R"},
1199     {"DAC R2 Mux", "IF2", "IF2 DAC R"},
1200     {"DAC R2 Volume", NULL, "DAC R2 Mux"},
1201
1202     {"Stereo DAC MIXL", "DAC L1 Switch", "Audio DSP"},
1203     {"Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Volume"},
1204     {"Stereo DAC MIXL", "DAC R1 Switch", "DAC MIXR"},
1205     {"Stereo DAC MIXL", NULL, "Stero1 DAC Power"},
1206     {"Stereo DAC MIXL", NULL, "Stero2 DAC Power"},
1207     {"Stereo DAC MIXR", "DAC R1 Switch", "Audio DSP"},
1208     {"Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Volume"},
1209     {"Stereo DAC MIXR", "DAC L1 Switch", "DAC MIXL"},
1210     {"Stereo DAC MIXR", NULL, "Stero1 DAC Power"},
1211     {"Stereo DAC MIXR", NULL, "Stero2 DAC Power"},
1212
1213     {"PDM L Mux", "Stereo DAC MIX", "Stereo DAC MIXL"},
1214     {"PDM L Mux", "DD MIX", "DAC MIXL"},
1215     {"PDM R Mux", "Stereo DAC MIX", "Stereo DAC MIXR"},
1216     {"PDM R Mux", "DD MIX", "DAC MIXR"},
1217
1218     {"DAC L1", NULL, "Stereo DAC MIXL"},
1219     {"DAC L1", NULL, "DAC L1 Power"},
1220     {"DAC R1", NULL, "Stereo DAC MIXR"},
1221     {"DAC R1", NULL, "DAC R1 Power"},
1222
1223     {"DD MIXL", "DAC L1 Switch", "DAC MIXL"},
1224     {"DD MIXL", "DAC L2 Switch", "DAC L2 Volume"},
1225     {"DD MIXL", "DAC R2 Switch", "DAC R2 Volume"},
1226     {"DD MIXL", NULL, "Stero2 DAC Power"},
1227
1228     {"DD MIXR", "DAC R1 Switch", "DAC MIXR"},
1229     {"DD MIXR", "DAC R2 Switch", "DAC R2 Volume"},
1230     {"DD MIXR", "DAC L2 Switch", "DAC L2 Volume"},
1231     {"DD MIXR", NULL, "Stero2 DAC Power"},
1232
1233     {"OUT MIXL", "BST1 Switch", "BST1"},
1234     {"OUT MIXL", "BST2 Switch", "BST2"},
1235     {"OUT MIXL", "INL1 Switch", "INL1 VOL"},
1236     {"OUT MIXL", "REC MIXL Switch", "RECMIXL"},
1237     {"OUT MIXL", "DAC L1 Switch", "DAC L1"},
1238
1239     {"OUT MIXR", "BST2 Switch", "BST2"},
1240     {"OUT MIXR", "BST1 Switch", "BST1"},
1241     {"OUT MIXR", "INR1 Switch", "INR1 VOL"},
1242     {"OUT MIXR", "REC MIXR Switch", "RECMIXR"},
1243     {"OUT MIXR", "DAC R1 Switch", "DAC R1"},
1244
1245     {"HPOVOL L", "Switch", "OUT MIXL"},
1246     {"HPOVOL R", "Switch", "OUT MIXR"},
1247     {"OUTVOL L", "Switch", "OUT MIXL"},
1248     {"OUTVOL R", "Switch", "OUT MIXR"},
1249
1250     {"HPOL MIX", "HPO MIX DAC1 Switch", "DAC L1"},
1251     {"HPOL MIX", "HPO MIX HPVOL Switch", "HPOVOL L"},
1252     {"HPOL MIX", NULL, "HP L Amp"},
1253     {"HPOR MIX", "HPO MIX DAC1 Switch", "DAC R1"},
1254     {"HPOR MIX", "HPO MIX HPVOL Switch", "HPOVOL R"},
1255     {"HPOR MIX", NULL, "HP R Amp"},
1256
1257     {"LOUT MIX", "DAC L1 Switch", "DAC L1"},
1258     {"LOUT MIX", "DAC R1 Switch", "DAC R1"},
1259     {"LOUT MIX", "OUTVOL L Switch", "OUTVOL L"},
1260     {"LOUT MIX", "OUTVOL R Switch", "OUTVOL R"},
1261
1262     {"HP Amp", NULL, "HPOL MIX"},
1263     {"HP Amp", NULL, "HPOR MIX"},
1264     {"HP Amp", NULL, "Amp Power"},
1265     {"HPO L Playback", "Switch", "HP Amp"},
1266     {"HPO R Playback", "Switch", "HP Amp"},
1267     {"HPOL", NULL, "HPO L Playback"},
1268     {"HPOR", NULL, "HPO R Playback"},
1269
1270     {"LOUT L Playback", "Switch", "LOUT MIX"},
1271     {"LOUT R Playback", "Switch", "LOUT MIX"},
1272     {"LOUTL", NULL, "LOUT L Playback"},
1273     {"LOUTL", NULL, "Amp Power"},
1274     {"LOUTR", NULL, "LOUT R Playback"},
1275     {"LOUTR", NULL, "Amp Power"},
1276
1277     {"PDML", NULL, "PDM L Mux"},
1278     {"PDMR", NULL, "PDM R Mux"},
1279 };
1280
1281 static int rt5651_hw_params(struct snd_pcm_substream *substream,
1282     struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
1283 {
1284     struct snd_soc_component *component = dai->component;
1285     struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component);
1286     unsigned int val_len = 0, val_clk, mask_clk;
1287     int pre_div, bclk_ms, frame_size;
1288
1289     rt5651->lrck[dai->id] = params_rate(params);
1290     pre_div = rl6231_get_clk_info(rt5651->sysclk, rt5651->lrck[dai->id]);
1291
1292     if (pre_div < 0) {
1293         dev_err(component->dev, "Unsupported clock setting\n");
1294         return -EINVAL;
1295     }
1296     frame_size = snd_soc_params_to_frame_size(params);
1297     if (frame_size < 0) {
1298         dev_err(component->dev, "Unsupported frame size: %d\n", frame_size);
1299         return -EINVAL;
1300     }
1301     bclk_ms = frame_size > 32 ? 1 : 0;
1302     rt5651->bclk[dai->id] = rt5651->lrck[dai->id] * (32 << bclk_ms);
1303
1304     dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
1305         rt5651->bclk[dai->id], rt5651->lrck[dai->id]);
1306     dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
1307                 bclk_ms, pre_div, dai->id);
1308
1309     switch (params_width(params)) {
1310     case 16:
1311         break;
1312     case 20:
1313         val_len |= RT5651_I2S_DL_20;
1314         break;
1315     case 24:
1316         val_len |= RT5651_I2S_DL_24;
1317         break;
1318     case 8:
1319         val_len |= RT5651_I2S_DL_8;
1320         break;
1321     default:
1322         return -EINVAL;
1323     }
1324
1325     switch (dai->id) {
1326     case RT5651_AIF1:
1327         mask_clk = RT5651_I2S_PD1_MASK;
1328         val_clk = pre_div << RT5651_I2S_PD1_SFT;
1329         snd_soc_component_update_bits(component, RT5651_I2S1_SDP,
1330             RT5651_I2S_DL_MASK, val_len);
1331         snd_soc_component_update_bits(component, RT5651_ADDA_CLK1, mask_clk, val_clk);
1332         break;
1333     case RT5651_AIF2:
1334         mask_clk = RT5651_I2S_BCLK_MS2_MASK | RT5651_I2S_PD2_MASK;
1335         val_clk = pre_div << RT5651_I2S_PD2_SFT;
1336         snd_soc_component_update_bits(component, RT5651_I2S2_SDP,
1337             RT5651_I2S_DL_MASK, val_len);
1338         snd_soc_component_update_bits(component, RT5651_ADDA_CLK1, mask_clk, val_clk);
1339         break;
1340     default:
1341         dev_err(component->dev, "Wrong dai->id: %d\n", dai->id);
1342         return -EINVAL;
1343     }
1344
1345     return 0;
1346 }
1347
1348 static int rt5651_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
1349 {
1350     struct snd_soc_component *component = dai->component;
1351     struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component);
1352     unsigned int reg_val = 0;
1353
1354     switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1355     case SND_SOC_DAIFMT_CBM_CFM:
1356         rt5651->master[dai->id] = 1;
1357         break;
1358     case SND_SOC_DAIFMT_CBS_CFS:
1359         reg_val |= RT5651_I2S_MS_S;
1360         rt5651->master[dai->id] = 0;
1361         break;
1362     default:
1363         return -EINVAL;
1364     }
1365
1366     switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1367     case SND_SOC_DAIFMT_NB_NF:
1368         break;
1369     case SND_SOC_DAIFMT_IB_NF:
1370         reg_val |= RT5651_I2S_BP_INV;
1371         break;
1372     default:
1373         return -EINVAL;
1374     }
1375
1376     switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1377     case SND_SOC_DAIFMT_I2S:
1378         break;
1379     case SND_SOC_DAIFMT_LEFT_J:
1380         reg_val |= RT5651_I2S_DF_LEFT;
1381         break;
1382     case SND_SOC_DAIFMT_DSP_A:
1383         reg_val |= RT5651_I2S_DF_PCM_A;
1384         break;
1385     case SND_SOC_DAIFMT_DSP_B:
1386         reg_val |= RT5651_I2S_DF_PCM_B;
1387         break;
1388     default:
1389         return -EINVAL;
1390     }
1391
1392     switch (dai->id) {
1393     case RT5651_AIF1:
1394         snd_soc_component_update_bits(component, RT5651_I2S1_SDP,
1395             RT5651_I2S_MS_MASK | RT5651_I2S_BP_MASK |
1396             RT5651_I2S_DF_MASK, reg_val);
1397         break;
1398     case RT5651_AIF2:
1399         snd_soc_component_update_bits(component, RT5651_I2S2_SDP,
1400             RT5651_I2S_MS_MASK | RT5651_I2S_BP_MASK |
1401             RT5651_I2S_DF_MASK, reg_val);
1402         break;
1403     default:
1404         dev_err(component->dev, "Wrong dai->id: %d\n", dai->id);
1405         return -EINVAL;
1406     }
1407     return 0;
1408 }
1409
1410 static int rt5651_set_dai_sysclk(struct snd_soc_dai *dai,
1411         int clk_id, unsigned int freq, int dir)
1412 {
1413     struct snd_soc_component *component = dai->component;
1414     struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component);
1415     unsigned int reg_val = 0;
1416     unsigned int pll_bit = 0;
1417
1418     if (freq == rt5651->sysclk && clk_id == rt5651->sysclk_src)
1419         return 0;
1420
1421     switch (clk_id) {
1422     case RT5651_SCLK_S_MCLK:
1423         reg_val |= RT5651_SCLK_SRC_MCLK;
1424         break;
1425     case RT5651_SCLK_S_PLL1:
1426         reg_val |= RT5651_SCLK_SRC_PLL1;
1427         pll_bit |= RT5651_PWR_PLL;
1428         break;
1429     case RT5651_SCLK_S_RCCLK:
1430         reg_val |= RT5651_SCLK_SRC_RCCLK;
1431         break;
1432     default:
1433         dev_err(component->dev, "Invalid clock id (%d)\n", clk_id);
1434         return -EINVAL;
1435     }
1436     snd_soc_component_update_bits(component, RT5651_PWR_ANLG2,
1437         RT5651_PWR_PLL, pll_bit);
1438     snd_soc_component_update_bits(component, RT5651_GLB_CLK,
1439         RT5651_SCLK_SRC_MASK, reg_val);
1440     rt5651->sysclk = freq;
1441     rt5651->sysclk_src = clk_id;
1442
1443     dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
1444
1445     return 0;
1446 }
1447
1448 static int rt5651_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
1449             unsigned int freq_in, unsigned int freq_out)
1450 {
1451     struct snd_soc_component *component = dai->component;
1452     struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component);
1453     struct rl6231_pll_code pll_code;
1454     int ret;
1455
1456     if (source == rt5651->pll_src && freq_in == rt5651->pll_in &&
1457         freq_out == rt5651->pll_out)
1458         return 0;
1459
1460     if (!freq_in || !freq_out) {
1461         dev_dbg(component->dev, "PLL disabled\n");
1462
1463         rt5651->pll_in = 0;
1464         rt5651->pll_out = 0;
1465         snd_soc_component_update_bits(component, RT5651_GLB_CLK,
1466             RT5651_SCLK_SRC_MASK, RT5651_SCLK_SRC_MCLK);
1467         return 0;
1468     }
1469
1470     switch (source) {
1471     case RT5651_PLL1_S_MCLK:
1472         snd_soc_component_update_bits(component, RT5651_GLB_CLK,
1473             RT5651_PLL1_SRC_MASK, RT5651_PLL1_SRC_MCLK);
1474         break;
1475     case RT5651_PLL1_S_BCLK1:
1476         snd_soc_component_update_bits(component, RT5651_GLB_CLK,
1477                 RT5651_PLL1_SRC_MASK, RT5651_PLL1_SRC_BCLK1);
1478         break;
1479     case RT5651_PLL1_S_BCLK2:
1480             snd_soc_component_update_bits(component, RT5651_GLB_CLK,
1481                 RT5651_PLL1_SRC_MASK, RT5651_PLL1_SRC_BCLK2);
1482         break;
1483     default:
1484         dev_err(component->dev, "Unknown PLL source %d\n", source);
1485         return -EINVAL;
1486     }
1487
1488     ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
1489     if (ret < 0) {
1490         dev_err(component->dev, "Unsupported input clock %d\n", freq_in);
1491         return ret;
1492     }
1493
1494     dev_dbg(component->dev, "bypass=%d m=%d n=%d k=%d\n",
1495         pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
1496         pll_code.n_code, pll_code.k_code);
1497
1498     snd_soc_component_write(component, RT5651_PLL_CTRL1,
1499         pll_code.n_code << RT5651_PLL_N_SFT | pll_code.k_code);
1500     snd_soc_component_write(component, RT5651_PLL_CTRL2,
1501         ((pll_code.m_bp ? 0 : pll_code.m_code) << RT5651_PLL_M_SFT) |
1502         (pll_code.m_bp << RT5651_PLL_M_BP_SFT));
1503
1504     rt5651->pll_in = freq_in;
1505     rt5651->pll_out = freq_out;
1506     rt5651->pll_src = source;
1507
1508     return 0;
1509 }
1510
1511 static int rt5651_set_bias_level(struct snd_soc_component *component,
1512             enum snd_soc_bias_level level)
1513 {
1514     switch (level) {
1515     case SND_SOC_BIAS_PREPARE:
1516         if (SND_SOC_BIAS_STANDBY == snd_soc_component_get_bias_level(component)) {
1517             if (snd_soc_component_read(component, RT5651_PLL_MODE_1) & 0x9200)
1518                 snd_soc_component_update_bits(component, RT5651_D_MISC,
1519                             0xc00, 0xc00);
1520         }
1521         break;
1522     case SND_SOC_BIAS_STANDBY:
1523         if (SND_SOC_BIAS_OFF == snd_soc_component_get_bias_level(component)) {
1524             snd_soc_component_update_bits(component, RT5651_PWR_ANLG1,
1525                 RT5651_PWR_VREF1 | RT5651_PWR_MB |
1526                 RT5651_PWR_BG | RT5651_PWR_VREF2,
1527                 RT5651_PWR_VREF1 | RT5651_PWR_MB |
1528                 RT5651_PWR_BG | RT5651_PWR_VREF2);
1529             usleep_range(10000, 15000);
1530             snd_soc_component_update_bits(component, RT5651_PWR_ANLG1,
1531                 RT5651_PWR_FV1 | RT5651_PWR_FV2,
1532                 RT5651_PWR_FV1 | RT5651_PWR_FV2);
1533             snd_soc_component_update_bits(component, RT5651_D_MISC, 0x1, 0x1);
1534         }
1535         break;
1536
1537     case SND_SOC_BIAS_OFF:
1538         snd_soc_component_write(component, RT5651_D_MISC, 0x0010);
1539         snd_soc_component_write(component, RT5651_PWR_DIG1, 0x0000);
1540         snd_soc_component_write(component, RT5651_PWR_DIG2, 0x0000);
1541         snd_soc_component_write(component, RT5651_PWR_VOL, 0x0000);
1542         snd_soc_component_write(component, RT5651_PWR_MIXER, 0x0000);
1543         /* Do not touch the LDO voltage select bits on bias-off */
1544         snd_soc_component_update_bits(component, RT5651_PWR_ANLG1,
1545             ~RT5651_PWR_LDO_DVO_MASK, 0);
1546         /* Leave PLL1 and jack-detect power as is, all others off */
1547         snd_soc_component_update_bits(component, RT5651_PWR_ANLG2,
1548                     ~(RT5651_PWR_PLL | RT5651_PWR_JD_M), 0);
1549         break;
1550
1551     default:
1552         break;
1553     }
1554
1555     return 0;
1556 }
1557
1558 static void rt5651_enable_micbias1_for_ovcd(struct snd_soc_component *component)
1559 {
1560     struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
1561
1562     snd_soc_dapm_mutex_lock(dapm);
1563     snd_soc_dapm_force_enable_pin_unlocked(dapm, "LDO");
1564     snd_soc_dapm_force_enable_pin_unlocked(dapm, "micbias1");
1565     /* OVCD is unreliable when used with RCCLK as sysclk-source */
1566     snd_soc_dapm_force_enable_pin_unlocked(dapm, "Platform Clock");
1567     snd_soc_dapm_sync_unlocked(dapm);
1568     snd_soc_dapm_mutex_unlock(dapm);
1569 }
1570
1571 static void rt5651_disable_micbias1_for_ovcd(struct snd_soc_component *component)
1572 {
1573     struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
1574
1575     snd_soc_dapm_mutex_lock(dapm);
1576     snd_soc_dapm_disable_pin_unlocked(dapm, "Platform Clock");
1577     snd_soc_dapm_disable_pin_unlocked(dapm, "micbias1");
1578     snd_soc_dapm_disable_pin_unlocked(dapm, "LDO");
1579     snd_soc_dapm_sync_unlocked(dapm);
1580     snd_soc_dapm_mutex_unlock(dapm);
1581 }
1582
1583 static void rt5651_enable_micbias1_ovcd_irq(struct snd_soc_component *component)
1584 {
1585     struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component);
1586
1587     snd_soc_component_update_bits(component, RT5651_IRQ_CTRL2,
1588         RT5651_IRQ_MB1_OC_MASK, RT5651_IRQ_MB1_OC_NOR);
1589     rt5651->ovcd_irq_enabled = true;
1590 }
1591
1592 static void rt5651_disable_micbias1_ovcd_irq(struct snd_soc_component *component)
1593 {
1594     struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component);
1595
1596     snd_soc_component_update_bits(component, RT5651_IRQ_CTRL2,
1597         RT5651_IRQ_MB1_OC_MASK, RT5651_IRQ_MB1_OC_BP);
1598     rt5651->ovcd_irq_enabled = false;
1599 }
1600
1601 static void rt5651_clear_micbias1_ovcd(struct snd_soc_component *component)
1602 {
1603     snd_soc_component_update_bits(component, RT5651_IRQ_CTRL2,
1604         RT5651_MB1_OC_CLR, 0);
1605 }
1606
1607 static bool rt5651_micbias1_ovcd(struct snd_soc_component *component)
1608 {
1609     int val;
1610
1611     val = snd_soc_component_read(component, RT5651_IRQ_CTRL2);
1612     dev_dbg(component->dev, "irq ctrl2 %#04x\n", val);
1613
1614     return (val & RT5651_MB1_OC_CLR);
1615 }
1616
1617 static bool rt5651_jack_inserted(struct snd_soc_component *component)
1618 {
1619     struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component);
1620     int val;
1621
1622     if (rt5651->gpiod_hp_det) {
1623         val = gpiod_get_value_cansleep(rt5651->gpiod_hp_det);
1624         dev_dbg(component->dev, "jack-detect gpio %d\n", val);
1625         return val;
1626     }
1627
1628     val = snd_soc_component_read(component, RT5651_INT_IRQ_ST);
1629     dev_dbg(component->dev, "irq status %#04x\n", val);
1630
1631     switch (rt5651->jd_src) {
1632     case RT5651_JD1_1:
1633         val &= 0x1000;
1634         break;
1635     case RT5651_JD1_2:
1636         val &= 0x2000;
1637         break;
1638     case RT5651_JD2:
1639         val &= 0x4000;
1640         break;
1641     default:
1642         break;
1643     }
1644
1645     if (rt5651->jd_active_high)
1646         return val != 0;
1647     else
1648         return val == 0;
1649 }
1650
1651 /* Jack detect and button-press timings */
1652 #define JACK_SETTLE_TIME    100 /* milli seconds */
1653 #define JACK_DETECT_COUNT   5
1654 #define JACK_DETECT_MAXCOUNT    20  /* Aprox. 2 seconds worth of tries */
1655 #define JACK_UNPLUG_TIME    80  /* milli seconds */
1656 #define BP_POLL_TIME        10  /* milli seconds */
1657 #define BP_POLL_MAXCOUNT    200 /* assume something is wrong after this */
1658 #define BP_THRESHOLD        3
1659
1660 static void rt5651_start_button_press_work(struct snd_soc_component *component)
1661 {
1662     struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component);
1663
1664     rt5651->poll_count = 0;
1665     rt5651->press_count = 0;
1666     rt5651->release_count = 0;
1667     rt5651->pressed = false;
1668     rt5651->press_reported = false;
1669     rt5651_clear_micbias1_ovcd(component);
1670     schedule_delayed_work(&rt5651->bp_work, msecs_to_jiffies(BP_POLL_TIME));
1671 }
1672
1673 static void rt5651_button_press_work(struct work_struct *work)
1674 {
1675     struct rt5651_priv *rt5651 =
1676         container_of(work, struct rt5651_priv, bp_work.work);
1677     struct snd_soc_component *component = rt5651->component;
1678
1679     /* Check the jack was not removed underneath us */
1680     if (!rt5651_jack_inserted(component))
1681         return;
1682
1683     if (rt5651_micbias1_ovcd(component)) {
1684         rt5651->release_count = 0;
1685         rt5651->press_count++;
1686         /* Remember till after JACK_UNPLUG_TIME wait */
1687         if (rt5651->press_count >= BP_THRESHOLD)
1688             rt5651->pressed = true;
1689         rt5651_clear_micbias1_ovcd(component);
1690     } else {
1691         rt5651->press_count = 0;
1692         rt5651->release_count++;
1693     }
1694
1695     /*
1696      * The pins get temporarily shorted on jack unplug, so we poll for
1697      * at least JACK_UNPLUG_TIME milli-seconds before reporting a press.
1698      */
1699     rt5651->poll_count++;
1700     if (rt5651->poll_count < (JACK_UNPLUG_TIME / BP_POLL_TIME)) {
1701         schedule_delayed_work(&rt5651->bp_work,
1702                       msecs_to_jiffies(BP_POLL_TIME));
1703         return;
1704     }
1705
1706     if (rt5651->pressed && !rt5651->press_reported) {
1707         dev_dbg(component->dev, "headset button press\n");
1708         snd_soc_jack_report(rt5651->hp_jack, SND_JACK_BTN_0,
1709                     SND_JACK_BTN_0);
1710         rt5651->press_reported = true;
1711     }
1712
1713     if (rt5651->release_count >= BP_THRESHOLD) {
1714         if (rt5651->press_reported) {
1715             dev_dbg(component->dev, "headset button release\n");
1716             snd_soc_jack_report(rt5651->hp_jack, 0, SND_JACK_BTN_0);
1717         }
1718         /* Re-enable OVCD IRQ to detect next press */
1719         rt5651_enable_micbias1_ovcd_irq(component);
1720         return; /* Stop polling */
1721     }
1722
1723     schedule_delayed_work(&rt5651->bp_work, msecs_to_jiffies(BP_POLL_TIME));
1724 }
1725
1726 static int rt5651_detect_headset(struct snd_soc_component *component)
1727 {
1728     int i, headset_count = 0, headphone_count = 0;
1729
1730     /*
1731      * We get the insertion event before the jack is fully inserted at which
1732      * point the second ring on a TRRS connector may short the 2nd ring and
1733      * sleeve contacts, also the overcurrent detection is not entirely
1734      * reliable. So we try several times with a wait in between until we
1735      * detect the same type JACK_DETECT_COUNT times in a row.
1736      */
1737     for (i = 0; i < JACK_DETECT_MAXCOUNT; i++) {
1738         /* Clear any previous over-current status flag */
1739         rt5651_clear_micbias1_ovcd(component);
1740
1741         msleep(JACK_SETTLE_TIME);
1742
1743         /* Check the jack is still connected before checking ovcd */
1744         if (!rt5651_jack_inserted(component))
1745             return 0;
1746
1747         if (rt5651_micbias1_ovcd(component)) {
1748             /*
1749              * Over current detected, there is a short between the
1750              * 2nd ring contact and the ground, so a TRS connector
1751              * without a mic contact and thus plain headphones.
1752              */
1753             dev_dbg(component->dev, "mic-gnd shorted\n");
1754             headset_count = 0;
1755             headphone_count++;
1756             if (headphone_count == JACK_DETECT_COUNT)
1757                 return SND_JACK_HEADPHONE;
1758         } else {
1759             dev_dbg(component->dev, "mic-gnd open\n");
1760             headphone_count = 0;
1761             headset_count++;
1762             if (headset_count == JACK_DETECT_COUNT)
1763                 return SND_JACK_HEADSET;
1764         }
1765     }
1766
1767     dev_err(component->dev, "Error detecting headset vs headphones, bad contact?, assuming headphones\n");
1768     return SND_JACK_HEADPHONE;
1769 }
1770
1771 static bool rt5651_support_button_press(struct rt5651_priv *rt5651)
1772 {
1773     if (!rt5651->hp_jack)
1774         return false;
1775
1776     /* Button press support only works with internal jack-detection */
1777     return (rt5651->hp_jack->status & SND_JACK_MICROPHONE) &&
1778         rt5651->gpiod_hp_det == NULL;
1779 }
1780
1781 static void rt5651_jack_detect_work(struct work_struct *work)
1782 {
1783     struct rt5651_priv *rt5651 =
1784         container_of(work, struct rt5651_priv, jack_detect_work);
1785     struct snd_soc_component *component = rt5651->component;
1786     int report;
1787
1788     if (!rt5651_jack_inserted(component)) {
1789         /* Jack removed, or spurious IRQ? */
1790         if (rt5651->hp_jack->status & SND_JACK_HEADPHONE) {
1791             if (rt5651->hp_jack->status & SND_JACK_MICROPHONE) {
1792                 cancel_delayed_work_sync(&rt5651->bp_work);
1793                 rt5651_disable_micbias1_ovcd_irq(component);
1794                 rt5651_disable_micbias1_for_ovcd(component);
1795             }
1796             snd_soc_jack_report(rt5651->hp_jack, 0,
1797                         SND_JACK_HEADSET | SND_JACK_BTN_0);
1798             dev_dbg(component->dev, "jack unplugged\n");
1799         }
1800     } else if (!(rt5651->hp_jack->status & SND_JACK_HEADPHONE)) {
1801         /* Jack inserted */
1802         WARN_ON(rt5651->ovcd_irq_enabled);
1803         rt5651_enable_micbias1_for_ovcd(component);
1804         report = rt5651_detect_headset(component);
1805         dev_dbg(component->dev, "detect report %#02x\n", report);
1806         snd_soc_jack_report(rt5651->hp_jack, report, SND_JACK_HEADSET);
1807         if (rt5651_support_button_press(rt5651)) {
1808             /* Enable ovcd IRQ for button press detect. */
1809             rt5651_enable_micbias1_ovcd_irq(component);
1810         } else {
1811             /* No more need for overcurrent detect. */
1812             rt5651_disable_micbias1_for_ovcd(component);
1813         }
1814     } else if (rt5651->ovcd_irq_enabled && rt5651_micbias1_ovcd(component)) {
1815         dev_dbg(component->dev, "OVCD IRQ\n");
1816
1817         /*
1818          * The ovcd IRQ keeps firing while the button is pressed, so
1819          * we disable it and start polling the button until released.
1820          *
1821          * The disable will make the IRQ pin 0 again and since we get
1822          * IRQs on both edges (so as to detect both jack plugin and
1823          * unplug) this means we will immediately get another IRQ.
1824          * The ovcd_irq_enabled check above makes the 2ND IRQ a NOP.
1825          */
1826         rt5651_disable_micbias1_ovcd_irq(component);
1827         rt5651_start_button_press_work(component);
1828
1829         /*
1830          * If the jack-detect IRQ flag goes high (unplug) after our
1831          * above rt5651_jack_inserted() check and before we have
1832          * disabled the OVCD IRQ, the IRQ pin will stay high and as
1833          * we react to edges, we miss the unplug event -> recheck.
1834          */
1835         queue_work(system_long_wq, &rt5651->jack_detect_work);
1836     }
1837 }
1838
1839 static irqreturn_t rt5651_irq(int irq, void *data)
1840 {
1841     struct rt5651_priv *rt5651 = data;
1842
1843     queue_work(system_power_efficient_wq, &rt5651->jack_detect_work);
1844
1845     return IRQ_HANDLED;
1846 }
1847
1848 static void rt5651_cancel_work(void *data)
1849 {
1850     struct rt5651_priv *rt5651 = data;
1851
1852     cancel_work_sync(&rt5651->jack_detect_work);
1853     cancel_delayed_work_sync(&rt5651->bp_work);
1854 }
1855
1856 static void rt5651_enable_jack_detect(struct snd_soc_component *component,
1857                       struct snd_soc_jack *hp_jack,
1858                       struct gpio_desc *gpiod_hp_det)
1859 {
1860     struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component);
1861     bool using_internal_jack_detect = true;
1862
1863     /* Select jack detect source */
1864     switch (rt5651->jd_src) {
1865     case RT5651_JD_NULL:
1866         rt5651->gpiod_hp_det = gpiod_hp_det;
1867         if (!rt5651->gpiod_hp_det)
1868             return; /* No jack detect */
1869         using_internal_jack_detect = false;
1870         break;
1871     case RT5651_JD1_1:
1872         snd_soc_component_update_bits(component, RT5651_JD_CTRL2,
1873             RT5651_JD_TRG_SEL_MASK, RT5651_JD_TRG_SEL_JD1_1);
1874         /* active-low is normal, set inv flag for active-high */
1875         if (rt5651->jd_active_high)
1876             snd_soc_component_update_bits(component,
1877                 RT5651_IRQ_CTRL1,
1878                 RT5651_JD1_1_IRQ_EN | RT5651_JD1_1_INV,
1879                 RT5651_JD1_1_IRQ_EN | RT5651_JD1_1_INV);
1880         else
1881             snd_soc_component_update_bits(component,
1882                 RT5651_IRQ_CTRL1,
1883                 RT5651_JD1_1_IRQ_EN | RT5651_JD1_1_INV,
1884                 RT5651_JD1_1_IRQ_EN);
1885         break;
1886     case RT5651_JD1_2:
1887         snd_soc_component_update_bits(component, RT5651_JD_CTRL2,
1888             RT5651_JD_TRG_SEL_MASK, RT5651_JD_TRG_SEL_JD1_2);
1889         /* active-low is normal, set inv flag for active-high */
1890         if (rt5651->jd_active_high)
1891             snd_soc_component_update_bits(component,
1892                 RT5651_IRQ_CTRL1,
1893                 RT5651_JD1_2_IRQ_EN | RT5651_JD1_2_INV,
1894                 RT5651_JD1_2_IRQ_EN | RT5651_JD1_2_INV);
1895         else
1896             snd_soc_component_update_bits(component,
1897                 RT5651_IRQ_CTRL1,
1898                 RT5651_JD1_2_IRQ_EN | RT5651_JD1_2_INV,
1899                 RT5651_JD1_2_IRQ_EN);
1900         break;
1901     case RT5651_JD2:
1902         snd_soc_component_update_bits(component, RT5651_JD_CTRL2,
1903             RT5651_JD_TRG_SEL_MASK, RT5651_JD_TRG_SEL_JD2);
1904         /* active-low is normal, set inv flag for active-high */
1905         if (rt5651->jd_active_high)
1906             snd_soc_component_update_bits(component,
1907                 RT5651_IRQ_CTRL1,
1908                 RT5651_JD2_IRQ_EN | RT5651_JD2_INV,
1909                 RT5651_JD2_IRQ_EN | RT5651_JD2_INV);
1910         else
1911             snd_soc_component_update_bits(component,
1912                 RT5651_IRQ_CTRL1,
1913                 RT5651_JD2_IRQ_EN | RT5651_JD2_INV,
1914                 RT5651_JD2_IRQ_EN);
1915         break;
1916     default:
1917         dev_err(component->dev, "Currently only JD1_1 / JD1_2 / JD2 are supported\n");
1918         return;
1919     }
1920
1921     if (using_internal_jack_detect) {
1922         /* IRQ output on GPIO1 */
1923         snd_soc_component_update_bits(component, RT5651_GPIO_CTRL1,
1924             RT5651_GP1_PIN_MASK, RT5651_GP1_PIN_IRQ);
1925
1926         /* Enable jack detect power */
1927         snd_soc_component_update_bits(component, RT5651_PWR_ANLG2,
1928             RT5651_PWR_JD_M, RT5651_PWR_JD_M);
1929     }
1930
1931     /* Set OVCD threshold current and scale-factor */
1932     snd_soc_component_write(component, RT5651_PR_BASE + RT5651_BIAS_CUR4,
1933                 0xa800 | rt5651->ovcd_sf);
1934
1935     snd_soc_component_update_bits(component, RT5651_MICBIAS,
1936                       RT5651_MIC1_OVCD_MASK |
1937                       RT5651_MIC1_OVTH_MASK |
1938                       RT5651_PWR_CLK12M_MASK |
1939                       RT5651_PWR_MB_MASK,
1940                       RT5651_MIC1_OVCD_EN |
1941                       rt5651->ovcd_th |
1942                       RT5651_PWR_MB_PU |
1943                       RT5651_PWR_CLK12M_PU);
1944
1945     /*
1946      * The over-current-detect is only reliable in detecting the absence
1947      * of over-current, when the mic-contact in the jack is short-circuited,
1948      * the hardware periodically retries if it can apply the bias-current
1949      * leading to the ovcd status flip-flopping 1-0-1 with it being 0 about
1950      * 10% of the time, as we poll the ovcd status bit we might hit that
1951      * 10%, so we enable sticky mode and when checking OVCD we clear the
1952      * status, msleep() a bit and then check to get a reliable reading.
1953      */
1954     snd_soc_component_update_bits(component, RT5651_IRQ_CTRL2,
1955         RT5651_MB1_OC_STKY_MASK, RT5651_MB1_OC_STKY_EN);
1956
1957     rt5651->hp_jack = hp_jack;
1958     if (rt5651_support_button_press(rt5651)) {
1959         rt5651_enable_micbias1_for_ovcd(component);
1960         rt5651_enable_micbias1_ovcd_irq(component);
1961     }
1962
1963     enable_irq(rt5651->irq);
1964     /* sync initial jack state */
1965     queue_work(system_power_efficient_wq, &rt5651->jack_detect_work);
1966 }
1967
1968 static void rt5651_disable_jack_detect(struct snd_soc_component *component)
1969 {
1970     struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component);
1971
1972     disable_irq(rt5651->irq);
1973     rt5651_cancel_work(rt5651);
1974
1975     if (rt5651_support_button_press(rt5651)) {
1976         rt5651_disable_micbias1_ovcd_irq(component);
1977         rt5651_disable_micbias1_for_ovcd(component);
1978         snd_soc_jack_report(rt5651->hp_jack, 0, SND_JACK_BTN_0);
1979     }
1980
1981     rt5651->hp_jack = NULL;
1982 }
1983
1984 static int rt5651_set_jack(struct snd_soc_component *component,
1985                struct snd_soc_jack *jack, void *data)
1986 {
1987     if (jack)
1988         rt5651_enable_jack_detect(component, jack, data);
1989     else
1990         rt5651_disable_jack_detect(component);
1991
1992     return 0;
1993 }
1994
1995 /*
1996  * Note on some platforms the platform code may need to add device-properties,
1997  * rather then relying only on properties set by the firmware. Therefor the
1998  * property parsing MUST be done from the component driver's probe function,
1999  * rather then from the i2c driver's probe function, so that the platform-code
2000  * can attach extra properties before calling snd_soc_register_card().
2001  */
2002 static void rt5651_apply_properties(struct snd_soc_component *component)
2003 {
2004     struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component);
2005     u32 val;
2006
2007     if (device_property_read_bool(component->dev, "realtek,in2-differential"))
2008         snd_soc_component_update_bits(component, RT5651_IN1_IN2,
2009                 RT5651_IN_DF2, RT5651_IN_DF2);
2010
2011     if (device_property_read_bool(component->dev, "realtek,dmic-en"))
2012         snd_soc_component_update_bits(component, RT5651_GPIO_CTRL1,
2013                 RT5651_GP2_PIN_MASK, RT5651_GP2_PIN_DMIC1_SCL);
2014
2015     if (device_property_read_u32(component->dev,
2016                      "realtek,jack-detect-source", &val) == 0)
2017         rt5651->jd_src = val;
2018
2019     if (device_property_read_bool(component->dev, "realtek,jack-detect-not-inverted"))
2020         rt5651->jd_active_high = true;
2021
2022     /*
2023      * Testing on various boards has shown that good defaults for the OVCD
2024      * threshold and scale-factor are 2000µA and 0.75. For an effective
2025      * limit of 1500µA, this seems to be more reliable then 1500µA and 1.0.
2026      */
2027     rt5651->ovcd_th = RT5651_MIC1_OVTH_2000UA;
2028     rt5651->ovcd_sf = RT5651_MIC_OVCD_SF_0P75;
2029
2030     if (device_property_read_u32(component->dev,
2031             "realtek,over-current-threshold-microamp", &val) == 0) {
2032         switch (val) {
2033         case 600:
2034             rt5651->ovcd_th = RT5651_MIC1_OVTH_600UA;
2035             break;
2036         case 1500:
2037             rt5651->ovcd_th = RT5651_MIC1_OVTH_1500UA;
2038             break;
2039         case 2000:
2040             rt5651->ovcd_th = RT5651_MIC1_OVTH_2000UA;
2041             break;
2042         default:
2043             dev_warn(component->dev, "Warning: Invalid over-current-threshold-microamp value: %d, defaulting to 2000uA\n",
2044                  val);
2045         }
2046     }
2047
2048     if (device_property_read_u32(component->dev,
2049             "realtek,over-current-scale-factor", &val) == 0) {
2050         if (val <= RT5651_OVCD_SF_1P5)
2051             rt5651->ovcd_sf = val << RT5651_MIC_OVCD_SF_SFT;
2052         else
2053             dev_warn(component->dev, "Warning: Invalid over-current-scale-factor value: %d, defaulting to 0.75\n",
2054                  val);
2055     }
2056 }
2057
2058 static int rt5651_probe(struct snd_soc_component *component)
2059 {
2060     struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component);
2061
2062     rt5651->component = component;
2063
2064     snd_soc_component_update_bits(component, RT5651_PWR_ANLG1,
2065         RT5651_PWR_LDO_DVO_MASK, RT5651_PWR_LDO_DVO_1_2V);
2066
2067     snd_soc_component_force_bias_level(component, SND_SOC_BIAS_OFF);
2068
2069     rt5651_apply_properties(component);
2070
2071     return 0;
2072 }
2073
2074 #ifdef CONFIG_PM
2075 static int rt5651_suspend(struct snd_soc_component *component)
2076 {
2077     struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component);
2078
2079     regcache_cache_only(rt5651->regmap, true);
2080     regcache_mark_dirty(rt5651->regmap);
2081     return 0;
2082 }
2083
2084 static int rt5651_resume(struct snd_soc_component *component)
2085 {
2086     struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component);
2087
2088     regcache_cache_only(rt5651->regmap, false);
2089     snd_soc_component_cache_sync(component);
2090
2091     return 0;
2092 }
2093 #else
2094 #define rt5651_suspend NULL
2095 #define rt5651_resume NULL
2096 #endif
2097
2098 #define RT5651_STEREO_RATES SNDRV_PCM_RATE_8000_96000
2099 #define RT5651_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
2100             SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
2101
2102 static const struct snd_soc_dai_ops rt5651_aif_dai_ops = {
2103     .hw_params = rt5651_hw_params,
2104     .set_fmt = rt5651_set_dai_fmt,
2105     .set_sysclk = rt5651_set_dai_sysclk,
2106     .set_pll = rt5651_set_dai_pll,
2107 };
2108
2109 static struct snd_soc_dai_driver rt5651_dai[] = {
2110     {
2111         .name = "rt5651-aif1",
2112         .id = RT5651_AIF1,
2113         .playback = {
2114             .stream_name = "AIF1 Playback",
2115             .channels_min = 1,
2116             .channels_max = 2,
2117             .rates = RT5651_STEREO_RATES,
2118             .formats = RT5651_FORMATS,
2119         },
2120         .capture = {
2121             .stream_name = "AIF1 Capture",
2122             .channels_min = 1,
2123             .channels_max = 2,
2124             .rates = RT5651_STEREO_RATES,
2125             .formats = RT5651_FORMATS,
2126         },
2127         .ops = &rt5651_aif_dai_ops,
2128     },
2129     {
2130         .name = "rt5651-aif2",
2131         .id = RT5651_AIF2,
2132         .playback = {
2133             .stream_name = "AIF2 Playback",
2134             .channels_min = 1,
2135             .channels_max = 2,
2136             .rates = RT5651_STEREO_RATES,
2137             .formats = RT5651_FORMATS,
2138         },
2139         .capture = {
2140             .stream_name = "AIF2 Capture",
2141             .channels_min = 1,
2142             .channels_max = 2,
2143             .rates = RT5651_STEREO_RATES,
2144             .formats = RT5651_FORMATS,
2145         },
2146         .ops = &rt5651_aif_dai_ops,
2147     },
2148 };
2149
2150 static const struct snd_soc_component_driver soc_component_dev_rt5651 = {
2151     .probe          = rt5651_probe,
2152     .suspend        = rt5651_suspend,
2153     .resume         = rt5651_resume,
2154     .set_bias_level     = rt5651_set_bias_level,
2155     .set_jack       = rt5651_set_jack,
2156     .controls       = rt5651_snd_controls,
2157     .num_controls       = ARRAY_SIZE(rt5651_snd_controls),
2158     .dapm_widgets       = rt5651_dapm_widgets,
2159     .num_dapm_widgets   = ARRAY_SIZE(rt5651_dapm_widgets),
2160     .dapm_routes        = rt5651_dapm_routes,
2161     .num_dapm_routes    = ARRAY_SIZE(rt5651_dapm_routes),
2162     .use_pmdown_time    = 1,
2163     .endianness     = 1,
2164 };
2165
2166 static const struct regmap_config rt5651_regmap = {
2167     .reg_bits = 8,
2168     .val_bits = 16,
2169
2170     .max_register = RT5651_DEVICE_ID + 1 + (ARRAY_SIZE(rt5651_ranges) *
2171                            RT5651_PR_SPACING),
2172     .volatile_reg = rt5651_volatile_register,
2173     .readable_reg = rt5651_readable_register,
2174
2175     .cache_type = REGCACHE_RBTREE,
2176     .reg_defaults = rt5651_reg,
2177     .num_reg_defaults = ARRAY_SIZE(rt5651_reg),
2178     .ranges = rt5651_ranges,
2179     .num_ranges = ARRAY_SIZE(rt5651_ranges),
2180     .use_single_read = true,
2181     .use_single_write = true,
2182 };
2183
2184 #if defined(CONFIG_OF)
2185 static const struct of_device_id rt5651_of_match[] = {
2186     { .compatible = "realtek,rt5651", },
2187     {},
2188 };
2189 MODULE_DEVICE_TABLE(of, rt5651_of_match);
2190 #endif
2191
2192 #ifdef CONFIG_ACPI
2193 static const struct acpi_device_id rt5651_acpi_match[] = {
2194     { "10EC5651", 0 },
2195     { "10EC5640", 0 },
2196     { },
2197 };
2198 MODULE_DEVICE_TABLE(acpi, rt5651_acpi_match);
2199 #endif
2200
2201 static const struct i2c_device_id rt5651_i2c_id[] = {
2202     { "rt5651", 0 },
2203     { }
2204 };
2205 MODULE_DEVICE_TABLE(i2c, rt5651_i2c_id);
2206
2207 /*
2208  * Note this function MUST not look at device-properties, see the comment
2209  * above rt5651_apply_properties().
2210  */
2211 static int rt5651_i2c_probe(struct i2c_client *i2c)
2212 {
2213     struct rt5651_priv *rt5651;
2214     int ret;
2215     int err;
2216
2217     rt5651 = devm_kzalloc(&i2c->dev, sizeof(*rt5651),
2218                 GFP_KERNEL);
2219     if (NULL == rt5651)
2220         return -ENOMEM;
2221
2222     i2c_set_clientdata(i2c, rt5651);
2223
2224     rt5651->regmap = devm_regmap_init_i2c(i2c, &rt5651_regmap);
2225     if (IS_ERR(rt5651->regmap)) {
2226         ret = PTR_ERR(rt5651->regmap);
2227         dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
2228             ret);
2229         return ret;
2230     }
2231
2232     err = regmap_read(rt5651->regmap, RT5651_DEVICE_ID, &ret);
2233     if (err)
2234         return err;
2235
2236     if (ret != RT5651_DEVICE_ID_VALUE) {
2237         dev_err(&i2c->dev,
2238             "Device with ID register %#x is not rt5651\n", ret);
2239         return -ENODEV;
2240     }
2241
2242     regmap_write(rt5651->regmap, RT5651_RESET, 0);
2243
2244     ret = regmap_register_patch(rt5651->regmap, init_list,
2245                     ARRAY_SIZE(init_list));
2246     if (ret != 0)
2247         dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
2248
2249     rt5651->irq = i2c->irq;
2250     rt5651->hp_mute = true;
2251
2252     INIT_DELAYED_WORK(&rt5651->bp_work, rt5651_button_press_work);
2253     INIT_WORK(&rt5651->jack_detect_work, rt5651_jack_detect_work);
2254
2255     /* Make sure work is stopped on probe-error / remove */
2256     ret = devm_add_action_or_reset(&i2c->dev, rt5651_cancel_work, rt5651);
2257     if (ret)
2258         return ret;
2259
2260     ret = devm_request_irq(&i2c->dev, rt5651->irq, rt5651_irq,
2261                    IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING
2262                    | IRQF_ONESHOT | IRQF_NO_AUTOEN, "rt5651", rt5651);
2263     if (ret) {
2264         dev_warn(&i2c->dev, "Failed to reguest IRQ %d: %d\n",
2265              rt5651->irq, ret);
2266         rt5651->irq = -ENXIO;
2267     }
2268
2269     ret = devm_snd_soc_register_component(&i2c->dev,
2270                 &soc_component_dev_rt5651,
2271                 rt5651_dai, ARRAY_SIZE(rt5651_dai));
2272
2273     return ret;
2274 }
2275
2276 static struct i2c_driver rt5651_i2c_driver = {
2277     .driver = {
2278         .name = "rt5651",
2279         .acpi_match_table = ACPI_PTR(rt5651_acpi_match),
2280         .of_match_table = of_match_ptr(rt5651_of_match),
2281     },
2282     .probe_new = rt5651_i2c_probe,
2283     .id_table = rt5651_i2c_id,
2284 };
2285 module_i2c_driver(rt5651_i2c_driver);
2286
2287 MODULE_DESCRIPTION("ASoC RT5651 driver");
2288 MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
2289 MODULE_LICENSE("GPL v2");