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0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 #ifndef __RTCODEC5631_H__
0003 #define __RTCODEC5631_H__
0004 
0005 
0006 #define RT5631_RESET                0x00
0007 #define RT5631_SPK_OUT_VOL          0x02
0008 #define RT5631_HP_OUT_VOL           0x04
0009 #define RT5631_MONO_AXO_1_2_VOL     0x06
0010 #define RT5631_AUX_IN_VOL           0x0A
0011 #define RT5631_STEREO_DAC_VOL_1     0x0C
0012 #define RT5631_MIC_CTRL_1           0x0E
0013 #define RT5631_STEREO_DAC_VOL_2     0x10
0014 #define RT5631_ADC_CTRL_1           0x12
0015 #define RT5631_ADC_REC_MIXER            0x14
0016 #define RT5631_ADC_CTRL_2           0x16
0017 #define RT5631_VDAC_DIG_VOL         0x18
0018 #define RT5631_OUTMIXER_L_CTRL          0x1A
0019 #define RT5631_OUTMIXER_R_CTRL          0x1C
0020 #define RT5631_AXO1MIXER_CTRL           0x1E
0021 #define RT5631_AXO2MIXER_CTRL           0x20
0022 #define RT5631_MIC_CTRL_2           0x22
0023 #define RT5631_DIG_MIC_CTRL         0x24
0024 #define RT5631_MONO_INPUT_VOL           0x26
0025 #define RT5631_SPK_MIXER_CTRL           0x28
0026 #define RT5631_SPK_MONO_OUT_CTRL        0x2A
0027 #define RT5631_SPK_MONO_HP_OUT_CTRL     0x2C
0028 #define RT5631_SDP_CTRL             0x34
0029 #define RT5631_MONO_SDP_CTRL            0x36
0030 #define RT5631_STEREO_AD_DA_CLK_CTRL        0x38
0031 #define RT5631_PWR_MANAG_ADD1       0x3A
0032 #define RT5631_PWR_MANAG_ADD2       0x3B
0033 #define RT5631_PWR_MANAG_ADD3       0x3C
0034 #define RT5631_PWR_MANAG_ADD4       0x3E
0035 #define RT5631_GEN_PUR_CTRL_REG     0x40
0036 #define RT5631_GLOBAL_CLK_CTRL          0x42
0037 #define RT5631_PLL_CTRL             0x44
0038 #define RT5631_INT_ST_IRQ_CTRL_1        0x48
0039 #define RT5631_INT_ST_IRQ_CTRL_2        0x4A
0040 #define RT5631_GPIO_CTRL            0x4C
0041 #define RT5631_MISC_CTRL            0x52
0042 #define RT5631_DEPOP_FUN_CTRL_1     0x54
0043 #define RT5631_DEPOP_FUN_CTRL_2     0x56
0044 #define RT5631_JACK_DET_CTRL            0x5A
0045 #define RT5631_SOFT_VOL_CTRL            0x5C
0046 #define RT5631_ALC_CTRL_1           0x64
0047 #define RT5631_ALC_CTRL_2           0x65
0048 #define RT5631_ALC_CTRL_3           0x66
0049 #define RT5631_PSEUDO_SPATL_CTRL        0x68
0050 #define RT5631_INDEX_ADD            0x6A
0051 #define RT5631_INDEX_DATA           0x6C
0052 #define RT5631_EQ_CTRL              0x6E
0053 #define RT5631_VENDOR_ID            0x7A
0054 #define RT5631_VENDOR_ID1           0x7C
0055 #define RT5631_VENDOR_ID2           0x7E
0056 
0057 /* Index of Codec Private Register definition */
0058 #define RT5631_EQ_BW_LOP            0x00
0059 #define RT5631_EQ_GAIN_LOP          0x01
0060 #define RT5631_EQ_FC_BP1            0x02
0061 #define RT5631_EQ_BW_BP1            0x03
0062 #define RT5631_EQ_GAIN_BP1          0x04
0063 #define RT5631_EQ_FC_BP2            0x05
0064 #define RT5631_EQ_BW_BP2            0x06
0065 #define RT5631_EQ_GAIN_BP2          0x07
0066 #define RT5631_EQ_FC_BP3            0x08
0067 #define RT5631_EQ_BW_BP3            0x09
0068 #define RT5631_EQ_GAIN_BP3          0x0a
0069 #define RT5631_EQ_BW_HIP            0x0b
0070 #define RT5631_EQ_GAIN_HIP          0x0c
0071 #define RT5631_EQ_HPF_A1            0x0d
0072 #define RT5631_EQ_HPF_A2            0x0e
0073 #define RT5631_EQ_HPF_GAIN          0x0f
0074 #define RT5631_EQ_PRE_VOL_CTRL          0x11
0075 #define RT5631_EQ_POST_VOL_CTRL     0x12
0076 #define RT5631_TEST_MODE_CTRL           0x39
0077 #define RT5631_CP_INTL_REG2         0x45
0078 #define RT5631_ADDA_MIXER_INTL_REG3     0x52
0079 #define RT5631_SPK_INTL_CTRL            0x56
0080 
0081 
0082 /* global definition */
0083 #define RT5631_L_MUTE                   (0x1 << 15)
0084 #define RT5631_L_MUTE_SHIFT             15
0085 #define RT5631_L_EN                 (0x1 << 14)
0086 #define RT5631_L_EN_SHIFT               14
0087 #define RT5631_R_MUTE                   (0x1 << 7)
0088 #define RT5631_R_MUTE_SHIFT             7
0089 #define RT5631_R_EN                 (0x1 << 6)
0090 #define RT5631_R_EN_SHIFT               6
0091 #define RT5631_VOL_MASK             0x1f
0092 #define RT5631_L_VOL_SHIFT              8
0093 #define RT5631_R_VOL_SHIFT              0
0094 
0095 /* Speaker Output Control(0x02) */
0096 #define RT5631_SPK_L_VOL_SEL_MASK           (0x1 << 14)
0097 #define RT5631_SPK_L_VOL_SEL_VMID           (0x0 << 14)
0098 #define RT5631_SPK_L_VOL_SEL_SPKMIX_L           (0x1 << 14)
0099 #define RT5631_SPK_R_VOL_SEL_MASK           (0x1 << 6)
0100 #define RT5631_SPK_R_VOL_SEL_VMID           (0x0 << 6)
0101 #define RT5631_SPK_R_VOL_SEL_SPKMIX_R           (0x1 << 6)
0102 
0103 /* Headphone Output Control(0x04) */
0104 #define RT5631_HP_L_VOL_SEL_MASK            (0x1 << 14)
0105 #define RT5631_HP_L_VOL_SEL_VMID            (0x0 << 14)
0106 #define RT5631_HP_L_VOL_SEL_OUTMIX_L            (0x1 << 14)
0107 #define RT5631_HP_R_VOL_SEL_MASK            (0x1 << 6)
0108 #define RT5631_HP_R_VOL_SEL_VMID            (0x0 << 6)
0109 #define RT5631_HP_R_VOL_SEL_OUTMIX_R            (0x1 << 6)
0110 
0111 /* Output Control for AUXOUT/MONO(0x06) */
0112 #define RT5631_AUXOUT_1_VOL_SEL_MASK            (0x1 << 14)
0113 #define RT5631_AUXOUT_1_VOL_SEL_VMID            (0x0 << 14)
0114 #define RT5631_AUXOUT_1_VOL_SEL_OUTMIX_L        (0x1 << 14)
0115 #define RT5631_MUTE_MONO                (0x1 << 13)
0116 #define RT5631_MUTE_MONO_SHIFT          13
0117 #define RT5631_AUXOUT_2_VOL_SEL_MASK            (0x1 << 6)
0118 #define RT5631_AUXOUT_2_VOL_SEL_VMID            (0x0 << 6)
0119 #define RT5631_AUXOUT_2_VOL_SEL_OUTMIX_R        (0x1 << 6)
0120 
0121 /* Microphone Input Control 1(0x0E) */
0122 #define RT5631_MIC1_DIFF_INPUT_CTRL         (0x1 << 15)
0123 #define RT5631_MIC1_DIFF_INPUT_SHIFT            15
0124 #define RT5631_MIC2_DIFF_INPUT_CTRL         (0x1 << 7)
0125 #define RT5631_MIC2_DIFF_INPUT_SHIFT            7
0126 
0127 /* Stereo DAC Digital Volume2(0x10) */
0128 #define RT5631_DAC_VOL_MASK             0xff
0129 
0130 /* ADC Recording Mixer Control(0x14) */
0131 #define RT5631_M_OUTMIXER_L_TO_RECMIXER_L       (0x1 << 15)
0132 #define RT5631_M_OUTMIXL_RECMIXL_BIT            15
0133 #define RT5631_M_MIC1_TO_RECMIXER_L         (0x1 << 14)
0134 #define RT5631_M_MIC1_RECMIXL_BIT           14
0135 #define RT5631_M_AXIL_TO_RECMIXER_L         (0x1 << 13)
0136 #define RT5631_M_AXIL_RECMIXL_BIT           13
0137 #define RT5631_M_MONO_IN_TO_RECMIXER_L      (0x1 << 12)
0138 #define RT5631_M_MONO_IN_RECMIXL_BIT            12
0139 #define RT5631_M_OUTMIXER_R_TO_RECMIXER_R       (0x1 << 7)
0140 #define RT5631_M_OUTMIXR_RECMIXR_BIT            7
0141 #define RT5631_M_MIC2_TO_RECMIXER_R         (0x1 << 6)
0142 #define RT5631_M_MIC2_RECMIXR_BIT           6
0143 #define RT5631_M_AXIR_TO_RECMIXER_R         (0x1 << 5)
0144 #define RT5631_M_AXIR_RECMIXR_BIT           5
0145 #define RT5631_M_MONO_IN_TO_RECMIXER_R      (0x1 << 4)
0146 #define RT5631_M_MONO_IN_RECMIXR_BIT            4
0147 
0148 /* Left Output Mixer Control(0x1A) */
0149 #define RT5631_M_RECMIXER_L_TO_OUTMIXER_L       (0x1 << 15)
0150 #define RT5631_M_RECMIXL_OUTMIXL_BIT            15
0151 #define RT5631_M_RECMIXER_R_TO_OUTMIXER_L       (0x1 << 14)
0152 #define RT5631_M_RECMIXR_OUTMIXL_BIT            14
0153 #define RT5631_M_DAC_L_TO_OUTMIXER_L            (0x1 << 13)
0154 #define RT5631_M_DACL_OUTMIXL_BIT           13
0155 #define RT5631_M_MIC1_TO_OUTMIXER_L         (0x1 << 12)
0156 #define RT5631_M_MIC1_OUTMIXL_BIT           12
0157 #define RT5631_M_MIC2_TO_OUTMIXER_L         (0x1 << 11)
0158 #define RT5631_M_MIC2_OUTMIXL_BIT           11
0159 #define RT5631_M_MONO_IN_P_TO_OUTMIXER_L        (0x1 << 10)
0160 #define RT5631_M_MONO_INP_OUTMIXL_BIT       10
0161 #define RT5631_M_AXIL_TO_OUTMIXER_L         (0x1 << 9)
0162 #define RT5631_M_AXIL_OUTMIXL_BIT           9
0163 #define RT5631_M_AXIR_TO_OUTMIXER_L         (0x1 << 8)
0164 #define RT5631_M_AXIR_OUTMIXL_BIT           8
0165 #define RT5631_M_VDAC_TO_OUTMIXER_L         (0x1 << 7)
0166 #define RT5631_M_VDAC_OUTMIXL_BIT           7
0167 
0168 /* Right Output Mixer Control(0x1C) */
0169 #define RT5631_M_RECMIXER_L_TO_OUTMIXER_R       (0x1 << 15)
0170 #define RT5631_M_RECMIXL_OUTMIXR_BIT            15
0171 #define RT5631_M_RECMIXER_R_TO_OUTMIXER_R       (0x1 << 14)
0172 #define RT5631_M_RECMIXR_OUTMIXR_BIT            14
0173 #define RT5631_M_DAC_R_TO_OUTMIXER_R            (0x1 << 13)
0174 #define RT5631_M_DACR_OUTMIXR_BIT           13
0175 #define RT5631_M_MIC1_TO_OUTMIXER_R         (0x1 << 12)
0176 #define RT5631_M_MIC1_OUTMIXR_BIT           12
0177 #define RT5631_M_MIC2_TO_OUTMIXER_R         (0x1 << 11)
0178 #define RT5631_M_MIC2_OUTMIXR_BIT           11
0179 #define RT5631_M_MONO_IN_N_TO_OUTMIXER_R        (0x1 << 10)
0180 #define RT5631_M_MONO_INN_OUTMIXR_BIT       10
0181 #define RT5631_M_AXIL_TO_OUTMIXER_R         (0x1 << 9)
0182 #define RT5631_M_AXIL_OUTMIXR_BIT           9
0183 #define RT5631_M_AXIR_TO_OUTMIXER_R         (0x1 << 8)
0184 #define RT5631_M_AXIR_OUTMIXR_BIT           8
0185 #define RT5631_M_VDAC_TO_OUTMIXER_R         (0x1 << 7)
0186 #define RT5631_M_VDAC_OUTMIXR_BIT           7
0187 
0188 /* Lout Mixer Control(0x1E) */
0189 #define RT5631_M_MIC1_TO_AXO1MIXER          (0x1 << 15)
0190 #define RT5631_M_MIC1_AXO1MIX_BIT           15
0191 #define RT5631_M_MIC2_TO_AXO1MIXER          (0x1 << 11)
0192 #define RT5631_M_MIC2_AXO1MIX_BIT           11
0193 #define RT5631_M_OUTMIXER_L_TO_AXO1MIXER        (0x1 << 7)
0194 #define RT5631_M_OUTMIXL_AXO1MIX_BIT            7
0195 #define RT5631_M_OUTMIXER_R_TO_AXO1MIXER        (0x1 << 6)
0196 #define RT5631_M_OUTMIXR_AXO1MIX_BIT            6
0197 
0198 /* Rout Mixer Control(0x20) */
0199 #define RT5631_M_MIC1_TO_AXO2MIXER          (0x1 << 15)
0200 #define RT5631_M_MIC1_AXO2MIX_BIT           15
0201 #define RT5631_M_MIC2_TO_AXO2MIXER          (0x1 << 11)
0202 #define RT5631_M_MIC2_AXO2MIX_BIT           11
0203 #define RT5631_M_OUTMIXER_L_TO_AXO2MIXER        (0x1 << 7)
0204 #define RT5631_M_OUTMIXL_AXO2MIX_BIT            7
0205 #define RT5631_M_OUTMIXER_R_TO_AXO2MIXER        (0x1 << 6)
0206 #define RT5631_M_OUTMIXR_AXO2MIX_BIT            6
0207 
0208 /* Micphone Input Control 2(0x22) */
0209 #define RT5631_MIC_BIAS_90_PRECNET_AVDD 1
0210 #define RT5631_MIC_BIAS_75_PRECNET_AVDD 2
0211 
0212 #define RT5631_MIC1_BOOST_CTRL_MASK         (0xf << 12)
0213 #define RT5631_MIC1_BOOST_CTRL_BYPASS       (0x0 << 12)
0214 #define RT5631_MIC1_BOOST_CTRL_20DB         (0x1 << 12)
0215 #define RT5631_MIC1_BOOST_CTRL_24DB         (0x2 << 12)
0216 #define RT5631_MIC1_BOOST_CTRL_30DB         (0x3 << 12)
0217 #define RT5631_MIC1_BOOST_CTRL_35DB         (0x4 << 12)
0218 #define RT5631_MIC1_BOOST_CTRL_40DB         (0x5 << 12)
0219 #define RT5631_MIC1_BOOST_CTRL_34DB         (0x6 << 12)
0220 #define RT5631_MIC1_BOOST_CTRL_50DB         (0x7 << 12)
0221 #define RT5631_MIC1_BOOST_CTRL_52DB         (0x8 << 12)
0222 #define RT5631_MIC1_BOOST_SHIFT         12
0223 
0224 #define RT5631_MIC2_BOOST_CTRL_MASK         (0xf << 8)
0225 #define RT5631_MIC2_BOOST_CTRL_BYPASS       (0x0 << 8)
0226 #define RT5631_MIC2_BOOST_CTRL_20DB         (0x1 << 8)
0227 #define RT5631_MIC2_BOOST_CTRL_24DB         (0x2 << 8)
0228 #define RT5631_MIC2_BOOST_CTRL_30DB         (0x3 << 8)
0229 #define RT5631_MIC2_BOOST_CTRL_35DB         (0x4 << 8)
0230 #define RT5631_MIC2_BOOST_CTRL_40DB         (0x5 << 8)
0231 #define RT5631_MIC2_BOOST_CTRL_34DB         (0x6 << 8)
0232 #define RT5631_MIC2_BOOST_CTRL_50DB         (0x7 << 8)
0233 #define RT5631_MIC2_BOOST_CTRL_52DB         (0x8 << 8)
0234 #define RT5631_MIC2_BOOST_SHIFT         8
0235 
0236 #define RT5631_MICBIAS1_VOLT_CTRL_MASK      (0x1 << 7)
0237 #define RT5631_MICBIAS1_VOLT_CTRL_90P           (0x0 << 7)
0238 #define RT5631_MICBIAS1_VOLT_CTRL_75P           (0x1 << 7)
0239 
0240 #define RT5631_MICBIAS1_S_C_DET_MASK            (0x1 << 6)
0241 #define RT5631_MICBIAS1_S_C_DET_DIS         (0x0 << 6)
0242 #define RT5631_MICBIAS1_S_C_DET_ENA         (0x1 << 6)
0243 
0244 #define RT5631_MICBIAS1_SHORT_CURR_DET_MASK     (0x3 << 4)
0245 #define RT5631_MICBIAS1_SHORT_CURR_DET_600UA    (0x0 << 4)
0246 #define RT5631_MICBIAS1_SHORT_CURR_DET_1500UA   (0x1 << 4)
0247 #define RT5631_MICBIAS1_SHORT_CURR_DET_2000UA   (0x2 << 4)
0248 
0249 #define RT5631_MICBIAS2_VOLT_CTRL_MASK      (0x1 << 3)
0250 #define RT5631_MICBIAS2_VOLT_CTRL_90P           (0x0 << 3)
0251 #define RT5631_MICBIAS2_VOLT_CTRL_75P           (0x1 << 3)
0252 
0253 #define RT5631_MICBIAS2_S_C_DET_MASK            (0x1 << 2)
0254 #define RT5631_MICBIAS2_S_C_DET_DIS         (0x0 << 2)
0255 #define RT5631_MICBIAS2_S_C_DET_ENA         (0x1 << 2)
0256 
0257 #define RT5631_MICBIAS2_SHORT_CURR_DET_MASK     (0x3)
0258 #define RT5631_MICBIAS2_SHORT_CURR_DET_600UA    (0x0)
0259 #define RT5631_MICBIAS2_SHORT_CURR_DET_1500UA   (0x1)
0260 #define RT5631_MICBIAS2_SHORT_CURR_DET_2000UA   (0x2)
0261 
0262 
0263 /* Digital Microphone Control(0x24) */
0264 #define RT5631_DMIC_ENA_MASK                (0x1 << 15)
0265 #define RT5631_DMIC_ENA_SHIFT               15
0266 /* DMIC_ENA: DMIC to ADC Digital filter */
0267 #define RT5631_DMIC_ENA             (0x1 << 15)
0268 /* DMIC_DIS: ADC mixer to ADC Digital filter */
0269 #define RT5631_DMIC_DIS                 (0x0 << 15)
0270 #define RT5631_DMIC_L_CH_MUTE               (0x1 << 13)
0271 #define RT5631_DMIC_L_CH_MUTE_SHIFT         13
0272 #define RT5631_DMIC_R_CH_MUTE               (0x1 << 12)
0273 #define RT5631_DMIC_R_CH_MUTE_SHIFT         12
0274 #define RT5631_DMIC_L_CH_LATCH_MASK         (0x1 << 9)
0275 #define RT5631_DMIC_L_CH_LATCH_RISING           (0x1 << 9)
0276 #define RT5631_DMIC_L_CH_LATCH_FALLING      (0x0 << 9)
0277 #define RT5631_DMIC_R_CH_LATCH_MASK         (0x1 << 8)
0278 #define RT5631_DMIC_R_CH_LATCH_RISING           (0x1 << 8)
0279 #define RT5631_DMIC_R_CH_LATCH_FALLING      (0x0 << 8)
0280 #define RT5631_DMIC_CLK_CTRL_MASK           (0x3 << 4)
0281 #define RT5631_DMIC_CLK_CTRL_TO_128FS           (0x0 << 4)
0282 #define RT5631_DMIC_CLK_CTRL_TO_64FS            (0x1 << 4)
0283 #define RT5631_DMIC_CLK_CTRL_TO_32FS            (0x2 << 4)
0284 
0285 /* Microphone Input Volume(0x26) */
0286 #define RT5631_MONO_DIFF_INPUT_SHIFT            15
0287 
0288 /* Speaker Mixer Control(0x28) */
0289 #define RT5631_M_RECMIXER_L_TO_SPKMIXER_L       (0x1 << 15)
0290 #define RT5631_M_RECMIXL_SPKMIXL_BIT            15
0291 #define RT5631_M_MIC1_P_TO_SPKMIXER_L       (0x1 << 14)
0292 #define RT5631_M_MIC1P_SPKMIXL_BIT          14
0293 #define RT5631_M_DAC_L_TO_SPKMIXER_L            (0x1 << 13)
0294 #define RT5631_M_DACL_SPKMIXL_BIT           13
0295 #define RT5631_M_OUTMIXER_L_TO_SPKMIXER_L       (0x1 << 12)
0296 #define RT5631_M_OUTMIXL_SPKMIXL_BIT            12
0297 
0298 #define RT5631_M_RECMIXER_R_TO_SPKMIXER_R       (0x1 << 7)
0299 #define RT5631_M_RECMIXR_SPKMIXR_BIT            7
0300 #define RT5631_M_MIC2_P_TO_SPKMIXER_R       (0x1 << 6)
0301 #define RT5631_M_MIC2P_SPKMIXR_BIT          6
0302 #define RT5631_M_DAC_R_TO_SPKMIXER_R            (0x1 << 5)
0303 #define RT5631_M_DACR_SPKMIXR_BIT           5
0304 #define RT5631_M_OUTMIXER_R_TO_SPKMIXER_R       (0x1 << 4)
0305 #define RT5631_M_OUTMIXR_SPKMIXR_BIT            4
0306 
0307 /* Speaker/Mono Output Control(0x2A) */
0308 #define RT5631_M_SPKVOL_L_TO_SPOL_MIXER     (0x1 << 15)
0309 #define RT5631_M_SPKVOLL_SPOLMIX_BIT            15
0310 #define RT5631_M_SPKVOL_R_TO_SPOL_MIXER     (0x1 << 14)
0311 #define RT5631_M_SPKVOLR_SPOLMIX_BIT            14
0312 #define RT5631_M_SPKVOL_L_TO_SPOR_MIXER     (0x1 << 13)
0313 #define RT5631_M_SPKVOLL_SPORMIX_BIT            13
0314 #define RT5631_M_SPKVOL_R_TO_SPOR_MIXER     (0x1 << 12)
0315 #define RT5631_M_SPKVOLR_SPORMIX_BIT            12
0316 #define RT5631_M_OUTVOL_L_TO_MONOMIXER      (0x1 << 11)
0317 #define RT5631_M_OUTVOLL_MONOMIX_BIT            11
0318 #define RT5631_M_OUTVOL_R_TO_MONOMIXER      (0x1 << 10)
0319 #define RT5631_M_OUTVOLR_MONOMIX_BIT            10
0320 
0321 /* Speaker/Mono/HP Output Control(0x2C) */
0322 #define RT5631_SPK_L_MUX_SEL_MASK           (0x3 << 14)
0323 #define RT5631_SPK_L_MUX_SEL_SPKMIXER_L     (0x0 << 14)
0324 #define RT5631_SPK_L_MUX_SEL_MONO_IN            (0x1 << 14)
0325 #define RT5631_SPK_L_MUX_SEL_DAC_L          (0x3 << 14)
0326 #define RT5631_SPK_L_MUX_SEL_SHIFT          14
0327 
0328 #define RT5631_SPK_R_MUX_SEL_MASK           (0x3 << 10)
0329 #define RT5631_SPK_R_MUX_SEL_SPKMIXER_R     (0x0 << 10)
0330 #define RT5631_SPK_R_MUX_SEL_MONO_IN            (0x1 << 10)
0331 #define RT5631_SPK_R_MUX_SEL_DAC_R          (0x3 << 10)
0332 #define RT5631_SPK_R_MUX_SEL_SHIFT          10
0333 
0334 #define RT5631_MONO_MUX_SEL_MASK            (0x3 << 6)
0335 #define RT5631_MONO_MUX_SEL_MONOMIXER       (0x0 << 6)
0336 #define RT5631_MONO_MUX_SEL_MONO_IN         (0x1 << 6)
0337 #define RT5631_MONO_MUX_SEL_SHIFT           6
0338 
0339 #define RT5631_HP_L_MUX_SEL_MASK            (0x1 << 3)
0340 #define RT5631_HP_L_MUX_SEL_HPVOL_L         (0x0 << 3)
0341 #define RT5631_HP_L_MUX_SEL_DAC_L           (0x1 << 3)
0342 #define RT5631_HP_L_MUX_SEL_SHIFT           3
0343 
0344 #define RT5631_HP_R_MUX_SEL_MASK            (0x1 << 2)
0345 #define RT5631_HP_R_MUX_SEL_HPVOL_R         (0x0 << 2)
0346 #define RT5631_HP_R_MUX_SEL_DAC_R           (0x1 << 2)
0347 #define RT5631_HP_R_MUX_SEL_SHIFT           2
0348 
0349 /* Stereo I2S Serial Data Port Control(0x34) */
0350 #define RT5631_SDP_MODE_SEL_MASK            (0x1 << 15)
0351 #define RT5631_SDP_MODE_SEL_MASTER          (0x0 << 15)
0352 #define RT5631_SDP_MODE_SEL_SLAVE           (0x1 << 15)
0353 
0354 #define RT5631_SDP_ADC_CPS_SEL_MASK         (0x3 << 10)
0355 #define RT5631_SDP_ADC_CPS_SEL_OFF          (0x0 << 10)
0356 #define RT5631_SDP_ADC_CPS_SEL_U_LAW            (0x1 << 10)
0357 #define RT5631_SDP_ADC_CPS_SEL_A_LAW            (0x2 << 10)
0358 
0359 #define RT5631_SDP_DAC_CPS_SEL_MASK         (0x3 << 8)
0360 #define RT5631_SDP_DAC_CPS_SEL_OFF          (0x0 << 8)
0361 #define RT5631_SDP_DAC_CPS_SEL_U_LAW            (0x1 << 8)
0362 #define RT5631_SDP_DAC_CPS_SEL_A_LAW            (0x2 << 8)
0363 /* 0:Normal 1:Invert */
0364 #define RT5631_SDP_I2S_BCLK_POL_CTRL            (0x1 << 7)
0365 /* 0:Normal 1:Invert */
0366 #define RT5631_SDP_DAC_R_INV                (0x1 << 6)
0367 /* 0:ADC data appear at left phase of LRCK
0368  * 1:ADC data appear at right phase of LRCK
0369  */
0370 #define RT5631_SDP_ADC_DATA_L_R_SWAP            (0x1 << 5)
0371 /* 0:DAC data appear at left phase of LRCK
0372  * 1:DAC data appear at right phase of LRCK
0373  */
0374 #define RT5631_SDP_DAC_DATA_L_R_SWAP            (0x1 << 4)
0375 
0376 /* Data Length Slection */
0377 #define RT5631_SDP_I2S_DL_MASK              (0x3 << 2)
0378 #define RT5631_SDP_I2S_DL_16                (0x0 << 2)
0379 #define RT5631_SDP_I2S_DL_20                (0x1 << 2)
0380 #define RT5631_SDP_I2S_DL_24                (0x2 << 2)
0381 #define RT5631_SDP_I2S_DL_8             (0x3 << 2)
0382 
0383 /* PCM Data Format Selection */
0384 #define RT5631_SDP_I2S_DF_MASK              (0x3)
0385 #define RT5631_SDP_I2S_DF_I2S               (0x0)
0386 #define RT5631_SDP_I2S_DF_LEFT              (0x1)
0387 #define RT5631_SDP_I2S_DF_PCM_A         (0x2)
0388 #define RT5631_SDP_I2S_DF_PCM_B         (0x3)
0389 
0390 /* Stereo AD/DA Clock Control(0x38h) */
0391 #define RT5631_I2S_PRE_DIV_MASK         (0x7 << 13)
0392 #define RT5631_I2S_PRE_DIV_1                (0x0 << 13)
0393 #define RT5631_I2S_PRE_DIV_2                (0x1 << 13)
0394 #define RT5631_I2S_PRE_DIV_4                (0x2 << 13)
0395 #define RT5631_I2S_PRE_DIV_8                (0x3 << 13)
0396 #define RT5631_I2S_PRE_DIV_16               (0x4 << 13)
0397 #define RT5631_I2S_PRE_DIV_32               (0x5 << 13)
0398 /* CLOCK RELATIVE OF BCLK AND LCRK */
0399 #define RT5631_I2S_LRCK_SEL_N_BCLK_MASK     (0x1 << 12)
0400 #define RT5631_I2S_LRCK_SEL_64_BCLK         (0x0 << 12) /* 64FS */
0401 #define RT5631_I2S_LRCK_SEL_32_BCLK         (0x1 << 12) /* 32FS */
0402 
0403 #define RT5631_DAC_OSR_SEL_MASK         (0x3 << 10)
0404 #define RT5631_DAC_OSR_SEL_128FS            (0x3 << 10)
0405 #define RT5631_DAC_OSR_SEL_64FS         (0x3 << 10)
0406 #define RT5631_DAC_OSR_SEL_32FS         (0x3 << 10)
0407 #define RT5631_DAC_OSR_SEL_16FS         (0x3 << 10)
0408 
0409 #define RT5631_ADC_OSR_SEL_MASK         (0x3 << 8)
0410 #define RT5631_ADC_OSR_SEL_128FS            (0x3 << 8)
0411 #define RT5631_ADC_OSR_SEL_64FS         (0x3 << 8)
0412 #define RT5631_ADC_OSR_SEL_32FS         (0x3 << 8)
0413 #define RT5631_ADC_OSR_SEL_16FS         (0x3 << 8)
0414 
0415 #define RT5631_ADDA_FILTER_CLK_SEL_256FS        (0 << 7) /* 256FS */
0416 #define RT5631_ADDA_FILTER_CLK_SEL_384FS        (1 << 7) /* 384FS */
0417 
0418 /* Power managment addition 1 (0x3A) */
0419 #define RT5631_PWR_MAIN_I2S_EN          (0x1 << 15)
0420 #define RT5631_PWR_MAIN_I2S_BIT         15
0421 #define RT5631_PWR_CLASS_D              (0x1 << 12)
0422 #define RT5631_PWR_CLASS_D_BIT          12
0423 #define RT5631_PWR_ADC_L_CLK                (0x1 << 11)
0424 #define RT5631_PWR_ADC_L_CLK_BIT            11
0425 #define RT5631_PWR_ADC_R_CLK                (0x1 << 10)
0426 #define RT5631_PWR_ADC_R_CLK_BIT            10
0427 #define RT5631_PWR_DAC_L_CLK                (0x1 << 9)
0428 #define RT5631_PWR_DAC_L_CLK_BIT            9
0429 #define RT5631_PWR_DAC_R_CLK                (0x1 << 8)
0430 #define RT5631_PWR_DAC_R_CLK_BIT            8
0431 #define RT5631_PWR_DAC_REF              (0x1 << 7)
0432 #define RT5631_PWR_DAC_REF_BIT          7
0433 #define RT5631_PWR_DAC_L_TO_MIXER           (0x1 << 6)
0434 #define RT5631_PWR_DAC_L_TO_MIXER_BIT       6
0435 #define RT5631_PWR_DAC_R_TO_MIXER           (0x1 << 5)
0436 #define RT5631_PWR_DAC_R_TO_MIXER_BIT       5
0437 
0438 /* Power managment addition 2 (0x3B) */
0439 #define RT5631_PWR_OUTMIXER_L               (0x1 << 15)
0440 #define RT5631_PWR_OUTMIXER_L_BIT           15
0441 #define RT5631_PWR_OUTMIXER_R               (0x1 << 14)
0442 #define RT5631_PWR_OUTMIXER_R_BIT           14
0443 #define RT5631_PWR_SPKMIXER_L               (0x1 << 13)
0444 #define RT5631_PWR_SPKMIXER_L_BIT           13
0445 #define RT5631_PWR_SPKMIXER_R               (0x1 << 12)
0446 #define RT5631_PWR_SPKMIXER_R_BIT           12
0447 #define RT5631_PWR_RECMIXER_L               (0x1 << 11)
0448 #define RT5631_PWR_RECMIXER_L_BIT           11
0449 #define RT5631_PWR_RECMIXER_R               (0x1 << 10)
0450 #define RT5631_PWR_RECMIXER_R_BIT           10
0451 #define RT5631_PWR_MIC1_BOOT_GAIN           (0x1 << 5)
0452 #define RT5631_PWR_MIC1_BOOT_GAIN_BIT       5
0453 #define RT5631_PWR_MIC2_BOOT_GAIN           (0x1 << 4)
0454 #define RT5631_PWR_MIC2_BOOT_GAIN_BIT       4
0455 #define RT5631_PWR_MICBIAS1_VOL         (0x1 << 3)
0456 #define RT5631_PWR_MICBIAS1_VOL_BIT         3
0457 #define RT5631_PWR_MICBIAS2_VOL         (0x1 << 2)
0458 #define RT5631_PWR_MICBIAS2_VOL_BIT         2
0459 #define RT5631_PWR_PLL1             (0x1 << 1)
0460 #define RT5631_PWR_PLL1_BIT             1
0461 #define RT5631_PWR_PLL2             (0x1 << 0)
0462 #define RT5631_PWR_PLL2_BIT             0
0463 
0464 /* Power managment addition 3(0x3C) */
0465 #define RT5631_PWR_VREF             (0x1 << 15)
0466 #define RT5631_PWR_VREF_BIT             15
0467 #define RT5631_PWR_FAST_VREF_CTRL           (0x1 << 14)
0468 #define RT5631_PWR_FAST_VREF_CTRL_BIT           14
0469 #define RT5631_PWR_MAIN_BIAS                (0x1 << 13)
0470 #define RT5631_PWR_MAIN_BIAS_BIT            13
0471 #define RT5631_PWR_AXO1MIXER                (0x1 << 11)
0472 #define RT5631_PWR_AXO1MIXER_BIT            11
0473 #define RT5631_PWR_AXO2MIXER                (0x1 << 10)
0474 #define RT5631_PWR_AXO2MIXER_BIT            10
0475 #define RT5631_PWR_MONOMIXER                (0x1 << 9)
0476 #define RT5631_PWR_MONOMIXER_BIT            9
0477 #define RT5631_PWR_MONO_DEPOP_DIS           (0x1 << 8)
0478 #define RT5631_PWR_MONO_DEPOP_DIS_BIT       8
0479 #define RT5631_PWR_MONO_AMP_EN          (0x1 << 7)
0480 #define RT5631_PWR_MONO_AMP_EN_BIT          7
0481 #define RT5631_PWR_CHARGE_PUMP          (0x1 << 4)
0482 #define RT5631_PWR_CHARGE_PUMP_BIT          4
0483 #define RT5631_PWR_HP_L_AMP             (0x1 << 3)
0484 #define RT5631_PWR_HP_L_AMP_BIT         3
0485 #define RT5631_PWR_HP_R_AMP             (0x1 << 2)
0486 #define RT5631_PWR_HP_R_AMP_BIT         2
0487 #define RT5631_PWR_HP_DEPOP_DIS         (0x1 << 1)
0488 #define RT5631_PWR_HP_DEPOP_DIS_BIT         1
0489 #define RT5631_PWR_HP_AMP_DRIVING           (0x1 << 0)
0490 #define RT5631_PWR_HP_AMP_DRIVING_BIT       0
0491 
0492 /* Power managment addition 4(0x3E) */
0493 #define RT5631_PWR_SPK_L_VOL                (0x1 << 15)
0494 #define RT5631_PWR_SPK_L_VOL_BIT            15
0495 #define RT5631_PWR_SPK_R_VOL                (0x1 << 14)
0496 #define RT5631_PWR_SPK_R_VOL_BIT            14
0497 #define RT5631_PWR_LOUT_VOL             (0x1 << 13)
0498 #define RT5631_PWR_LOUT_VOL_BIT         13
0499 #define RT5631_PWR_ROUT_VOL             (0x1 << 12)
0500 #define RT5631_PWR_ROUT_VOL_BIT         12
0501 #define RT5631_PWR_HP_L_OUT_VOL         (0x1 << 11)
0502 #define RT5631_PWR_HP_L_OUT_VOL_BIT         11
0503 #define RT5631_PWR_HP_R_OUT_VOL         (0x1 << 10)
0504 #define RT5631_PWR_HP_R_OUT_VOL_BIT         10
0505 #define RT5631_PWR_AXIL_IN_VOL              (0x1 << 9)
0506 #define RT5631_PWR_AXIL_IN_VOL_BIT          9
0507 #define RT5631_PWR_AXIR_IN_VOL          (0x1 << 8)
0508 #define RT5631_PWR_AXIR_IN_VOL_BIT          8
0509 #define RT5631_PWR_MONO_IN_P_VOL            (0x1 << 7)
0510 #define RT5631_PWR_MONO_IN_P_VOL_BIT            7
0511 #define RT5631_PWR_MONO_IN_N_VOL            (0x1 << 6)
0512 #define RT5631_PWR_MONO_IN_N_VOL_BIT            6
0513 
0514 /* General Purpose Control Register(0x40) */
0515 #define RT5631_SPK_AMP_AUTO_RATIO_EN            (0x1 << 15)
0516 
0517 #define RT5631_SPK_AMP_RATIO_CTRL_MASK      (0x7 << 12)
0518 #define RT5631_SPK_AMP_RATIO_CTRL_2_34      (0x0 << 12) /* 7.40DB */
0519 #define RT5631_SPK_AMP_RATIO_CTRL_1_99      (0x1 << 12) /* 5.99DB */
0520 #define RT5631_SPK_AMP_RATIO_CTRL_1_68      (0x2 << 12) /* 4.50DB */
0521 #define RT5631_SPK_AMP_RATIO_CTRL_1_56      (0x3 << 12) /* 3.86DB */
0522 #define RT5631_SPK_AMP_RATIO_CTRL_1_44      (0x4 << 12) /* 3.16DB */
0523 #define RT5631_SPK_AMP_RATIO_CTRL_1_27      (0x5 << 12) /* 2.10DB */
0524 #define RT5631_SPK_AMP_RATIO_CTRL_1_09      (0x6 << 12) /* 0.80DB */
0525 #define RT5631_SPK_AMP_RATIO_CTRL_1_00      (0x7 << 12) /* 0.00DB */
0526 #define RT5631_SPK_AMP_RATIO_CTRL_SHIFT     12
0527 
0528 #define RT5631_STEREO_DAC_HI_PASS_FILT_EN       (0x1 << 11)
0529 #define RT5631_STEREO_ADC_HI_PASS_FILT_EN       (0x1 << 10)
0530 /* Select ADC Wind Filter Clock type */
0531 #define RT5631_ADC_WIND_FILT_MASK           (0x3 << 4)
0532 #define RT5631_ADC_WIND_FILT_8_16_32K           (0x0 << 4) /*8/16/32k*/
0533 #define RT5631_ADC_WIND_FILT_11_22_44K      (0x1 << 4) /*11/22/44k*/
0534 #define RT5631_ADC_WIND_FILT_12_24_48K      (0x2 << 4) /*12/24/48k*/
0535 #define RT5631_ADC_WIND_FILT_EN         (0x1 << 3)
0536 /* SelectADC Wind Filter Corner Frequency */
0537 #define RT5631_ADC_WIND_CNR_FREQ_MASK   (0x7 << 0)
0538 #define RT5631_ADC_WIND_CNR_FREQ_82_113_122 (0x0 << 0) /* 82/113/122 Hz */
0539 #define RT5631_ADC_WIND_CNR_FREQ_102_141_153 (0x1 << 0) /* 102/141/153 Hz */
0540 #define RT5631_ADC_WIND_CNR_FREQ_131_180_156 (0x2 << 0) /* 131/180/156 Hz */
0541 #define RT5631_ADC_WIND_CNR_FREQ_163_225_245 (0x3 << 0) /* 163/225/245 Hz */
0542 #define RT5631_ADC_WIND_CNR_FREQ_204_281_306 (0x4 << 0) /* 204/281/306 Hz */
0543 #define RT5631_ADC_WIND_CNR_FREQ_261_360_392 (0x5 << 0) /* 261/360/392 Hz */
0544 #define RT5631_ADC_WIND_CNR_FREQ_327_450_490 (0x6 << 0) /* 327/450/490 Hz */
0545 #define RT5631_ADC_WIND_CNR_FREQ_408_563_612 (0x7 << 0) /* 408/563/612 Hz */
0546 
0547 /* Global Clock Control Register(0x42) */
0548 #define RT5631_SYSCLK_SOUR_SEL_MASK         (0x3 << 14)
0549 #define RT5631_SYSCLK_SOUR_SEL_MCLK         (0x0 << 14)
0550 #define RT5631_SYSCLK_SOUR_SEL_PLL          (0x1 << 14)
0551 #define RT5631_SYSCLK_SOUR_SEL_PLL_TCK      (0x2 << 14)
0552 
0553 #define RT5631_PLLCLK_SOUR_SEL_MASK         (0x3 << 12)
0554 #define RT5631_PLLCLK_SOUR_SEL_MCLK         (0x0 << 12)
0555 #define RT5631_PLLCLK_SOUR_SEL_BCLK         (0x1 << 12)
0556 #define RT5631_PLLCLK_SOUR_SEL_VBCLK            (0x2 << 12)
0557 
0558 #define RT5631_PLLCLK_PRE_DIV1              (0x0 << 11)
0559 #define RT5631_PLLCLK_PRE_DIV2              (0x1 << 11)
0560 
0561 /* PLL Control(0x44) */
0562 #define RT5631_PLL_CTRL_M_VAL(m)            ((m)&0xf)
0563 #define RT5631_PLL_CTRL_K_VAL(k)            (((k)&0x7) << 4)
0564 #define RT5631_PLL_CTRL_N_VAL(n)            (((n)&0xff) << 8)
0565 
0566 /* Internal Status and IRQ Control2(0x4A) */
0567 #define RT5631_ADC_DATA_SEL_MASK            (0x3 << 14)
0568 #define RT5631_ADC_DATA_SEL_Disable         (0x0 << 14)
0569 #define RT5631_ADC_DATA_SEL_MIC1            (0x1 << 14)
0570 #define RT5631_ADC_DATA_SEL_MIC1_SHIFT      14
0571 #define RT5631_ADC_DATA_SEL_MIC2            (0x2 << 14)
0572 #define RT5631_ADC_DATA_SEL_MIC2_SHIFT      15
0573 #define RT5631_ADC_DATA_SEL_STO         (0x3 << 14)
0574 #define RT5631_ADC_DATA_SEL_SHIFT           14
0575 
0576 /* GPIO Pin Configuration(0x4C) */
0577 #define RT5631_GPIO_PIN_FUN_SEL_MASK            (0x1 << 15)
0578 #define RT5631_GPIO_PIN_FUN_SEL_IRQ         (0x1 << 15)
0579 #define RT5631_GPIO_PIN_FUN_SEL_GPIO_DIMC       (0x0 << 15)
0580 
0581 #define RT5631_GPIO_DMIC_FUN_SEL_MASK       (0x1 << 3)
0582 #define RT5631_GPIO_DMIC_FUN_SEL_DIMC       (0x1 << 3)
0583 #define RT5631_GPIO_DMIC_FUN_SEL_GPIO           (0x0 << 3)
0584 
0585 #define RT5631_GPIO_PIN_CON_MASK            (0x1 << 2)
0586 #define RT5631_GPIO_PIN_SET_INPUT           (0x0 << 2)
0587 #define RT5631_GPIO_PIN_SET_OUTPUT          (0x1 << 2)
0588 
0589 /* De-POP function Control 1(0x54) */
0590 #define RT5631_POW_ON_SOFT_GEN          (0x1 << 15)
0591 #define RT5631_EN_MUTE_UNMUTE_DEPOP         (0x1 << 14)
0592 #define RT5631_EN_DEPOP2_FOR_HP         (0x1 << 7)
0593 /* Power Down HPAMP_L Starts Up Signal */
0594 #define RT5631_PD_HPAMP_L_ST_UP         (0x1 << 5)
0595 /* Power Down HPAMP_R Starts Up Signal */
0596 #define RT5631_PD_HPAMP_R_ST_UP         (0x1 << 4)
0597 /* Enable left HP mute/unmute depop */
0598 #define RT5631_EN_HP_L_M_UN_MUTE_DEPOP      (0x1 << 1)
0599 /* Enable right HP mute/unmute depop */
0600 #define RT5631_EN_HP_R_M_UN_MUTE_DEPOP      (0x1 << 0)
0601 
0602 /* De-POP Fnction Control(0x56) */
0603 #define RT5631_EN_ONE_BIT_DEPOP         (0x1 << 15)
0604 #define RT5631_EN_CAP_FREE_DEPOP            (0x1 << 14)
0605 
0606 /* Jack Detect Control Register(0x5A) */
0607 #define RT5631_JD_USE_MASK              (0x3 << 14)
0608 #define RT5631_JD_USE_JD2               (0x3 << 14)
0609 #define RT5631_JD_USE_JD1               (0x2 << 14)
0610 #define RT5631_JD_USE_GPIO              (0x1 << 14)
0611 #define RT5631_JD_OFF                   (0x0 << 14)
0612 /* JD trigger enable for HP */
0613 #define RT5631_JD_HP_EN                 (0x1 << 11)
0614 #define RT5631_JD_HP_TRI_MASK               (0x1 << 10)
0615 #define RT5631_JD_HP_TRI_HI             (0x1 << 10)
0616 #define RT5631_JD_HP_TRI_LO             (0x1 << 10)
0617 /* JD trigger enable for speaker LP/LN */
0618 #define RT5631_JD_SPK_L_EN              (0x1 << 9)
0619 #define RT5631_JD_SPK_L_TRI_MASK            (0x1 << 8)
0620 #define RT5631_JD_SPK_L_TRI_HI              (0x1 << 8)
0621 #define RT5631_JD_SPK_L_TRI_LO              (0x0 << 8)
0622 /* JD trigger enable for speaker RP/RN */
0623 #define RT5631_JD_SPK_R_EN              (0x1 << 7)
0624 #define RT5631_JD_SPK_R_TRI_MASK            (0x1 << 6)
0625 #define RT5631_JD_SPK_R_TRI_HI              (0x1 << 6)
0626 #define RT5631_JD_SPK_R_TRI_LO              (0x0 << 6)
0627 /* JD trigger enable for monoout */
0628 #define RT5631_JD_MONO_EN               (0x1 << 5)
0629 #define RT5631_JD_MONO_TRI_MASK         (0x1 << 4)
0630 #define RT5631_JD_MONO_TRI_HI               (0x1 << 4)
0631 #define RT5631_JD_MONO_TRI_LO               (0x0 << 4)
0632 /* JD trigger enable for Lout */
0633 #define RT5631_JD_AUX_1_EN              (0x1 << 3)
0634 #define RT5631_JD_AUX_1_MASK                (0x1 << 2)
0635 #define RT5631_JD_AUX_1_TRI_HI              (0x1 << 2)
0636 #define RT5631_JD_AUX_1_TRI_LO              (0x0 << 2)
0637 /* JD trigger enable for Rout */
0638 #define RT5631_JD_AUX_2_EN              (0x1 << 1)
0639 #define RT5631_JD_AUX_2_MASK                (0x1 << 0)
0640 #define RT5631_JD_AUX_2_TRI_HI              (0x1 << 0)
0641 #define RT5631_JD_AUX_2_TRI_LO              (0x0 << 0)
0642 
0643 /* ALC CONTROL 1(0x64) */
0644 #define RT5631_ALC_ATTACK_RATE_MASK         (0x1F << 8)
0645 #define RT5631_ALC_RECOVERY_RATE_MASK       (0x1F << 0)
0646 
0647 /* ALC CONTROL 2(0x65) */
0648 /* select Compensation gain for Noise gate function */
0649 #define RT5631_ALC_COM_NOISE_GATE_MASK      (0xF << 0)
0650 
0651 /* ALC CONTROL 3(0x66) */
0652 #define RT5631_ALC_FUN_MASK             (0x3 << 14)
0653 #define RT5631_ALC_FUN_DIS              (0x0 << 14)
0654 #define RT5631_ALC_ENA_DAC_PATH         (0x1 << 14)
0655 #define RT5631_ALC_ENA_ADC_PATH         (0x3 << 14)
0656 #define RT5631_ALC_PARA_UPDATE          (0x1 << 13)
0657 #define RT5631_ALC_LIMIT_LEVEL_MASK         (0x1F << 8)
0658 #define RT5631_ALC_NOISE_GATE_FUN_MASK      (0x1 << 7)
0659 #define RT5631_ALC_NOISE_GATE_FUN_DIS           (0x0 << 7)
0660 #define RT5631_ALC_NOISE_GATE_FUN_ENA       (0x1 << 7)
0661 /* ALC noise gate hold data function */
0662 #define RT5631_ALC_NOISE_GATE_H_D_MASK      (0x1 << 6)
0663 #define RT5631_ALC_NOISE_GATE_H_D_DIS           (0x0 << 6)
0664 #define RT5631_ALC_NOISE_GATE_H_D_ENA       (0x1 << 6)
0665 
0666 /* Psedueo Stereo & Spatial Effect Block Control(0x68) */
0667 #define RT5631_SPATIAL_CTRL_EN              (0x1 << 15)
0668 #define RT5631_ALL_PASS_FILTER_EN           (0x1 << 14)
0669 #define RT5631_PSEUDO_STEREO_EN         (0x1 << 13)
0670 #define RT5631_STEREO_EXPENSION_EN          (0x1 << 12)
0671 /* 3D gain parameter */
0672 #define RT5631_GAIN_3D_PARA_MASK        (0x3 << 6)
0673 #define RT5631_GAIN_3D_PARA_1_00        (0x0 << 6) /* 3D gain 1.0 */
0674 #define RT5631_GAIN_3D_PARA_1_50        (0x1 << 6) /* 3D gain 1.5 */
0675 #define RT5631_GAIN_3D_PARA_2_00        (0x2 << 6) /* 3D gain 2.0 */
0676 /* 3D ratio parameter */
0677 #define RT5631_RATIO_3D_MASK            (0x3 << 4)
0678 #define RT5631_RATIO_3D_0_0         (0x0 << 4) /* 3D ratio 0.0 */
0679 #define RT5631_RATIO_3D_0_66            (0x1 << 4) /* 3D ratio 0.66 */
0680 #define RT5631_RATIO_3D_1_0         (0x2 << 4) /* 3D ratio 1.0 */
0681 /* select samplerate for all pass filter */
0682 #define RT5631_APF_FUN_SLE_MASK         (0x3 << 0)
0683 #define RT5631_APF_FUN_SEL_48K              (0x3 << 0)
0684 #define RT5631_APF_FUN_SEL_44_1K            (0x2 << 0)
0685 #define RT5631_APF_FUN_SEL_32K              (0x1 << 0)
0686 #define RT5631_APF_FUN_DIS              (0x0 << 0)
0687 
0688 /* EQ CONTROL 1(0x6E) */
0689 #define RT5631_HW_EQ_PATH_SEL_MASK          (0x1 << 15)
0690 #define RT5631_HW_EQ_PATH_SEL_DAC           (0x0 << 15)
0691 #define RT5631_HW_EQ_PATH_SEL_ADC           (0x1 << 15)
0692 #define RT5631_HW_EQ_UPDATE_CTRL            (0x1 << 14)
0693 
0694 #define RT5631_EN_HW_EQ_HPF2                (0x1 << 5)
0695 #define RT5631_EN_HW_EQ_HPF1                (0x1 << 4)
0696 #define RT5631_EN_HW_EQ_BP3             (0x1 << 3)
0697 #define RT5631_EN_HW_EQ_BP2             (0x1 << 2)
0698 #define RT5631_EN_HW_EQ_BP1             (0x1 << 1)
0699 #define RT5631_EN_HW_EQ_LPF             (0x1 << 0)
0700 
0701 
0702 #endif /* __RTCODEC5631_H__ */