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0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * rt5616.h  --  RT5616 ALSA SoC audio driver
0004  *
0005  * Copyright 2011 Realtek Microelectronics
0006  * Author: Johnny Hsu <johnnyhsu@realtek.com>
0007  */
0008 
0009 #ifndef __RT5616_H__
0010 #define __RT5616_H__
0011 
0012 /* Info */
0013 #define RT5616_RESET                0x00
0014 #define RT5616_VERSION_ID           0xfd
0015 #define RT5616_VENDOR_ID            0xfe
0016 #define RT5616_DEVICE_ID            0xff
0017 /*  I/O - Output */
0018 #define RT5616_HP_VOL               0x02
0019 #define RT5616_LOUT_CTRL1           0x03
0020 #define RT5616_LOUT_CTRL2           0x05
0021 /* I/O - Input */
0022 #define RT5616_IN1_IN2              0x0d
0023 #define RT5616_INL1_INR1_VOL            0x0f
0024 /* I/O - ADC/DAC/DMIC */
0025 #define RT5616_DAC1_DIG_VOL         0x19
0026 #define RT5616_ADC_DIG_VOL          0x1c
0027 #define RT5616_ADC_BST_VOL          0x1e
0028 /* Mixer - D-D */
0029 #define RT5616_STO1_ADC_MIXER           0x27
0030 #define RT5616_AD_DA_MIXER          0x29
0031 #define RT5616_STO_DAC_MIXER            0x2a
0032 
0033 /* Mixer - ADC */
0034 #define RT5616_REC_L1_MIXER         0x3b
0035 #define RT5616_REC_L2_MIXER         0x3c
0036 #define RT5616_REC_R1_MIXER         0x3d
0037 #define RT5616_REC_R2_MIXER         0x3e
0038 /* Mixer - DAC */
0039 #define RT5616_HPO_MIXER            0x45
0040 #define RT5616_OUT_L1_MIXER         0x4d
0041 #define RT5616_OUT_L2_MIXER         0x4e
0042 #define RT5616_OUT_L3_MIXER         0x4f
0043 #define RT5616_OUT_R1_MIXER         0x50
0044 #define RT5616_OUT_R2_MIXER         0x51
0045 #define RT5616_OUT_R3_MIXER         0x52
0046 #define RT5616_LOUT_MIXER           0x53
0047 /* Power */
0048 #define RT5616_PWR_DIG1             0x61
0049 #define RT5616_PWR_DIG2             0x62
0050 #define RT5616_PWR_ANLG1            0x63
0051 #define RT5616_PWR_ANLG2            0x64
0052 #define RT5616_PWR_MIXER            0x65
0053 #define RT5616_PWR_VOL              0x66
0054 /* Private Register Control */
0055 #define RT5616_PRIV_INDEX           0x6a
0056 #define RT5616_PRIV_DATA            0x6c
0057 /* Format - ADC/DAC */
0058 #define RT5616_I2S1_SDP             0x70
0059 #define RT5616_ADDA_CLK1            0x73
0060 #define RT5616_ADDA_CLK2            0x74
0061 
0062 /* Function - Analog */
0063 #define RT5616_GLB_CLK              0x80
0064 #define RT5616_PLL_CTRL1            0x81
0065 #define RT5616_PLL_CTRL2            0x82
0066 #define RT5616_HP_OVCD              0x8b
0067 #define RT5616_DEPOP_M1             0x8e
0068 #define RT5616_DEPOP_M2             0x8f
0069 #define RT5616_DEPOP_M3             0x90
0070 #define RT5616_CHARGE_PUMP          0x91
0071 #define RT5616_PV_DET_SPK_G         0x92
0072 #define RT5616_MICBIAS              0x93
0073 #define RT5616_A_JD_CTL1            0x94
0074 #define RT5616_A_JD_CTL2            0x95
0075 /* Function - Digital */
0076 #define RT5616_EQ_CTRL1             0xb0
0077 #define RT5616_EQ_CTRL2             0xb1
0078 #define RT5616_WIND_FILTER          0xb2
0079 #define RT5616_DRC_AGC_1            0xb4
0080 #define RT5616_DRC_AGC_2            0xb5
0081 #define RT5616_DRC_AGC_3            0xb6
0082 #define RT5616_SVOL_ZC              0xb7
0083 #define RT5616_JD_CTRL1             0xbb
0084 #define RT5616_JD_CTRL2             0xbc
0085 #define RT5616_IRQ_CTRL1            0xbd
0086 #define RT5616_IRQ_CTRL2            0xbe
0087 #define RT5616_INT_IRQ_ST           0xbf
0088 #define RT5616_GPIO_CTRL1           0xc0
0089 #define RT5616_GPIO_CTRL2           0xc1
0090 #define RT5616_GPIO_CTRL3           0xc2
0091 #define RT5616_PGM_REG_ARR1         0xc8
0092 #define RT5616_PGM_REG_ARR2         0xc9
0093 #define RT5616_PGM_REG_ARR3         0xca
0094 #define RT5616_PGM_REG_ARR4         0xcb
0095 #define RT5616_PGM_REG_ARR5         0xcc
0096 #define RT5616_SCB_FUNC             0xcd
0097 #define RT5616_SCB_CTRL             0xce
0098 #define RT5616_BASE_BACK            0xcf
0099 #define RT5616_MP3_PLUS1            0xd0
0100 #define RT5616_MP3_PLUS2            0xd1
0101 #define RT5616_ADJ_HPF_CTRL1            0xd3
0102 #define RT5616_ADJ_HPF_CTRL2            0xd4
0103 #define RT5616_HP_CALIB_AMP_DET         0xd6
0104 #define RT5616_HP_CALIB2            0xd7
0105 #define RT5616_SV_ZCD1              0xd9
0106 #define RT5616_SV_ZCD2              0xda
0107 #define RT5616_D_MISC               0xfa
0108 /* Dummy Register */
0109 #define RT5616_DUMMY2               0xfb
0110 #define RT5616_DUMMY3               0xfc
0111 
0112 
0113 /* Index of Codec Private Register definition */
0114 #define RT5616_BIAS_CUR1            0x12
0115 #define RT5616_BIAS_CUR3            0x14
0116 #define RT5616_CLSD_INT_REG1            0x1c
0117 #define RT5616_MAMP_INT_REG2            0x37
0118 #define RT5616_CHOP_DAC_ADC         0x3d
0119 #define RT5616_3D_SPK               0x63
0120 #define RT5616_WND_1                0x6c
0121 #define RT5616_WND_2                0x6d
0122 #define RT5616_WND_3                0x6e
0123 #define RT5616_WND_4                0x6f
0124 #define RT5616_WND_5                0x70
0125 #define RT5616_WND_8                0x73
0126 #define RT5616_DIP_SPK_INF          0x75
0127 #define RT5616_HP_DCC_INT1          0x77
0128 #define RT5616_EQ_BW_LOP            0xa0
0129 #define RT5616_EQ_GN_LOP            0xa1
0130 #define RT5616_EQ_FC_BP1            0xa2
0131 #define RT5616_EQ_BW_BP1            0xa3
0132 #define RT5616_EQ_GN_BP1            0xa4
0133 #define RT5616_EQ_FC_BP2            0xa5
0134 #define RT5616_EQ_BW_BP2            0xa6
0135 #define RT5616_EQ_GN_BP2            0xa7
0136 #define RT5616_EQ_FC_BP3            0xa8
0137 #define RT5616_EQ_BW_BP3            0xa9
0138 #define RT5616_EQ_GN_BP3            0xaa
0139 #define RT5616_EQ_FC_BP4            0xab
0140 #define RT5616_EQ_BW_BP4            0xac
0141 #define RT5616_EQ_GN_BP4            0xad
0142 #define RT5616_EQ_FC_HIP1           0xae
0143 #define RT5616_EQ_GN_HIP1           0xaf
0144 #define RT5616_EQ_FC_HIP2           0xb0
0145 #define RT5616_EQ_BW_HIP2           0xb1
0146 #define RT5616_EQ_GN_HIP2           0xb2
0147 #define RT5616_EQ_PRE_VOL           0xb3
0148 #define RT5616_EQ_PST_VOL           0xb4
0149 
0150 
0151 /* global definition */
0152 #define RT5616_L_MUTE               (0x1 << 15)
0153 #define RT5616_L_MUTE_SFT           15
0154 #define RT5616_VOL_L_MUTE           (0x1 << 14)
0155 #define RT5616_VOL_L_SFT            14
0156 #define RT5616_R_MUTE               (0x1 << 7)
0157 #define RT5616_R_MUTE_SFT           7
0158 #define RT5616_VOL_R_MUTE           (0x1 << 6)
0159 #define RT5616_VOL_R_SFT            6
0160 #define RT5616_L_VOL_MASK           (0x3f << 8)
0161 #define RT5616_L_VOL_SFT            8
0162 #define RT5616_R_VOL_MASK           (0x3f)
0163 #define RT5616_R_VOL_SFT            0
0164 
0165 /* LOUT Control 2(0x05) */
0166 #define RT5616_EN_DFO               (0x1 << 15)
0167 
0168 /* IN1 and IN2 Control (0x0d) */
0169 /* IN3 and IN4 Control (0x0e) */
0170 #define RT5616_BST_MASK1            (0xf<<12)
0171 #define RT5616_BST_SFT1             12
0172 #define RT5616_BST_MASK2            (0xf<<8)
0173 #define RT5616_BST_SFT2             8
0174 #define RT5616_IN_DF1               (0x1 << 7)
0175 #define RT5616_IN_SFT1              7
0176 #define RT5616_IN_DF2               (0x1 << 6)
0177 #define RT5616_IN_SFT2              6
0178 
0179 /* INL1 and INR1 Volume Control (0x0f) */
0180 #define RT5616_INL_VOL_MASK         (0x1f << 8)
0181 #define RT5616_INL_VOL_SFT          8
0182 #define RT5616_INR_SEL_MASK         (0x1 << 7)
0183 #define RT5616_INR_SEL_SFT          7
0184 #define RT5616_INR_SEL_IN4N         (0x0 << 7)
0185 #define RT5616_INR_SEL_MONON            (0x1 << 7)
0186 #define RT5616_INR_VOL_MASK         (0x1f)
0187 #define RT5616_INR_VOL_SFT          0
0188 
0189 /* DAC1 Digital Volume (0x19) */
0190 #define RT5616_DAC_L1_VOL_MASK          (0xff << 8)
0191 #define RT5616_DAC_L1_VOL_SFT           8
0192 #define RT5616_DAC_R1_VOL_MASK          (0xff)
0193 #define RT5616_DAC_R1_VOL_SFT           0
0194 
0195 /* DAC2 Digital Volume (0x1a) */
0196 #define RT5616_DAC_L2_VOL_MASK          (0xff << 8)
0197 #define RT5616_DAC_L2_VOL_SFT           8
0198 #define RT5616_DAC_R2_VOL_MASK          (0xff)
0199 #define RT5616_DAC_R2_VOL_SFT           0
0200 
0201 /* ADC Digital Volume Control (0x1c) */
0202 #define RT5616_ADC_L_VOL_MASK           (0x7f << 8)
0203 #define RT5616_ADC_L_VOL_SFT            8
0204 #define RT5616_ADC_R_VOL_MASK           (0x7f)
0205 #define RT5616_ADC_R_VOL_SFT            0
0206 
0207 /* Mono ADC Digital Volume Control (0x1d) */
0208 #define RT5616_M_MONO_ADC_L         (0x1 << 15)
0209 #define RT5616_M_MONO_ADC_L_SFT         15
0210 #define RT5616_MONO_ADC_L_VOL_MASK      (0x7f << 8)
0211 #define RT5616_MONO_ADC_L_VOL_SFT       8
0212 #define RT5616_M_MONO_ADC_R         (0x1 << 7)
0213 #define RT5616_M_MONO_ADC_R_SFT         7
0214 #define RT5616_MONO_ADC_R_VOL_MASK      (0x7f)
0215 #define RT5616_MONO_ADC_R_VOL_SFT       0
0216 
0217 /* ADC Boost Volume Control (0x1e) */
0218 #define RT5616_ADC_L_BST_MASK           (0x3 << 14)
0219 #define RT5616_ADC_L_BST_SFT            14
0220 #define RT5616_ADC_R_BST_MASK           (0x3 << 12)
0221 #define RT5616_ADC_R_BST_SFT            12
0222 #define RT5616_ADC_COMP_MASK            (0x3 << 10)
0223 #define RT5616_ADC_COMP_SFT         10
0224 
0225 /* Stereo ADC1 Mixer Control (0x27) */
0226 #define RT5616_M_STO1_ADC_L1            (0x1 << 14)
0227 #define RT5616_M_STO1_ADC_L1_SFT        14
0228 #define RT5616_M_STO1_ADC_R1            (0x1 << 6)
0229 #define RT5616_M_STO1_ADC_R1_SFT        6
0230 
0231 /* ADC Mixer to DAC Mixer Control (0x29) */
0232 #define RT5616_M_ADCMIX_L           (0x1 << 15)
0233 #define RT5616_M_ADCMIX_L_SFT           15
0234 #define RT5616_M_IF1_DAC_L          (0x1 << 14)
0235 #define RT5616_M_IF1_DAC_L_SFT          14
0236 #define RT5616_M_ADCMIX_R           (0x1 << 7)
0237 #define RT5616_M_ADCMIX_R_SFT           7
0238 #define RT5616_M_IF1_DAC_R          (0x1 << 6)
0239 #define RT5616_M_IF1_DAC_R_SFT          6
0240 
0241 /* Stereo DAC Mixer Control (0x2a) */
0242 #define RT5616_M_DAC_L1_MIXL            (0x1 << 14)
0243 #define RT5616_M_DAC_L1_MIXL_SFT        14
0244 #define RT5616_DAC_L1_STO_L_VOL_MASK        (0x1 << 13)
0245 #define RT5616_DAC_L1_STO_L_VOL_SFT     13
0246 #define RT5616_M_DAC_R1_MIXL            (0x1 << 9)
0247 #define RT5616_M_DAC_R1_MIXL_SFT        9
0248 #define RT5616_DAC_R1_STO_L_VOL_MASK        (0x1 << 8)
0249 #define RT5616_DAC_R1_STO_L_VOL_SFT     8
0250 #define RT5616_M_DAC_R1_MIXR            (0x1 << 6)
0251 #define RT5616_M_DAC_R1_MIXR_SFT        6
0252 #define RT5616_DAC_R1_STO_R_VOL_MASK        (0x1 << 5)
0253 #define RT5616_DAC_R1_STO_R_VOL_SFT     5
0254 #define RT5616_M_DAC_L1_MIXR            (0x1 << 1)
0255 #define RT5616_M_DAC_L1_MIXR_SFT        1
0256 #define RT5616_DAC_L1_STO_R_VOL_MASK        (0x1)
0257 #define RT5616_DAC_L1_STO_R_VOL_SFT     0
0258 
0259 /* DD Mixer Control (0x2b) */
0260 #define RT5616_M_STO_DD_L1          (0x1 << 14)
0261 #define RT5616_M_STO_DD_L1_SFT          14
0262 #define RT5616_STO_DD_L1_VOL_MASK       (0x1 << 13)
0263 #define RT5616_DAC_DD_L1_VOL_SFT        13
0264 #define RT5616_M_STO_DD_L2          (0x1 << 12)
0265 #define RT5616_M_STO_DD_L2_SFT          12
0266 #define RT5616_STO_DD_L2_VOL_MASK       (0x1 << 11)
0267 #define RT5616_STO_DD_L2_VOL_SFT        11
0268 #define RT5616_M_STO_DD_R2_L            (0x1 << 10)
0269 #define RT5616_M_STO_DD_R2_L_SFT        10
0270 #define RT5616_STO_DD_R2_L_VOL_MASK     (0x1 << 9)
0271 #define RT5616_STO_DD_R2_L_VOL_SFT      9
0272 #define RT5616_M_STO_DD_R1          (0x1 << 6)
0273 #define RT5616_M_STO_DD_R1_SFT          6
0274 #define RT5616_STO_DD_R1_VOL_MASK       (0x1 << 5)
0275 #define RT5616_STO_DD_R1_VOL_SFT        5
0276 #define RT5616_M_STO_DD_R2          (0x1 << 4)
0277 #define RT5616_M_STO_DD_R2_SFT          4
0278 #define RT5616_STO_DD_R2_VOL_MASK       (0x1 << 3)
0279 #define RT5616_STO_DD_R2_VOL_SFT        3
0280 #define RT5616_M_STO_DD_L2_R            (0x1 << 2)
0281 #define RT5616_M_STO_DD_L2_R_SFT        2
0282 #define RT5616_STO_DD_L2_R_VOL_MASK     (0x1 << 1)
0283 #define RT5616_STO_DD_L2_R_VOL_SFT      1
0284 
0285 /* Digital Mixer Control (0x2c) */
0286 #define RT5616_M_STO_L_DAC_L            (0x1 << 15)
0287 #define RT5616_M_STO_L_DAC_L_SFT        15
0288 #define RT5616_STO_L_DAC_L_VOL_MASK     (0x1 << 14)
0289 #define RT5616_STO_L_DAC_L_VOL_SFT      14
0290 #define RT5616_M_DAC_L2_DAC_L           (0x1 << 13)
0291 #define RT5616_M_DAC_L2_DAC_L_SFT       13
0292 #define RT5616_DAC_L2_DAC_L_VOL_MASK        (0x1 << 12)
0293 #define RT5616_DAC_L2_DAC_L_VOL_SFT     12
0294 #define RT5616_M_STO_R_DAC_R            (0x1 << 11)
0295 #define RT5616_M_STO_R_DAC_R_SFT        11
0296 #define RT5616_STO_R_DAC_R_VOL_MASK     (0x1 << 10)
0297 #define RT5616_STO_R_DAC_R_VOL_SFT      10
0298 #define RT5616_M_DAC_R2_DAC_R           (0x1 << 9)
0299 #define RT5616_M_DAC_R2_DAC_R_SFT       9
0300 #define RT5616_DAC_R2_DAC_R_VOL_MASK        (0x1 << 8)
0301 #define RT5616_DAC_R2_DAC_R_VOL_SFT     8
0302 
0303 /* DSP Path Control 1 (0x2d) */
0304 #define RT5616_RXDP_SRC_MASK            (0x1 << 15)
0305 #define RT5616_RXDP_SRC_SFT         15
0306 #define RT5616_RXDP_SRC_NOR         (0x0 << 15)
0307 #define RT5616_RXDP_SRC_DIV3            (0x1 << 15)
0308 #define RT5616_TXDP_SRC_MASK            (0x1 << 14)
0309 #define RT5616_TXDP_SRC_SFT         14
0310 #define RT5616_TXDP_SRC_NOR         (0x0 << 14)
0311 #define RT5616_TXDP_SRC_DIV3            (0x1 << 14)
0312 
0313 /* DSP Path Control 2 (0x2e) */
0314 #define RT5616_DAC_L2_SEL_MASK          (0x3 << 14)
0315 #define RT5616_DAC_L2_SEL_SFT           14
0316 #define RT5616_DAC_L2_SEL_IF2           (0x0 << 14)
0317 #define RT5616_DAC_L2_SEL_IF3           (0x1 << 14)
0318 #define RT5616_DAC_L2_SEL_TXDC          (0x2 << 14)
0319 #define RT5616_DAC_L2_SEL_BASS          (0x3 << 14)
0320 #define RT5616_DAC_R2_SEL_MASK          (0x3 << 12)
0321 #define RT5616_DAC_R2_SEL_SFT           12
0322 #define RT5616_DAC_R2_SEL_IF2           (0x0 << 12)
0323 #define RT5616_DAC_R2_SEL_IF3           (0x1 << 12)
0324 #define RT5616_DAC_R2_SEL_TXDC          (0x2 << 12)
0325 #define RT5616_IF2_ADC_L_SEL_MASK       (0x1 << 11)
0326 #define RT5616_IF2_ADC_L_SEL_SFT        11
0327 #define RT5616_IF2_ADC_L_SEL_TXDP       (0x0 << 11)
0328 #define RT5616_IF2_ADC_L_SEL_PASS       (0x1 << 11)
0329 #define RT5616_IF2_ADC_R_SEL_MASK       (0x1 << 10)
0330 #define RT5616_IF2_ADC_R_SEL_SFT        10
0331 #define RT5616_IF2_ADC_R_SEL_TXDP       (0x0 << 10)
0332 #define RT5616_IF2_ADC_R_SEL_PASS       (0x1 << 10)
0333 #define RT5616_RXDC_SEL_MASK            (0x3 << 8)
0334 #define RT5616_RXDC_SEL_SFT         8
0335 #define RT5616_RXDC_SEL_NOR         (0x0 << 8)
0336 #define RT5616_RXDC_SEL_L2R         (0x1 << 8)
0337 #define RT5616_RXDC_SEL_R2L         (0x2 << 8)
0338 #define RT5616_RXDC_SEL_SWAP            (0x3 << 8)
0339 #define RT5616_RXDP_SEL_MASK            (0x3 << 6)
0340 #define RT5616_RXDP_SEL_SFT         6
0341 #define RT5616_RXDP_SEL_NOR         (0x0 << 6)
0342 #define RT5616_RXDP_SEL_L2R         (0x1 << 6)
0343 #define RT5616_RXDP_SEL_R2L         (0x2 << 6)
0344 #define RT5616_RXDP_SEL_SWAP            (0x3 << 6)
0345 #define RT5616_TXDC_SEL_MASK            (0x3 << 4)
0346 #define RT5616_TXDC_SEL_SFT         4
0347 #define RT5616_TXDC_SEL_NOR         (0x0 << 4)
0348 #define RT5616_TXDC_SEL_L2R         (0x1 << 4)
0349 #define RT5616_TXDC_SEL_R2L         (0x2 << 4)
0350 #define RT5616_TXDC_SEL_SWAP            (0x3 << 4)
0351 #define RT5616_TXDP_SEL_MASK            (0x3 << 2)
0352 #define RT5616_TXDP_SEL_SFT         2
0353 #define RT5616_TXDP_SEL_NOR         (0x0 << 2)
0354 #define RT5616_TXDP_SEL_L2R         (0x1 << 2)
0355 #define RT5616_TXDP_SEL_R2L         (0x2 << 2)
0356 #define RT5616_TRXDP_SEL_SWAP           (0x3 << 2)
0357 
0358 /* REC Left Mixer Control 1 (0x3b) */
0359 #define RT5616_G_LN_L2_RM_L_MASK        (0x7 << 13)
0360 #define RT5616_G_IN_L2_RM_L_SFT         13
0361 #define RT5616_G_LN_L1_RM_L_MASK        (0x7 << 10)
0362 #define RT5616_G_IN_L1_RM_L_SFT         10
0363 #define RT5616_G_BST3_RM_L_MASK         (0x7 << 4)
0364 #define RT5616_G_BST3_RM_L_SFT          4
0365 #define RT5616_G_BST2_RM_L_MASK         (0x7 << 1)
0366 #define RT5616_G_BST2_RM_L_SFT          1
0367 
0368 /* REC Left Mixer Control 2 (0x3c) */
0369 #define RT5616_G_BST1_RM_L_MASK         (0x7 << 13)
0370 #define RT5616_G_BST1_RM_L_SFT          13
0371 #define RT5616_G_OM_L_RM_L_MASK         (0x7 << 10)
0372 #define RT5616_G_OM_L_RM_L_SFT          10
0373 #define RT5616_M_IN2_L_RM_L         (0x1 << 6)
0374 #define RT5616_M_IN2_L_RM_L_SFT         6
0375 #define RT5616_M_IN1_L_RM_L         (0x1 << 5)
0376 #define RT5616_M_IN1_L_RM_L_SFT         5
0377 #define RT5616_M_BST3_RM_L          (0x1 << 3)
0378 #define RT5616_M_BST3_RM_L_SFT          3
0379 #define RT5616_M_BST2_RM_L          (0x1 << 2)
0380 #define RT5616_M_BST2_RM_L_SFT          2
0381 #define RT5616_M_BST1_RM_L          (0x1 << 1)
0382 #define RT5616_M_BST1_RM_L_SFT          1
0383 #define RT5616_M_OM_L_RM_L          (0x1)
0384 #define RT5616_M_OM_L_RM_L_SFT          0
0385 
0386 /* REC Right Mixer Control 1 (0x3d) */
0387 #define RT5616_G_IN2_R_RM_R_MASK        (0x7 << 13)
0388 #define RT5616_G_IN2_R_RM_R_SFT         13
0389 #define RT5616_G_IN1_R_RM_R_MASK        (0x7 << 10)
0390 #define RT5616_G_IN1_R_RM_R_SFT         10
0391 #define RT5616_G_BST3_RM_R_MASK         (0x7 << 4)
0392 #define RT5616_G_BST3_RM_R_SFT          4
0393 #define RT5616_G_BST2_RM_R_MASK         (0x7 << 1)
0394 #define RT5616_G_BST2_RM_R_SFT          1
0395 
0396 /* REC Right Mixer Control 2 (0x3e) */
0397 #define RT5616_G_BST1_RM_R_MASK         (0x7 << 13)
0398 #define RT5616_G_BST1_RM_R_SFT          13
0399 #define RT5616_G_OM_R_RM_R_MASK         (0x7 << 10)
0400 #define RT5616_G_OM_R_RM_R_SFT          10
0401 #define RT5616_M_IN2_R_RM_R         (0x1 << 6)
0402 #define RT5616_M_IN2_R_RM_R_SFT         6
0403 #define RT5616_M_IN1_R_RM_R         (0x1 << 5)
0404 #define RT5616_M_IN1_R_RM_R_SFT         5
0405 #define RT5616_M_BST3_RM_R          (0x1 << 3)
0406 #define RT5616_M_BST3_RM_R_SFT          3
0407 #define RT5616_M_BST2_RM_R          (0x1 << 2)
0408 #define RT5616_M_BST2_RM_R_SFT          2
0409 #define RT5616_M_BST1_RM_R          (0x1 << 1)
0410 #define RT5616_M_BST1_RM_R_SFT          1
0411 #define RT5616_M_OM_R_RM_R          (0x1)
0412 #define RT5616_M_OM_R_RM_R_SFT          0
0413 
0414 /* HPMIX Control (0x45) */
0415 #define RT5616_M_DAC1_HM            (0x1 << 14)
0416 #define RT5616_M_DAC1_HM_SFT            14
0417 #define RT5616_M_HPVOL_HM           (0x1 << 13)
0418 #define RT5616_M_HPVOL_HM_SFT           13
0419 #define RT5616_G_HPOMIX_MASK            (0x1 << 12)
0420 #define RT5616_G_HPOMIX_SFT         12
0421 
0422 /* SPK Left Mixer Control (0x46) */
0423 #define RT5616_G_RM_L_SM_L_MASK         (0x3 << 14)
0424 #define RT5616_G_RM_L_SM_L_SFT          14
0425 #define RT5616_G_IN_L_SM_L_MASK         (0x3 << 12)
0426 #define RT5616_G_IN_L_SM_L_SFT          12
0427 #define RT5616_G_DAC_L1_SM_L_MASK       (0x3 << 10)
0428 #define RT5616_G_DAC_L1_SM_L_SFT        10
0429 #define RT5616_G_DAC_L2_SM_L_MASK       (0x3 << 8)
0430 #define RT5616_G_DAC_L2_SM_L_SFT        8
0431 #define RT5616_G_OM_L_SM_L_MASK         (0x3 << 6)
0432 #define RT5616_G_OM_L_SM_L_SFT          6
0433 #define RT5616_M_RM_L_SM_L          (0x1 << 5)
0434 #define RT5616_M_RM_L_SM_L_SFT          5
0435 #define RT5616_M_IN_L_SM_L          (0x1 << 4)
0436 #define RT5616_M_IN_L_SM_L_SFT          4
0437 #define RT5616_M_DAC_L1_SM_L            (0x1 << 3)
0438 #define RT5616_M_DAC_L1_SM_L_SFT        3
0439 #define RT5616_M_DAC_L2_SM_L            (0x1 << 2)
0440 #define RT5616_M_DAC_L2_SM_L_SFT        2
0441 #define RT5616_M_OM_L_SM_L          (0x1 << 1)
0442 #define RT5616_M_OM_L_SM_L_SFT          1
0443 
0444 /* SPK Right Mixer Control (0x47) */
0445 #define RT5616_G_RM_R_SM_R_MASK         (0x3 << 14)
0446 #define RT5616_G_RM_R_SM_R_SFT          14
0447 #define RT5616_G_IN_R_SM_R_MASK         (0x3 << 12)
0448 #define RT5616_G_IN_R_SM_R_SFT          12
0449 #define RT5616_G_DAC_R1_SM_R_MASK       (0x3 << 10)
0450 #define RT5616_G_DAC_R1_SM_R_SFT        10
0451 #define RT5616_G_DAC_R2_SM_R_MASK       (0x3 << 8)
0452 #define RT5616_G_DAC_R2_SM_R_SFT        8
0453 #define RT5616_G_OM_R_SM_R_MASK         (0x3 << 6)
0454 #define RT5616_G_OM_R_SM_R_SFT          6
0455 #define RT5616_M_RM_R_SM_R          (0x1 << 5)
0456 #define RT5616_M_RM_R_SM_R_SFT          5
0457 #define RT5616_M_IN_R_SM_R          (0x1 << 4)
0458 #define RT5616_M_IN_R_SM_R_SFT          4
0459 #define RT5616_M_DAC_R1_SM_R            (0x1 << 3)
0460 #define RT5616_M_DAC_R1_SM_R_SFT        3
0461 #define RT5616_M_DAC_R2_SM_R            (0x1 << 2)
0462 #define RT5616_M_DAC_R2_SM_R_SFT        2
0463 #define RT5616_M_OM_R_SM_R          (0x1 << 1)
0464 #define RT5616_M_OM_R_SM_R_SFT          1
0465 
0466 /* SPOLMIX Control (0x48) */
0467 #define RT5616_M_DAC_R1_SPM_L           (0x1 << 15)
0468 #define RT5616_M_DAC_R1_SPM_L_SFT       15
0469 #define RT5616_M_DAC_L1_SPM_L           (0x1 << 14)
0470 #define RT5616_M_DAC_L1_SPM_L_SFT       14
0471 #define RT5616_M_SV_R_SPM_L         (0x1 << 13)
0472 #define RT5616_M_SV_R_SPM_L_SFT         13
0473 #define RT5616_M_SV_L_SPM_L         (0x1 << 12)
0474 #define RT5616_M_SV_L_SPM_L_SFT         12
0475 #define RT5616_M_BST1_SPM_L         (0x1 << 11)
0476 #define RT5616_M_BST1_SPM_L_SFT         11
0477 
0478 /* SPORMIX Control (0x49) */
0479 #define RT5616_M_DAC_R1_SPM_R           (0x1 << 13)
0480 #define RT5616_M_DAC_R1_SPM_R_SFT       13
0481 #define RT5616_M_SV_R_SPM_R         (0x1 << 12)
0482 #define RT5616_M_SV_R_SPM_R_SFT         12
0483 #define RT5616_M_BST1_SPM_R         (0x1 << 11)
0484 #define RT5616_M_BST1_SPM_R_SFT         11
0485 
0486 /* SPOLMIX / SPORMIX Ratio Control (0x4a) */
0487 #define RT5616_SPO_CLSD_RATIO_MASK      (0x7)
0488 #define RT5616_SPO_CLSD_RATIO_SFT       0
0489 
0490 /* Mono Output Mixer Control (0x4c) */
0491 #define RT5616_M_DAC_R2_MM          (0x1 << 15)
0492 #define RT5616_M_DAC_R2_MM_SFT          15
0493 #define RT5616_M_DAC_L2_MM          (0x1 << 14)
0494 #define RT5616_M_DAC_L2_MM_SFT          14
0495 #define RT5616_M_OV_R_MM            (0x1 << 13)
0496 #define RT5616_M_OV_R_MM_SFT            13
0497 #define RT5616_M_OV_L_MM            (0x1 << 12)
0498 #define RT5616_M_OV_L_MM_SFT            12
0499 #define RT5616_M_BST1_MM            (0x1 << 11)
0500 #define RT5616_M_BST1_MM_SFT            11
0501 #define RT5616_G_MONOMIX_MASK           (0x1 << 10)
0502 #define RT5616_G_MONOMIX_SFT            10
0503 
0504 /* Output Left Mixer Control 1 (0x4d) */
0505 #define RT5616_G_BST2_OM_L_MASK         (0x7 << 10)
0506 #define RT5616_G_BST2_OM_L_SFT          10
0507 #define RT5616_G_BST1_OM_L_MASK         (0x7 << 7)
0508 #define RT5616_G_BST1_OM_L_SFT          7
0509 #define RT5616_G_IN1_L_OM_L_MASK        (0x7 << 4)
0510 #define RT5616_G_IN1_L_OM_L_SFT         4
0511 #define RT5616_G_RM_L_OM_L_MASK         (0x7 << 1)
0512 #define RT5616_G_RM_L_OM_L_SFT          1
0513 
0514 /* Output Left Mixer Control 2 (0x4e) */
0515 #define RT5616_G_DAC_L1_OM_L_MASK       (0x7 << 7)
0516 #define RT5616_G_DAC_L1_OM_L_SFT        7
0517 #define RT5616_G_IN2_L_OM_L_MASK        (0x7 << 4)
0518 #define RT5616_G_IN2_L_OM_L_SFT         4
0519 
0520 /* Output Left Mixer Control 3 (0x4f) */
0521 #define RT5616_M_IN2_L_OM_L         (0x1 << 9)
0522 #define RT5616_M_IN2_L_OM_L_SFT         9
0523 #define RT5616_M_BST2_OM_L          (0x1 << 6)
0524 #define RT5616_M_BST2_OM_L_SFT          6
0525 #define RT5616_M_BST1_OM_L          (0x1 << 5)
0526 #define RT5616_M_BST1_OM_L_SFT          5
0527 #define RT5616_M_IN1_L_OM_L         (0x1 << 4)
0528 #define RT5616_M_IN1_L_OM_L_SFT         4
0529 #define RT5616_M_RM_L_OM_L          (0x1 << 3)
0530 #define RT5616_M_RM_L_OM_L_SFT          3
0531 #define RT5616_M_DAC_L1_OM_L            (0x1)
0532 #define RT5616_M_DAC_L1_OM_L_SFT        0
0533 
0534 /* Output Right Mixer Control 1 (0x50) */
0535 #define RT5616_G_BST2_OM_R_MASK         (0x7 << 10)
0536 #define RT5616_G_BST2_OM_R_SFT          10
0537 #define RT5616_G_BST1_OM_R_MASK         (0x7 << 7)
0538 #define RT5616_G_BST1_OM_R_SFT          7
0539 #define RT5616_G_IN1_R_OM_R_MASK        (0x7 << 4)
0540 #define RT5616_G_IN1_R_OM_R_SFT         4
0541 #define RT5616_G_RM_R_OM_R_MASK         (0x7 << 1)
0542 #define RT5616_G_RM_R_OM_R_SFT          1
0543 
0544 /* Output Right Mixer Control 2 (0x51) */
0545 #define RT5616_G_DAC_R1_OM_R_MASK       (0x7 << 7)
0546 #define RT5616_G_DAC_R1_OM_R_SFT        7
0547 #define RT5616_G_IN2_R_OM_R_MASK        (0x7 << 4)
0548 #define RT5616_G_IN2_R_OM_R_SFT         4
0549 
0550 /* Output Right Mixer Control 3 (0x52) */
0551 #define RT5616_M_IN2_R_OM_R         (0x1 << 9)
0552 #define RT5616_M_IN2_R_OM_R_SFT         9
0553 #define RT5616_M_BST2_OM_R          (0x1 << 6)
0554 #define RT5616_M_BST2_OM_R_SFT          6
0555 #define RT5616_M_BST1_OM_R          (0x1 << 5)
0556 #define RT5616_M_BST1_OM_R_SFT          5
0557 #define RT5616_M_IN1_R_OM_R         (0x1 << 4)
0558 #define RT5616_M_IN1_R_OM_R_SFT         4
0559 #define RT5616_M_RM_R_OM_R          (0x1 << 3)
0560 #define RT5616_M_RM_R_OM_R_SFT          3
0561 #define RT5616_M_DAC_R1_OM_R            (0x1)
0562 #define RT5616_M_DAC_R1_OM_R_SFT        0
0563 
0564 /* LOUT Mixer Control (0x53) */
0565 #define RT5616_M_DAC_L1_LM          (0x1 << 15)
0566 #define RT5616_M_DAC_L1_LM_SFT          15
0567 #define RT5616_M_DAC_R1_LM          (0x1 << 14)
0568 #define RT5616_M_DAC_R1_LM_SFT          14
0569 #define RT5616_M_OV_L_LM            (0x1 << 13)
0570 #define RT5616_M_OV_L_LM_SFT            13
0571 #define RT5616_M_OV_R_LM            (0x1 << 12)
0572 #define RT5616_M_OV_R_LM_SFT            12
0573 #define RT5616_G_LOUTMIX_MASK           (0x1 << 11)
0574 #define RT5616_G_LOUTMIX_SFT            11
0575 
0576 /* Power Management for Digital 1 (0x61) */
0577 #define RT5616_PWR_I2S1             (0x1 << 15)
0578 #define RT5616_PWR_I2S1_BIT         15
0579 #define RT5616_PWR_I2S2             (0x1 << 14)
0580 #define RT5616_PWR_I2S2_BIT         14
0581 #define RT5616_PWR_DAC_L1           (0x1 << 12)
0582 #define RT5616_PWR_DAC_L1_BIT           12
0583 #define RT5616_PWR_DAC_R1           (0x1 << 11)
0584 #define RT5616_PWR_DAC_R1_BIT           11
0585 #define RT5616_PWR_ADC_L            (0x1 << 2)
0586 #define RT5616_PWR_ADC_L_BIT            2
0587 #define RT5616_PWR_ADC_R            (0x1 << 1)
0588 #define RT5616_PWR_ADC_R_BIT            1
0589 
0590 /* Power Management for Digital 2 (0x62) */
0591 #define RT5616_PWR_ADC_STO1_F           (0x1 << 15)
0592 #define RT5616_PWR_ADC_STO1_F_BIT       15
0593 #define RT5616_PWR_DAC_STO1_F           (0x1 << 11)
0594 #define RT5616_PWR_DAC_STO1_F_BIT       11
0595 
0596 /* Power Management for Analog 1 (0x63) */
0597 #define RT5616_PWR_VREF1            (0x1 << 15)
0598 #define RT5616_PWR_VREF1_BIT            15
0599 #define RT5616_PWR_FV1              (0x1 << 14)
0600 #define RT5616_PWR_FV1_BIT          14
0601 #define RT5616_PWR_MB               (0x1 << 13)
0602 #define RT5616_PWR_MB_BIT           13
0603 #define RT5616_PWR_LM               (0x1 << 12)
0604 #define RT5616_PWR_LM_BIT           12
0605 #define RT5616_PWR_BG               (0x1 << 11)
0606 #define RT5616_PWR_BG_BIT           11
0607 #define RT5616_PWR_HP_L             (0x1 << 7)
0608 #define RT5616_PWR_HP_L_BIT         7
0609 #define RT5616_PWR_HP_R             (0x1 << 6)
0610 #define RT5616_PWR_HP_R_BIT         6
0611 #define RT5616_PWR_HA               (0x1 << 5)
0612 #define RT5616_PWR_HA_BIT           5
0613 #define RT5616_PWR_VREF2            (0x1 << 4)
0614 #define RT5616_PWR_VREF2_BIT            4
0615 #define RT5616_PWR_FV2              (0x1 << 3)
0616 #define RT5616_PWR_FV2_BIT          3
0617 #define RT5616_PWR_LDO              (0x1 << 2)
0618 #define RT5616_PWR_LDO_BIT          2
0619 #define RT5616_PWR_LDO_DVO_MASK         (0x3)
0620 #define RT5616_PWR_LDO_DVO_1_0V         0
0621 #define RT5616_PWR_LDO_DVO_1_1V         1
0622 #define RT5616_PWR_LDO_DVO_1_2V         2
0623 #define RT5616_PWR_LDO_DVO_1_3V         3
0624 
0625 /* Power Management for Analog 2 (0x64) */
0626 #define RT5616_PWR_BST1             (0x1 << 15)
0627 #define RT5616_PWR_BST1_BIT         15
0628 #define RT5616_PWR_BST2             (0x1 << 14)
0629 #define RT5616_PWR_BST2_BIT         14
0630 #define RT5616_PWR_MB1              (0x1 << 11)
0631 #define RT5616_PWR_MB1_BIT          11
0632 #define RT5616_PWR_PLL              (0x1 << 9)
0633 #define RT5616_PWR_PLL_BIT          9
0634 #define RT5616_PWR_BST1_OP2         (0x1 << 5)
0635 #define RT5616_PWR_BST1_OP2_BIT         5
0636 #define RT5616_PWR_BST2_OP2         (0x1 << 4)
0637 #define RT5616_PWR_BST2_OP2_BIT         4
0638 #define RT5616_PWR_BST3_OP2         (0x1 << 3)
0639 #define RT5616_PWR_BST3_OP2_BIT         3
0640 #define RT5616_PWR_JD_M             (0x1 << 2)
0641 #define RT5616_PWM_JD_M_BIT         2
0642 #define RT5616_PWR_JD2              (0x1 << 1)
0643 #define RT5616_PWM_JD2_BIT          1
0644 #define RT5616_PWR_JD3              (0x1)
0645 #define RT5616_PWM_JD3_BIT          0
0646 
0647 /* Power Management for Mixer (0x65) */
0648 #define RT5616_PWR_OM_L             (0x1 << 15)
0649 #define RT5616_PWR_OM_L_BIT         15
0650 #define RT5616_PWR_OM_R             (0x1 << 14)
0651 #define RT5616_PWR_OM_R_BIT         14
0652 #define RT5616_PWR_RM_L             (0x1 << 11)
0653 #define RT5616_PWR_RM_L_BIT         11
0654 #define RT5616_PWR_RM_R             (0x1 << 10)
0655 #define RT5616_PWR_RM_R_BIT         10
0656 
0657 /* Power Management for Volume (0x66) */
0658 #define RT5616_PWR_OV_L             (0x1 << 13)
0659 #define RT5616_PWR_OV_L_BIT         13
0660 #define RT5616_PWR_OV_R             (0x1 << 12)
0661 #define RT5616_PWR_OV_R_BIT         12
0662 #define RT5616_PWR_HV_L             (0x1 << 11)
0663 #define RT5616_PWR_HV_L_BIT         11
0664 #define RT5616_PWR_HV_R             (0x1 << 10)
0665 #define RT5616_PWR_HV_R_BIT         10
0666 #define RT5616_PWR_IN1_L            (0x1 << 9)
0667 #define RT5616_PWR_IN1_L_BIT            9
0668 #define RT5616_PWR_IN1_R            (0x1 << 8)
0669 #define RT5616_PWR_IN1_R_BIT            8
0670 #define RT5616_PWR_IN2_L            (0x1 << 7)
0671 #define RT5616_PWR_IN2_L_BIT            7
0672 #define RT5616_PWR_IN2_R            (0x1 << 6)
0673 #define RT5616_PWR_IN2_R_BIT            6
0674 
0675 /* I2S1/2/3 Audio Serial Data Port Control (0x70 0x71) */
0676 #define RT5616_I2S_MS_MASK          (0x1 << 15)
0677 #define RT5616_I2S_MS_SFT           15
0678 #define RT5616_I2S_MS_M             (0x0 << 15)
0679 #define RT5616_I2S_MS_S             (0x1 << 15)
0680 #define RT5616_I2S_O_CP_MASK            (0x3 << 10)
0681 #define RT5616_I2S_O_CP_SFT         10
0682 #define RT5616_I2S_O_CP_OFF         (0x0 << 10)
0683 #define RT5616_I2S_O_CP_U_LAW           (0x1 << 10)
0684 #define RT5616_I2S_O_CP_A_LAW           (0x2 << 10)
0685 #define RT5616_I2S_I_CP_MASK            (0x3 << 8)
0686 #define RT5616_I2S_I_CP_SFT         8
0687 #define RT5616_I2S_I_CP_OFF         (0x0 << 8)
0688 #define RT5616_I2S_I_CP_U_LAW           (0x1 << 8)
0689 #define RT5616_I2S_I_CP_A_LAW           (0x2 << 8)
0690 #define RT5616_I2S_BP_MASK          (0x1 << 7)
0691 #define RT5616_I2S_BP_SFT           7
0692 #define RT5616_I2S_BP_NOR           (0x0 << 7)
0693 #define RT5616_I2S_BP_INV           (0x1 << 7)
0694 #define RT5616_I2S_DL_MASK          (0x3 << 2)
0695 #define RT5616_I2S_DL_SFT           2
0696 #define RT5616_I2S_DL_16            (0x0 << 2)
0697 #define RT5616_I2S_DL_20            (0x1 << 2)
0698 #define RT5616_I2S_DL_24            (0x2 << 2)
0699 #define RT5616_I2S_DL_8             (0x3 << 2)
0700 #define RT5616_I2S_DF_MASK          (0x3)
0701 #define RT5616_I2S_DF_SFT           0
0702 #define RT5616_I2S_DF_I2S           (0x0)
0703 #define RT5616_I2S_DF_LEFT          (0x1)
0704 #define RT5616_I2S_DF_PCM_A         (0x2)
0705 #define RT5616_I2S_DF_PCM_B         (0x3)
0706 
0707 /* ADC/DAC Clock Control 1 (0x73) */
0708 #define RT5616_I2S_PD1_MASK         (0x7 << 12)
0709 #define RT5616_I2S_PD1_SFT          12
0710 #define RT5616_I2S_PD1_1            (0x0 << 12)
0711 #define RT5616_I2S_PD1_2            (0x1 << 12)
0712 #define RT5616_I2S_PD1_3            (0x2 << 12)
0713 #define RT5616_I2S_PD1_4            (0x3 << 12)
0714 #define RT5616_I2S_PD1_6            (0x4 << 12)
0715 #define RT5616_I2S_PD1_8            (0x5 << 12)
0716 #define RT5616_I2S_PD1_12           (0x6 << 12)
0717 #define RT5616_I2S_PD1_16           (0x7 << 12)
0718 #define RT5616_I2S_BCLK_MS2_MASK        (0x1 << 11)
0719 #define RT5616_DAC_OSR_MASK         (0x3 << 2)
0720 #define RT5616_DAC_OSR_SFT          2
0721 #define RT5616_DAC_OSR_128          (0x0 << 2)
0722 #define RT5616_DAC_OSR_64           (0x1 << 2)
0723 #define RT5616_DAC_OSR_32           (0x2 << 2)
0724 #define RT5616_DAC_OSR_128_3            (0x3 << 2)
0725 #define RT5616_ADC_OSR_MASK         (0x3)
0726 #define RT5616_ADC_OSR_SFT          0
0727 #define RT5616_ADC_OSR_128          (0x0)
0728 #define RT5616_ADC_OSR_64           (0x1)
0729 #define RT5616_ADC_OSR_32           (0x2)
0730 #define RT5616_ADC_OSR_128_3            (0x3)
0731 
0732 /* ADC/DAC Clock Control 2 (0x74) */
0733 #define RT5616_DAHPF_EN             (0x1 << 11)
0734 #define RT5616_DAHPF_EN_SFT         11
0735 #define RT5616_ADHPF_EN             (0x1 << 10)
0736 #define RT5616_ADHPF_EN_SFT         10
0737 
0738 /* TDM Control 1 (0x77) */
0739 #define RT5616_TDM_INTEL_SEL_MASK       (0x1 << 15)
0740 #define RT5616_TDM_INTEL_SEL_SFT        15
0741 #define RT5616_TDM_INTEL_SEL_64         (0x0 << 15)
0742 #define RT5616_TDM_INTEL_SEL_50         (0x1 << 15)
0743 #define RT5616_TDM_MODE_SEL_MASK        (0x1 << 14)
0744 #define RT5616_TDM_MODE_SEL_SFT         14
0745 #define RT5616_TDM_MODE_SEL_NOR         (0x0 << 14)
0746 #define RT5616_TDM_MODE_SEL_TDM         (0x1 << 14)
0747 #define RT5616_TDM_CH_NUM_SEL_MASK      (0x3 << 12)
0748 #define RT5616_TDM_CH_NUM_SEL_SFT       12
0749 #define RT5616_TDM_CH_NUM_SEL_2         (0x0 << 12)
0750 #define RT5616_TDM_CH_NUM_SEL_4         (0x1 << 12)
0751 #define RT5616_TDM_CH_NUM_SEL_6         (0x2 << 12)
0752 #define RT5616_TDM_CH_NUM_SEL_8         (0x3 << 12)
0753 #define RT5616_TDM_CH_LEN_SEL_MASK      (0x3 << 10)
0754 #define RT5616_TDM_CH_LEN_SEL_SFT       10
0755 #define RT5616_TDM_CH_LEN_SEL_16        (0x0 << 10)
0756 #define RT5616_TDM_CH_LEN_SEL_20        (0x1 << 10)
0757 #define RT5616_TDM_CH_LEN_SEL_24        (0x2 << 10)
0758 #define RT5616_TDM_CH_LEN_SEL_32        (0x3 << 10)
0759 #define RT5616_TDM_ADC_SEL_MASK         (0x1 << 9)
0760 #define RT5616_TDM_ADC_SEL_SFT          9
0761 #define RT5616_TDM_ADC_SEL_NOR          (0x0 << 9)
0762 #define RT5616_TDM_ADC_SEL_SWAP         (0x1 << 9)
0763 #define RT5616_TDM_ADC_START_SEL_MASK       (0x1 << 8)
0764 #define RT5616_TDM_ADC_START_SEL_SFT        8
0765 #define RT5616_TDM_ADC_START_SEL_SL0        (0x0 << 8)
0766 #define RT5616_TDM_ADC_START_SEL_SL4        (0x1 << 8)
0767 #define RT5616_TDM_I2S_CH2_SEL_MASK     (0x3 << 6)
0768 #define RT5616_TDM_I2S_CH2_SEL_SFT      6
0769 #define RT5616_TDM_I2S_CH2_SEL_LR       (0x0 << 6)
0770 #define RT5616_TDM_I2S_CH2_SEL_RL       (0x1 << 6)
0771 #define RT5616_TDM_I2S_CH2_SEL_LL       (0x2 << 6)
0772 #define RT5616_TDM_I2S_CH2_SEL_RR       (0x3 << 6)
0773 #define RT5616_TDM_I2S_CH4_SEL_MASK     (0x3 << 4)
0774 #define RT5616_TDM_I2S_CH4_SEL_SFT      4
0775 #define RT5616_TDM_I2S_CH4_SEL_LR       (0x0 << 4)
0776 #define RT5616_TDM_I2S_CH4_SEL_RL       (0x1 << 4)
0777 #define RT5616_TDM_I2S_CH4_SEL_LL       (0x2 << 4)
0778 #define RT5616_TDM_I2S_CH4_SEL_RR       (0x3 << 4)
0779 #define RT5616_TDM_I2S_CH6_SEL_MASK     (0x3 << 2)
0780 #define RT5616_TDM_I2S_CH6_SEL_SFT      2
0781 #define RT5616_TDM_I2S_CH6_SEL_LR       (0x0 << 2)
0782 #define RT5616_TDM_I2S_CH6_SEL_RL       (0x1 << 2)
0783 #define RT5616_TDM_I2S_CH6_SEL_LL       (0x2 << 2)
0784 #define RT5616_TDM_I2S_CH6_SEL_RR       (0x3 << 2)
0785 #define RT5616_TDM_I2S_CH8_SEL_MASK     (0x3)
0786 #define RT5616_TDM_I2S_CH8_SEL_SFT      0
0787 #define RT5616_TDM_I2S_CH8_SEL_LR       (0x0)
0788 #define RT5616_TDM_I2S_CH8_SEL_RL       (0x1)
0789 #define RT5616_TDM_I2S_CH8_SEL_LL       (0x2)
0790 #define RT5616_TDM_I2S_CH8_SEL_RR       (0x3)
0791 
0792 /* TDM Control 2 (0x78) */
0793 #define RT5616_TDM_LRCK_POL_SEL_MASK        (0x1 << 15)
0794 #define RT5616_TDM_LRCK_POL_SEL_SFT     15
0795 #define RT5616_TDM_LRCK_POL_SEL_NOR     (0x0 << 15)
0796 #define RT5616_TDM_LRCK_POL_SEL_INV     (0x1 << 15)
0797 #define RT5616_TDM_CH_VAL_SEL_MASK      (0x1 << 14)
0798 #define RT5616_TDM_CH_VAL_SEL_SFT       14
0799 #define RT5616_TDM_CH_VAL_SEL_CH01      (0x0 << 14)
0800 #define RT5616_TDM_CH_VAL_SEL_CH0123        (0x1 << 14)
0801 #define RT5616_TDM_CH_VAL_EN            (0x1 << 13)
0802 #define RT5616_TDM_CH_VAL_SFT           13
0803 #define RT5616_TDM_LPBK_EN          (0x1 << 12)
0804 #define RT5616_TDM_LPBK_SFT         12
0805 #define RT5616_TDM_LRCK_PULSE_SEL_MASK      (0x1 << 11)
0806 #define RT5616_TDM_LRCK_PULSE_SEL_SFT       11
0807 #define RT5616_TDM_LRCK_PULSE_SEL_BCLK      (0x0 << 11)
0808 #define RT5616_TDM_LRCK_PULSE_SEL_CH        (0x1 << 11)
0809 #define RT5616_TDM_END_EDGE_SEL_MASK        (0x1 << 10)
0810 #define RT5616_TDM_END_EDGE_SEL_SFT     10
0811 #define RT5616_TDM_END_EDGE_SEL_POS     (0x0 << 10)
0812 #define RT5616_TDM_END_EDGE_SEL_NEG     (0x1 << 10)
0813 #define RT5616_TDM_END_EDGE_EN          (0x1 << 9)
0814 #define RT5616_TDM_END_EDGE_EN_SFT      9
0815 #define RT5616_TDM_TRAN_EDGE_SEL_MASK       (0x1 << 8)
0816 #define RT5616_TDM_TRAN_EDGE_SEL_SFT        8
0817 #define RT5616_TDM_TRAN_EDGE_SEL_POS        (0x0 << 8)
0818 #define RT5616_TDM_TRAN_EDGE_SEL_NEG        (0x1 << 8)
0819 #define RT5616_M_TDM2_L             (0x1 << 7)
0820 #define RT5616_M_TDM2_L_SFT         7
0821 #define RT5616_M_TDM2_R             (0x1 << 6)
0822 #define RT5616_M_TDM2_R_SFT         6
0823 #define RT5616_M_TDM4_L             (0x1 << 5)
0824 #define RT5616_M_TDM4_L_SFT         5
0825 #define RT5616_M_TDM4_R             (0x1 << 4)
0826 #define RT5616_M_TDM4_R_SFT         4
0827 
0828 /* Global Clock Control (0x80) */
0829 #define RT5616_SCLK_SRC_MASK            (0x3 << 14)
0830 #define RT5616_SCLK_SRC_SFT         14
0831 #define RT5616_SCLK_SRC_MCLK            (0x0 << 14)
0832 #define RT5616_SCLK_SRC_PLL1            (0x1 << 14)
0833 #define RT5616_PLL1_SRC_MASK            (0x3 << 12)
0834 #define RT5616_PLL1_SRC_SFT         12
0835 #define RT5616_PLL1_SRC_MCLK            (0x0 << 12)
0836 #define RT5616_PLL1_SRC_BCLK1           (0x1 << 12)
0837 #define RT5616_PLL1_SRC_BCLK2           (0x2 << 12)
0838 #define RT5616_PLL1_PD_MASK         (0x1 << 3)
0839 #define RT5616_PLL1_PD_SFT          3
0840 #define RT5616_PLL1_PD_1            (0x0 << 3)
0841 #define RT5616_PLL1_PD_2            (0x1 << 3)
0842 
0843 #define RT5616_PLL_INP_MAX          40000000
0844 #define RT5616_PLL_INP_MIN          256000
0845 /* PLL M/N/K Code Control 1 (0x81) */
0846 #define RT5616_PLL_N_MAX            0x1ff
0847 #define RT5616_PLL_N_MASK           (RT5616_PLL_N_MAX << 7)
0848 #define RT5616_PLL_N_SFT            7
0849 #define RT5616_PLL_K_MAX            0x1f
0850 #define RT5616_PLL_K_MASK           (RT5616_PLL_K_MAX)
0851 #define RT5616_PLL_K_SFT            0
0852 
0853 /* PLL M/N/K Code Control 2 (0x82) */
0854 #define RT5616_PLL_M_MAX            0xf
0855 #define RT5616_PLL_M_MASK           (RT5616_PLL_M_MAX << 12)
0856 #define RT5616_PLL_M_SFT            12
0857 #define RT5616_PLL_M_BP             (0x1 << 11)
0858 #define RT5616_PLL_M_BP_SFT         11
0859 
0860 /* PLL tracking mode 1 (0x83) */
0861 #define RT5616_STO1_T_MASK          (0x1 << 15)
0862 #define RT5616_STO1_T_SFT           15
0863 #define RT5616_STO1_T_SCLK          (0x0 << 15)
0864 #define RT5616_STO1_T_LRCK1         (0x1 << 15)
0865 #define RT5616_STO2_T_MASK          (0x1 << 12)
0866 #define RT5616_STO2_T_SFT           12
0867 #define RT5616_STO2_T_I2S2          (0x0 << 12)
0868 #define RT5616_STO2_T_LRCK2         (0x1 << 12)
0869 #define RT5616_ASRC2_REF_MASK           (0x1 << 11)
0870 #define RT5616_ASRC2_REF_SFT            11
0871 #define RT5616_ASRC2_REF_LRCK2          (0x0 << 11)
0872 #define RT5616_ASRC2_REF_LRCK1          (0x1 << 11)
0873 #define RT5616_DMIC_1_M_MASK            (0x1 << 9)
0874 #define RT5616_DMIC_1_M_SFT         9
0875 #define RT5616_DMIC_1_M_NOR         (0x0 << 9)
0876 #define RT5616_DMIC_1_M_ASYN            (0x1 << 9)
0877 
0878 /* PLL tracking mode 2 (0x84) */
0879 #define RT5616_STO1_ASRC_EN         (0x1 << 15)
0880 #define RT5616_STO1_ASRC_EN_SFT         15
0881 #define RT5616_STO2_ASRC_EN         (0x1 << 14)
0882 #define RT5616_STO2_ASRC_EN_SFT         14
0883 #define RT5616_STO1_DAC_M_MASK          (0x1 << 13)
0884 #define RT5616_STO1_DAC_M_SFT           13
0885 #define RT5616_STO1_DAC_M_NOR           (0x0 << 13)
0886 #define RT5616_STO1_DAC_M_ASRC          (0x1 << 13)
0887 #define RT5616_STO2_DAC_M_MASK          (0x1 << 12)
0888 #define RT5616_STO2_DAC_M_SFT           12
0889 #define RT5616_STO2_DAC_M_NOR           (0x0 << 12)
0890 #define RT5616_STO2_DAC_M_ASRC          (0x1 << 12)
0891 #define RT5616_ADC_M_MASK           (0x1 << 11)
0892 #define RT5616_ADC_M_SFT            11
0893 #define RT5616_ADC_M_NOR            (0x0 << 11)
0894 #define RT5616_ADC_M_ASRC           (0x1 << 11)
0895 #define RT5616_I2S1_R_D_MASK            (0x1 << 4)
0896 #define RT5616_I2S1_R_D_SFT         4
0897 #define RT5616_I2S1_R_D_DIS         (0x0 << 4)
0898 #define RT5616_I2S1_R_D_EN          (0x1 << 4)
0899 #define RT5616_I2S2_R_D_MASK            (0x1 << 3)
0900 #define RT5616_I2S2_R_D_SFT         3
0901 #define RT5616_I2S2_R_D_DIS         (0x0 << 3)
0902 #define RT5616_I2S2_R_D_EN          (0x1 << 3)
0903 #define RT5616_PRE_SCLK_MASK            (0x3)
0904 #define RT5616_PRE_SCLK_SFT         0
0905 #define RT5616_PRE_SCLK_512         (0x0)
0906 #define RT5616_PRE_SCLK_1024            (0x1)
0907 #define RT5616_PRE_SCLK_2048            (0x2)
0908 
0909 /* PLL tracking mode 3 (0x85) */
0910 #define RT5616_I2S1_RATE_MASK           (0xf << 12)
0911 #define RT5616_I2S1_RATE_SFT            12
0912 #define RT5616_I2S2_RATE_MASK           (0xf << 8)
0913 #define RT5616_I2S2_RATE_SFT            8
0914 #define RT5616_G_ASRC_LP_MASK           (0x1 << 3)
0915 #define RT5616_G_ASRC_LP_SFT            3
0916 #define RT5616_ASRC_LP_F_M          (0x1 << 2)
0917 #define RT5616_ASRC_LP_F_SFT            2
0918 #define RT5616_ASRC_LP_F_NOR            (0x0 << 2)
0919 #define RT5616_ASRC_LP_F_SB         (0x1 << 2)
0920 #define RT5616_FTK_PH_DET_MASK          (0x3)
0921 #define RT5616_FTK_PH_DET_SFT           0
0922 #define RT5616_FTK_PH_DET_DIV1          (0x0)
0923 #define RT5616_FTK_PH_DET_DIV2          (0x1)
0924 #define RT5616_FTK_PH_DET_DIV4          (0x2)
0925 #define RT5616_FTK_PH_DET_DIV8          (0x3)
0926 
0927 /*PLL tracking mode 6 (0x89) */
0928 #define RT5616_I2S1_PD_MASK         (0x7 << 12)
0929 #define RT5616_I2S1_PD_SFT          12
0930 #define RT5616_I2S2_PD_MASK         (0x7 << 8)
0931 #define RT5616_I2S2_PD_SFT          8
0932 
0933 /*PLL tracking mode 7 (0x8a) */
0934 #define RT5616_FSI1_RATE_MASK           (0xf << 12)
0935 #define RT5616_FSI1_RATE_SFT            12
0936 #define RT5616_FSI2_RATE_MASK           (0xf << 8)
0937 #define RT5616_FSI2_RATE_SFT            8
0938 
0939 /* HPOUT Over Current Detection (0x8b) */
0940 #define RT5616_HP_OVCD_MASK         (0x1 << 10)
0941 #define RT5616_HP_OVCD_SFT          10
0942 #define RT5616_HP_OVCD_DIS          (0x0 << 10)
0943 #define RT5616_HP_OVCD_EN           (0x1 << 10)
0944 #define RT5616_HP_OC_TH_MASK            (0x3 << 8)
0945 #define RT5616_HP_OC_TH_SFT         8
0946 #define RT5616_HP_OC_TH_90          (0x0 << 8)
0947 #define RT5616_HP_OC_TH_105         (0x1 << 8)
0948 #define RT5616_HP_OC_TH_120         (0x2 << 8)
0949 #define RT5616_HP_OC_TH_135         (0x3 << 8)
0950 
0951 /* Depop Mode Control 1 (0x8e) */
0952 #define RT5616_SMT_TRIG_MASK            (0x1 << 15)
0953 #define RT5616_SMT_TRIG_SFT         15
0954 #define RT5616_SMT_TRIG_DIS         (0x0 << 15)
0955 #define RT5616_SMT_TRIG_EN          (0x1 << 15)
0956 #define RT5616_HP_L_SMT_MASK            (0x1 << 9)
0957 #define RT5616_HP_L_SMT_SFT         9
0958 #define RT5616_HP_L_SMT_DIS         (0x0 << 9)
0959 #define RT5616_HP_L_SMT_EN          (0x1 << 9)
0960 #define RT5616_HP_R_SMT_MASK            (0x1 << 8)
0961 #define RT5616_HP_R_SMT_SFT         8
0962 #define RT5616_HP_R_SMT_DIS         (0x0 << 8)
0963 #define RT5616_HP_R_SMT_EN          (0x1 << 8)
0964 #define RT5616_HP_CD_PD_MASK            (0x1 << 7)
0965 #define RT5616_HP_CD_PD_SFT         7
0966 #define RT5616_HP_CD_PD_DIS         (0x0 << 7)
0967 #define RT5616_HP_CD_PD_EN          (0x1 << 7)
0968 #define RT5616_RSTN_MASK            (0x1 << 6)
0969 #define RT5616_RSTN_SFT             6
0970 #define RT5616_RSTN_DIS             (0x0 << 6)
0971 #define RT5616_RSTN_EN              (0x1 << 6)
0972 #define RT5616_RSTP_MASK            (0x1 << 5)
0973 #define RT5616_RSTP_SFT             5
0974 #define RT5616_RSTP_DIS             (0x0 << 5)
0975 #define RT5616_RSTP_EN              (0x1 << 5)
0976 #define RT5616_HP_CO_MASK           (0x1 << 4)
0977 #define RT5616_HP_CO_SFT            4
0978 #define RT5616_HP_CO_DIS            (0x0 << 4)
0979 #define RT5616_HP_CO_EN             (0x1 << 4)
0980 #define RT5616_HP_CP_MASK           (0x1 << 3)
0981 #define RT5616_HP_CP_SFT            3
0982 #define RT5616_HP_CP_PD             (0x0 << 3)
0983 #define RT5616_HP_CP_PU             (0x1 << 3)
0984 #define RT5616_HP_SG_MASK           (0x1 << 2)
0985 #define RT5616_HP_SG_SFT            2
0986 #define RT5616_HP_SG_DIS            (0x0 << 2)
0987 #define RT5616_HP_SG_EN             (0x1 << 2)
0988 #define RT5616_HP_DP_MASK           (0x1 << 1)
0989 #define RT5616_HP_DP_SFT            1
0990 #define RT5616_HP_DP_PD             (0x0 << 1)
0991 #define RT5616_HP_DP_PU             (0x1 << 1)
0992 #define RT5616_HP_CB_MASK           (0x1)
0993 #define RT5616_HP_CB_SFT            0
0994 #define RT5616_HP_CB_PD             (0x0)
0995 #define RT5616_HP_CB_PU             (0x1)
0996 
0997 /* Depop Mode Control 2 (0x8f) */
0998 #define RT5616_DEPOP_MASK           (0x1 << 13)
0999 #define RT5616_DEPOP_SFT            13
1000 #define RT5616_DEPOP_AUTO           (0x0 << 13)
1001 #define RT5616_DEPOP_MAN            (0x1 << 13)
1002 #define RT5616_RAMP_MASK            (0x1 << 12)
1003 #define RT5616_RAMP_SFT             12
1004 #define RT5616_RAMP_DIS             (0x0 << 12)
1005 #define RT5616_RAMP_EN              (0x1 << 12)
1006 #define RT5616_BPS_MASK             (0x1 << 11)
1007 #define RT5616_BPS_SFT              11
1008 #define RT5616_BPS_DIS              (0x0 << 11)
1009 #define RT5616_BPS_EN               (0x1 << 11)
1010 #define RT5616_FAST_UPDN_MASK           (0x1 << 10)
1011 #define RT5616_FAST_UPDN_SFT            10
1012 #define RT5616_FAST_UPDN_DIS            (0x0 << 10)
1013 #define RT5616_FAST_UPDN_EN         (0x1 << 10)
1014 #define RT5616_MRES_MASK            (0x3 << 8)
1015 #define RT5616_MRES_SFT             8
1016 #define RT5616_MRES_15MO            (0x0 << 8)
1017 #define RT5616_MRES_25MO            (0x1 << 8)
1018 #define RT5616_MRES_35MO            (0x2 << 8)
1019 #define RT5616_MRES_45MO            (0x3 << 8)
1020 #define RT5616_VLO_MASK             (0x1 << 7)
1021 #define RT5616_VLO_SFT              7
1022 #define RT5616_VLO_3V               (0x0 << 7)
1023 #define RT5616_VLO_32V              (0x1 << 7)
1024 #define RT5616_DIG_DP_MASK          (0x1 << 6)
1025 #define RT5616_DIG_DP_SFT           6
1026 #define RT5616_DIG_DP_DIS           (0x0 << 6)
1027 #define RT5616_DIG_DP_EN            (0x1 << 6)
1028 #define RT5616_DP_TH_MASK           (0x3 << 4)
1029 #define RT5616_DP_TH_SFT            4
1030 
1031 /* Depop Mode Control 3 (0x90) */
1032 #define RT5616_CP_SYS_MASK          (0x7 << 12)
1033 #define RT5616_CP_SYS_SFT           12
1034 #define RT5616_CP_FQ1_MASK          (0x7 << 8)
1035 #define RT5616_CP_FQ1_SFT           8
1036 #define RT5616_CP_FQ2_MASK          (0x7 << 4)
1037 #define RT5616_CP_FQ2_SFT           4
1038 #define RT5616_CP_FQ3_MASK          (0x7)
1039 #define RT5616_CP_FQ3_SFT           0
1040 #define RT5616_CP_FQ_1_5_KHZ            0
1041 #define RT5616_CP_FQ_3_KHZ          1
1042 #define RT5616_CP_FQ_6_KHZ          2
1043 #define RT5616_CP_FQ_12_KHZ         3
1044 #define RT5616_CP_FQ_24_KHZ         4
1045 #define RT5616_CP_FQ_48_KHZ         5
1046 #define RT5616_CP_FQ_96_KHZ         6
1047 #define RT5616_CP_FQ_192_KHZ            7
1048 
1049 /* HPOUT charge pump (0x91) */
1050 #define RT5616_OSW_L_MASK           (0x1 << 11)
1051 #define RT5616_OSW_L_SFT            11
1052 #define RT5616_OSW_L_DIS            (0x0 << 11)
1053 #define RT5616_OSW_L_EN             (0x1 << 11)
1054 #define RT5616_OSW_R_MASK           (0x1 << 10)
1055 #define RT5616_OSW_R_SFT            10
1056 #define RT5616_OSW_R_DIS            (0x0 << 10)
1057 #define RT5616_OSW_R_EN             (0x1 << 10)
1058 #define RT5616_PM_HP_MASK           (0x3 << 8)
1059 #define RT5616_PM_HP_SFT            8
1060 #define RT5616_PM_HP_LV             (0x0 << 8)
1061 #define RT5616_PM_HP_MV             (0x1 << 8)
1062 #define RT5616_PM_HP_HV             (0x2 << 8)
1063 #define RT5616_IB_HP_MASK           (0x3 << 6)
1064 #define RT5616_IB_HP_SFT            6
1065 #define RT5616_IB_HP_125IL          (0x0 << 6)
1066 #define RT5616_IB_HP_25IL           (0x1 << 6)
1067 #define RT5616_IB_HP_5IL            (0x2 << 6)
1068 #define RT5616_IB_HP_1IL            (0x3 << 6)
1069 
1070 /* Micbias Control (0x93) */
1071 #define RT5616_MIC1_BS_MASK         (0x1 << 15)
1072 #define RT5616_MIC1_BS_SFT          15
1073 #define RT5616_MIC1_BS_9AV          (0x0 << 15)
1074 #define RT5616_MIC1_BS_75AV         (0x1 << 15)
1075 #define RT5616_MIC1_CLK_MASK            (0x1 << 13)
1076 #define RT5616_MIC1_CLK_SFT         13
1077 #define RT5616_MIC1_CLK_DIS         (0x0 << 13)
1078 #define RT5616_MIC1_CLK_EN          (0x1 << 13)
1079 #define RT5616_MIC1_OVCD_MASK           (0x1 << 11)
1080 #define RT5616_MIC1_OVCD_SFT            11
1081 #define RT5616_MIC1_OVCD_DIS            (0x0 << 11)
1082 #define RT5616_MIC1_OVCD_EN         (0x1 << 11)
1083 #define RT5616_MIC1_OVTH_MASK           (0x3 << 9)
1084 #define RT5616_MIC1_OVTH_SFT            9
1085 #define RT5616_MIC1_OVTH_600UA          (0x0 << 9)
1086 #define RT5616_MIC1_OVTH_1500UA         (0x1 << 9)
1087 #define RT5616_MIC1_OVTH_2000UA         (0x2 << 9)
1088 #define RT5616_PWR_MB_MASK          (0x1 << 5)
1089 #define RT5616_PWR_MB_SFT           5
1090 #define RT5616_PWR_MB_PD            (0x0 << 5)
1091 #define RT5616_PWR_MB_PU            (0x1 << 5)
1092 #define RT5616_PWR_CLK12M_MASK          (0x1 << 4)
1093 #define RT5616_PWR_CLK12M_SFT           4
1094 #define RT5616_PWR_CLK12M_PD            (0x0 << 4)
1095 #define RT5616_PWR_CLK12M_PU            (0x1 << 4)
1096 
1097 /* Analog JD Control 1 (0x94) */
1098 #define RT5616_JD2_CMP_MASK         (0x7 << 12)
1099 #define RT5616_JD2_CMP_SFT          12
1100 #define RT5616_JD_PU                (0x1 << 11)
1101 #define RT5616_JD_PU_SFT            11
1102 #define RT5616_JD_PD                (0x1 << 10)
1103 #define RT5616_JD_PD_SFT            10
1104 #define RT5616_JD_MODE_SEL_MASK         (0x3 << 8)
1105 #define RT5616_JD_MODE_SEL_SFT          8
1106 #define RT5616_JD_MODE_SEL_M0           (0x0 << 8)
1107 #define RT5616_JD_MODE_SEL_M1           (0x1 << 8)
1108 #define RT5616_JD_MODE_SEL_M2           (0x2 << 8)
1109 #define RT5616_JD_M_CMP             (0x7 << 4)
1110 #define RT5616_JD_M_CMP_SFT         4
1111 #define RT5616_JD_M_PU              (0x1 << 3)
1112 #define RT5616_JD_M_PU_SFT          3
1113 #define RT5616_JD_M_PD              (0x1 << 2)
1114 #define RT5616_JD_M_PD_SFT          2
1115 #define RT5616_JD_M_MODE_SEL_MASK       (0x3)
1116 #define RT5616_JD_M_MODE_SEL_SFT        0
1117 #define RT5616_JD_M_MODE_SEL_M0         (0x0)
1118 #define RT5616_JD_M_MODE_SEL_M1         (0x1)
1119 #define RT5616_JD_M_MODE_SEL_M2         (0x2)
1120 
1121 /* Analog JD Control 2 (0x95) */
1122 #define RT5616_JD3_CMP_MASK         (0x7 << 12)
1123 #define RT5616_JD3_CMP_SFT          12
1124 
1125 /* EQ Control 1 (0xb0) */
1126 #define RT5616_EQ_SRC_MASK          (0x1 << 15)
1127 #define RT5616_EQ_SRC_SFT           15
1128 #define RT5616_EQ_SRC_DAC           (0x0 << 15)
1129 #define RT5616_EQ_SRC_ADC           (0x1 << 15)
1130 #define RT5616_EQ_UPD               (0x1 << 14)
1131 #define RT5616_EQ_UPD_BIT           14
1132 #define RT5616_EQ_CD_MASK           (0x1 << 13)
1133 #define RT5616_EQ_CD_SFT            13
1134 #define RT5616_EQ_CD_DIS            (0x0 << 13)
1135 #define RT5616_EQ_CD_EN             (0x1 << 13)
1136 #define RT5616_EQ_DITH_MASK         (0x3 << 8)
1137 #define RT5616_EQ_DITH_SFT          8
1138 #define RT5616_EQ_DITH_NOR          (0x0 << 8)
1139 #define RT5616_EQ_DITH_LSB          (0x1 << 8)
1140 #define RT5616_EQ_DITH_LSB_1            (0x2 << 8)
1141 #define RT5616_EQ_DITH_LSB_2            (0x3 << 8)
1142 #define RT5616_EQ_CD_F              (0x1 << 7)
1143 #define RT5616_EQ_CD_F_BIT          7
1144 #define RT5616_EQ_STA_HP2           (0x1 << 6)
1145 #define RT5616_EQ_STA_HP2_BIT           6
1146 #define RT5616_EQ_STA_HP1           (0x1 << 5)
1147 #define RT5616_EQ_STA_HP1_BIT           5
1148 #define RT5616_EQ_STA_BP4           (0x1 << 4)
1149 #define RT5616_EQ_STA_BP4_BIT           4
1150 #define RT5616_EQ_STA_BP3           (0x1 << 3)
1151 #define RT5616_EQ_STA_BP3_BIT           3
1152 #define RT5616_EQ_STA_BP2           (0x1 << 2)
1153 #define RT5616_EQ_STA_BP2_BIT           2
1154 #define RT5616_EQ_STA_BP1           (0x1 << 1)
1155 #define RT5616_EQ_STA_BP1_BIT           1
1156 #define RT5616_EQ_STA_LP            (0x1)
1157 #define RT5616_EQ_STA_LP_BIT            0
1158 
1159 /* EQ Control 2 (0xb1) */
1160 #define RT5616_EQ_HPF1_M_MASK           (0x1 << 8)
1161 #define RT5616_EQ_HPF1_M_SFT            8
1162 #define RT5616_EQ_HPF1_M_HI         (0x0 << 8)
1163 #define RT5616_EQ_HPF1_M_1ST            (0x1 << 8)
1164 #define RT5616_EQ_LPF1_M_MASK           (0x1 << 7)
1165 #define RT5616_EQ_LPF1_M_SFT            7
1166 #define RT5616_EQ_LPF1_M_LO         (0x0 << 7)
1167 #define RT5616_EQ_LPF1_M_1ST            (0x1 << 7)
1168 #define RT5616_EQ_HPF2_MASK         (0x1 << 6)
1169 #define RT5616_EQ_HPF2_SFT          6
1170 #define RT5616_EQ_HPF2_DIS          (0x0 << 6)
1171 #define RT5616_EQ_HPF2_EN           (0x1 << 6)
1172 #define RT5616_EQ_HPF1_MASK         (0x1 << 5)
1173 #define RT5616_EQ_HPF1_SFT          5
1174 #define RT5616_EQ_HPF1_DIS          (0x0 << 5)
1175 #define RT5616_EQ_HPF1_EN           (0x1 << 5)
1176 #define RT5616_EQ_BPF4_MASK         (0x1 << 4)
1177 #define RT5616_EQ_BPF4_SFT          4
1178 #define RT5616_EQ_BPF4_DIS          (0x0 << 4)
1179 #define RT5616_EQ_BPF4_EN           (0x1 << 4)
1180 #define RT5616_EQ_BPF3_MASK         (0x1 << 3)
1181 #define RT5616_EQ_BPF3_SFT          3
1182 #define RT5616_EQ_BPF3_DIS          (0x0 << 3)
1183 #define RT5616_EQ_BPF3_EN           (0x1 << 3)
1184 #define RT5616_EQ_BPF2_MASK         (0x1 << 2)
1185 #define RT5616_EQ_BPF2_SFT          2
1186 #define RT5616_EQ_BPF2_DIS          (0x0 << 2)
1187 #define RT5616_EQ_BPF2_EN           (0x1 << 2)
1188 #define RT5616_EQ_BPF1_MASK         (0x1 << 1)
1189 #define RT5616_EQ_BPF1_SFT          1
1190 #define RT5616_EQ_BPF1_DIS          (0x0 << 1)
1191 #define RT5616_EQ_BPF1_EN           (0x1 << 1)
1192 #define RT5616_EQ_LPF_MASK          (0x1)
1193 #define RT5616_EQ_LPF_SFT           0
1194 #define RT5616_EQ_LPF_DIS           (0x0)
1195 #define RT5616_EQ_LPF_EN            (0x1)
1196 #define RT5616_EQ_CTRL_MASK         (0x7f)
1197 
1198 /* Memory Test (0xb2) */
1199 #define RT5616_MT_MASK              (0x1 << 15)
1200 #define RT5616_MT_SFT               15
1201 #define RT5616_MT_DIS               (0x0 << 15)
1202 #define RT5616_MT_EN                (0x1 << 15)
1203 
1204 /* DRC/AGC Control 1 (0xb4) */
1205 #define RT5616_DRC_AGC_P_MASK           (0x1 << 15)
1206 #define RT5616_DRC_AGC_P_SFT            15
1207 #define RT5616_DRC_AGC_P_DAC            (0x0 << 15)
1208 #define RT5616_DRC_AGC_P_ADC            (0x1 << 15)
1209 #define RT5616_DRC_AGC_MASK         (0x1 << 14)
1210 #define RT5616_DRC_AGC_SFT          14
1211 #define RT5616_DRC_AGC_DIS          (0x0 << 14)
1212 #define RT5616_DRC_AGC_EN           (0x1 << 14)
1213 #define RT5616_DRC_AGC_UPD          (0x1 << 13)
1214 #define RT5616_DRC_AGC_UPD_BIT          13
1215 #define RT5616_DRC_AGC_AR_MASK          (0x1f << 8)
1216 #define RT5616_DRC_AGC_AR_SFT           8
1217 #define RT5616_DRC_AGC_R_MASK           (0x7 << 5)
1218 #define RT5616_DRC_AGC_R_SFT            5
1219 #define RT5616_DRC_AGC_R_48K            (0x1 << 5)
1220 #define RT5616_DRC_AGC_R_96K            (0x2 << 5)
1221 #define RT5616_DRC_AGC_R_192K           (0x3 << 5)
1222 #define RT5616_DRC_AGC_R_441K           (0x5 << 5)
1223 #define RT5616_DRC_AGC_R_882K           (0x6 << 5)
1224 #define RT5616_DRC_AGC_R_1764K          (0x7 << 5)
1225 #define RT5616_DRC_AGC_RC_MASK          (0x1f)
1226 #define RT5616_DRC_AGC_RC_SFT           0
1227 
1228 /* DRC/AGC Control 2 (0xb5) */
1229 #define RT5616_DRC_AGC_POB_MASK         (0x3f << 8)
1230 #define RT5616_DRC_AGC_POB_SFT          8
1231 #define RT5616_DRC_AGC_CP_MASK          (0x1 << 7)
1232 #define RT5616_DRC_AGC_CP_SFT           7
1233 #define RT5616_DRC_AGC_CP_DIS           (0x0 << 7)
1234 #define RT5616_DRC_AGC_CP_EN            (0x1 << 7)
1235 #define RT5616_DRC_AGC_CPR_MASK         (0x3 << 5)
1236 #define RT5616_DRC_AGC_CPR_SFT          5
1237 #define RT5616_DRC_AGC_CPR_1_1          (0x0 << 5)
1238 #define RT5616_DRC_AGC_CPR_1_2          (0x1 << 5)
1239 #define RT5616_DRC_AGC_CPR_1_3          (0x2 << 5)
1240 #define RT5616_DRC_AGC_CPR_1_4          (0x3 << 5)
1241 #define RT5616_DRC_AGC_PRB_MASK         (0x1f)
1242 #define RT5616_DRC_AGC_PRB_SFT          0
1243 
1244 /* DRC/AGC Control 3 (0xb6) */
1245 #define RT5616_DRC_AGC_NGB_MASK         (0xf << 12)
1246 #define RT5616_DRC_AGC_NGB_SFT          12
1247 #define RT5616_DRC_AGC_TAR_MASK         (0x1f << 7)
1248 #define RT5616_DRC_AGC_TAR_SFT          7
1249 #define RT5616_DRC_AGC_NG_MASK          (0x1 << 6)
1250 #define RT5616_DRC_AGC_NG_SFT           6
1251 #define RT5616_DRC_AGC_NG_DIS           (0x0 << 6)
1252 #define RT5616_DRC_AGC_NG_EN            (0x1 << 6)
1253 #define RT5616_DRC_AGC_NGH_MASK         (0x1 << 5)
1254 #define RT5616_DRC_AGC_NGH_SFT          5
1255 #define RT5616_DRC_AGC_NGH_DIS          (0x0 << 5)
1256 #define RT5616_DRC_AGC_NGH_EN           (0x1 << 5)
1257 #define RT5616_DRC_AGC_NGT_MASK         (0x1f)
1258 #define RT5616_DRC_AGC_NGT_SFT          0
1259 
1260 /* Jack Detect Control 1 (0xbb) */
1261 #define RT5616_JD_MASK              (0x7 << 13)
1262 #define RT5616_JD_SFT               13
1263 #define RT5616_JD_DIS               (0x0 << 13)
1264 #define RT5616_JD_GPIO1             (0x1 << 13)
1265 #define RT5616_JD_GPIO2             (0x2 << 13)
1266 #define RT5616_JD_GPIO3             (0x3 << 13)
1267 #define RT5616_JD_GPIO4             (0x4 << 13)
1268 #define RT5616_JD_GPIO5             (0x5 << 13)
1269 #define RT5616_JD_GPIO6             (0x6 << 13)
1270 #define RT5616_JD_HP_MASK           (0x1 << 11)
1271 #define RT5616_JD_HP_SFT            11
1272 #define RT5616_JD_HP_DIS            (0x0 << 11)
1273 #define RT5616_JD_HP_EN             (0x1 << 11)
1274 #define RT5616_JD_HP_TRG_MASK           (0x1 << 10)
1275 #define RT5616_JD_HP_TRG_SFT            10
1276 #define RT5616_JD_HP_TRG_LO         (0x0 << 10)
1277 #define RT5616_JD_HP_TRG_HI         (0x1 << 10)
1278 #define RT5616_JD_SPL_MASK          (0x1 << 9)
1279 #define RT5616_JD_SPL_SFT           9
1280 #define RT5616_JD_SPL_DIS           (0x0 << 9)
1281 #define RT5616_JD_SPL_EN            (0x1 << 9)
1282 #define RT5616_JD_SPL_TRG_MASK          (0x1 << 8)
1283 #define RT5616_JD_SPL_TRG_SFT           8
1284 #define RT5616_JD_SPL_TRG_LO            (0x0 << 8)
1285 #define RT5616_JD_SPL_TRG_HI            (0x1 << 8)
1286 #define RT5616_JD_SPR_MASK          (0x1 << 7)
1287 #define RT5616_JD_SPR_SFT           7
1288 #define RT5616_JD_SPR_DIS           (0x0 << 7)
1289 #define RT5616_JD_SPR_EN            (0x1 << 7)
1290 #define RT5616_JD_SPR_TRG_MASK          (0x1 << 6)
1291 #define RT5616_JD_SPR_TRG_SFT           6
1292 #define RT5616_JD_SPR_TRG_LO            (0x0 << 6)
1293 #define RT5616_JD_SPR_TRG_HI            (0x1 << 6)
1294 #define RT5616_JD_LO_MASK           (0x1 << 3)
1295 #define RT5616_JD_LO_SFT            3
1296 #define RT5616_JD_LO_DIS            (0x0 << 3)
1297 #define RT5616_JD_LO_EN             (0x1 << 3)
1298 #define RT5616_JD_LO_TRG_MASK           (0x1 << 2)
1299 #define RT5616_JD_LO_TRG_SFT            2
1300 #define RT5616_JD_LO_TRG_LO         (0x0 << 2)
1301 #define RT5616_JD_LO_TRG_HI         (0x1 << 2)
1302 
1303 /* Jack Detect Control 2 (0xbc) */
1304 #define RT5616_JD_TRG_SEL_MASK          (0x7 << 9)
1305 #define RT5616_JD_TRG_SEL_SFT           9
1306 #define RT5616_JD_TRG_SEL_GPIO          (0x0 << 9)
1307 #define RT5616_JD_TRG_SEL_JD1_1         (0x1 << 9)
1308 #define RT5616_JD_TRG_SEL_JD1_2         (0x2 << 9)
1309 #define RT5616_JD_TRG_SEL_JD2           (0x3 << 9)
1310 #define RT5616_JD_TRG_SEL_JD3           (0x4 << 9)
1311 #define RT5616_JD3_IRQ_EN           (0x1 << 8)
1312 #define RT5616_JD3_IRQ_EN_SFT           8
1313 #define RT5616_JD3_EN_STKY          (0x1 << 7)
1314 #define RT5616_JD3_EN_STKY_SFT          7
1315 #define RT5616_JD3_INV              (0x1 << 6)
1316 #define RT5616_JD3_INV_SFT          6
1317 
1318 /* IRQ Control 1 (0xbd) */
1319 #define RT5616_IRQ_JD_MASK          (0x1 << 15)
1320 #define RT5616_IRQ_JD_SFT           15
1321 #define RT5616_IRQ_JD_BP            (0x0 << 15)
1322 #define RT5616_IRQ_JD_NOR           (0x1 << 15)
1323 #define RT5616_JD_STKY_MASK         (0x1 << 13)
1324 #define RT5616_JD_STKY_SFT          13
1325 #define RT5616_JD_STKY_DIS          (0x0 << 13)
1326 #define RT5616_JD_STKY_EN           (0x1 << 13)
1327 #define RT5616_JD_P_MASK            (0x1 << 11)
1328 #define RT5616_JD_P_SFT             11
1329 #define RT5616_JD_P_NOR             (0x0 << 11)
1330 #define RT5616_JD_P_INV             (0x1 << 11)
1331 #define RT5616_JD1_1_IRQ_EN         (0x1 << 9)
1332 #define RT5616_JD1_1_IRQ_EN_SFT         9
1333 #define RT5616_JD1_1_EN_STKY            (0x1 << 8)
1334 #define RT5616_JD1_1_EN_STKY_SFT            8
1335 #define RT5616_JD1_1_INV            (0x1 << 7)
1336 #define RT5616_JD1_1_INV_SFT            7
1337 #define RT5616_JD1_2_IRQ_EN         (0x1 << 6)
1338 #define RT5616_JD1_2_IRQ_EN_SFT         6
1339 #define RT5616_JD1_2_EN_STKY            (0x1 << 5)
1340 #define RT5616_JD1_2_EN_STKY_SFT            5
1341 #define RT5616_JD1_2_INV            (0x1 << 4)
1342 #define RT5616_JD1_2_INV_SFT            4
1343 #define RT5616_JD2_IRQ_EN           (0x1 << 3)
1344 #define RT5616_JD2_IRQ_EN_SFT           3
1345 #define RT5616_JD2_EN_STKY          (0x1 << 2)
1346 #define RT5616_JD2_EN_STKY_SFT          2
1347 #define RT5616_JD2_INV              (0x1 << 1)
1348 #define RT5616_JD2_INV_SFT          1
1349 
1350 /* IRQ Control 2 (0xbe) */
1351 #define RT5616_IRQ_MB1_OC_MASK          (0x1 << 15)
1352 #define RT5616_IRQ_MB1_OC_SFT           15
1353 #define RT5616_IRQ_MB1_OC_BP            (0x0 << 15)
1354 #define RT5616_IRQ_MB1_OC_NOR           (0x1 << 15)
1355 #define RT5616_MB1_OC_STKY_MASK         (0x1 << 11)
1356 #define RT5616_MB1_OC_STKY_SFT          11
1357 #define RT5616_MB1_OC_STKY_DIS          (0x0 << 11)
1358 #define RT5616_MB1_OC_STKY_EN           (0x1 << 11)
1359 #define RT5616_MB1_OC_P_MASK            (0x1 << 7)
1360 #define RT5616_MB1_OC_P_SFT         7
1361 #define RT5616_MB1_OC_P_NOR         (0x0 << 7)
1362 #define RT5616_MB1_OC_P_INV         (0x1 << 7)
1363 #define RT5616_MB2_OC_P_MASK            (0x1 << 6)
1364 #define RT5616_MB1_OC_CLR           (0x1 << 3)
1365 #define RT5616_MB1_OC_CLR_SFT           3
1366 #define RT5616_STA_GPIO8            (0x1)
1367 #define RT5616_STA_GPIO8_BIT            0
1368 
1369 /* Internal Status and GPIO status (0xbf) */
1370 #define RT5616_STA_JD3              (0x1 << 15)
1371 #define RT5616_STA_JD3_BIT          15
1372 #define RT5616_STA_JD2              (0x1 << 14)
1373 #define RT5616_STA_JD2_BIT          14
1374 #define RT5616_STA_JD1_2            (0x1 << 13)
1375 #define RT5616_STA_JD1_2_BIT            13
1376 #define RT5616_STA_JD1_1            (0x1 << 12)
1377 #define RT5616_STA_JD1_1_BIT            12
1378 #define RT5616_STA_GP7              (0x1 << 11)
1379 #define RT5616_STA_GP7_BIT          11
1380 #define RT5616_STA_GP6              (0x1 << 10)
1381 #define RT5616_STA_GP6_BIT          10
1382 #define RT5616_STA_GP5              (0x1 << 9)
1383 #define RT5616_STA_GP5_BIT          9
1384 #define RT5616_STA_GP1              (0x1 << 8)
1385 #define RT5616_STA_GP1_BIT          8
1386 #define RT5616_STA_GP2              (0x1 << 7)
1387 #define RT5616_STA_GP2_BIT          7
1388 #define RT5616_STA_GP3              (0x1 << 6)
1389 #define RT5616_STA_GP3_BIT          6
1390 #define RT5616_STA_GP4              (0x1 << 5)
1391 #define RT5616_STA_GP4_BIT          5
1392 #define RT5616_STA_GP_JD            (0x1 << 4)
1393 #define RT5616_STA_GP_JD_BIT            4
1394 
1395 /* GPIO Control 1 (0xc0) */
1396 #define RT5616_GP1_PIN_MASK         (0x1 << 15)
1397 #define RT5616_GP1_PIN_SFT          15
1398 #define RT5616_GP1_PIN_GPIO1            (0x0 << 15)
1399 #define RT5616_GP1_PIN_IRQ          (0x1 << 15)
1400 #define RT5616_GP2_PIN_MASK         (0x1 << 14)
1401 #define RT5616_GP2_PIN_SFT          14
1402 #define RT5616_GP2_PIN_GPIO2            (0x0 << 14)
1403 #define RT5616_GP2_PIN_DMIC1_SCL        (0x1 << 14)
1404 #define RT5616_GPIO_M_MASK          (0x1 << 9)
1405 #define RT5616_GPIO_M_SFT           9
1406 #define RT5616_GPIO_M_FLT           (0x0 << 9)
1407 #define RT5616_GPIO_M_PH            (0x1 << 9)
1408 #define RT5616_I2S2_SEL_MASK            (0x1 << 8)
1409 #define RT5616_I2S2_SEL_SFT         8
1410 #define RT5616_I2S2_SEL_I2S         (0x0 << 8)
1411 #define RT5616_I2S2_SEL_GPIO            (0x1 << 8)
1412 #define RT5616_GP5_PIN_MASK         (0x1 << 7)
1413 #define RT5616_GP5_PIN_SFT          7
1414 #define RT5616_GP5_PIN_GPIO5            (0x0 << 7)
1415 #define RT5616_GP5_PIN_IRQ          (0x1 << 7)
1416 #define RT5616_GP6_PIN_MASK         (0x1 << 6)
1417 #define RT5616_GP6_PIN_SFT          6
1418 #define RT5616_GP6_PIN_GPIO6            (0x0 << 6)
1419 #define RT5616_GP6_PIN_DMIC_SDA         (0x1 << 6)
1420 #define RT5616_GP7_PIN_MASK         (0x1 << 5)
1421 #define RT5616_GP7_PIN_SFT          5
1422 #define RT5616_GP7_PIN_GPIO7            (0x0 << 5)
1423 #define RT5616_GP7_PIN_IRQ          (0x1 << 5)
1424 #define RT5616_GP8_PIN_MASK         (0x1 << 4)
1425 #define RT5616_GP8_PIN_SFT          4
1426 #define RT5616_GP8_PIN_GPIO8            (0x0 << 4)
1427 #define RT5616_GP8_PIN_DMIC_SDA         (0x1 << 4)
1428 #define RT5616_GPIO_PDM_SEL_MASK        (0x1 << 3)
1429 #define RT5616_GPIO_PDM_SEL_SFT         3
1430 #define RT5616_GPIO_PDM_SEL_GPIO        (0x0 << 3)
1431 #define RT5616_GPIO_PDM_SEL_PDM         (0x1 << 3)
1432 
1433 /* GPIO Control 2 (0xc1) */
1434 #define RT5616_GP5_DR_MASK          (0x1 << 14)
1435 #define RT5616_GP5_DR_SFT           14
1436 #define RT5616_GP5_DR_IN            (0x0 << 14)
1437 #define RT5616_GP5_DR_OUT           (0x1 << 14)
1438 #define RT5616_GP5_OUT_MASK         (0x1 << 13)
1439 #define RT5616_GP5_OUT_SFT          13
1440 #define RT5616_GP5_OUT_LO           (0x0 << 13)
1441 #define RT5616_GP5_OUT_HI           (0x1 << 13)
1442 #define RT5616_GP5_P_MASK           (0x1 << 12)
1443 #define RT5616_GP5_P_SFT            12
1444 #define RT5616_GP5_P_NOR            (0x0 << 12)
1445 #define RT5616_GP5_P_INV            (0x1 << 12)
1446 #define RT5616_GP4_DR_MASK          (0x1 << 11)
1447 #define RT5616_GP4_DR_SFT           11
1448 #define RT5616_GP4_DR_IN            (0x0 << 11)
1449 #define RT5616_GP4_DR_OUT           (0x1 << 11)
1450 #define RT5616_GP4_OUT_MASK         (0x1 << 10)
1451 #define RT5616_GP4_OUT_SFT          10
1452 #define RT5616_GP4_OUT_LO           (0x0 << 10)
1453 #define RT5616_GP4_OUT_HI           (0x1 << 10)
1454 #define RT5616_GP4_P_MASK           (0x1 << 9)
1455 #define RT5616_GP4_P_SFT            9
1456 #define RT5616_GP4_P_NOR            (0x0 << 9)
1457 #define RT5616_GP4_P_INV            (0x1 << 9)
1458 #define RT5616_GP3_DR_MASK          (0x1 << 8)
1459 #define RT5616_GP3_DR_SFT           8
1460 #define RT5616_GP3_DR_IN            (0x0 << 8)
1461 #define RT5616_GP3_DR_OUT           (0x1 << 8)
1462 #define RT5616_GP3_OUT_MASK         (0x1 << 7)
1463 #define RT5616_GP3_OUT_SFT          7
1464 #define RT5616_GP3_OUT_LO           (0x0 << 7)
1465 #define RT5616_GP3_OUT_HI           (0x1 << 7)
1466 #define RT5616_GP3_P_MASK           (0x1 << 6)
1467 #define RT5616_GP3_P_SFT            6
1468 #define RT5616_GP3_P_NOR            (0x0 << 6)
1469 #define RT5616_GP3_P_INV            (0x1 << 6)
1470 #define RT5616_GP2_DR_MASK          (0x1 << 5)
1471 #define RT5616_GP2_DR_SFT           5
1472 #define RT5616_GP2_DR_IN            (0x0 << 5)
1473 #define RT5616_GP2_DR_OUT           (0x1 << 5)
1474 #define RT5616_GP2_OUT_MASK         (0x1 << 4)
1475 #define RT5616_GP2_OUT_SFT          4
1476 #define RT5616_GP2_OUT_LO           (0x0 << 4)
1477 #define RT5616_GP2_OUT_HI           (0x1 << 4)
1478 #define RT5616_GP2_P_MASK           (0x1 << 3)
1479 #define RT5616_GP2_P_SFT            3
1480 #define RT5616_GP2_P_NOR            (0x0 << 3)
1481 #define RT5616_GP2_P_INV            (0x1 << 3)
1482 #define RT5616_GP1_DR_MASK          (0x1 << 2)
1483 #define RT5616_GP1_DR_SFT           2
1484 #define RT5616_GP1_DR_IN            (0x0 << 2)
1485 #define RT5616_GP1_DR_OUT           (0x1 << 2)
1486 #define RT5616_GP1_OUT_MASK         (0x1 << 1)
1487 #define RT5616_GP1_OUT_SFT          1
1488 #define RT5616_GP1_OUT_LO           (0x0 << 1)
1489 #define RT5616_GP1_OUT_HI           (0x1 << 1)
1490 #define RT5616_GP1_P_MASK           (0x1)
1491 #define RT5616_GP1_P_SFT            0
1492 #define RT5616_GP1_P_NOR            (0x0)
1493 #define RT5616_GP1_P_INV            (0x1)
1494 
1495 /* GPIO Control 3 (0xc2) */
1496 #define RT5616_GP8_DR_MASK          (0x1 << 8)
1497 #define RT5616_GP8_DR_SFT           8
1498 #define RT5616_GP8_DR_IN            (0x0 << 8)
1499 #define RT5616_GP8_DR_OUT           (0x1 << 8)
1500 #define RT5616_GP8_OUT_MASK         (0x1 << 7)
1501 #define RT5616_GP8_OUT_SFT          7
1502 #define RT5616_GP8_OUT_LO           (0x0 << 7)
1503 #define RT5616_GP8_OUT_HI           (0x1 << 7)
1504 #define RT5616_GP8_P_MASK           (0x1 << 6)
1505 #define RT5616_GP8_P_SFT            6
1506 #define RT5616_GP8_P_NOR            (0x0 << 6)
1507 #define RT5616_GP8_P_INV            (0x1 << 6)
1508 #define RT5616_GP7_DR_MASK          (0x1 << 5)
1509 #define RT5616_GP7_DR_SFT           5
1510 #define RT5616_GP7_DR_IN            (0x0 << 5)
1511 #define RT5616_GP7_DR_OUT           (0x1 << 5)
1512 #define RT5616_GP7_OUT_MASK         (0x1 << 4)
1513 #define RT5616_GP7_OUT_SFT          4
1514 #define RT5616_GP7_OUT_LO           (0x0 << 4)
1515 #define RT5616_GP7_OUT_HI           (0x1 << 4)
1516 #define RT5616_GP7_P_MASK           (0x1 << 3)
1517 #define RT5616_GP7_P_SFT            3
1518 #define RT5616_GP7_P_NOR            (0x0 << 3)
1519 #define RT5616_GP7_P_INV            (0x1 << 3)
1520 #define RT5616_GP6_DR_MASK          (0x1 << 2)
1521 #define RT5616_GP6_DR_SFT           2
1522 #define RT5616_GP6_DR_IN            (0x0 << 2)
1523 #define RT5616_GP6_DR_OUT           (0x1 << 2)
1524 #define RT5616_GP6_OUT_MASK         (0x1 << 1)
1525 #define RT5616_GP6_OUT_SFT          1
1526 #define RT5616_GP6_OUT_LO           (0x0 << 1)
1527 #define RT5616_GP6_OUT_HI           (0x1 << 1)
1528 #define RT5616_GP6_P_MASK           (0x1)
1529 #define RT5616_GP6_P_SFT            0
1530 #define RT5616_GP6_P_NOR            (0x0)
1531 #define RT5616_GP6_P_INV            (0x1)
1532 
1533 /* Scramble Control (0xce) */
1534 #define RT5616_SCB_SWAP_MASK            (0x1 << 15)
1535 #define RT5616_SCB_SWAP_SFT         15
1536 #define RT5616_SCB_SWAP_DIS         (0x0 << 15)
1537 #define RT5616_SCB_SWAP_EN          (0x1 << 15)
1538 #define RT5616_SCB_MASK             (0x1 << 14)
1539 #define RT5616_SCB_SFT              14
1540 #define RT5616_SCB_DIS              (0x0 << 14)
1541 #define RT5616_SCB_EN               (0x1 << 14)
1542 
1543 /* Baseback Control (0xcf) */
1544 #define RT5616_BB_MASK              (0x1 << 15)
1545 #define RT5616_BB_SFT               15
1546 #define RT5616_BB_DIS               (0x0 << 15)
1547 #define RT5616_BB_EN                (0x1 << 15)
1548 #define RT5616_BB_CT_MASK           (0x7 << 12)
1549 #define RT5616_BB_CT_SFT            12
1550 #define RT5616_BB_CT_A              (0x0 << 12)
1551 #define RT5616_BB_CT_B              (0x1 << 12)
1552 #define RT5616_BB_CT_C              (0x2 << 12)
1553 #define RT5616_BB_CT_D              (0x3 << 12)
1554 #define RT5616_M_BB_L_MASK          (0x1 << 9)
1555 #define RT5616_M_BB_L_SFT           9
1556 #define RT5616_M_BB_R_MASK          (0x1 << 8)
1557 #define RT5616_M_BB_R_SFT           8
1558 #define RT5616_M_BB_HPF_L_MASK          (0x1 << 7)
1559 #define RT5616_M_BB_HPF_L_SFT           7
1560 #define RT5616_M_BB_HPF_R_MASK          (0x1 << 6)
1561 #define RT5616_M_BB_HPF_R_SFT           6
1562 #define RT5616_G_BB_BST_MASK            (0x3f)
1563 #define RT5616_G_BB_BST_SFT         0
1564 
1565 /* MP3 Plus Control 1 (0xd0) */
1566 #define RT5616_M_MP3_L_MASK         (0x1 << 15)
1567 #define RT5616_M_MP3_L_SFT          15
1568 #define RT5616_M_MP3_R_MASK         (0x1 << 14)
1569 #define RT5616_M_MP3_R_SFT          14
1570 #define RT5616_M_MP3_MASK           (0x1 << 13)
1571 #define RT5616_M_MP3_SFT            13
1572 #define RT5616_M_MP3_DIS            (0x0 << 13)
1573 #define RT5616_M_MP3_EN             (0x1 << 13)
1574 #define RT5616_EG_MP3_MASK          (0x1f << 8)
1575 #define RT5616_EG_MP3_SFT           8
1576 #define RT5616_MP3_HLP_MASK         (0x1 << 7)
1577 #define RT5616_MP3_HLP_SFT          7
1578 #define RT5616_MP3_HLP_DIS          (0x0 << 7)
1579 #define RT5616_MP3_HLP_EN           (0x1 << 7)
1580 #define RT5616_M_MP3_ORG_L_MASK         (0x1 << 6)
1581 #define RT5616_M_MP3_ORG_L_SFT          6
1582 #define RT5616_M_MP3_ORG_R_MASK         (0x1 << 5)
1583 #define RT5616_M_MP3_ORG_R_SFT          5
1584 
1585 /* MP3 Plus Control 2 (0xd1) */
1586 #define RT5616_MP3_WT_MASK          (0x1 << 13)
1587 #define RT5616_MP3_WT_SFT           13
1588 #define RT5616_MP3_WT_1_4           (0x0 << 13)
1589 #define RT5616_MP3_WT_1_2           (0x1 << 13)
1590 #define RT5616_OG_MP3_MASK          (0x1f << 8)
1591 #define RT5616_OG_MP3_SFT           8
1592 #define RT5616_HG_MP3_MASK          (0x3f)
1593 #define RT5616_HG_MP3_SFT           0
1594 
1595 /* 3D HP Control 1 (0xd2) */
1596 #define RT5616_3D_CF_MASK           (0x1 << 15)
1597 #define RT5616_3D_CF_SFT            15
1598 #define RT5616_3D_CF_DIS            (0x0 << 15)
1599 #define RT5616_3D_CF_EN             (0x1 << 15)
1600 #define RT5616_3D_HP_MASK           (0x1 << 14)
1601 #define RT5616_3D_HP_SFT            14
1602 #define RT5616_3D_HP_DIS            (0x0 << 14)
1603 #define RT5616_3D_HP_EN             (0x1 << 14)
1604 #define RT5616_3D_BT_MASK           (0x1 << 13)
1605 #define RT5616_3D_BT_SFT            13
1606 #define RT5616_3D_BT_DIS            (0x0 << 13)
1607 #define RT5616_3D_BT_EN             (0x1 << 13)
1608 #define RT5616_3D_1F_MIX_MASK           (0x3 << 11)
1609 #define RT5616_3D_1F_MIX_SFT            11
1610 #define RT5616_3D_HP_M_MASK         (0x1 << 10)
1611 #define RT5616_3D_HP_M_SFT          10
1612 #define RT5616_3D_HP_M_SUR          (0x0 << 10)
1613 #define RT5616_3D_HP_M_FRO          (0x1 << 10)
1614 #define RT5616_M_3D_HRTF_MASK           (0x1 << 9)
1615 #define RT5616_M_3D_HRTF_SFT            9
1616 #define RT5616_M_3D_D2H_MASK            (0x1 << 8)
1617 #define RT5616_M_3D_D2H_SFT         8
1618 #define RT5616_M_3D_D2R_MASK            (0x1 << 7)
1619 #define RT5616_M_3D_D2R_SFT         7
1620 #define RT5616_M_3D_REVB_MASK           (0x1 << 6)
1621 #define RT5616_M_3D_REVB_SFT            6
1622 
1623 /* Adjustable high pass filter control 1 (0xd3) */
1624 #define RT5616_2ND_HPF_MASK         (0x1 << 15)
1625 #define RT5616_2ND_HPF_SFT          15
1626 #define RT5616_2ND_HPF_DIS          (0x0 << 15)
1627 #define RT5616_2ND_HPF_EN           (0x1 << 15)
1628 #define RT5616_HPF_CF_L_MASK            (0x7 << 12)
1629 #define RT5616_HPF_CF_L_SFT         12
1630 #define RT5616_HPF_CF_R_MASK            (0x7 << 8)
1631 #define RT5616_HPF_CF_R_SFT         8
1632 #define RT5616_ZD_T_MASK            (0x3 << 6)
1633 #define RT5616_ZD_T_SFT             6
1634 #define RT5616_ZD_F_MASK            (0x3 << 4)
1635 #define RT5616_ZD_F_SFT             4
1636 #define RT5616_ZD_F_IM              (0x0 << 4)
1637 #define RT5616_ZD_F_ZC_IM           (0x1 << 4)
1638 #define RT5616_ZD_F_ZC_IOD          (0x2 << 4)
1639 #define RT5616_ZD_F_UN              (0x3 << 4)
1640 
1641 /* Adjustable high pass filter control 2 (0xd4) */
1642 #define RT5616_HPF_CF_L_NUM_MASK        (0x3f << 8)
1643 #define RT5616_HPF_CF_L_NUM_SFT         8
1644 #define RT5616_HPF_CF_R_NUM_MASK        (0x3f)
1645 #define RT5616_HPF_CF_R_NUM_SFT         0
1646 
1647 /* HP calibration control and Amp detection (0xd6) */
1648 #define RT5616_SI_DAC_MASK          (0x1 << 11)
1649 #define RT5616_SI_DAC_SFT           11
1650 #define RT5616_SI_DAC_AUTO          (0x0 << 11)
1651 #define RT5616_SI_DAC_TEST          (0x1 << 11)
1652 #define RT5616_DC_CAL_M_MASK            (0x1 << 10)
1653 #define RT5616_DC_CAL_M_SFT         10
1654 #define RT5616_DC_CAL_M_NOR         (0x0 << 10)
1655 #define RT5616_DC_CAL_M_CAL         (0x1 << 10)
1656 #define RT5616_DC_CAL_MASK          (0x1 << 9)
1657 #define RT5616_DC_CAL_SFT           9
1658 #define RT5616_DC_CAL_DIS           (0x0 << 9)
1659 #define RT5616_DC_CAL_EN            (0x1 << 9)
1660 #define RT5616_HPD_RCV_MASK         (0x7 << 6)
1661 #define RT5616_HPD_RCV_SFT          6
1662 #define RT5616_HPD_PS_MASK          (0x1 << 5)
1663 #define RT5616_HPD_PS_SFT           5
1664 #define RT5616_HPD_PS_DIS           (0x0 << 5)
1665 #define RT5616_HPD_PS_EN            (0x1 << 5)
1666 #define RT5616_CAL_M_MASK           (0x1 << 4)
1667 #define RT5616_CAL_M_SFT            4
1668 #define RT5616_CAL_M_DEP            (0x0 << 4)
1669 #define RT5616_CAL_M_CAL            (0x1 << 4)
1670 #define RT5616_CAL_MASK             (0x1 << 3)
1671 #define RT5616_CAL_SFT              3
1672 #define RT5616_CAL_DIS              (0x0 << 3)
1673 #define RT5616_CAL_EN               (0x1 << 3)
1674 #define RT5616_CAL_TEST_MASK            (0x1 << 2)
1675 #define RT5616_CAL_TEST_SFT         2
1676 #define RT5616_CAL_TEST_DIS         (0x0 << 2)
1677 #define RT5616_CAL_TEST_EN          (0x1 << 2)
1678 #define RT5616_CAL_P_MASK           (0x3)
1679 #define RT5616_CAL_P_SFT            0
1680 #define RT5616_CAL_P_NONE           (0x0)
1681 #define RT5616_CAL_P_CAL            (0x1)
1682 #define RT5616_CAL_P_DAC_CAL            (0x2)
1683 
1684 /* Soft volume and zero cross control 1 (0xd9) */
1685 #define RT5616_SV_MASK              (0x1 << 15)
1686 #define RT5616_SV_SFT               15
1687 #define RT5616_SV_DIS               (0x0 << 15)
1688 #define RT5616_SV_EN                (0x1 << 15)
1689 #define RT5616_OUT_SV_MASK          (0x1 << 13)
1690 #define RT5616_OUT_SV_SFT           13
1691 #define RT5616_OUT_SV_DIS           (0x0 << 13)
1692 #define RT5616_OUT_SV_EN            (0x1 << 13)
1693 #define RT5616_HP_SV_MASK           (0x1 << 12)
1694 #define RT5616_HP_SV_SFT            12
1695 #define RT5616_HP_SV_DIS            (0x0 << 12)
1696 #define RT5616_HP_SV_EN             (0x1 << 12)
1697 #define RT5616_ZCD_DIG_MASK         (0x1 << 11)
1698 #define RT5616_ZCD_DIG_SFT          11
1699 #define RT5616_ZCD_DIG_DIS          (0x0 << 11)
1700 #define RT5616_ZCD_DIG_EN           (0x1 << 11)
1701 #define RT5616_ZCD_MASK             (0x1 << 10)
1702 #define RT5616_ZCD_SFT              10
1703 #define RT5616_ZCD_PD               (0x0 << 10)
1704 #define RT5616_ZCD_PU               (0x1 << 10)
1705 #define RT5616_M_ZCD_MASK           (0x3f << 4)
1706 #define RT5616_M_ZCD_SFT            4
1707 #define RT5616_M_ZCD_OM_L           (0x1 << 7)
1708 #define RT5616_M_ZCD_OM_R           (0x1 << 6)
1709 #define RT5616_M_ZCD_RM_L           (0x1 << 5)
1710 #define RT5616_M_ZCD_RM_R           (0x1 << 4)
1711 #define RT5616_SV_DLY_MASK          (0xf)
1712 #define RT5616_SV_DLY_SFT           0
1713 
1714 /* Soft volume and zero cross control 2 (0xda) */
1715 #define RT5616_ZCD_HP_MASK          (0x1 << 15)
1716 #define RT5616_ZCD_HP_SFT           15
1717 #define RT5616_ZCD_HP_DIS           (0x0 << 15)
1718 #define RT5616_ZCD_HP_EN            (0x1 << 15)
1719 
1720 /* Digital Misc Control (0xfa) */
1721 #define RT5616_I2S2_MS_SP_MASK          (0x1 << 8)
1722 #define RT5616_I2S2_MS_SP_SEL           8
1723 #define RT5616_I2S2_MS_SP_64            (0x0 << 8)
1724 #define RT5616_I2S2_MS_SP_50            (0x1 << 8)
1725 #define RT5616_CLK_DET_EN           (0x1 << 3)
1726 #define RT5616_CLK_DET_EN_SFT           3
1727 #define RT5616_AMP_DET_EN           (0x1 << 1)
1728 #define RT5616_AMP_DET_EN_SFT           1
1729 #define RT5616_D_GATE_EN            (0x1)
1730 #define RT5616_D_GATE_EN_SFT            0
1731 
1732 /* Codec Private Register definition */
1733 /* 3D Speaker Control (0x63) */
1734 #define RT5616_3D_SPK_MASK          (0x1 << 15)
1735 #define RT5616_3D_SPK_SFT           15
1736 #define RT5616_3D_SPK_DIS           (0x0 << 15)
1737 #define RT5616_3D_SPK_EN            (0x1 << 15)
1738 #define RT5616_3D_SPK_M_MASK            (0x3 << 13)
1739 #define RT5616_3D_SPK_M_SFT         13
1740 #define RT5616_3D_SPK_CG_MASK           (0x1f << 8)
1741 #define RT5616_3D_SPK_CG_SFT            8
1742 #define RT5616_3D_SPK_SG_MASK           (0x1f)
1743 #define RT5616_3D_SPK_SG_SFT            0
1744 
1745 /* Wind Noise Detection Control 1 (0x6c) */
1746 #define RT5616_WND_MASK             (0x1 << 15)
1747 #define RT5616_WND_SFT              15
1748 #define RT5616_WND_DIS              (0x0 << 15)
1749 #define RT5616_WND_EN               (0x1 << 15)
1750 
1751 /* Wind Noise Detection Control 2 (0x6d) */
1752 #define RT5616_WND_FC_NW_MASK           (0x3f << 10)
1753 #define RT5616_WND_FC_NW_SFT            10
1754 #define RT5616_WND_FC_WK_MASK           (0x3f << 4)
1755 #define RT5616_WND_FC_WK_SFT            4
1756 
1757 /* Wind Noise Detection Control 3 (0x6e) */
1758 #define RT5616_HPF_FC_MASK          (0x3f << 6)
1759 #define RT5616_HPF_FC_SFT           6
1760 #define RT5616_WND_FC_ST_MASK           (0x3f)
1761 #define RT5616_WND_FC_ST_SFT            0
1762 
1763 /* Wind Noise Detection Control 4 (0x6f) */
1764 #define RT5616_WND_TH_LO_MASK           (0x3ff)
1765 #define RT5616_WND_TH_LO_SFT            0
1766 
1767 /* Wind Noise Detection Control 5 (0x70) */
1768 #define RT5616_WND_TH_HI_MASK           (0x3ff)
1769 #define RT5616_WND_TH_HI_SFT            0
1770 
1771 /* Wind Noise Detection Control 8 (0x73) */
1772 #define RT5616_WND_WIND_MASK            (0x1 << 13) /* Read-Only */
1773 #define RT5616_WND_WIND_SFT         13
1774 #define RT5616_WND_STRONG_MASK          (0x1 << 12) /* Read-Only */
1775 #define RT5616_WND_STRONG_SFT           12
1776 enum {
1777     RT5616_NO_WIND,
1778     RT5616_BREEZE,
1779     RT5616_STORM,
1780 };
1781 
1782 /* Dipole Speaker Interface (0x75) */
1783 #define RT5616_DP_ATT_MASK          (0x3 << 14)
1784 #define RT5616_DP_ATT_SFT           14
1785 #define RT5616_DP_SPK_MASK          (0x1 << 10)
1786 #define RT5616_DP_SPK_SFT           10
1787 #define RT5616_DP_SPK_DIS           (0x0 << 10)
1788 #define RT5616_DP_SPK_EN            (0x1 << 10)
1789 
1790 /* EQ Pre Volume Control (0xb3) */
1791 #define RT5616_EQ_PRE_VOL_MASK          (0xffff)
1792 #define RT5616_EQ_PRE_VOL_SFT           0
1793 
1794 /* EQ Post Volume Control (0xb4) */
1795 #define RT5616_EQ_PST_VOL_MASK          (0xffff)
1796 #define RT5616_EQ_PST_VOL_SFT           0
1797 
1798 /* System Clock Source */
1799 enum {
1800     RT5616_SCLK_S_MCLK,
1801     RT5616_SCLK_S_PLL1,
1802 };
1803 
1804 /* PLL1 Source */
1805 enum {
1806     RT5616_PLL1_S_MCLK,
1807     RT5616_PLL1_S_BCLK1,
1808     RT5616_PLL1_S_BCLK2,
1809 };
1810 
1811 enum {
1812     RT5616_AIF1,
1813     RT5616_AIFS,
1814 };
1815 
1816 #endif /* __RT5616_H__ */