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0009 #include <linux/module.h>
0010 #include <linux/moduleparam.h>
0011 #include <linux/init.h>
0012 #include <linux/clk.h>
0013 #include <linux/delay.h>
0014 #include <linux/pm.h>
0015 #include <linux/i2c.h>
0016 #include <linux/platform_device.h>
0017 #include <linux/spi/spi.h>
0018 #include <sound/core.h>
0019 #include <sound/pcm.h>
0020 #include <sound/pcm_params.h>
0021 #include <sound/soc.h>
0022 #include <sound/soc-dapm.h>
0023 #include <sound/initval.h>
0024 #include <sound/tlv.h>
0025
0026 #include "rl6231.h"
0027 #include "rt5616.h"
0028
0029 #define RT5616_PR_RANGE_BASE (0xff + 1)
0030 #define RT5616_PR_SPACING 0x100
0031
0032 #define RT5616_PR_BASE (RT5616_PR_RANGE_BASE + (0 * RT5616_PR_SPACING))
0033
0034 static const struct regmap_range_cfg rt5616_ranges[] = {
0035 {
0036 .name = "PR",
0037 .range_min = RT5616_PR_BASE,
0038 .range_max = RT5616_PR_BASE + 0xf8,
0039 .selector_reg = RT5616_PRIV_INDEX,
0040 .selector_mask = 0xff,
0041 .selector_shift = 0x0,
0042 .window_start = RT5616_PRIV_DATA,
0043 .window_len = 0x1,
0044 },
0045 };
0046
0047 static const struct reg_sequence init_list[] = {
0048 {RT5616_PR_BASE + 0x3d, 0x3e00},
0049 {RT5616_PR_BASE + 0x25, 0x6110},
0050 {RT5616_PR_BASE + 0x20, 0x611f},
0051 {RT5616_PR_BASE + 0x21, 0x4040},
0052 {RT5616_PR_BASE + 0x23, 0x0004},
0053 };
0054
0055 #define RT5616_INIT_REG_LEN ARRAY_SIZE(init_list)
0056
0057 static const struct reg_default rt5616_reg[] = {
0058 { 0x00, 0x0021 },
0059 { 0x02, 0xc8c8 },
0060 { 0x03, 0xc8c8 },
0061 { 0x05, 0x0000 },
0062 { 0x0d, 0x0000 },
0063 { 0x0f, 0x0808 },
0064 { 0x19, 0xafaf },
0065 { 0x1c, 0x2f2f },
0066 { 0x1e, 0x0000 },
0067 { 0x27, 0x7860 },
0068 { 0x29, 0x8080 },
0069 { 0x2a, 0x5252 },
0070 { 0x3b, 0x0000 },
0071 { 0x3c, 0x006f },
0072 { 0x3d, 0x0000 },
0073 { 0x3e, 0x006f },
0074 { 0x45, 0x6000 },
0075 { 0x4d, 0x0000 },
0076 { 0x4e, 0x0000 },
0077 { 0x4f, 0x0279 },
0078 { 0x50, 0x0000 },
0079 { 0x51, 0x0000 },
0080 { 0x52, 0x0279 },
0081 { 0x53, 0xf000 },
0082 { 0x61, 0x0000 },
0083 { 0x62, 0x0000 },
0084 { 0x63, 0x00c0 },
0085 { 0x64, 0x0000 },
0086 { 0x65, 0x0000 },
0087 { 0x66, 0x0000 },
0088 { 0x70, 0x8000 },
0089 { 0x73, 0x1104 },
0090 { 0x74, 0x0c00 },
0091 { 0x80, 0x0000 },
0092 { 0x81, 0x0000 },
0093 { 0x82, 0x0000 },
0094 { 0x8b, 0x0600 },
0095 { 0x8e, 0x0004 },
0096 { 0x8f, 0x1100 },
0097 { 0x90, 0x0000 },
0098 { 0x91, 0x0c00 },
0099 { 0x92, 0x0000 },
0100 { 0x93, 0x2000 },
0101 { 0x94, 0x0200 },
0102 { 0x95, 0x0000 },
0103 { 0xb0, 0x2080 },
0104 { 0xb1, 0x0000 },
0105 { 0xb2, 0x0000 },
0106 { 0xb4, 0x2206 },
0107 { 0xb5, 0x1f00 },
0108 { 0xb6, 0x0000 },
0109 { 0xb7, 0x0000 },
0110 { 0xbb, 0x0000 },
0111 { 0xbc, 0x0000 },
0112 { 0xbd, 0x0000 },
0113 { 0xbe, 0x0000 },
0114 { 0xbf, 0x0000 },
0115 { 0xc0, 0x0100 },
0116 { 0xc1, 0x0000 },
0117 { 0xc2, 0x0000 },
0118 { 0xc8, 0x0000 },
0119 { 0xc9, 0x0000 },
0120 { 0xca, 0x0000 },
0121 { 0xcb, 0x0000 },
0122 { 0xcc, 0x0000 },
0123 { 0xcd, 0x0000 },
0124 { 0xce, 0x0000 },
0125 { 0xcf, 0x0013 },
0126 { 0xd0, 0x0680 },
0127 { 0xd1, 0x1c17 },
0128 { 0xd3, 0xb320 },
0129 { 0xd4, 0x0000 },
0130 { 0xd6, 0x0000 },
0131 { 0xd7, 0x0000 },
0132 { 0xd9, 0x0809 },
0133 { 0xda, 0x0000 },
0134 { 0xfa, 0x0010 },
0135 { 0xfb, 0x0000 },
0136 { 0xfc, 0x0000 },
0137 { 0xfe, 0x10ec },
0138 { 0xff, 0x6281 },
0139 };
0140
0141 struct rt5616_priv {
0142 struct snd_soc_component *component;
0143 struct delayed_work patch_work;
0144 struct regmap *regmap;
0145 struct clk *mclk;
0146
0147 int sysclk;
0148 int sysclk_src;
0149 int lrck[RT5616_AIFS];
0150 int bclk[RT5616_AIFS];
0151 int master[RT5616_AIFS];
0152
0153 int pll_src;
0154 int pll_in;
0155 int pll_out;
0156
0157 };
0158
0159 static bool rt5616_volatile_register(struct device *dev, unsigned int reg)
0160 {
0161 int i;
0162
0163 for (i = 0; i < ARRAY_SIZE(rt5616_ranges); i++) {
0164 if (reg >= rt5616_ranges[i].range_min &&
0165 reg <= rt5616_ranges[i].range_max)
0166 return true;
0167 }
0168
0169 switch (reg) {
0170 case RT5616_RESET:
0171 case RT5616_PRIV_DATA:
0172 case RT5616_EQ_CTRL1:
0173 case RT5616_DRC_AGC_1:
0174 case RT5616_IRQ_CTRL2:
0175 case RT5616_INT_IRQ_ST:
0176 case RT5616_PGM_REG_ARR1:
0177 case RT5616_PGM_REG_ARR3:
0178 case RT5616_VENDOR_ID:
0179 case RT5616_DEVICE_ID:
0180 return true;
0181 default:
0182 return false;
0183 }
0184 }
0185
0186 static bool rt5616_readable_register(struct device *dev, unsigned int reg)
0187 {
0188 int i;
0189
0190 for (i = 0; i < ARRAY_SIZE(rt5616_ranges); i++) {
0191 if (reg >= rt5616_ranges[i].range_min &&
0192 reg <= rt5616_ranges[i].range_max)
0193 return true;
0194 }
0195
0196 switch (reg) {
0197 case RT5616_RESET:
0198 case RT5616_VERSION_ID:
0199 case RT5616_VENDOR_ID:
0200 case RT5616_DEVICE_ID:
0201 case RT5616_HP_VOL:
0202 case RT5616_LOUT_CTRL1:
0203 case RT5616_LOUT_CTRL2:
0204 case RT5616_IN1_IN2:
0205 case RT5616_INL1_INR1_VOL:
0206 case RT5616_DAC1_DIG_VOL:
0207 case RT5616_ADC_DIG_VOL:
0208 case RT5616_ADC_BST_VOL:
0209 case RT5616_STO1_ADC_MIXER:
0210 case RT5616_AD_DA_MIXER:
0211 case RT5616_STO_DAC_MIXER:
0212 case RT5616_REC_L1_MIXER:
0213 case RT5616_REC_L2_MIXER:
0214 case RT5616_REC_R1_MIXER:
0215 case RT5616_REC_R2_MIXER:
0216 case RT5616_HPO_MIXER:
0217 case RT5616_OUT_L1_MIXER:
0218 case RT5616_OUT_L2_MIXER:
0219 case RT5616_OUT_L3_MIXER:
0220 case RT5616_OUT_R1_MIXER:
0221 case RT5616_OUT_R2_MIXER:
0222 case RT5616_OUT_R3_MIXER:
0223 case RT5616_LOUT_MIXER:
0224 case RT5616_PWR_DIG1:
0225 case RT5616_PWR_DIG2:
0226 case RT5616_PWR_ANLG1:
0227 case RT5616_PWR_ANLG2:
0228 case RT5616_PWR_MIXER:
0229 case RT5616_PWR_VOL:
0230 case RT5616_PRIV_INDEX:
0231 case RT5616_PRIV_DATA:
0232 case RT5616_I2S1_SDP:
0233 case RT5616_ADDA_CLK1:
0234 case RT5616_ADDA_CLK2:
0235 case RT5616_GLB_CLK:
0236 case RT5616_PLL_CTRL1:
0237 case RT5616_PLL_CTRL2:
0238 case RT5616_HP_OVCD:
0239 case RT5616_DEPOP_M1:
0240 case RT5616_DEPOP_M2:
0241 case RT5616_DEPOP_M3:
0242 case RT5616_CHARGE_PUMP:
0243 case RT5616_PV_DET_SPK_G:
0244 case RT5616_MICBIAS:
0245 case RT5616_A_JD_CTL1:
0246 case RT5616_A_JD_CTL2:
0247 case RT5616_EQ_CTRL1:
0248 case RT5616_EQ_CTRL2:
0249 case RT5616_WIND_FILTER:
0250 case RT5616_DRC_AGC_1:
0251 case RT5616_DRC_AGC_2:
0252 case RT5616_DRC_AGC_3:
0253 case RT5616_SVOL_ZC:
0254 case RT5616_JD_CTRL1:
0255 case RT5616_JD_CTRL2:
0256 case RT5616_IRQ_CTRL1:
0257 case RT5616_IRQ_CTRL2:
0258 case RT5616_INT_IRQ_ST:
0259 case RT5616_GPIO_CTRL1:
0260 case RT5616_GPIO_CTRL2:
0261 case RT5616_GPIO_CTRL3:
0262 case RT5616_PGM_REG_ARR1:
0263 case RT5616_PGM_REG_ARR2:
0264 case RT5616_PGM_REG_ARR3:
0265 case RT5616_PGM_REG_ARR4:
0266 case RT5616_PGM_REG_ARR5:
0267 case RT5616_SCB_FUNC:
0268 case RT5616_SCB_CTRL:
0269 case RT5616_BASE_BACK:
0270 case RT5616_MP3_PLUS1:
0271 case RT5616_MP3_PLUS2:
0272 case RT5616_ADJ_HPF_CTRL1:
0273 case RT5616_ADJ_HPF_CTRL2:
0274 case RT5616_HP_CALIB_AMP_DET:
0275 case RT5616_HP_CALIB2:
0276 case RT5616_SV_ZCD1:
0277 case RT5616_SV_ZCD2:
0278 case RT5616_D_MISC:
0279 case RT5616_DUMMY2:
0280 case RT5616_DUMMY3:
0281 return true;
0282 default:
0283 return false;
0284 }
0285 }
0286
0287 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
0288 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
0289 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
0290 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
0291 static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
0292
0293
0294 static const SNDRV_CTL_TLVD_DECLARE_DB_RANGE(bst_tlv,
0295 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
0296 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
0297 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
0298 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
0299 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
0300 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
0301 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0),
0302 );
0303
0304 static const struct snd_kcontrol_new rt5616_snd_controls[] = {
0305
0306 SOC_DOUBLE("HP Playback Switch", RT5616_HP_VOL,
0307 RT5616_L_MUTE_SFT, RT5616_R_MUTE_SFT, 1, 1),
0308 SOC_DOUBLE("HPVOL Playback Switch", RT5616_HP_VOL,
0309 RT5616_VOL_L_SFT, RT5616_VOL_R_SFT, 1, 1),
0310 SOC_DOUBLE_TLV("HP Playback Volume", RT5616_HP_VOL,
0311 RT5616_L_VOL_SFT, RT5616_R_VOL_SFT, 39, 1, out_vol_tlv),
0312
0313 SOC_DOUBLE("OUT Playback Switch", RT5616_LOUT_CTRL1,
0314 RT5616_L_MUTE_SFT, RT5616_R_MUTE_SFT, 1, 1),
0315 SOC_DOUBLE("OUT Channel Switch", RT5616_LOUT_CTRL1,
0316 RT5616_VOL_L_SFT, RT5616_VOL_R_SFT, 1, 1),
0317 SOC_DOUBLE_TLV("OUT Playback Volume", RT5616_LOUT_CTRL1,
0318 RT5616_L_VOL_SFT, RT5616_R_VOL_SFT, 39, 1, out_vol_tlv),
0319
0320
0321 SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5616_DAC1_DIG_VOL,
0322 RT5616_L_VOL_SFT, RT5616_R_VOL_SFT,
0323 175, 0, dac_vol_tlv),
0324
0325 SOC_SINGLE_TLV("IN1 Boost Volume", RT5616_IN1_IN2,
0326 RT5616_BST_SFT1, 8, 0, bst_tlv),
0327 SOC_SINGLE_TLV("IN2 Boost Volume", RT5616_IN1_IN2,
0328 RT5616_BST_SFT2, 8, 0, bst_tlv),
0329
0330 SOC_DOUBLE_TLV("IN Capture Volume", RT5616_INL1_INR1_VOL,
0331 RT5616_INL_VOL_SFT, RT5616_INR_VOL_SFT,
0332 31, 1, in_vol_tlv),
0333
0334 SOC_DOUBLE("ADC Capture Switch", RT5616_ADC_DIG_VOL,
0335 RT5616_L_MUTE_SFT, RT5616_R_MUTE_SFT, 1, 1),
0336 SOC_DOUBLE_TLV("ADC Capture Volume", RT5616_ADC_DIG_VOL,
0337 RT5616_L_VOL_SFT, RT5616_R_VOL_SFT,
0338 127, 0, adc_vol_tlv),
0339
0340
0341 SOC_DOUBLE_TLV("ADC Boost Volume", RT5616_ADC_BST_VOL,
0342 RT5616_ADC_L_BST_SFT, RT5616_ADC_R_BST_SFT,
0343 3, 0, adc_bst_tlv),
0344 };
0345
0346 static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source,
0347 struct snd_soc_dapm_widget *sink)
0348 {
0349 unsigned int val;
0350
0351 val = snd_soc_component_read(snd_soc_dapm_to_component(source->dapm), RT5616_GLB_CLK);
0352 val &= RT5616_SCLK_SRC_MASK;
0353 if (val == RT5616_SCLK_SRC_PLL1)
0354 return 1;
0355 else
0356 return 0;
0357 }
0358
0359
0360 static const struct snd_kcontrol_new rt5616_sto1_adc_l_mix[] = {
0361 SOC_DAPM_SINGLE("ADC1 Switch", RT5616_STO1_ADC_MIXER,
0362 RT5616_M_STO1_ADC_L1_SFT, 1, 1),
0363 };
0364
0365 static const struct snd_kcontrol_new rt5616_sto1_adc_r_mix[] = {
0366 SOC_DAPM_SINGLE("ADC1 Switch", RT5616_STO1_ADC_MIXER,
0367 RT5616_M_STO1_ADC_R1_SFT, 1, 1),
0368 };
0369
0370 static const struct snd_kcontrol_new rt5616_dac_l_mix[] = {
0371 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5616_AD_DA_MIXER,
0372 RT5616_M_ADCMIX_L_SFT, 1, 1),
0373 SOC_DAPM_SINGLE("INF1 Switch", RT5616_AD_DA_MIXER,
0374 RT5616_M_IF1_DAC_L_SFT, 1, 1),
0375 };
0376
0377 static const struct snd_kcontrol_new rt5616_dac_r_mix[] = {
0378 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5616_AD_DA_MIXER,
0379 RT5616_M_ADCMIX_R_SFT, 1, 1),
0380 SOC_DAPM_SINGLE("INF1 Switch", RT5616_AD_DA_MIXER,
0381 RT5616_M_IF1_DAC_R_SFT, 1, 1),
0382 };
0383
0384 static const struct snd_kcontrol_new rt5616_sto_dac_l_mix[] = {
0385 SOC_DAPM_SINGLE("DAC L1 Switch", RT5616_STO_DAC_MIXER,
0386 RT5616_M_DAC_L1_MIXL_SFT, 1, 1),
0387 SOC_DAPM_SINGLE("DAC R1 Switch", RT5616_STO_DAC_MIXER,
0388 RT5616_M_DAC_R1_MIXL_SFT, 1, 1),
0389 };
0390
0391 static const struct snd_kcontrol_new rt5616_sto_dac_r_mix[] = {
0392 SOC_DAPM_SINGLE("DAC R1 Switch", RT5616_STO_DAC_MIXER,
0393 RT5616_M_DAC_R1_MIXR_SFT, 1, 1),
0394 SOC_DAPM_SINGLE("DAC L1 Switch", RT5616_STO_DAC_MIXER,
0395 RT5616_M_DAC_L1_MIXR_SFT, 1, 1),
0396 };
0397
0398
0399 static const struct snd_kcontrol_new rt5616_rec_l_mix[] = {
0400 SOC_DAPM_SINGLE("INL1 Switch", RT5616_REC_L2_MIXER,
0401 RT5616_M_IN1_L_RM_L_SFT, 1, 1),
0402 SOC_DAPM_SINGLE("BST2 Switch", RT5616_REC_L2_MIXER,
0403 RT5616_M_BST2_RM_L_SFT, 1, 1),
0404 SOC_DAPM_SINGLE("BST1 Switch", RT5616_REC_L2_MIXER,
0405 RT5616_M_BST1_RM_L_SFT, 1, 1),
0406 };
0407
0408 static const struct snd_kcontrol_new rt5616_rec_r_mix[] = {
0409 SOC_DAPM_SINGLE("INR1 Switch", RT5616_REC_R2_MIXER,
0410 RT5616_M_IN1_R_RM_R_SFT, 1, 1),
0411 SOC_DAPM_SINGLE("BST2 Switch", RT5616_REC_R2_MIXER,
0412 RT5616_M_BST2_RM_R_SFT, 1, 1),
0413 SOC_DAPM_SINGLE("BST1 Switch", RT5616_REC_R2_MIXER,
0414 RT5616_M_BST1_RM_R_SFT, 1, 1),
0415 };
0416
0417
0418
0419 static const struct snd_kcontrol_new rt5616_out_l_mix[] = {
0420 SOC_DAPM_SINGLE("BST1 Switch", RT5616_OUT_L3_MIXER,
0421 RT5616_M_BST1_OM_L_SFT, 1, 1),
0422 SOC_DAPM_SINGLE("BST2 Switch", RT5616_OUT_L3_MIXER,
0423 RT5616_M_BST2_OM_L_SFT, 1, 1),
0424 SOC_DAPM_SINGLE("INL1 Switch", RT5616_OUT_L3_MIXER,
0425 RT5616_M_IN1_L_OM_L_SFT, 1, 1),
0426 SOC_DAPM_SINGLE("REC MIXL Switch", RT5616_OUT_L3_MIXER,
0427 RT5616_M_RM_L_OM_L_SFT, 1, 1),
0428 SOC_DAPM_SINGLE("DAC L1 Switch", RT5616_OUT_L3_MIXER,
0429 RT5616_M_DAC_L1_OM_L_SFT, 1, 1),
0430 };
0431
0432 static const struct snd_kcontrol_new rt5616_out_r_mix[] = {
0433 SOC_DAPM_SINGLE("BST2 Switch", RT5616_OUT_R3_MIXER,
0434 RT5616_M_BST2_OM_R_SFT, 1, 1),
0435 SOC_DAPM_SINGLE("BST1 Switch", RT5616_OUT_R3_MIXER,
0436 RT5616_M_BST1_OM_R_SFT, 1, 1),
0437 SOC_DAPM_SINGLE("INR1 Switch", RT5616_OUT_R3_MIXER,
0438 RT5616_M_IN1_R_OM_R_SFT, 1, 1),
0439 SOC_DAPM_SINGLE("REC MIXR Switch", RT5616_OUT_R3_MIXER,
0440 RT5616_M_RM_R_OM_R_SFT, 1, 1),
0441 SOC_DAPM_SINGLE("DAC R1 Switch", RT5616_OUT_R3_MIXER,
0442 RT5616_M_DAC_R1_OM_R_SFT, 1, 1),
0443 };
0444
0445 static const struct snd_kcontrol_new rt5616_hpo_mix[] = {
0446 SOC_DAPM_SINGLE("DAC1 Switch", RT5616_HPO_MIXER,
0447 RT5616_M_DAC1_HM_SFT, 1, 1),
0448 SOC_DAPM_SINGLE("HPVOL Switch", RT5616_HPO_MIXER,
0449 RT5616_M_HPVOL_HM_SFT, 1, 1),
0450 };
0451
0452 static const struct snd_kcontrol_new rt5616_lout_mix[] = {
0453 SOC_DAPM_SINGLE("DAC L1 Switch", RT5616_LOUT_MIXER,
0454 RT5616_M_DAC_L1_LM_SFT, 1, 1),
0455 SOC_DAPM_SINGLE("DAC R1 Switch", RT5616_LOUT_MIXER,
0456 RT5616_M_DAC_R1_LM_SFT, 1, 1),
0457 SOC_DAPM_SINGLE("OUTVOL L Switch", RT5616_LOUT_MIXER,
0458 RT5616_M_OV_L_LM_SFT, 1, 1),
0459 SOC_DAPM_SINGLE("OUTVOL R Switch", RT5616_LOUT_MIXER,
0460 RT5616_M_OV_R_LM_SFT, 1, 1),
0461 };
0462
0463 static int rt5616_adc_event(struct snd_soc_dapm_widget *w,
0464 struct snd_kcontrol *kcontrol, int event)
0465 {
0466 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
0467
0468 switch (event) {
0469 case SND_SOC_DAPM_POST_PMU:
0470 snd_soc_component_update_bits(component, RT5616_ADC_DIG_VOL,
0471 RT5616_L_MUTE | RT5616_R_MUTE, 0);
0472 break;
0473
0474 case SND_SOC_DAPM_POST_PMD:
0475 snd_soc_component_update_bits(component, RT5616_ADC_DIG_VOL,
0476 RT5616_L_MUTE | RT5616_R_MUTE,
0477 RT5616_L_MUTE | RT5616_R_MUTE);
0478 break;
0479
0480 default:
0481 return 0;
0482 }
0483
0484 return 0;
0485 }
0486
0487 static int rt5616_charge_pump_event(struct snd_soc_dapm_widget *w,
0488 struct snd_kcontrol *kcontrol, int event)
0489 {
0490 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
0491
0492 switch (event) {
0493 case SND_SOC_DAPM_POST_PMU:
0494
0495 snd_soc_component_update_bits(component, RT5616_DEPOP_M2,
0496 RT5616_DEPOP_MASK, RT5616_DEPOP_MAN);
0497 snd_soc_component_update_bits(component, RT5616_DEPOP_M1,
0498 RT5616_HP_CP_MASK | RT5616_HP_SG_MASK |
0499 RT5616_HP_CB_MASK, RT5616_HP_CP_PU |
0500 RT5616_HP_SG_DIS | RT5616_HP_CB_PU);
0501 snd_soc_component_write(component, RT5616_PR_BASE +
0502 RT5616_HP_DCC_INT1, 0x9f00);
0503
0504 snd_soc_component_update_bits(component, RT5616_PWR_ANLG1,
0505 RT5616_PWR_FV1 | RT5616_PWR_FV2, 0);
0506 snd_soc_component_update_bits(component, RT5616_PWR_VOL,
0507 RT5616_PWR_HV_L | RT5616_PWR_HV_R,
0508 RT5616_PWR_HV_L | RT5616_PWR_HV_R);
0509 snd_soc_component_update_bits(component, RT5616_PWR_ANLG1,
0510 RT5616_PWR_HP_L | RT5616_PWR_HP_R |
0511 RT5616_PWR_HA, RT5616_PWR_HP_L |
0512 RT5616_PWR_HP_R | RT5616_PWR_HA);
0513 msleep(50);
0514 snd_soc_component_update_bits(component, RT5616_PWR_ANLG1,
0515 RT5616_PWR_FV1 | RT5616_PWR_FV2,
0516 RT5616_PWR_FV1 | RT5616_PWR_FV2);
0517
0518 snd_soc_component_update_bits(component, RT5616_CHARGE_PUMP,
0519 RT5616_PM_HP_MASK, RT5616_PM_HP_HV);
0520 snd_soc_component_update_bits(component, RT5616_PR_BASE +
0521 RT5616_CHOP_DAC_ADC, 0x0200, 0x0200);
0522 snd_soc_component_update_bits(component, RT5616_DEPOP_M1,
0523 RT5616_HP_CO_MASK | RT5616_HP_SG_MASK,
0524 RT5616_HP_CO_EN | RT5616_HP_SG_EN);
0525 break;
0526 case SND_SOC_DAPM_PRE_PMD:
0527 snd_soc_component_update_bits(component, RT5616_PR_BASE +
0528 RT5616_CHOP_DAC_ADC, 0x0200, 0x0);
0529 snd_soc_component_update_bits(component, RT5616_DEPOP_M1,
0530 RT5616_HP_SG_MASK | RT5616_HP_L_SMT_MASK |
0531 RT5616_HP_R_SMT_MASK, RT5616_HP_SG_DIS |
0532 RT5616_HP_L_SMT_DIS | RT5616_HP_R_SMT_DIS);
0533
0534 snd_soc_component_update_bits(component, RT5616_DEPOP_M1,
0535 RT5616_SMT_TRIG_MASK |
0536 RT5616_HP_CD_PD_MASK | RT5616_HP_CO_MASK |
0537 RT5616_HP_CP_MASK | RT5616_HP_SG_MASK |
0538 RT5616_HP_CB_MASK,
0539 RT5616_SMT_TRIG_DIS | RT5616_HP_CD_PD_EN |
0540 RT5616_HP_CO_DIS | RT5616_HP_CP_PD |
0541 RT5616_HP_SG_EN | RT5616_HP_CB_PD);
0542 snd_soc_component_update_bits(component, RT5616_PWR_ANLG1,
0543 RT5616_PWR_HP_L | RT5616_PWR_HP_R |
0544 RT5616_PWR_HA, 0);
0545 break;
0546 default:
0547 return 0;
0548 }
0549
0550 return 0;
0551 }
0552
0553 static int rt5616_hp_event(struct snd_soc_dapm_widget *w,
0554 struct snd_kcontrol *kcontrol, int event)
0555 {
0556 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
0557
0558 switch (event) {
0559 case SND_SOC_DAPM_POST_PMU:
0560
0561 snd_soc_component_update_bits(component, RT5616_DEPOP_M3,
0562 RT5616_CP_FQ1_MASK | RT5616_CP_FQ2_MASK |
0563 RT5616_CP_FQ3_MASK,
0564 RT5616_CP_FQ_192_KHZ << RT5616_CP_FQ1_SFT |
0565 RT5616_CP_FQ_12_KHZ << RT5616_CP_FQ2_SFT |
0566 RT5616_CP_FQ_192_KHZ << RT5616_CP_FQ3_SFT);
0567 snd_soc_component_write(component, RT5616_PR_BASE +
0568 RT5616_MAMP_INT_REG2, 0xfc00);
0569 snd_soc_component_update_bits(component, RT5616_DEPOP_M1,
0570 RT5616_SMT_TRIG_MASK, RT5616_SMT_TRIG_EN);
0571 snd_soc_component_update_bits(component, RT5616_DEPOP_M1,
0572 RT5616_RSTN_MASK, RT5616_RSTN_EN);
0573 snd_soc_component_update_bits(component, RT5616_DEPOP_M1,
0574 RT5616_RSTN_MASK | RT5616_HP_L_SMT_MASK |
0575 RT5616_HP_R_SMT_MASK, RT5616_RSTN_DIS |
0576 RT5616_HP_L_SMT_EN | RT5616_HP_R_SMT_EN);
0577 snd_soc_component_update_bits(component, RT5616_HP_VOL,
0578 RT5616_L_MUTE | RT5616_R_MUTE, 0);
0579 msleep(100);
0580 snd_soc_component_update_bits(component, RT5616_DEPOP_M1,
0581 RT5616_HP_SG_MASK | RT5616_HP_L_SMT_MASK |
0582 RT5616_HP_R_SMT_MASK, RT5616_HP_SG_DIS |
0583 RT5616_HP_L_SMT_DIS | RT5616_HP_R_SMT_DIS);
0584 msleep(20);
0585 snd_soc_component_update_bits(component, RT5616_HP_CALIB_AMP_DET,
0586 RT5616_HPD_PS_MASK, RT5616_HPD_PS_EN);
0587 break;
0588
0589 case SND_SOC_DAPM_PRE_PMD:
0590
0591 snd_soc_component_update_bits(component, RT5616_DEPOP_M3,
0592 RT5616_CP_FQ1_MASK | RT5616_CP_FQ2_MASK |
0593 RT5616_CP_FQ3_MASK,
0594 RT5616_CP_FQ_96_KHZ << RT5616_CP_FQ1_SFT |
0595 RT5616_CP_FQ_12_KHZ << RT5616_CP_FQ2_SFT |
0596 RT5616_CP_FQ_96_KHZ << RT5616_CP_FQ3_SFT);
0597 snd_soc_component_write(component, RT5616_PR_BASE +
0598 RT5616_MAMP_INT_REG2, 0xfc00);
0599 snd_soc_component_update_bits(component, RT5616_DEPOP_M1,
0600 RT5616_HP_SG_MASK, RT5616_HP_SG_EN);
0601 snd_soc_component_update_bits(component, RT5616_DEPOP_M1,
0602 RT5616_RSTP_MASK, RT5616_RSTP_EN);
0603 snd_soc_component_update_bits(component, RT5616_DEPOP_M1,
0604 RT5616_RSTP_MASK | RT5616_HP_L_SMT_MASK |
0605 RT5616_HP_R_SMT_MASK, RT5616_RSTP_DIS |
0606 RT5616_HP_L_SMT_EN | RT5616_HP_R_SMT_EN);
0607 snd_soc_component_update_bits(component, RT5616_HP_CALIB_AMP_DET,
0608 RT5616_HPD_PS_MASK, RT5616_HPD_PS_DIS);
0609 msleep(90);
0610 snd_soc_component_update_bits(component, RT5616_HP_VOL,
0611 RT5616_L_MUTE | RT5616_R_MUTE,
0612 RT5616_L_MUTE | RT5616_R_MUTE);
0613 msleep(30);
0614 break;
0615
0616 default:
0617 return 0;
0618 }
0619
0620 return 0;
0621 }
0622
0623 static int rt5616_lout_event(struct snd_soc_dapm_widget *w,
0624 struct snd_kcontrol *kcontrol, int event)
0625 {
0626 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
0627
0628 switch (event) {
0629 case SND_SOC_DAPM_POST_PMU:
0630 snd_soc_component_update_bits(component, RT5616_PWR_ANLG1,
0631 RT5616_PWR_LM, RT5616_PWR_LM);
0632 snd_soc_component_update_bits(component, RT5616_LOUT_CTRL1,
0633 RT5616_L_MUTE | RT5616_R_MUTE, 0);
0634 break;
0635
0636 case SND_SOC_DAPM_PRE_PMD:
0637 snd_soc_component_update_bits(component, RT5616_LOUT_CTRL1,
0638 RT5616_L_MUTE | RT5616_R_MUTE,
0639 RT5616_L_MUTE | RT5616_R_MUTE);
0640 snd_soc_component_update_bits(component, RT5616_PWR_ANLG1,
0641 RT5616_PWR_LM, 0);
0642 break;
0643
0644 default:
0645 return 0;
0646 }
0647
0648 return 0;
0649 }
0650
0651 static int rt5616_bst1_event(struct snd_soc_dapm_widget *w,
0652 struct snd_kcontrol *kcontrol, int event)
0653 {
0654 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
0655
0656 switch (event) {
0657 case SND_SOC_DAPM_POST_PMU:
0658 snd_soc_component_update_bits(component, RT5616_PWR_ANLG2,
0659 RT5616_PWR_BST1_OP2, RT5616_PWR_BST1_OP2);
0660 break;
0661
0662 case SND_SOC_DAPM_PRE_PMD:
0663 snd_soc_component_update_bits(component, RT5616_PWR_ANLG2,
0664 RT5616_PWR_BST1_OP2, 0);
0665 break;
0666
0667 default:
0668 return 0;
0669 }
0670
0671 return 0;
0672 }
0673
0674 static int rt5616_bst2_event(struct snd_soc_dapm_widget *w,
0675 struct snd_kcontrol *kcontrol, int event)
0676 {
0677 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
0678
0679 switch (event) {
0680 case SND_SOC_DAPM_POST_PMU:
0681 snd_soc_component_update_bits(component, RT5616_PWR_ANLG2,
0682 RT5616_PWR_BST2_OP2, RT5616_PWR_BST2_OP2);
0683 break;
0684
0685 case SND_SOC_DAPM_PRE_PMD:
0686 snd_soc_component_update_bits(component, RT5616_PWR_ANLG2,
0687 RT5616_PWR_BST2_OP2, 0);
0688 break;
0689
0690 default:
0691 return 0;
0692 }
0693
0694 return 0;
0695 }
0696
0697 static const struct snd_soc_dapm_widget rt5616_dapm_widgets[] = {
0698 SND_SOC_DAPM_SUPPLY("PLL1", RT5616_PWR_ANLG2,
0699 RT5616_PWR_PLL_BIT, 0, NULL, 0),
0700
0701
0702 SND_SOC_DAPM_SUPPLY("LDO", RT5616_PWR_ANLG1,
0703 RT5616_PWR_LDO_BIT, 0, NULL, 0),
0704 SND_SOC_DAPM_SUPPLY("micbias1", RT5616_PWR_ANLG2,
0705 RT5616_PWR_MB1_BIT, 0, NULL, 0),
0706
0707
0708 SND_SOC_DAPM_INPUT("MIC1"),
0709 SND_SOC_DAPM_INPUT("MIC2"),
0710
0711 SND_SOC_DAPM_INPUT("IN1P"),
0712 SND_SOC_DAPM_INPUT("IN2P"),
0713 SND_SOC_DAPM_INPUT("IN2N"),
0714
0715
0716 SND_SOC_DAPM_PGA_E("BST1", RT5616_PWR_ANLG2,
0717 RT5616_PWR_BST1_BIT, 0, NULL, 0, rt5616_bst1_event,
0718 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
0719 SND_SOC_DAPM_PGA_E("BST2", RT5616_PWR_ANLG2,
0720 RT5616_PWR_BST2_BIT, 0, NULL, 0, rt5616_bst2_event,
0721 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
0722
0723 SND_SOC_DAPM_PGA("INL1 VOL", RT5616_PWR_VOL,
0724 RT5616_PWR_IN1_L_BIT, 0, NULL, 0),
0725 SND_SOC_DAPM_PGA("INR1 VOL", RT5616_PWR_VOL,
0726 RT5616_PWR_IN1_R_BIT, 0, NULL, 0),
0727 SND_SOC_DAPM_PGA("INL2 VOL", RT5616_PWR_VOL,
0728 RT5616_PWR_IN2_L_BIT, 0, NULL, 0),
0729 SND_SOC_DAPM_PGA("INR2 VOL", RT5616_PWR_VOL,
0730 RT5616_PWR_IN2_R_BIT, 0, NULL, 0),
0731
0732
0733 SND_SOC_DAPM_MIXER("RECMIXL", RT5616_PWR_MIXER, RT5616_PWR_RM_L_BIT, 0,
0734 rt5616_rec_l_mix, ARRAY_SIZE(rt5616_rec_l_mix)),
0735 SND_SOC_DAPM_MIXER("RECMIXR", RT5616_PWR_MIXER, RT5616_PWR_RM_R_BIT, 0,
0736 rt5616_rec_r_mix, ARRAY_SIZE(rt5616_rec_r_mix)),
0737
0738 SND_SOC_DAPM_ADC_E("ADC L", NULL, RT5616_PWR_DIG1,
0739 RT5616_PWR_ADC_L_BIT, 0, rt5616_adc_event,
0740 SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_POST_PMU),
0741 SND_SOC_DAPM_ADC_E("ADC R", NULL, RT5616_PWR_DIG1,
0742 RT5616_PWR_ADC_R_BIT, 0, rt5616_adc_event,
0743 SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_POST_PMU),
0744
0745
0746 SND_SOC_DAPM_SUPPLY("stereo1 filter", RT5616_PWR_DIG2,
0747 RT5616_PWR_ADC_STO1_F_BIT, 0, NULL, 0),
0748 SND_SOC_DAPM_MIXER("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0,
0749 rt5616_sto1_adc_l_mix,
0750 ARRAY_SIZE(rt5616_sto1_adc_l_mix)),
0751 SND_SOC_DAPM_MIXER("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0,
0752 rt5616_sto1_adc_r_mix,
0753 ARRAY_SIZE(rt5616_sto1_adc_r_mix)),
0754
0755
0756 SND_SOC_DAPM_SUPPLY("I2S1", RT5616_PWR_DIG1,
0757 RT5616_PWR_I2S1_BIT, 0, NULL, 0),
0758 SND_SOC_DAPM_PGA("IF1 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
0759 SND_SOC_DAPM_PGA("IF1 DAC1 L", SND_SOC_NOPM, 0, 0, NULL, 0),
0760 SND_SOC_DAPM_PGA("IF1 DAC1 R", SND_SOC_NOPM, 0, 0, NULL, 0),
0761 SND_SOC_DAPM_PGA("IF1 ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
0762
0763
0764
0765
0766 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
0767 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
0768
0769
0770 SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0),
0771
0772
0773
0774 SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
0775 rt5616_dac_l_mix, ARRAY_SIZE(rt5616_dac_l_mix)),
0776 SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
0777 rt5616_dac_r_mix, ARRAY_SIZE(rt5616_dac_r_mix)),
0778
0779 SND_SOC_DAPM_SUPPLY("Stero1 DAC Power", RT5616_PWR_DIG2,
0780 RT5616_PWR_DAC_STO1_F_BIT, 0, NULL, 0),
0781
0782
0783 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
0784 rt5616_sto_dac_l_mix,
0785 ARRAY_SIZE(rt5616_sto_dac_l_mix)),
0786 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
0787 rt5616_sto_dac_r_mix,
0788 ARRAY_SIZE(rt5616_sto_dac_r_mix)),
0789
0790
0791 SND_SOC_DAPM_DAC("DAC L1", NULL, RT5616_PWR_DIG1,
0792 RT5616_PWR_DAC_L1_BIT, 0),
0793 SND_SOC_DAPM_DAC("DAC R1", NULL, RT5616_PWR_DIG1,
0794 RT5616_PWR_DAC_R1_BIT, 0),
0795
0796 SND_SOC_DAPM_MIXER("OUT MIXL", RT5616_PWR_MIXER, RT5616_PWR_OM_L_BIT,
0797 0, rt5616_out_l_mix, ARRAY_SIZE(rt5616_out_l_mix)),
0798 SND_SOC_DAPM_MIXER("OUT MIXR", RT5616_PWR_MIXER, RT5616_PWR_OM_R_BIT,
0799 0, rt5616_out_r_mix, ARRAY_SIZE(rt5616_out_r_mix)),
0800
0801 SND_SOC_DAPM_PGA("OUTVOL L", RT5616_PWR_VOL,
0802 RT5616_PWR_OV_L_BIT, 0, NULL, 0),
0803 SND_SOC_DAPM_PGA("OUTVOL R", RT5616_PWR_VOL,
0804 RT5616_PWR_OV_R_BIT, 0, NULL, 0),
0805 SND_SOC_DAPM_PGA("HPOVOL L", RT5616_PWR_VOL,
0806 RT5616_PWR_HV_L_BIT, 0, NULL, 0),
0807 SND_SOC_DAPM_PGA("HPOVOL R", RT5616_PWR_VOL,
0808 RT5616_PWR_HV_R_BIT, 0, NULL, 0),
0809 SND_SOC_DAPM_PGA("DAC 1", SND_SOC_NOPM,
0810 0, 0, NULL, 0),
0811 SND_SOC_DAPM_PGA("DAC 2", SND_SOC_NOPM,
0812 0, 0, NULL, 0),
0813 SND_SOC_DAPM_PGA("HPOVOL", SND_SOC_NOPM,
0814 0, 0, NULL, 0),
0815 SND_SOC_DAPM_PGA("INL1", RT5616_PWR_VOL,
0816 RT5616_PWR_IN1_L_BIT, 0, NULL, 0),
0817 SND_SOC_DAPM_PGA("INR1", RT5616_PWR_VOL,
0818 RT5616_PWR_IN1_R_BIT, 0, NULL, 0),
0819 SND_SOC_DAPM_PGA("INL2", RT5616_PWR_VOL,
0820 RT5616_PWR_IN2_L_BIT, 0, NULL, 0),
0821 SND_SOC_DAPM_PGA("INR2", RT5616_PWR_VOL,
0822 RT5616_PWR_IN2_R_BIT, 0, NULL, 0),
0823
0824 SND_SOC_DAPM_MIXER("HPO MIX", SND_SOC_NOPM, 0, 0,
0825 rt5616_hpo_mix, ARRAY_SIZE(rt5616_hpo_mix)),
0826 SND_SOC_DAPM_MIXER("LOUT MIX", SND_SOC_NOPM, 0, 0,
0827 rt5616_lout_mix, ARRAY_SIZE(rt5616_lout_mix)),
0828
0829 SND_SOC_DAPM_PGA_S("HP amp", 1, SND_SOC_NOPM, 0, 0,
0830 rt5616_hp_event, SND_SOC_DAPM_PRE_PMD |
0831 SND_SOC_DAPM_POST_PMU),
0832 SND_SOC_DAPM_PGA_S("LOUT amp", 1, SND_SOC_NOPM, 0, 0,
0833 rt5616_lout_event, SND_SOC_DAPM_PRE_PMD |
0834 SND_SOC_DAPM_POST_PMU),
0835
0836 SND_SOC_DAPM_SUPPLY_S("Charge Pump", 1, SND_SOC_NOPM, 0, 0,
0837 rt5616_charge_pump_event, SND_SOC_DAPM_POST_PMU |
0838 SND_SOC_DAPM_PRE_PMD),
0839
0840
0841 SND_SOC_DAPM_OUTPUT("HPOL"),
0842 SND_SOC_DAPM_OUTPUT("HPOR"),
0843 SND_SOC_DAPM_OUTPUT("LOUTL"),
0844 SND_SOC_DAPM_OUTPUT("LOUTR"),
0845 };
0846
0847 static const struct snd_soc_dapm_route rt5616_dapm_routes[] = {
0848 {"IN1P", NULL, "LDO"},
0849 {"IN2P", NULL, "LDO"},
0850
0851 {"IN1P", NULL, "MIC1"},
0852 {"IN2P", NULL, "MIC2"},
0853 {"IN2N", NULL, "MIC2"},
0854
0855 {"BST1", NULL, "IN1P"},
0856 {"BST2", NULL, "IN2P"},
0857 {"BST2", NULL, "IN2N"},
0858 {"BST1", NULL, "micbias1"},
0859 {"BST2", NULL, "micbias1"},
0860
0861 {"INL1 VOL", NULL, "IN2P"},
0862 {"INR1 VOL", NULL, "IN2N"},
0863
0864 {"RECMIXL", "INL1 Switch", "INL1 VOL"},
0865 {"RECMIXL", "BST2 Switch", "BST2"},
0866 {"RECMIXL", "BST1 Switch", "BST1"},
0867
0868 {"RECMIXR", "INR1 Switch", "INR1 VOL"},
0869 {"RECMIXR", "BST2 Switch", "BST2"},
0870 {"RECMIXR", "BST1 Switch", "BST1"},
0871
0872 {"ADC L", NULL, "RECMIXL"},
0873 {"ADC R", NULL, "RECMIXR"},
0874
0875 {"Stereo1 ADC MIXL", "ADC1 Switch", "ADC L"},
0876 {"Stereo1 ADC MIXL", NULL, "stereo1 filter"},
0877 {"stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll},
0878
0879 {"Stereo1 ADC MIXR", "ADC1 Switch", "ADC R"},
0880 {"Stereo1 ADC MIXR", NULL, "stereo1 filter"},
0881 {"stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll},
0882
0883 {"IF1 ADC1", NULL, "Stereo1 ADC MIXL"},
0884 {"IF1 ADC1", NULL, "Stereo1 ADC MIXR"},
0885 {"IF1 ADC1", NULL, "I2S1"},
0886
0887 {"AIF1TX", NULL, "IF1 ADC1"},
0888
0889 {"IF1 DAC", NULL, "AIF1RX"},
0890 {"IF1 DAC", NULL, "I2S1"},
0891
0892 {"IF1 DAC1 L", NULL, "IF1 DAC"},
0893 {"IF1 DAC1 R", NULL, "IF1 DAC"},
0894
0895 {"DAC MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL"},
0896 {"DAC MIXL", "INF1 Switch", "IF1 DAC1 L"},
0897 {"DAC MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR"},
0898 {"DAC MIXR", "INF1 Switch", "IF1 DAC1 R"},
0899
0900 {"Audio DSP", NULL, "DAC MIXL"},
0901 {"Audio DSP", NULL, "DAC MIXR"},
0902
0903 {"Stereo DAC MIXL", "DAC L1 Switch", "Audio DSP"},
0904 {"Stereo DAC MIXL", "DAC R1 Switch", "DAC MIXR"},
0905 {"Stereo DAC MIXL", NULL, "Stero1 DAC Power"},
0906 {"Stereo DAC MIXR", "DAC R1 Switch", "Audio DSP"},
0907 {"Stereo DAC MIXR", "DAC L1 Switch", "DAC MIXL"},
0908 {"Stereo DAC MIXR", NULL, "Stero1 DAC Power"},
0909
0910 {"DAC L1", NULL, "Stereo DAC MIXL"},
0911 {"DAC L1", NULL, "PLL1", is_sys_clk_from_pll},
0912 {"DAC R1", NULL, "Stereo DAC MIXR"},
0913 {"DAC R1", NULL, "PLL1", is_sys_clk_from_pll},
0914
0915 {"OUT MIXL", "BST1 Switch", "BST1"},
0916 {"OUT MIXL", "BST2 Switch", "BST2"},
0917 {"OUT MIXL", "INL1 Switch", "INL1 VOL"},
0918 {"OUT MIXL", "REC MIXL Switch", "RECMIXL"},
0919 {"OUT MIXL", "DAC L1 Switch", "DAC L1"},
0920
0921 {"OUT MIXR", "BST2 Switch", "BST2"},
0922 {"OUT MIXR", "BST1 Switch", "BST1"},
0923 {"OUT MIXR", "INR1 Switch", "INR1 VOL"},
0924 {"OUT MIXR", "REC MIXR Switch", "RECMIXR"},
0925 {"OUT MIXR", "DAC R1 Switch", "DAC R1"},
0926
0927 {"HPOVOL L", NULL, "OUT MIXL"},
0928 {"HPOVOL R", NULL, "OUT MIXR"},
0929 {"OUTVOL L", NULL, "OUT MIXL"},
0930 {"OUTVOL R", NULL, "OUT MIXR"},
0931
0932 {"DAC 1", NULL, "DAC L1"},
0933 {"DAC 1", NULL, "DAC R1"},
0934 {"HPOVOL", NULL, "HPOVOL L"},
0935 {"HPOVOL", NULL, "HPOVOL R"},
0936 {"HPO MIX", "DAC1 Switch", "DAC 1"},
0937 {"HPO MIX", "HPVOL Switch", "HPOVOL"},
0938
0939 {"LOUT MIX", "DAC L1 Switch", "DAC L1"},
0940 {"LOUT MIX", "DAC R1 Switch", "DAC R1"},
0941 {"LOUT MIX", "OUTVOL L Switch", "OUTVOL L"},
0942 {"LOUT MIX", "OUTVOL R Switch", "OUTVOL R"},
0943
0944 {"HP amp", NULL, "HPO MIX"},
0945 {"HP amp", NULL, "Charge Pump"},
0946 {"HPOL", NULL, "HP amp"},
0947 {"HPOR", NULL, "HP amp"},
0948
0949 {"LOUT amp", NULL, "LOUT MIX"},
0950 {"LOUT amp", NULL, "Charge Pump"},
0951 {"LOUTL", NULL, "LOUT amp"},
0952 {"LOUTR", NULL, "LOUT amp"},
0953
0954 };
0955
0956 static int rt5616_hw_params(struct snd_pcm_substream *substream,
0957 struct snd_pcm_hw_params *params,
0958 struct snd_soc_dai *dai)
0959 {
0960 struct snd_soc_component *component = dai->component;
0961 struct rt5616_priv *rt5616 = snd_soc_component_get_drvdata(component);
0962 unsigned int val_len = 0, val_clk, mask_clk;
0963 int pre_div, bclk_ms, frame_size;
0964
0965 rt5616->lrck[dai->id] = params_rate(params);
0966
0967 pre_div = rl6231_get_clk_info(rt5616->sysclk, rt5616->lrck[dai->id]);
0968
0969 if (pre_div < 0) {
0970 dev_err(component->dev, "Unsupported clock setting\n");
0971 return -EINVAL;
0972 }
0973 frame_size = snd_soc_params_to_frame_size(params);
0974 if (frame_size < 0) {
0975 dev_err(component->dev, "Unsupported frame size: %d\n", frame_size);
0976 return -EINVAL;
0977 }
0978 bclk_ms = frame_size > 32 ? 1 : 0;
0979 rt5616->bclk[dai->id] = rt5616->lrck[dai->id] * (32 << bclk_ms);
0980
0981 dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
0982 rt5616->bclk[dai->id], rt5616->lrck[dai->id]);
0983 dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
0984 bclk_ms, pre_div, dai->id);
0985
0986 switch (params_format(params)) {
0987 case SNDRV_PCM_FORMAT_S16_LE:
0988 break;
0989 case SNDRV_PCM_FORMAT_S20_3LE:
0990 val_len |= RT5616_I2S_DL_20;
0991 break;
0992 case SNDRV_PCM_FORMAT_S24_LE:
0993 val_len |= RT5616_I2S_DL_24;
0994 break;
0995 case SNDRV_PCM_FORMAT_S8:
0996 val_len |= RT5616_I2S_DL_8;
0997 break;
0998 default:
0999 return -EINVAL;
1000 }
1001
1002 mask_clk = RT5616_I2S_PD1_MASK;
1003 val_clk = pre_div << RT5616_I2S_PD1_SFT;
1004 snd_soc_component_update_bits(component, RT5616_I2S1_SDP,
1005 RT5616_I2S_DL_MASK, val_len);
1006 snd_soc_component_update_bits(component, RT5616_ADDA_CLK1, mask_clk, val_clk);
1007
1008 return 0;
1009 }
1010
1011 static int rt5616_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
1012 {
1013 struct snd_soc_component *component = dai->component;
1014 struct rt5616_priv *rt5616 = snd_soc_component_get_drvdata(component);
1015 unsigned int reg_val = 0;
1016
1017 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1018 case SND_SOC_DAIFMT_CBM_CFM:
1019 rt5616->master[dai->id] = 1;
1020 break;
1021 case SND_SOC_DAIFMT_CBS_CFS:
1022 reg_val |= RT5616_I2S_MS_S;
1023 rt5616->master[dai->id] = 0;
1024 break;
1025 default:
1026 return -EINVAL;
1027 }
1028
1029 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1030 case SND_SOC_DAIFMT_NB_NF:
1031 break;
1032 case SND_SOC_DAIFMT_IB_NF:
1033 reg_val |= RT5616_I2S_BP_INV;
1034 break;
1035 default:
1036 return -EINVAL;
1037 }
1038
1039 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1040 case SND_SOC_DAIFMT_I2S:
1041 break;
1042 case SND_SOC_DAIFMT_LEFT_J:
1043 reg_val |= RT5616_I2S_DF_LEFT;
1044 break;
1045 case SND_SOC_DAIFMT_DSP_A:
1046 reg_val |= RT5616_I2S_DF_PCM_A;
1047 break;
1048 case SND_SOC_DAIFMT_DSP_B:
1049 reg_val |= RT5616_I2S_DF_PCM_B;
1050 break;
1051 default:
1052 return -EINVAL;
1053 }
1054
1055 snd_soc_component_update_bits(component, RT5616_I2S1_SDP,
1056 RT5616_I2S_MS_MASK | RT5616_I2S_BP_MASK |
1057 RT5616_I2S_DF_MASK, reg_val);
1058
1059 return 0;
1060 }
1061
1062 static int rt5616_set_dai_sysclk(struct snd_soc_dai *dai,
1063 int clk_id, unsigned int freq, int dir)
1064 {
1065 struct snd_soc_component *component = dai->component;
1066 struct rt5616_priv *rt5616 = snd_soc_component_get_drvdata(component);
1067 unsigned int reg_val = 0;
1068
1069 if (freq == rt5616->sysclk && clk_id == rt5616->sysclk_src)
1070 return 0;
1071
1072 switch (clk_id) {
1073 case RT5616_SCLK_S_MCLK:
1074 reg_val |= RT5616_SCLK_SRC_MCLK;
1075 break;
1076 case RT5616_SCLK_S_PLL1:
1077 reg_val |= RT5616_SCLK_SRC_PLL1;
1078 break;
1079 default:
1080 dev_err(component->dev, "Invalid clock id (%d)\n", clk_id);
1081 return -EINVAL;
1082 }
1083
1084 snd_soc_component_update_bits(component, RT5616_GLB_CLK,
1085 RT5616_SCLK_SRC_MASK, reg_val);
1086 rt5616->sysclk = freq;
1087 rt5616->sysclk_src = clk_id;
1088
1089 dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
1090
1091 return 0;
1092 }
1093
1094 static int rt5616_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
1095 unsigned int freq_in, unsigned int freq_out)
1096 {
1097 struct snd_soc_component *component = dai->component;
1098 struct rt5616_priv *rt5616 = snd_soc_component_get_drvdata(component);
1099 struct rl6231_pll_code pll_code;
1100 int ret;
1101
1102 if (source == rt5616->pll_src && freq_in == rt5616->pll_in &&
1103 freq_out == rt5616->pll_out)
1104 return 0;
1105
1106 if (!freq_in || !freq_out) {
1107 dev_dbg(component->dev, "PLL disabled\n");
1108
1109 rt5616->pll_in = 0;
1110 rt5616->pll_out = 0;
1111 snd_soc_component_update_bits(component, RT5616_GLB_CLK,
1112 RT5616_SCLK_SRC_MASK,
1113 RT5616_SCLK_SRC_MCLK);
1114 return 0;
1115 }
1116
1117 switch (source) {
1118 case RT5616_PLL1_S_MCLK:
1119 snd_soc_component_update_bits(component, RT5616_GLB_CLK,
1120 RT5616_PLL1_SRC_MASK,
1121 RT5616_PLL1_SRC_MCLK);
1122 break;
1123 case RT5616_PLL1_S_BCLK1:
1124 case RT5616_PLL1_S_BCLK2:
1125 snd_soc_component_update_bits(component, RT5616_GLB_CLK,
1126 RT5616_PLL1_SRC_MASK,
1127 RT5616_PLL1_SRC_BCLK1);
1128 break;
1129 default:
1130 dev_err(component->dev, "Unknown PLL source %d\n", source);
1131 return -EINVAL;
1132 }
1133
1134 ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
1135 if (ret < 0) {
1136 dev_err(component->dev, "Unsupported input clock %d\n", freq_in);
1137 return ret;
1138 }
1139
1140 dev_dbg(component->dev, "bypass=%d m=%d n=%d k=%d\n",
1141 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
1142 pll_code.n_code, pll_code.k_code);
1143
1144 snd_soc_component_write(component, RT5616_PLL_CTRL1,
1145 pll_code.n_code << RT5616_PLL_N_SFT | pll_code.k_code);
1146 snd_soc_component_write(component, RT5616_PLL_CTRL2,
1147 (pll_code.m_bp ? 0 : pll_code.m_code) <<
1148 RT5616_PLL_M_SFT |
1149 pll_code.m_bp << RT5616_PLL_M_BP_SFT);
1150
1151 rt5616->pll_in = freq_in;
1152 rt5616->pll_out = freq_out;
1153 rt5616->pll_src = source;
1154
1155 return 0;
1156 }
1157
1158 static int rt5616_set_bias_level(struct snd_soc_component *component,
1159 enum snd_soc_bias_level level)
1160 {
1161 struct rt5616_priv *rt5616 = snd_soc_component_get_drvdata(component);
1162 int ret;
1163
1164 switch (level) {
1165
1166 case SND_SOC_BIAS_ON:
1167 break;
1168
1169 case SND_SOC_BIAS_PREPARE:
1170
1171
1172
1173
1174
1175
1176
1177 if (IS_ERR(rt5616->mclk))
1178 break;
1179
1180 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_ON) {
1181 clk_disable_unprepare(rt5616->mclk);
1182 } else {
1183 ret = clk_prepare_enable(rt5616->mclk);
1184 if (ret)
1185 return ret;
1186 }
1187 break;
1188
1189 case SND_SOC_BIAS_STANDBY:
1190 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
1191 snd_soc_component_update_bits(component, RT5616_PWR_ANLG1,
1192 RT5616_PWR_VREF1 | RT5616_PWR_MB |
1193 RT5616_PWR_BG | RT5616_PWR_VREF2,
1194 RT5616_PWR_VREF1 | RT5616_PWR_MB |
1195 RT5616_PWR_BG | RT5616_PWR_VREF2);
1196 mdelay(10);
1197 snd_soc_component_update_bits(component, RT5616_PWR_ANLG1,
1198 RT5616_PWR_FV1 | RT5616_PWR_FV2,
1199 RT5616_PWR_FV1 | RT5616_PWR_FV2);
1200 snd_soc_component_update_bits(component, RT5616_D_MISC,
1201 RT5616_D_GATE_EN,
1202 RT5616_D_GATE_EN);
1203 }
1204 break;
1205
1206 case SND_SOC_BIAS_OFF:
1207 snd_soc_component_update_bits(component, RT5616_D_MISC, RT5616_D_GATE_EN, 0);
1208 snd_soc_component_write(component, RT5616_PWR_DIG1, 0x0000);
1209 snd_soc_component_write(component, RT5616_PWR_DIG2, 0x0000);
1210 snd_soc_component_write(component, RT5616_PWR_VOL, 0x0000);
1211 snd_soc_component_write(component, RT5616_PWR_MIXER, 0x0000);
1212 snd_soc_component_write(component, RT5616_PWR_ANLG1, 0x0000);
1213 snd_soc_component_write(component, RT5616_PWR_ANLG2, 0x0000);
1214 break;
1215
1216 default:
1217 break;
1218 }
1219
1220 return 0;
1221 }
1222
1223 static int rt5616_probe(struct snd_soc_component *component)
1224 {
1225 struct rt5616_priv *rt5616 = snd_soc_component_get_drvdata(component);
1226
1227
1228 rt5616->mclk = devm_clk_get(component->dev, "mclk");
1229 if (PTR_ERR(rt5616->mclk) == -EPROBE_DEFER)
1230 return -EPROBE_DEFER;
1231
1232 rt5616->component = component;
1233
1234 return 0;
1235 }
1236
1237 #ifdef CONFIG_PM
1238 static int rt5616_suspend(struct snd_soc_component *component)
1239 {
1240 struct rt5616_priv *rt5616 = snd_soc_component_get_drvdata(component);
1241
1242 regcache_cache_only(rt5616->regmap, true);
1243 regcache_mark_dirty(rt5616->regmap);
1244
1245 return 0;
1246 }
1247
1248 static int rt5616_resume(struct snd_soc_component *component)
1249 {
1250 struct rt5616_priv *rt5616 = snd_soc_component_get_drvdata(component);
1251
1252 regcache_cache_only(rt5616->regmap, false);
1253 regcache_sync(rt5616->regmap);
1254 return 0;
1255 }
1256 #else
1257 #define rt5616_suspend NULL
1258 #define rt5616_resume NULL
1259 #endif
1260
1261 #define RT5616_STEREO_RATES SNDRV_PCM_RATE_8000_192000
1262 #define RT5616_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
1263 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
1264
1265 static const struct snd_soc_dai_ops rt5616_aif_dai_ops = {
1266 .hw_params = rt5616_hw_params,
1267 .set_fmt = rt5616_set_dai_fmt,
1268 .set_sysclk = rt5616_set_dai_sysclk,
1269 .set_pll = rt5616_set_dai_pll,
1270 };
1271
1272 static struct snd_soc_dai_driver rt5616_dai[] = {
1273 {
1274 .name = "rt5616-aif1",
1275 .id = RT5616_AIF1,
1276 .playback = {
1277 .stream_name = "AIF1 Playback",
1278 .channels_min = 1,
1279 .channels_max = 2,
1280 .rates = RT5616_STEREO_RATES,
1281 .formats = RT5616_FORMATS,
1282 },
1283 .capture = {
1284 .stream_name = "AIF1 Capture",
1285 .channels_min = 1,
1286 .channels_max = 2,
1287 .rates = RT5616_STEREO_RATES,
1288 .formats = RT5616_FORMATS,
1289 },
1290 .ops = &rt5616_aif_dai_ops,
1291 },
1292 };
1293
1294 static const struct snd_soc_component_driver soc_component_dev_rt5616 = {
1295 .probe = rt5616_probe,
1296 .suspend = rt5616_suspend,
1297 .resume = rt5616_resume,
1298 .set_bias_level = rt5616_set_bias_level,
1299 .controls = rt5616_snd_controls,
1300 .num_controls = ARRAY_SIZE(rt5616_snd_controls),
1301 .dapm_widgets = rt5616_dapm_widgets,
1302 .num_dapm_widgets = ARRAY_SIZE(rt5616_dapm_widgets),
1303 .dapm_routes = rt5616_dapm_routes,
1304 .num_dapm_routes = ARRAY_SIZE(rt5616_dapm_routes),
1305 .use_pmdown_time = 1,
1306 .endianness = 1,
1307 };
1308
1309 static const struct regmap_config rt5616_regmap = {
1310 .reg_bits = 8,
1311 .val_bits = 16,
1312 .use_single_read = true,
1313 .use_single_write = true,
1314 .max_register = RT5616_DEVICE_ID + 1 + (ARRAY_SIZE(rt5616_ranges) *
1315 RT5616_PR_SPACING),
1316 .volatile_reg = rt5616_volatile_register,
1317 .readable_reg = rt5616_readable_register,
1318 .cache_type = REGCACHE_RBTREE,
1319 .reg_defaults = rt5616_reg,
1320 .num_reg_defaults = ARRAY_SIZE(rt5616_reg),
1321 .ranges = rt5616_ranges,
1322 .num_ranges = ARRAY_SIZE(rt5616_ranges),
1323 };
1324
1325 static const struct i2c_device_id rt5616_i2c_id[] = {
1326 { "rt5616", 0 },
1327 { }
1328 };
1329 MODULE_DEVICE_TABLE(i2c, rt5616_i2c_id);
1330
1331 #if defined(CONFIG_OF)
1332 static const struct of_device_id rt5616_of_match[] = {
1333 { .compatible = "realtek,rt5616", },
1334 {},
1335 };
1336 MODULE_DEVICE_TABLE(of, rt5616_of_match);
1337 #endif
1338
1339 static int rt5616_i2c_probe(struct i2c_client *i2c)
1340 {
1341 struct rt5616_priv *rt5616;
1342 unsigned int val;
1343 int ret;
1344
1345 rt5616 = devm_kzalloc(&i2c->dev, sizeof(struct rt5616_priv),
1346 GFP_KERNEL);
1347 if (!rt5616)
1348 return -ENOMEM;
1349
1350 i2c_set_clientdata(i2c, rt5616);
1351
1352 rt5616->regmap = devm_regmap_init_i2c(i2c, &rt5616_regmap);
1353 if (IS_ERR(rt5616->regmap)) {
1354 ret = PTR_ERR(rt5616->regmap);
1355 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
1356 ret);
1357 return ret;
1358 }
1359
1360 regmap_read(rt5616->regmap, RT5616_DEVICE_ID, &val);
1361 if (val != 0x6281) {
1362 dev_err(&i2c->dev,
1363 "Device with ID register %#x is not rt5616\n",
1364 val);
1365 return -ENODEV;
1366 }
1367 regmap_write(rt5616->regmap, RT5616_RESET, 0);
1368 regmap_update_bits(rt5616->regmap, RT5616_PWR_ANLG1,
1369 RT5616_PWR_VREF1 | RT5616_PWR_MB |
1370 RT5616_PWR_BG | RT5616_PWR_VREF2,
1371 RT5616_PWR_VREF1 | RT5616_PWR_MB |
1372 RT5616_PWR_BG | RT5616_PWR_VREF2);
1373 mdelay(10);
1374 regmap_update_bits(rt5616->regmap, RT5616_PWR_ANLG1,
1375 RT5616_PWR_FV1 | RT5616_PWR_FV2,
1376 RT5616_PWR_FV1 | RT5616_PWR_FV2);
1377
1378 ret = regmap_register_patch(rt5616->regmap, init_list,
1379 ARRAY_SIZE(init_list));
1380 if (ret != 0)
1381 dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
1382
1383 regmap_update_bits(rt5616->regmap, RT5616_PWR_ANLG1,
1384 RT5616_PWR_LDO_DVO_MASK, RT5616_PWR_LDO_DVO_1_2V);
1385
1386 return devm_snd_soc_register_component(&i2c->dev,
1387 &soc_component_dev_rt5616,
1388 rt5616_dai, ARRAY_SIZE(rt5616_dai));
1389 }
1390
1391 static int rt5616_i2c_remove(struct i2c_client *i2c)
1392 {
1393 return 0;
1394 }
1395
1396 static void rt5616_i2c_shutdown(struct i2c_client *client)
1397 {
1398 struct rt5616_priv *rt5616 = i2c_get_clientdata(client);
1399
1400 regmap_write(rt5616->regmap, RT5616_HP_VOL, 0xc8c8);
1401 regmap_write(rt5616->regmap, RT5616_LOUT_CTRL1, 0xc8c8);
1402 }
1403
1404 static struct i2c_driver rt5616_i2c_driver = {
1405 .driver = {
1406 .name = "rt5616",
1407 .of_match_table = of_match_ptr(rt5616_of_match),
1408 },
1409 .probe_new = rt5616_i2c_probe,
1410 .remove = rt5616_i2c_remove,
1411 .shutdown = rt5616_i2c_shutdown,
1412 .id_table = rt5616_i2c_id,
1413 };
1414 module_i2c_driver(rt5616_i2c_driver);
1415
1416 MODULE_DESCRIPTION("ASoC RT5616 driver");
1417 MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
1418 MODULE_LICENSE("GPL");