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0009 #ifndef __RT5514_H__
0010 #define __RT5514_H__
0011
0012 #include <linux/clk.h>
0013 #include <sound/rt5514.h>
0014
0015 #define RT5514_DEVICE_ID 0x10ec5514
0016
0017 #define RT5514_RESET 0x2000
0018 #define RT5514_PWR_ANA1 0x2004
0019 #define RT5514_PWR_ANA2 0x2008
0020 #define RT5514_I2S_CTRL1 0x2010
0021 #define RT5514_I2S_CTRL2 0x2014
0022 #define RT5514_VAD_CTRL6 0x2030
0023 #define RT5514_EXT_VAD_CTRL 0x206c
0024 #define RT5514_DIG_IO_CTRL 0x2070
0025 #define RT5514_PAD_CTRL1 0x2080
0026 #define RT5514_DMIC_DATA_CTRL 0x20a0
0027 #define RT5514_DIG_SOURCE_CTRL 0x20a4
0028 #define RT5514_SRC_CTRL 0x20ac
0029 #define RT5514_DOWNFILTER2_CTRL1 0x20d0
0030 #define RT5514_PLL_SOURCE_CTRL 0x2100
0031 #define RT5514_CLK_CTRL1 0x2104
0032 #define RT5514_CLK_CTRL2 0x2108
0033 #define RT5514_PLL3_CALIB_CTRL1 0x2110
0034 #define RT5514_PLL3_CALIB_CTRL4 0x2120
0035 #define RT5514_PLL3_CALIB_CTRL5 0x2124
0036 #define RT5514_PLL3_CALIB_CTRL6 0x2128
0037 #define RT5514_DELAY_BUF_CTRL1 0x2140
0038 #define RT5514_DELAY_BUF_CTRL3 0x2148
0039 #define RT5514_ASRC_IN_CTRL1 0x2180
0040 #define RT5514_DOWNFILTER0_CTRL1 0x2190
0041 #define RT5514_DOWNFILTER0_CTRL2 0x2194
0042 #define RT5514_DOWNFILTER0_CTRL3 0x2198
0043 #define RT5514_DOWNFILTER1_CTRL1 0x21a0
0044 #define RT5514_DOWNFILTER1_CTRL2 0x21a4
0045 #define RT5514_DOWNFILTER1_CTRL3 0x21a8
0046 #define RT5514_ANA_CTRL_LDO10 0x2200
0047 #define RT5514_ANA_CTRL_LDO18_16 0x2204
0048 #define RT5514_ANA_CTRL_ADC12 0x2210
0049 #define RT5514_ANA_CTRL_ADC21 0x2214
0050 #define RT5514_ANA_CTRL_ADC22 0x2218
0051 #define RT5514_ANA_CTRL_ADC23 0x221c
0052 #define RT5514_ANA_CTRL_MICBST 0x2220
0053 #define RT5514_ANA_CTRL_ADCFED 0x2224
0054 #define RT5514_ANA_CTRL_INBUF 0x2228
0055 #define RT5514_ANA_CTRL_VREF 0x222c
0056 #define RT5514_ANA_CTRL_PLL3 0x2240
0057 #define RT5514_ANA_CTRL_PLL1_1 0x2260
0058 #define RT5514_ANA_CTRL_PLL1_2 0x2264
0059 #define RT5514_DMIC_LP_CTRL 0x2e00
0060 #define RT5514_MISC_CTRL_DSP 0x2e04
0061 #define RT5514_DSP_CTRL1 0x2f00
0062 #define RT5514_DSP_CTRL3 0x2f08
0063 #define RT5514_DSP_CTRL4 0x2f10
0064 #define RT5514_VENDOR_ID1 0x2ff0
0065 #define RT5514_VENDOR_ID2 0x2ff4
0066
0067 #define RT5514_DSP_MAPPING 0x18000000
0068
0069
0070 #define RT5514_POW_LDO18_IN (0x1 << 5)
0071 #define RT5514_POW_LDO18_IN_BIT 5
0072 #define RT5514_POW_LDO18_ADC (0x1 << 4)
0073 #define RT5514_POW_LDO18_ADC_BIT 4
0074 #define RT5514_POW_LDO21 (0x1 << 3)
0075 #define RT5514_POW_LDO21_BIT 3
0076 #define RT5514_POW_BG_LDO18_IN (0x1 << 2)
0077 #define RT5514_POW_BG_LDO18_IN_BIT 2
0078 #define RT5514_POW_BG_LDO21 (0x1 << 1)
0079 #define RT5514_POW_BG_LDO21_BIT 1
0080
0081
0082 #define RT5514_POW_PLL1 (0x1 << 18)
0083 #define RT5514_POW_PLL1_BIT 18
0084 #define RT5514_POW_PLL1_LDO (0x1 << 16)
0085 #define RT5514_POW_PLL1_LDO_BIT 16
0086 #define RT5514_POW_BG_MBIAS (0x1 << 15)
0087 #define RT5514_POW_BG_MBIAS_BIT 15
0088 #define RT5514_POW_MBIAS (0x1 << 14)
0089 #define RT5514_POW_MBIAS_BIT 14
0090 #define RT5514_POW_VREF2 (0x1 << 13)
0091 #define RT5514_POW_VREF2_BIT 13
0092 #define RT5514_POW_VREF1 (0x1 << 12)
0093 #define RT5514_POW_VREF1_BIT 12
0094 #define RT5514_POWR_LDO16 (0x1 << 11)
0095 #define RT5514_POWR_LDO16_BIT 11
0096 #define RT5514_POWL_LDO16 (0x1 << 10)
0097 #define RT5514_POWL_LDO16_BIT 10
0098 #define RT5514_POW_ADC2 (0x1 << 9)
0099 #define RT5514_POW_ADC2_BIT 9
0100 #define RT5514_POW_INPUT_BUF (0x1 << 8)
0101 #define RT5514_POW_INPUT_BUF_BIT 8
0102 #define RT5514_POW_ADC1_R (0x1 << 7)
0103 #define RT5514_POW_ADC1_R_BIT 7
0104 #define RT5514_POW_ADC1_L (0x1 << 6)
0105 #define RT5514_POW_ADC1_L_BIT 6
0106 #define RT5514_POW2_BSTR (0x1 << 5)
0107 #define RT5514_POW2_BSTR_BIT 5
0108 #define RT5514_POW2_BSTL (0x1 << 4)
0109 #define RT5514_POW2_BSTL_BIT 4
0110 #define RT5514_POW_BSTR (0x1 << 3)
0111 #define RT5514_POW_BSTR_BIT 3
0112 #define RT5514_POW_BSTL (0x1 << 2)
0113 #define RT5514_POW_BSTL_BIT 2
0114 #define RT5514_POW_ADCFEDR (0x1 << 1)
0115 #define RT5514_POW_ADCFEDR_BIT 1
0116 #define RT5514_POW_ADCFEDL (0x1 << 0)
0117 #define RT5514_POW_ADCFEDL_BIT 0
0118
0119
0120 #define RT5514_TDM_MODE2 (0x1 << 30)
0121 #define RT5514_TDM_MODE2_SFT 30
0122 #define RT5514_TDM_MODE (0x1 << 28)
0123 #define RT5514_TDM_MODE_SFT 28
0124 #define RT5514_I2S_LR_MASK (0x1 << 26)
0125 #define RT5514_I2S_LR_SFT 26
0126 #define RT5514_I2S_LR_NOR (0x0 << 26)
0127 #define RT5514_I2S_LR_INV (0x1 << 26)
0128 #define RT5514_I2S_BP_MASK (0x1 << 25)
0129 #define RT5514_I2S_BP_SFT 25
0130 #define RT5514_I2S_BP_NOR (0x0 << 25)
0131 #define RT5514_I2S_BP_INV (0x1 << 25)
0132 #define RT5514_I2S_DF_MASK (0x7 << 16)
0133 #define RT5514_I2S_DF_SFT 16
0134 #define RT5514_I2S_DF_I2S (0x0 << 16)
0135 #define RT5514_I2S_DF_LEFT (0x1 << 16)
0136 #define RT5514_I2S_DF_PCM_A (0x2 << 16)
0137 #define RT5514_I2S_DF_PCM_B (0x3 << 16)
0138 #define RT5514_TDMSLOT_SEL_RX_MASK (0x3 << 10)
0139 #define RT5514_TDMSLOT_SEL_RX_SFT 10
0140 #define RT5514_TDMSLOT_SEL_RX_4CH (0x1 << 10)
0141 #define RT5514_TDMSLOT_SEL_RX_6CH (0x2 << 10)
0142 #define RT5514_TDMSLOT_SEL_RX_8CH (0x3 << 10)
0143 #define RT5514_CH_LEN_RX_MASK (0x3 << 8)
0144 #define RT5514_CH_LEN_RX_SFT 8
0145 #define RT5514_CH_LEN_RX_16 (0x0 << 8)
0146 #define RT5514_CH_LEN_RX_20 (0x1 << 8)
0147 #define RT5514_CH_LEN_RX_24 (0x2 << 8)
0148 #define RT5514_CH_LEN_RX_32 (0x3 << 8)
0149 #define RT5514_TDMSLOT_SEL_TX_MASK (0x3 << 6)
0150 #define RT5514_TDMSLOT_SEL_TX_SFT 6
0151 #define RT5514_TDMSLOT_SEL_TX_4CH (0x1 << 6)
0152 #define RT5514_TDMSLOT_SEL_TX_6CH (0x2 << 6)
0153 #define RT5514_TDMSLOT_SEL_TX_8CH (0x3 << 6)
0154 #define RT5514_CH_LEN_TX_MASK (0x3 << 4)
0155 #define RT5514_CH_LEN_TX_SFT 4
0156 #define RT5514_CH_LEN_TX_16 (0x0 << 4)
0157 #define RT5514_CH_LEN_TX_20 (0x1 << 4)
0158 #define RT5514_CH_LEN_TX_24 (0x2 << 4)
0159 #define RT5514_CH_LEN_TX_32 (0x3 << 4)
0160 #define RT5514_I2S_DL_MASK (0x3 << 0)
0161 #define RT5514_I2S_DL_SFT 0
0162 #define RT5514_I2S_DL_16 (0x0 << 0)
0163 #define RT5514_I2S_DL_20 (0x1 << 0)
0164 #define RT5514_I2S_DL_24 (0x2 << 0)
0165 #define RT5514_I2S_DL_8 (0x3 << 0)
0166
0167
0168 #define RT5514_TDM_DOCKING_MODE (0x1 << 31)
0169 #define RT5514_TDM_DOCKING_MODE_SFT 31
0170 #define RT5514_TDM_DOCKING_VALID_CH_MASK (0x1 << 29)
0171 #define RT5514_TDM_DOCKING_VALID_CH_SFT 29
0172 #define RT5514_TDM_DOCKING_VALID_CH2 (0x0 << 29)
0173 #define RT5514_TDM_DOCKING_VALID_CH4 (0x1 << 29)
0174 #define RT5514_TDM_DOCKING_START_MASK (0x1 << 28)
0175 #define RT5514_TDM_DOCKING_START_SFT 28
0176 #define RT5514_TDM_DOCKING_START_SLOT0 (0x0 << 28)
0177 #define RT5514_TDM_DOCKING_START_SLOT4 (0x1 << 28)
0178
0179
0180 #define RT5514_AD1_DMIC_INPUT_SEL (0x1 << 1)
0181 #define RT5514_AD1_DMIC_INPUT_SEL_SFT 1
0182 #define RT5514_AD0_DMIC_INPUT_SEL (0x1 << 0)
0183 #define RT5514_AD0_DMIC_INPUT_SEL_SFT 0
0184
0185
0186 #define RT5514_PLL_1_SEL_MASK (0x7 << 12)
0187 #define RT5514_PLL_1_SEL_SFT 12
0188 #define RT5514_PLL_1_SEL_SCLK (0x3 << 12)
0189 #define RT5514_PLL_1_SEL_MCLK (0x4 << 12)
0190
0191
0192 #define RT5514_CLK_AD_ANA1_EN (0x1 << 31)
0193 #define RT5514_CLK_AD_ANA1_EN_BIT 31
0194 #define RT5514_CLK_AD1_EN (0x1 << 24)
0195 #define RT5514_CLK_AD1_EN_BIT 24
0196 #define RT5514_CLK_AD0_EN (0x1 << 23)
0197 #define RT5514_CLK_AD0_EN_BIT 23
0198 #define RT5514_CLK_DMIC_OUT_SEL_MASK (0x7 << 8)
0199 #define RT5514_CLK_DMIC_OUT_SEL_SFT 8
0200 #define RT5514_CLK_AD_ANA1_SEL_MASK (0xf << 0)
0201 #define RT5514_CLK_AD_ANA1_SEL_SFT 0
0202
0203
0204 #define RT5514_CLK_AD1_ASRC_EN (0x1 << 17)
0205 #define RT5514_CLK_AD1_ASRC_EN_BIT 17
0206 #define RT5514_CLK_AD0_ASRC_EN (0x1 << 16)
0207 #define RT5514_CLK_AD0_ASRC_EN_BIT 16
0208 #define RT5514_CLK_SYS_DIV_OUT_MASK (0x7 << 8)
0209 #define RT5514_CLK_SYS_DIV_OUT_SFT 8
0210 #define RT5514_SEL_ADC_OSR_MASK (0x7 << 4)
0211 #define RT5514_SEL_ADC_OSR_SFT 4
0212 #define RT5514_CLK_SYS_PRE_SEL_MASK (0x3 << 0)
0213 #define RT5514_CLK_SYS_PRE_SEL_SFT 0
0214 #define RT5514_CLK_SYS_PRE_SEL_MCLK (0x2 << 0)
0215 #define RT5514_CLK_SYS_PRE_SEL_PLL (0x3 << 0)
0216
0217
0218 #define RT5514_AD_DMIC_MIX (0x1 << 11)
0219 #define RT5514_AD_DMIC_MIX_BIT 11
0220 #define RT5514_AD_AD_MIX (0x1 << 10)
0221 #define RT5514_AD_AD_MIX_BIT 10
0222 #define RT5514_AD_AD_MUTE (0x1 << 7)
0223 #define RT5514_AD_AD_MUTE_BIT 7
0224 #define RT5514_AD_GAIN_MASK (0x3f << 1)
0225 #define RT5514_AD_GAIN_SFT 1
0226
0227
0228 #define RT5514_SEL_BSTL_MASK (0xf << 4)
0229 #define RT5514_SEL_BSTL_SFT 4
0230 #define RT5514_SEL_BSTR_MASK (0xf << 0)
0231 #define RT5514_SEL_BSTR_SFT 0
0232
0233
0234 #define RT5514_PLL_K_MAX 0x1f
0235 #define RT5514_PLL_K_MASK (RT5514_PLL_K_MAX << 16)
0236 #define RT5514_PLL_K_SFT 16
0237 #define RT5514_PLL_N_MAX 0x1ff
0238 #define RT5514_PLL_N_MASK (RT5514_PLL_N_MAX << 7)
0239 #define RT5514_PLL_N_SFT 4
0240 #define RT5514_PLL_M_MAX 0xf
0241 #define RT5514_PLL_M_MASK (RT5514_PLL_M_MAX << 0)
0242 #define RT5514_PLL_M_SFT 0
0243
0244
0245 #define RT5514_PLL_M_BP (0x1 << 2)
0246 #define RT5514_PLL_M_BP_SFT 2
0247 #define RT5514_PLL_K_BP (0x1 << 1)
0248 #define RT5514_PLL_K_BP_SFT 1
0249 #define RT5514_EN_LDO_PLL1 (0x1 << 0)
0250 #define RT5514_EN_LDO_PLL1_BIT 0
0251
0252 #define RT5514_PLL_INP_MAX 40000000
0253 #define RT5514_PLL_INP_MIN 256000
0254
0255 #define RT5514_FIRMWARE1 "rt5514_dsp_fw1.bin"
0256 #define RT5514_FIRMWARE2 "rt5514_dsp_fw2.bin"
0257
0258
0259 enum {
0260 RT5514_SCLK_S_MCLK,
0261 RT5514_SCLK_S_PLL1,
0262 };
0263
0264
0265 enum {
0266 RT5514_PLL1_S_MCLK,
0267 RT5514_PLL1_S_BCLK,
0268 };
0269
0270 struct rt5514_priv {
0271 struct rt5514_platform_data pdata;
0272 struct snd_soc_component *component;
0273 struct regmap *i2c_regmap, *regmap;
0274 struct clk *mclk, *dsp_calib_clk;
0275 int sysclk;
0276 int sysclk_src;
0277 int lrck;
0278 int bclk;
0279 int pll_src;
0280 int pll_in;
0281 int pll_out;
0282 int dsp_enabled;
0283 unsigned int pll3_cal_value;
0284 };
0285
0286 #endif