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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * rt298.c  --  RT298 ALSA SoC audio codec driver
0004  *
0005  * Copyright 2015 Realtek Semiconductor Corp.
0006  * Author: Bard Liao <bardliao@realtek.com>
0007  */
0008 
0009 #include <linux/module.h>
0010 #include <linux/moduleparam.h>
0011 #include <linux/init.h>
0012 #include <linux/delay.h>
0013 #include <linux/pm.h>
0014 #include <linux/i2c.h>
0015 #include <linux/platform_device.h>
0016 #include <linux/spi/spi.h>
0017 #include <linux/dmi.h>
0018 #include <linux/acpi.h>
0019 #include <sound/core.h>
0020 #include <sound/pcm.h>
0021 #include <sound/pcm_params.h>
0022 #include <sound/soc.h>
0023 #include <sound/soc-dapm.h>
0024 #include <sound/initval.h>
0025 #include <sound/tlv.h>
0026 #include <sound/jack.h>
0027 #include <linux/workqueue.h>
0028 #include <sound/rt298.h>
0029 
0030 #include "rl6347a.h"
0031 #include "rt298.h"
0032 
0033 #define RT298_VENDOR_ID 0x10ec0298
0034 
0035 struct rt298_priv {
0036     struct reg_default *index_cache;
0037     int index_cache_size;
0038     struct regmap *regmap;
0039     struct snd_soc_component *component;
0040     struct rt298_platform_data pdata;
0041     struct i2c_client *i2c;
0042     struct snd_soc_jack *jack;
0043     struct delayed_work jack_detect_work;
0044     int sys_clk;
0045     int clk_id;
0046     int is_hp_in;
0047 };
0048 
0049 static const struct reg_default rt298_index_def[] = {
0050     { 0x01, 0xa5a8 },
0051     { 0x02, 0x8e95 },
0052     { 0x03, 0x0002 },
0053     { 0x04, 0xaf67 },
0054     { 0x08, 0x200f },
0055     { 0x09, 0xd010 },
0056     { 0x0a, 0x0100 },
0057     { 0x0b, 0x0000 },
0058     { 0x0d, 0x2800 },
0059     { 0x0f, 0x0022 },
0060     { 0x19, 0x0217 },
0061     { 0x20, 0x0020 },
0062     { 0x33, 0x0208 },
0063     { 0x46, 0x0300 },
0064     { 0x49, 0x4004 },
0065     { 0x4f, 0x50c9 },
0066     { 0x50, 0x3000 },
0067     { 0x63, 0x1b02 },
0068     { 0x67, 0x1111 },
0069     { 0x68, 0x1016 },
0070     { 0x69, 0x273f },
0071 };
0072 #define INDEX_CACHE_SIZE ARRAY_SIZE(rt298_index_def)
0073 
0074 static const struct reg_default rt298_reg[] = {
0075     { 0x00170500, 0x00000400 },
0076     { 0x00220000, 0x00000031 },
0077     { 0x00239000, 0x0000007f },
0078     { 0x0023a000, 0x0000007f },
0079     { 0x00270500, 0x00000400 },
0080     { 0x00370500, 0x00000400 },
0081     { 0x00870500, 0x00000400 },
0082     { 0x00920000, 0x00000031 },
0083     { 0x00935000, 0x000000c3 },
0084     { 0x00936000, 0x000000c3 },
0085     { 0x00970500, 0x00000400 },
0086     { 0x00b37000, 0x00000097 },
0087     { 0x00b37200, 0x00000097 },
0088     { 0x00b37300, 0x00000097 },
0089     { 0x00c37000, 0x00000000 },
0090     { 0x00c37100, 0x00000080 },
0091     { 0x01270500, 0x00000400 },
0092     { 0x01370500, 0x00000400 },
0093     { 0x01371f00, 0x411111f0 },
0094     { 0x01439000, 0x00000080 },
0095     { 0x0143a000, 0x00000080 },
0096     { 0x01470700, 0x00000000 },
0097     { 0x01470500, 0x00000400 },
0098     { 0x01470c00, 0x00000000 },
0099     { 0x01470100, 0x00000000 },
0100     { 0x01837000, 0x00000000 },
0101     { 0x01870500, 0x00000400 },
0102     { 0x02050000, 0x00000000 },
0103     { 0x02139000, 0x00000080 },
0104     { 0x0213a000, 0x00000080 },
0105     { 0x02170100, 0x00000000 },
0106     { 0x02170500, 0x00000400 },
0107     { 0x02170700, 0x00000000 },
0108     { 0x02270100, 0x00000000 },
0109     { 0x02370100, 0x00000000 },
0110     { 0x01870700, 0x00000020 },
0111     { 0x00830000, 0x000000c3 },
0112     { 0x00930000, 0x000000c3 },
0113     { 0x01270700, 0x00000000 },
0114 };
0115 
0116 static bool rt298_volatile_register(struct device *dev, unsigned int reg)
0117 {
0118     switch (reg) {
0119     case 0 ... 0xff:
0120     case RT298_GET_PARAM(AC_NODE_ROOT, AC_PAR_VENDOR_ID):
0121     case RT298_GET_HP_SENSE:
0122     case RT298_GET_MIC1_SENSE:
0123     case RT298_PROC_COEF:
0124     case VERB_CMD(AC_VERB_GET_EAPD_BTLENABLE, RT298_MIC1, 0):
0125     case VERB_CMD(AC_VERB_GET_EAPD_BTLENABLE, RT298_SPK_OUT, 0):
0126     case VERB_CMD(AC_VERB_GET_EAPD_BTLENABLE, RT298_HP_OUT, 0):
0127         return true;
0128     default:
0129         return false;
0130     }
0131 
0132 
0133 }
0134 
0135 static bool rt298_readable_register(struct device *dev, unsigned int reg)
0136 {
0137     switch (reg) {
0138     case 0 ... 0xff:
0139     case RT298_GET_PARAM(AC_NODE_ROOT, AC_PAR_VENDOR_ID):
0140     case RT298_GET_HP_SENSE:
0141     case RT298_GET_MIC1_SENSE:
0142     case RT298_SET_AUDIO_POWER:
0143     case RT298_SET_HPO_POWER:
0144     case RT298_SET_SPK_POWER:
0145     case RT298_SET_DMIC1_POWER:
0146     case RT298_SPK_MUX:
0147     case RT298_HPO_MUX:
0148     case RT298_ADC0_MUX:
0149     case RT298_ADC1_MUX:
0150     case RT298_SET_MIC1:
0151     case RT298_SET_PIN_HPO:
0152     case RT298_SET_PIN_SPK:
0153     case RT298_SET_PIN_DMIC1:
0154     case RT298_SPK_EAPD:
0155     case RT298_SET_AMP_GAIN_HPO:
0156     case RT298_SET_DMIC2_DEFAULT:
0157     case RT298_DACL_GAIN:
0158     case RT298_DACR_GAIN:
0159     case RT298_ADCL_GAIN:
0160     case RT298_ADCR_GAIN:
0161     case RT298_MIC_GAIN:
0162     case RT298_SPOL_GAIN:
0163     case RT298_SPOR_GAIN:
0164     case RT298_HPOL_GAIN:
0165     case RT298_HPOR_GAIN:
0166     case RT298_F_DAC_SWITCH:
0167     case RT298_F_RECMIX_SWITCH:
0168     case RT298_REC_MIC_SWITCH:
0169     case RT298_REC_I2S_SWITCH:
0170     case RT298_REC_LINE_SWITCH:
0171     case RT298_REC_BEEP_SWITCH:
0172     case RT298_DAC_FORMAT:
0173     case RT298_ADC_FORMAT:
0174     case RT298_COEF_INDEX:
0175     case RT298_PROC_COEF:
0176     case RT298_SET_AMP_GAIN_ADC_IN1:
0177     case RT298_SET_AMP_GAIN_ADC_IN2:
0178     case RT298_SET_POWER(RT298_DAC_OUT1):
0179     case RT298_SET_POWER(RT298_DAC_OUT2):
0180     case RT298_SET_POWER(RT298_ADC_IN1):
0181     case RT298_SET_POWER(RT298_ADC_IN2):
0182     case RT298_SET_POWER(RT298_DMIC2):
0183     case RT298_SET_POWER(RT298_MIC1):
0184     case VERB_CMD(AC_VERB_GET_EAPD_BTLENABLE, RT298_MIC1, 0):
0185     case VERB_CMD(AC_VERB_GET_EAPD_BTLENABLE, RT298_SPK_OUT, 0):
0186     case VERB_CMD(AC_VERB_GET_EAPD_BTLENABLE, RT298_HP_OUT, 0):
0187         return true;
0188     default:
0189         return false;
0190     }
0191 }
0192 
0193 #ifdef CONFIG_PM
0194 static void rt298_index_sync(struct snd_soc_component *component)
0195 {
0196     struct rt298_priv *rt298 = snd_soc_component_get_drvdata(component);
0197     int i;
0198 
0199     for (i = 0; i < INDEX_CACHE_SIZE; i++) {
0200         snd_soc_component_write(component, rt298->index_cache[i].reg,
0201                   rt298->index_cache[i].def);
0202     }
0203 }
0204 #endif
0205 
0206 static int rt298_support_power_controls[] = {
0207     RT298_DAC_OUT1,
0208     RT298_DAC_OUT2,
0209     RT298_ADC_IN1,
0210     RT298_ADC_IN2,
0211     RT298_MIC1,
0212     RT298_DMIC1,
0213     RT298_DMIC2,
0214     RT298_SPK_OUT,
0215     RT298_HP_OUT,
0216 };
0217 #define RT298_POWER_REG_LEN ARRAY_SIZE(rt298_support_power_controls)
0218 
0219 static int rt298_jack_detect(struct rt298_priv *rt298, bool *hp, bool *mic)
0220 {
0221     struct snd_soc_dapm_context *dapm;
0222     unsigned int val, buf;
0223 
0224     *hp = false;
0225     *mic = false;
0226 
0227     if (!rt298->component)
0228         return -EINVAL;
0229 
0230     dapm = snd_soc_component_get_dapm(rt298->component);
0231 
0232     if (rt298->pdata.cbj_en) {
0233         regmap_read(rt298->regmap, RT298_GET_HP_SENSE, &buf);
0234         *hp = buf & 0x80000000;
0235         if (*hp == rt298->is_hp_in)
0236             return -1;
0237         rt298->is_hp_in = *hp;
0238         if (*hp) {
0239             /* power on HV,VERF */
0240             regmap_update_bits(rt298->regmap,
0241                 RT298_DC_GAIN, 0x200, 0x200);
0242 
0243             snd_soc_dapm_force_enable_pin(dapm, "HV");
0244             snd_soc_dapm_force_enable_pin(dapm, "VREF");
0245             /* power LDO1 */
0246             snd_soc_dapm_force_enable_pin(dapm, "LDO1");
0247             snd_soc_dapm_sync(dapm);
0248 
0249             regmap_update_bits(rt298->regmap,
0250                 RT298_POWER_CTRL1, 0x1001, 0);
0251             regmap_update_bits(rt298->regmap,
0252                 RT298_POWER_CTRL2, 0x4, 0x4);
0253 
0254             regmap_write(rt298->regmap, RT298_SET_MIC1, 0x24);
0255             msleep(50);
0256 
0257             regmap_update_bits(rt298->regmap,
0258                 RT298_CBJ_CTRL1, 0xfcc0, 0xd400);
0259             msleep(300);
0260             regmap_read(rt298->regmap, RT298_CBJ_CTRL2, &val);
0261 
0262             if (0x0070 == (val & 0x0070)) {
0263                 *mic = true;
0264             } else {
0265                 regmap_update_bits(rt298->regmap,
0266                     RT298_CBJ_CTRL1, 0xfcc0, 0xe400);
0267                 msleep(300);
0268                 regmap_read(rt298->regmap,
0269                     RT298_CBJ_CTRL2, &val);
0270                 if (0x0070 == (val & 0x0070)) {
0271                     *mic = true;
0272                 } else {
0273                     *mic = false;
0274                     regmap_update_bits(rt298->regmap,
0275                         RT298_CBJ_CTRL1,
0276                         0xfcc0, 0xc400);
0277                 }
0278             }
0279 
0280             regmap_update_bits(rt298->regmap,
0281                 RT298_DC_GAIN, 0x200, 0x0);
0282 
0283         } else {
0284             *mic = false;
0285             regmap_write(rt298->regmap, RT298_SET_MIC1, 0x20);
0286             regmap_update_bits(rt298->regmap,
0287                 RT298_CBJ_CTRL1, 0x0400, 0x0000);
0288         }
0289     } else {
0290         regmap_read(rt298->regmap, RT298_GET_HP_SENSE, &buf);
0291         *hp = buf & 0x80000000;
0292         regmap_read(rt298->regmap, RT298_GET_MIC1_SENSE, &buf);
0293         *mic = buf & 0x80000000;
0294     }
0295     if (!*mic) {
0296         snd_soc_dapm_disable_pin(dapm, "HV");
0297         snd_soc_dapm_disable_pin(dapm, "VREF");
0298     }
0299     if (!*hp)
0300         snd_soc_dapm_disable_pin(dapm, "LDO1");
0301     snd_soc_dapm_sync(dapm);
0302 
0303     pr_debug("*hp = %d *mic = %d\n", *hp, *mic);
0304 
0305     return 0;
0306 }
0307 
0308 static void rt298_jack_detect_work(struct work_struct *work)
0309 {
0310     struct rt298_priv *rt298 =
0311         container_of(work, struct rt298_priv, jack_detect_work.work);
0312     int status = 0;
0313     bool hp = false;
0314     bool mic = false;
0315 
0316     if (rt298_jack_detect(rt298, &hp, &mic) < 0)
0317         return;
0318 
0319     if (hp)
0320         status |= SND_JACK_HEADPHONE;
0321 
0322     if (mic)
0323         status |= SND_JACK_MICROPHONE;
0324 
0325     snd_soc_jack_report(rt298->jack, status,
0326         SND_JACK_MICROPHONE | SND_JACK_HEADPHONE);
0327 }
0328 
0329 static int rt298_mic_detect(struct snd_soc_component *component,
0330                 struct snd_soc_jack *jack, void *data)
0331 {
0332     struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
0333     struct rt298_priv *rt298 = snd_soc_component_get_drvdata(component);
0334 
0335     rt298->jack = jack;
0336 
0337     if (jack) {
0338         /* Enable IRQ */
0339         if (rt298->jack->status & SND_JACK_HEADPHONE)
0340             snd_soc_dapm_force_enable_pin(dapm, "LDO1");
0341         if (rt298->jack->status & SND_JACK_MICROPHONE) {
0342             snd_soc_dapm_force_enable_pin(dapm, "HV");
0343             snd_soc_dapm_force_enable_pin(dapm, "VREF");
0344         }
0345         regmap_update_bits(rt298->regmap, RT298_IRQ_CTRL, 0x2, 0x2);
0346         /* Send an initial empty report */
0347         snd_soc_jack_report(rt298->jack, rt298->jack->status,
0348                     SND_JACK_MICROPHONE | SND_JACK_HEADPHONE);
0349     } else {
0350         /* Disable IRQ */
0351         regmap_update_bits(rt298->regmap, RT298_IRQ_CTRL, 0x2, 0x0);
0352         snd_soc_dapm_disable_pin(dapm, "HV");
0353         snd_soc_dapm_disable_pin(dapm, "VREF");
0354         snd_soc_dapm_disable_pin(dapm, "LDO1");
0355     }
0356     snd_soc_dapm_sync(dapm);
0357 
0358     return 0;
0359 }
0360 
0361 static int is_mclk_mode(struct snd_soc_dapm_widget *source,
0362              struct snd_soc_dapm_widget *sink)
0363 {
0364     struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm);
0365     struct rt298_priv *rt298 = snd_soc_component_get_drvdata(component);
0366 
0367     if (rt298->clk_id == RT298_SCLK_S_MCLK)
0368         return 1;
0369     else
0370         return 0;
0371 }
0372 
0373 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -6350, 50, 0);
0374 static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, 0, 1000, 0);
0375 
0376 static const struct snd_kcontrol_new rt298_snd_controls[] = {
0377     SOC_DOUBLE_R_TLV("DAC0 Playback Volume", RT298_DACL_GAIN,
0378                 RT298_DACR_GAIN, 0, 0x7f, 0, out_vol_tlv),
0379     SOC_DOUBLE_R_TLV("ADC0 Capture Volume", RT298_ADCL_GAIN,
0380                 RT298_ADCR_GAIN, 0, 0x7f, 0, out_vol_tlv),
0381     SOC_SINGLE_TLV("AMIC Volume", RT298_MIC_GAIN,
0382                 0, 0x3, 0, mic_vol_tlv),
0383     SOC_DOUBLE_R("Speaker Playback Switch", RT298_SPOL_GAIN,
0384                 RT298_SPOR_GAIN, RT298_MUTE_SFT, 1, 1),
0385 };
0386 
0387 /* Digital Mixer */
0388 static const struct snd_kcontrol_new rt298_front_mix[] = {
0389     SOC_DAPM_SINGLE("DAC Switch",  RT298_F_DAC_SWITCH,
0390             RT298_MUTE_SFT, 1, 1),
0391     SOC_DAPM_SINGLE("RECMIX Switch", RT298_F_RECMIX_SWITCH,
0392             RT298_MUTE_SFT, 1, 1),
0393 };
0394 
0395 /* Analog Input Mixer */
0396 static const struct snd_kcontrol_new rt298_rec_mix[] = {
0397     SOC_DAPM_SINGLE("Mic1 Switch", RT298_REC_MIC_SWITCH,
0398             RT298_MUTE_SFT, 1, 1),
0399     SOC_DAPM_SINGLE("I2S Switch", RT298_REC_I2S_SWITCH,
0400             RT298_MUTE_SFT, 1, 1),
0401     SOC_DAPM_SINGLE("Line1 Switch", RT298_REC_LINE_SWITCH,
0402             RT298_MUTE_SFT, 1, 1),
0403     SOC_DAPM_SINGLE("Beep Switch", RT298_REC_BEEP_SWITCH,
0404             RT298_MUTE_SFT, 1, 1),
0405 };
0406 
0407 static const struct snd_kcontrol_new spo_enable_control =
0408     SOC_DAPM_SINGLE("Switch", RT298_SET_PIN_SPK,
0409             RT298_SET_PIN_SFT, 1, 0);
0410 
0411 static const struct snd_kcontrol_new hpol_enable_control =
0412     SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT298_HPOL_GAIN,
0413             RT298_MUTE_SFT, 1, 1);
0414 
0415 static const struct snd_kcontrol_new hpor_enable_control =
0416     SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT298_HPOR_GAIN,
0417             RT298_MUTE_SFT, 1, 1);
0418 
0419 /* ADC0 source */
0420 static const char * const rt298_adc_src[] = {
0421     "Mic", "RECMIX", "Dmic"
0422 };
0423 
0424 static const int rt298_adc_values[] = {
0425     0, 4, 5,
0426 };
0427 
0428 static SOC_VALUE_ENUM_SINGLE_DECL(
0429     rt298_adc0_enum, RT298_ADC0_MUX, RT298_ADC_SEL_SFT,
0430     RT298_ADC_SEL_MASK, rt298_adc_src, rt298_adc_values);
0431 
0432 static const struct snd_kcontrol_new rt298_adc0_mux =
0433     SOC_DAPM_ENUM("ADC 0 source", rt298_adc0_enum);
0434 
0435 static SOC_VALUE_ENUM_SINGLE_DECL(
0436     rt298_adc1_enum, RT298_ADC1_MUX, RT298_ADC_SEL_SFT,
0437     RT298_ADC_SEL_MASK, rt298_adc_src, rt298_adc_values);
0438 
0439 static const struct snd_kcontrol_new rt298_adc1_mux =
0440     SOC_DAPM_ENUM("ADC 1 source", rt298_adc1_enum);
0441 
0442 static const char * const rt298_dac_src[] = {
0443     "Front", "Surround"
0444 };
0445 /* HP-OUT source */
0446 static SOC_ENUM_SINGLE_DECL(rt298_hpo_enum, RT298_HPO_MUX,
0447                 0, rt298_dac_src);
0448 
0449 static const struct snd_kcontrol_new rt298_hpo_mux =
0450 SOC_DAPM_ENUM("HPO source", rt298_hpo_enum);
0451 
0452 /* SPK-OUT source */
0453 static SOC_ENUM_SINGLE_DECL(rt298_spo_enum, RT298_SPK_MUX,
0454                 0, rt298_dac_src);
0455 
0456 static const struct snd_kcontrol_new rt298_spo_mux =
0457 SOC_DAPM_ENUM("SPO source", rt298_spo_enum);
0458 
0459 static int rt298_spk_event(struct snd_soc_dapm_widget *w,
0460                 struct snd_kcontrol *kcontrol, int event)
0461 {
0462     struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
0463 
0464     switch (event) {
0465     case SND_SOC_DAPM_POST_PMU:
0466         snd_soc_component_write(component,
0467             RT298_SPK_EAPD, RT298_SET_EAPD_HIGH);
0468         break;
0469     case SND_SOC_DAPM_PRE_PMD:
0470         snd_soc_component_write(component,
0471             RT298_SPK_EAPD, RT298_SET_EAPD_LOW);
0472         break;
0473 
0474     default:
0475         return 0;
0476     }
0477 
0478     return 0;
0479 }
0480 
0481 static int rt298_set_dmic1_event(struct snd_soc_dapm_widget *w,
0482                   struct snd_kcontrol *kcontrol, int event)
0483 {
0484     struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
0485 
0486     switch (event) {
0487     case SND_SOC_DAPM_POST_PMU:
0488         snd_soc_component_write(component, RT298_SET_PIN_DMIC1, 0x20);
0489         break;
0490     case SND_SOC_DAPM_PRE_PMD:
0491         snd_soc_component_write(component, RT298_SET_PIN_DMIC1, 0);
0492         break;
0493     default:
0494         return 0;
0495     }
0496 
0497     return 0;
0498 }
0499 
0500 static int rt298_adc_event(struct snd_soc_dapm_widget *w,
0501                  struct snd_kcontrol *kcontrol, int event)
0502 {
0503     struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
0504     unsigned int nid;
0505 
0506     nid = (w->reg >> 20) & 0xff;
0507 
0508     switch (event) {
0509     case SND_SOC_DAPM_POST_PMU:
0510         snd_soc_component_update_bits(component,
0511             VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, nid, 0),
0512             0x7080, 0x7000);
0513          /* If MCLK doesn't exist, reset AD filter */
0514         if (!(snd_soc_component_read(component, RT298_VAD_CTRL) & 0x200)) {
0515             pr_info("NO MCLK\n");
0516             switch (nid) {
0517             case RT298_ADC_IN1:
0518                 snd_soc_component_update_bits(component,
0519                     RT298_D_FILTER_CTRL, 0x2, 0x2);
0520                 mdelay(10);
0521                 snd_soc_component_update_bits(component,
0522                     RT298_D_FILTER_CTRL, 0x2, 0x0);
0523                 break;
0524             case RT298_ADC_IN2:
0525                 snd_soc_component_update_bits(component,
0526                     RT298_D_FILTER_CTRL, 0x4, 0x4);
0527                 mdelay(10);
0528                 snd_soc_component_update_bits(component,
0529                     RT298_D_FILTER_CTRL, 0x4, 0x0);
0530                 break;
0531             }
0532         }
0533         break;
0534     case SND_SOC_DAPM_PRE_PMD:
0535         snd_soc_component_update_bits(component,
0536             VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, nid, 0),
0537             0x7080, 0x7080);
0538         break;
0539     default:
0540         return 0;
0541     }
0542 
0543     return 0;
0544 }
0545 
0546 static int rt298_mic1_event(struct snd_soc_dapm_widget *w,
0547                  struct snd_kcontrol *kcontrol, int event)
0548 {
0549     struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
0550 
0551     switch (event) {
0552     case SND_SOC_DAPM_PRE_PMU:
0553         snd_soc_component_update_bits(component,
0554             RT298_A_BIAS_CTRL3, 0xc000, 0x8000);
0555         snd_soc_component_update_bits(component,
0556             RT298_A_BIAS_CTRL2, 0xc000, 0x8000);
0557         break;
0558     case SND_SOC_DAPM_POST_PMD:
0559         snd_soc_component_update_bits(component,
0560             RT298_A_BIAS_CTRL3, 0xc000, 0x0000);
0561         snd_soc_component_update_bits(component,
0562             RT298_A_BIAS_CTRL2, 0xc000, 0x0000);
0563         break;
0564     default:
0565         return 0;
0566     }
0567 
0568     return 0;
0569 }
0570 
0571 static const struct snd_soc_dapm_widget rt298_dapm_widgets[] = {
0572 
0573     SND_SOC_DAPM_SUPPLY_S("HV", 1, RT298_POWER_CTRL1,
0574         12, 1, NULL, 0),
0575     SND_SOC_DAPM_SUPPLY("VREF", RT298_POWER_CTRL1,
0576         0, 1, NULL, 0),
0577     SND_SOC_DAPM_SUPPLY_S("BG_MBIAS", 1, RT298_POWER_CTRL2,
0578         1, 0, NULL, 0),
0579     SND_SOC_DAPM_SUPPLY_S("LDO1", 1, RT298_POWER_CTRL2,
0580         2, 0, NULL, 0),
0581     SND_SOC_DAPM_SUPPLY_S("LDO2", 1, RT298_POWER_CTRL2,
0582         3, 0, NULL, 0),
0583     SND_SOC_DAPM_SUPPLY_S("VREF1", 1, RT298_POWER_CTRL2,
0584         4, 1, NULL, 0),
0585     SND_SOC_DAPM_SUPPLY_S("LV", 2, RT298_POWER_CTRL1,
0586         13, 1, NULL, 0),
0587 
0588 
0589     SND_SOC_DAPM_SUPPLY("MCLK MODE", RT298_PLL_CTRL1,
0590         5, 0, NULL, 0),
0591     SND_SOC_DAPM_SUPPLY("MIC1 Input Buffer", SND_SOC_NOPM,
0592         0, 0, rt298_mic1_event, SND_SOC_DAPM_PRE_PMU |
0593         SND_SOC_DAPM_POST_PMD),
0594 
0595     /* Input Lines */
0596     SND_SOC_DAPM_INPUT("DMIC1 Pin"),
0597     SND_SOC_DAPM_INPUT("DMIC2 Pin"),
0598     SND_SOC_DAPM_INPUT("MIC1"),
0599     SND_SOC_DAPM_INPUT("LINE1"),
0600     SND_SOC_DAPM_INPUT("Beep"),
0601 
0602     /* DMIC */
0603     SND_SOC_DAPM_PGA_E("DMIC1", RT298_SET_POWER(RT298_DMIC1), 0, 1,
0604         NULL, 0, rt298_set_dmic1_event,
0605         SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
0606     SND_SOC_DAPM_PGA("DMIC2", RT298_SET_POWER(RT298_DMIC2), 0, 1,
0607         NULL, 0),
0608     SND_SOC_DAPM_SUPPLY("DMIC Receiver", SND_SOC_NOPM,
0609         0, 0, NULL, 0),
0610 
0611     /* REC Mixer */
0612     SND_SOC_DAPM_MIXER("RECMIX", SND_SOC_NOPM, 0, 0,
0613         rt298_rec_mix, ARRAY_SIZE(rt298_rec_mix)),
0614 
0615     /* ADCs */
0616     SND_SOC_DAPM_ADC("ADC 0", NULL, SND_SOC_NOPM, 0, 0),
0617     SND_SOC_DAPM_ADC("ADC 1", NULL, SND_SOC_NOPM, 0, 0),
0618 
0619     /* ADC Mux */
0620     SND_SOC_DAPM_MUX_E("ADC 0 Mux", RT298_SET_POWER(RT298_ADC_IN1), 0, 1,
0621         &rt298_adc0_mux, rt298_adc_event, SND_SOC_DAPM_PRE_PMD |
0622         SND_SOC_DAPM_POST_PMU),
0623     SND_SOC_DAPM_MUX_E("ADC 1 Mux", RT298_SET_POWER(RT298_ADC_IN2), 0, 1,
0624         &rt298_adc1_mux, rt298_adc_event, SND_SOC_DAPM_PRE_PMD |
0625         SND_SOC_DAPM_POST_PMU),
0626 
0627     /* Audio Interface */
0628     SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
0629     SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
0630     SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
0631     SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
0632 
0633     /* Output Side */
0634     /* DACs */
0635     SND_SOC_DAPM_DAC("DAC 0", NULL, SND_SOC_NOPM, 0, 0),
0636     SND_SOC_DAPM_DAC("DAC 1", NULL, SND_SOC_NOPM, 0, 0),
0637 
0638     /* Output Mux */
0639     SND_SOC_DAPM_MUX("SPK Mux", SND_SOC_NOPM, 0, 0, &rt298_spo_mux),
0640     SND_SOC_DAPM_MUX("HPO Mux", SND_SOC_NOPM, 0, 0, &rt298_hpo_mux),
0641 
0642     SND_SOC_DAPM_SUPPLY("HP Power", RT298_SET_PIN_HPO,
0643         RT298_SET_PIN_SFT, 0, NULL, 0),
0644 
0645     /* Output Mixer */
0646     SND_SOC_DAPM_MIXER("Front", RT298_SET_POWER(RT298_DAC_OUT1), 0, 1,
0647             rt298_front_mix, ARRAY_SIZE(rt298_front_mix)),
0648     SND_SOC_DAPM_PGA("Surround", RT298_SET_POWER(RT298_DAC_OUT2), 0, 1,
0649             NULL, 0),
0650 
0651     /* Output Pga */
0652     SND_SOC_DAPM_SWITCH_E("SPO", SND_SOC_NOPM, 0, 0,
0653         &spo_enable_control, rt298_spk_event,
0654         SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
0655     SND_SOC_DAPM_SWITCH("HPO L", SND_SOC_NOPM, 0, 0,
0656         &hpol_enable_control),
0657     SND_SOC_DAPM_SWITCH("HPO R", SND_SOC_NOPM, 0, 0,
0658         &hpor_enable_control),
0659 
0660     /* Output Lines */
0661     SND_SOC_DAPM_OUTPUT("SPOL"),
0662     SND_SOC_DAPM_OUTPUT("SPOR"),
0663     SND_SOC_DAPM_OUTPUT("HPO Pin"),
0664     SND_SOC_DAPM_OUTPUT("SPDIF"),
0665 };
0666 
0667 static const struct snd_soc_dapm_route rt298_dapm_routes[] = {
0668 
0669     {"ADC 0", NULL, "MCLK MODE", is_mclk_mode},
0670     {"ADC 1", NULL, "MCLK MODE", is_mclk_mode},
0671     {"Front", NULL, "MCLK MODE", is_mclk_mode},
0672     {"Surround", NULL, "MCLK MODE", is_mclk_mode},
0673 
0674     {"HP Power", NULL, "LDO1"},
0675     {"HP Power", NULL, "LDO2"},
0676     {"HP Power", NULL, "LV"},
0677     {"HP Power", NULL, "VREF1"},
0678     {"HP Power", NULL, "BG_MBIAS"},
0679 
0680     {"MIC1", NULL, "LDO1"},
0681     {"MIC1", NULL, "LDO2"},
0682     {"MIC1", NULL, "HV"},
0683     {"MIC1", NULL, "LV"},
0684     {"MIC1", NULL, "VREF"},
0685     {"MIC1", NULL, "VREF1"},
0686     {"MIC1", NULL, "BG_MBIAS"},
0687     {"MIC1", NULL, "MIC1 Input Buffer"},
0688 
0689     {"SPO", NULL, "LDO1"},
0690     {"SPO", NULL, "LDO2"},
0691     {"SPO", NULL, "HV"},
0692     {"SPO", NULL, "LV"},
0693     {"SPO", NULL, "VREF"},
0694     {"SPO", NULL, "VREF1"},
0695     {"SPO", NULL, "BG_MBIAS"},
0696 
0697     {"DMIC1", NULL, "DMIC1 Pin"},
0698     {"DMIC2", NULL, "DMIC2 Pin"},
0699     {"DMIC1", NULL, "DMIC Receiver"},
0700     {"DMIC2", NULL, "DMIC Receiver"},
0701 
0702     {"RECMIX", "Beep Switch", "Beep"},
0703     {"RECMIX", "Line1 Switch", "LINE1"},
0704     {"RECMIX", "Mic1 Switch", "MIC1"},
0705 
0706     {"ADC 0 Mux", "Dmic", "DMIC1"},
0707     {"ADC 0 Mux", "RECMIX", "RECMIX"},
0708     {"ADC 0 Mux", "Mic", "MIC1"},
0709     {"ADC 1 Mux", "Dmic", "DMIC2"},
0710     {"ADC 1 Mux", "RECMIX", "RECMIX"},
0711     {"ADC 1 Mux", "Mic", "MIC1"},
0712 
0713     {"ADC 0", NULL, "ADC 0 Mux"},
0714     {"ADC 1", NULL, "ADC 1 Mux"},
0715 
0716     {"AIF1TX", NULL, "ADC 0"},
0717     {"AIF2TX", NULL, "ADC 1"},
0718 
0719     {"DAC 0", NULL, "AIF1RX"},
0720     {"DAC 1", NULL, "AIF2RX"},
0721 
0722     {"Front", "DAC Switch", "DAC 0"},
0723     {"Front", "RECMIX Switch", "RECMIX"},
0724 
0725     {"Surround", NULL, "DAC 1"},
0726 
0727     {"SPK Mux", "Front", "Front"},
0728     {"SPK Mux", "Surround", "Surround"},
0729 
0730     {"HPO Mux", "Front", "Front"},
0731     {"HPO Mux", "Surround", "Surround"},
0732 
0733     {"SPO", "Switch", "SPK Mux"},
0734     {"HPO L", "Switch", "HPO Mux"},
0735     {"HPO R", "Switch", "HPO Mux"},
0736     {"HPO L", NULL, "HP Power"},
0737     {"HPO R", NULL, "HP Power"},
0738 
0739     {"SPOL", NULL, "SPO"},
0740     {"SPOR", NULL, "SPO"},
0741     {"HPO Pin", NULL, "HPO L"},
0742     {"HPO Pin", NULL, "HPO R"},
0743 };
0744 
0745 static int rt298_hw_params(struct snd_pcm_substream *substream,
0746                 struct snd_pcm_hw_params *params,
0747                 struct snd_soc_dai *dai)
0748 {
0749     struct snd_soc_component *component = dai->component;
0750     struct rt298_priv *rt298 = snd_soc_component_get_drvdata(component);
0751     unsigned int val = 0;
0752     int d_len_code;
0753 
0754     switch (params_rate(params)) {
0755     /* bit 14 0:48K 1:44.1K */
0756     case 44100:
0757     case 48000:
0758         break;
0759     default:
0760         dev_err(component->dev, "Unsupported sample rate %d\n",
0761                     params_rate(params));
0762         return -EINVAL;
0763     }
0764     switch (rt298->sys_clk) {
0765     case 12288000:
0766     case 24576000:
0767         if (params_rate(params) != 48000) {
0768             dev_err(component->dev, "Sys_clk is not matched (%d %d)\n",
0769                     params_rate(params), rt298->sys_clk);
0770             return -EINVAL;
0771         }
0772         break;
0773     case 11289600:
0774     case 22579200:
0775         if (params_rate(params) != 44100) {
0776             dev_err(component->dev, "Sys_clk is not matched (%d %d)\n",
0777                     params_rate(params), rt298->sys_clk);
0778             return -EINVAL;
0779         }
0780         break;
0781     }
0782 
0783     if (params_channels(params) <= 16) {
0784         /* bit 3:0 Number of Channel */
0785         val |= (params_channels(params) - 1);
0786     } else {
0787         dev_err(component->dev, "Unsupported channels %d\n",
0788                     params_channels(params));
0789         return -EINVAL;
0790     }
0791 
0792     d_len_code = 0;
0793     switch (params_width(params)) {
0794     /* bit 6:4 Bits per Sample */
0795     case 16:
0796         d_len_code = 0;
0797         val |= (0x1 << 4);
0798         break;
0799     case 32:
0800         d_len_code = 2;
0801         val |= (0x4 << 4);
0802         break;
0803     case 20:
0804         d_len_code = 1;
0805         val |= (0x2 << 4);
0806         break;
0807     case 24:
0808         d_len_code = 2;
0809         val |= (0x3 << 4);
0810         break;
0811     case 8:
0812         d_len_code = 3;
0813         break;
0814     default:
0815         return -EINVAL;
0816     }
0817 
0818     snd_soc_component_update_bits(component,
0819         RT298_I2S_CTRL1, 0x0018, d_len_code << 3);
0820     dev_dbg(component->dev, "format val = 0x%x\n", val);
0821 
0822     snd_soc_component_update_bits(component, RT298_DAC_FORMAT, 0x407f, val);
0823     snd_soc_component_update_bits(component, RT298_ADC_FORMAT, 0x407f, val);
0824 
0825     return 0;
0826 }
0827 
0828 static int rt298_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
0829 {
0830     struct snd_soc_component *component = dai->component;
0831 
0832     switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
0833     case SND_SOC_DAIFMT_CBM_CFM:
0834         snd_soc_component_update_bits(component,
0835             RT298_I2S_CTRL1, 0x800, 0x800);
0836         break;
0837     case SND_SOC_DAIFMT_CBS_CFS:
0838         snd_soc_component_update_bits(component,
0839             RT298_I2S_CTRL1, 0x800, 0x0);
0840         break;
0841     default:
0842         return -EINVAL;
0843     }
0844 
0845     switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
0846     case SND_SOC_DAIFMT_I2S:
0847         snd_soc_component_update_bits(component,
0848             RT298_I2S_CTRL1, 0x300, 0x0);
0849         break;
0850     case SND_SOC_DAIFMT_LEFT_J:
0851         snd_soc_component_update_bits(component,
0852             RT298_I2S_CTRL1, 0x300, 0x1 << 8);
0853         break;
0854     case SND_SOC_DAIFMT_DSP_A:
0855         snd_soc_component_update_bits(component,
0856             RT298_I2S_CTRL1, 0x300, 0x2 << 8);
0857         break;
0858     case SND_SOC_DAIFMT_DSP_B:
0859         snd_soc_component_update_bits(component,
0860             RT298_I2S_CTRL1, 0x300, 0x3 << 8);
0861         break;
0862     default:
0863         return -EINVAL;
0864     }
0865     /* bit 15 Stream Type 0:PCM 1:Non-PCM */
0866     snd_soc_component_update_bits(component, RT298_DAC_FORMAT, 0x8000, 0);
0867     snd_soc_component_update_bits(component, RT298_ADC_FORMAT, 0x8000, 0);
0868 
0869     return 0;
0870 }
0871 
0872 static int rt298_set_dai_sysclk(struct snd_soc_dai *dai,
0873                 int clk_id, unsigned int freq, int dir)
0874 {
0875     struct snd_soc_component *component = dai->component;
0876     struct rt298_priv *rt298 = snd_soc_component_get_drvdata(component);
0877 
0878     dev_dbg(component->dev, "%s freq=%d\n", __func__, freq);
0879 
0880     if (RT298_SCLK_S_MCLK == clk_id) {
0881         snd_soc_component_update_bits(component,
0882             RT298_I2S_CTRL2, 0x0100, 0x0);
0883         snd_soc_component_update_bits(component,
0884             RT298_PLL_CTRL1, 0x20, 0x20);
0885     } else {
0886         snd_soc_component_update_bits(component,
0887             RT298_I2S_CTRL2, 0x0100, 0x0100);
0888         snd_soc_component_update_bits(component,
0889             RT298_PLL_CTRL1, 0x20, 0x0);
0890     }
0891 
0892     switch (freq) {
0893     case 19200000:
0894         if (RT298_SCLK_S_MCLK == clk_id) {
0895             dev_err(component->dev, "Should not use MCLK\n");
0896             return -EINVAL;
0897         }
0898         snd_soc_component_update_bits(component,
0899             RT298_I2S_CTRL2, 0x40, 0x40);
0900         break;
0901     case 24000000:
0902         if (RT298_SCLK_S_MCLK == clk_id) {
0903             dev_err(component->dev, "Should not use MCLK\n");
0904             return -EINVAL;
0905         }
0906         snd_soc_component_update_bits(component,
0907             RT298_I2S_CTRL2, 0x40, 0x0);
0908         break;
0909     case 12288000:
0910     case 11289600:
0911         snd_soc_component_update_bits(component,
0912             RT298_I2S_CTRL2, 0x8, 0x0);
0913         snd_soc_component_update_bits(component,
0914             RT298_CLK_DIV, 0xfc1e, 0x0004);
0915         break;
0916     case 24576000:
0917     case 22579200:
0918         snd_soc_component_update_bits(component,
0919             RT298_I2S_CTRL2, 0x8, 0x8);
0920         snd_soc_component_update_bits(component,
0921             RT298_CLK_DIV, 0xfc1e, 0x5406);
0922         break;
0923     default:
0924         dev_err(component->dev, "Unsupported system clock\n");
0925         return -EINVAL;
0926     }
0927 
0928     rt298->sys_clk = freq;
0929     rt298->clk_id = clk_id;
0930 
0931     return 0;
0932 }
0933 
0934 static int rt298_set_bclk_ratio(struct snd_soc_dai *dai, unsigned int ratio)
0935 {
0936     struct snd_soc_component *component = dai->component;
0937 
0938     dev_dbg(component->dev, "%s ratio=%d\n", __func__, ratio);
0939     if (50 == ratio)
0940         snd_soc_component_update_bits(component,
0941             RT298_I2S_CTRL1, 0x1000, 0x1000);
0942     else
0943         snd_soc_component_update_bits(component,
0944             RT298_I2S_CTRL1, 0x1000, 0x0);
0945 
0946 
0947     return 0;
0948 }
0949 
0950 static int rt298_set_bias_level(struct snd_soc_component *component,
0951                  enum snd_soc_bias_level level)
0952 {
0953     switch (level) {
0954     case SND_SOC_BIAS_PREPARE:
0955         if (SND_SOC_BIAS_STANDBY ==
0956             snd_soc_component_get_bias_level(component)) {
0957             snd_soc_component_write(component,
0958                 RT298_SET_AUDIO_POWER, AC_PWRST_D0);
0959             snd_soc_component_update_bits(component, 0x0d, 0x200, 0x200);
0960             snd_soc_component_update_bits(component, 0x52, 0x80, 0x0);
0961             mdelay(20);
0962             snd_soc_component_update_bits(component, 0x0d, 0x200, 0x0);
0963             snd_soc_component_update_bits(component, 0x52, 0x80, 0x80);
0964         }
0965         break;
0966 
0967     case SND_SOC_BIAS_STANDBY:
0968         snd_soc_component_write(component,
0969             RT298_SET_AUDIO_POWER, AC_PWRST_D3);
0970         break;
0971 
0972     default:
0973         break;
0974     }
0975 
0976     return 0;
0977 }
0978 
0979 static irqreturn_t rt298_irq(int irq, void *data)
0980 {
0981     struct rt298_priv *rt298 = data;
0982     bool hp = false;
0983     bool mic = false;
0984     int ret, status = 0;
0985 
0986     ret = rt298_jack_detect(rt298, &hp, &mic);
0987 
0988     /* Clear IRQ */
0989     regmap_update_bits(rt298->regmap, RT298_IRQ_CTRL, 0x1, 0x1);
0990 
0991     if (ret == 0) {
0992         if (hp)
0993             status |= SND_JACK_HEADPHONE;
0994 
0995         if (mic)
0996             status |= SND_JACK_MICROPHONE;
0997 
0998         snd_soc_jack_report(rt298->jack, status,
0999             SND_JACK_MICROPHONE | SND_JACK_HEADPHONE);
1000 
1001         pm_wakeup_event(&rt298->i2c->dev, 300);
1002     }
1003 
1004     return IRQ_HANDLED;
1005 }
1006 
1007 static int rt298_probe(struct snd_soc_component *component)
1008 {
1009     struct rt298_priv *rt298 = snd_soc_component_get_drvdata(component);
1010 
1011     rt298->component = component;
1012     INIT_DELAYED_WORK(&rt298->jack_detect_work, rt298_jack_detect_work);
1013 
1014     if (rt298->i2c->irq)
1015         schedule_delayed_work(&rt298->jack_detect_work,
1016                       msecs_to_jiffies(1250));
1017     return 0;
1018 }
1019 
1020 static void rt298_remove(struct snd_soc_component *component)
1021 {
1022     struct rt298_priv *rt298 = snd_soc_component_get_drvdata(component);
1023 
1024     cancel_delayed_work_sync(&rt298->jack_detect_work);
1025     rt298->component = NULL;
1026 }
1027 
1028 #ifdef CONFIG_PM
1029 static int rt298_suspend(struct snd_soc_component *component)
1030 {
1031     struct rt298_priv *rt298 = snd_soc_component_get_drvdata(component);
1032 
1033     rt298->is_hp_in = -1;
1034     regcache_cache_only(rt298->regmap, true);
1035     regcache_mark_dirty(rt298->regmap);
1036 
1037     return 0;
1038 }
1039 
1040 static int rt298_resume(struct snd_soc_component *component)
1041 {
1042     struct rt298_priv *rt298 = snd_soc_component_get_drvdata(component);
1043 
1044     regcache_cache_only(rt298->regmap, false);
1045     rt298_index_sync(component);
1046     regcache_sync(rt298->regmap);
1047 
1048     return 0;
1049 }
1050 #else
1051 #define rt298_suspend NULL
1052 #define rt298_resume NULL
1053 #endif
1054 
1055 #define RT298_STEREO_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000)
1056 #define RT298_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
1057             SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
1058 
1059 static const struct snd_soc_dai_ops rt298_aif_dai_ops = {
1060     .hw_params = rt298_hw_params,
1061     .set_fmt = rt298_set_dai_fmt,
1062     .set_sysclk = rt298_set_dai_sysclk,
1063     .set_bclk_ratio = rt298_set_bclk_ratio,
1064 };
1065 
1066 static struct snd_soc_dai_driver rt298_dai[] = {
1067     {
1068         .name = "rt298-aif1",
1069         .id = RT298_AIF1,
1070         .playback = {
1071             .stream_name = "AIF1 Playback",
1072             .channels_min = 1,
1073             .channels_max = 2,
1074             .rates = RT298_STEREO_RATES,
1075             .formats = RT298_FORMATS,
1076         },
1077         .capture = {
1078             .stream_name = "AIF1 Capture",
1079             .channels_min = 1,
1080             .channels_max = 2,
1081             .rates = RT298_STEREO_RATES,
1082             .formats = RT298_FORMATS,
1083         },
1084         .ops = &rt298_aif_dai_ops,
1085         .symmetric_rate = 1,
1086     },
1087     {
1088         .name = "rt298-aif2",
1089         .id = RT298_AIF2,
1090         .playback = {
1091             .stream_name = "AIF2 Playback",
1092             .channels_min = 1,
1093             .channels_max = 2,
1094             .rates = RT298_STEREO_RATES,
1095             .formats = RT298_FORMATS,
1096         },
1097         .capture = {
1098             .stream_name = "AIF2 Capture",
1099             .channels_min = 1,
1100             .channels_max = 2,
1101             .rates = RT298_STEREO_RATES,
1102             .formats = RT298_FORMATS,
1103         },
1104         .ops = &rt298_aif_dai_ops,
1105         .symmetric_rate = 1,
1106     },
1107 
1108 };
1109 
1110 static const struct snd_soc_component_driver soc_component_dev_rt298 = {
1111     .probe          = rt298_probe,
1112     .remove         = rt298_remove,
1113     .suspend        = rt298_suspend,
1114     .resume         = rt298_resume,
1115     .set_bias_level     = rt298_set_bias_level,
1116     .set_jack       = rt298_mic_detect,
1117     .controls       = rt298_snd_controls,
1118     .num_controls       = ARRAY_SIZE(rt298_snd_controls),
1119     .dapm_widgets       = rt298_dapm_widgets,
1120     .num_dapm_widgets   = ARRAY_SIZE(rt298_dapm_widgets),
1121     .dapm_routes        = rt298_dapm_routes,
1122     .num_dapm_routes    = ARRAY_SIZE(rt298_dapm_routes),
1123     .use_pmdown_time    = 1,
1124     .endianness     = 1,
1125 };
1126 
1127 static const struct regmap_config rt298_regmap = {
1128     .reg_bits = 32,
1129     .val_bits = 32,
1130     .max_register = 0x02370100,
1131     .volatile_reg = rt298_volatile_register,
1132     .readable_reg = rt298_readable_register,
1133     .reg_write = rl6347a_hw_write,
1134     .reg_read = rl6347a_hw_read,
1135     .cache_type = REGCACHE_RBTREE,
1136     .reg_defaults = rt298_reg,
1137     .num_reg_defaults = ARRAY_SIZE(rt298_reg),
1138 };
1139 
1140 static const struct i2c_device_id rt298_i2c_id[] = {
1141     {"rt298", 0},
1142     {}
1143 };
1144 MODULE_DEVICE_TABLE(i2c, rt298_i2c_id);
1145 
1146 #ifdef CONFIG_ACPI
1147 static const struct acpi_device_id rt298_acpi_match[] = {
1148     { "INT343A", 0 },
1149     {},
1150 };
1151 MODULE_DEVICE_TABLE(acpi, rt298_acpi_match);
1152 #endif
1153 
1154 static const struct dmi_system_id force_combo_jack_table[] = {
1155     {
1156         .ident = "Intel Broxton P",
1157         .matches = {
1158             DMI_MATCH(DMI_SYS_VENDOR, "Intel Corp"),
1159             DMI_MATCH(DMI_PRODUCT_NAME, "Broxton P")
1160         }
1161     },
1162     {
1163         .ident = "Intel Gemini Lake",
1164         .matches = {
1165             DMI_MATCH(DMI_SYS_VENDOR, "Intel Corp"),
1166             DMI_MATCH(DMI_PRODUCT_NAME, "Geminilake")
1167         }
1168     },
1169     { }
1170 };
1171 
1172 static int rt298_i2c_probe(struct i2c_client *i2c)
1173 {
1174     struct rt298_platform_data *pdata = dev_get_platdata(&i2c->dev);
1175     struct rt298_priv *rt298;
1176     struct device *dev = &i2c->dev;
1177     const struct acpi_device_id *acpiid;
1178     int i, ret;
1179 
1180     rt298 = devm_kzalloc(&i2c->dev, sizeof(*rt298),
1181                 GFP_KERNEL);
1182     if (NULL == rt298)
1183         return -ENOMEM;
1184 
1185     rt298->regmap = devm_regmap_init(&i2c->dev, NULL, i2c, &rt298_regmap);
1186     if (IS_ERR(rt298->regmap)) {
1187         ret = PTR_ERR(rt298->regmap);
1188         dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
1189             ret);
1190         return ret;
1191     }
1192 
1193     regmap_read(rt298->regmap,
1194         RT298_GET_PARAM(AC_NODE_ROOT, AC_PAR_VENDOR_ID), &ret);
1195     if (ret != RT298_VENDOR_ID) {
1196         dev_err(&i2c->dev,
1197             "Device with ID register %#x is not rt298\n", ret);
1198         return -ENODEV;
1199     }
1200 
1201     rt298->index_cache = devm_kmemdup(&i2c->dev, rt298_index_def,
1202                       sizeof(rt298_index_def), GFP_KERNEL);
1203     if (!rt298->index_cache)
1204         return -ENOMEM;
1205 
1206     rt298->index_cache_size = INDEX_CACHE_SIZE;
1207     rt298->i2c = i2c;
1208     i2c_set_clientdata(i2c, rt298);
1209 
1210     /* restore codec default */
1211     for (i = 0; i < INDEX_CACHE_SIZE; i++)
1212         regmap_write(rt298->regmap, rt298->index_cache[i].reg,
1213                 rt298->index_cache[i].def);
1214     for (i = 0; i < ARRAY_SIZE(rt298_reg); i++)
1215         regmap_write(rt298->regmap, rt298_reg[i].reg,
1216                 rt298_reg[i].def);
1217 
1218     if (pdata)
1219         rt298->pdata = *pdata;
1220 
1221     /* enable jack combo mode on supported devices */
1222     acpiid = acpi_match_device(dev->driver->acpi_match_table, dev);
1223     if (acpiid && acpiid->driver_data) {
1224         rt298->pdata = *(struct rt298_platform_data *)
1225                 acpiid->driver_data;
1226     }
1227 
1228     if (dmi_check_system(force_combo_jack_table)) {
1229         rt298->pdata.cbj_en = true;
1230         rt298->pdata.gpio2_en = false;
1231     }
1232 
1233     /* VREF Charging */
1234     regmap_update_bits(rt298->regmap, 0x04, 0x80, 0x80);
1235     regmap_update_bits(rt298->regmap, 0x1b, 0x860, 0x860);
1236     /* Vref2 */
1237     regmap_update_bits(rt298->regmap, 0x08, 0x20, 0x20);
1238 
1239     regmap_write(rt298->regmap, RT298_SET_AUDIO_POWER, AC_PWRST_D3);
1240 
1241     for (i = 0; i < RT298_POWER_REG_LEN; i++)
1242         regmap_write(rt298->regmap,
1243             RT298_SET_POWER(rt298_support_power_controls[i]),
1244             AC_PWRST_D1);
1245 
1246     if (!rt298->pdata.cbj_en) {
1247         regmap_write(rt298->regmap, RT298_CBJ_CTRL2, 0x0000);
1248         regmap_write(rt298->regmap, RT298_MIC1_DET_CTRL, 0x0816);
1249         regmap_update_bits(rt298->regmap,
1250                     RT298_CBJ_CTRL1, 0xf000, 0xb000);
1251     } else {
1252         regmap_update_bits(rt298->regmap,
1253                     RT298_CBJ_CTRL1, 0xf000, 0x5000);
1254     }
1255 
1256     mdelay(10);
1257 
1258     if (!rt298->pdata.gpio2_en)
1259         regmap_write(rt298->regmap, RT298_SET_DMIC2_DEFAULT, 0x40);
1260     else
1261         regmap_write(rt298->regmap, RT298_SET_DMIC2_DEFAULT, 0);
1262 
1263     mdelay(10);
1264 
1265     regmap_write(rt298->regmap, RT298_MISC_CTRL1, 0x0000);
1266     regmap_update_bits(rt298->regmap,
1267                 RT298_WIND_FILTER_CTRL, 0x0082, 0x0082);
1268 
1269     regmap_write(rt298->regmap, RT298_UNSOLICITED_INLINE_CMD, 0x81);
1270     regmap_write(rt298->regmap, RT298_UNSOLICITED_HP_OUT, 0x82);
1271     regmap_write(rt298->regmap, RT298_UNSOLICITED_MIC1, 0x84);
1272     regmap_update_bits(rt298->regmap, RT298_IRQ_FLAG_CTRL, 0x2, 0x2);
1273 
1274     rt298->is_hp_in = -1;
1275 
1276     if (rt298->i2c->irq) {
1277         ret = request_threaded_irq(rt298->i2c->irq, NULL, rt298_irq,
1278             IRQF_TRIGGER_HIGH | IRQF_ONESHOT, "rt298", rt298);
1279         if (ret != 0) {
1280             dev_err(&i2c->dev,
1281                 "Failed to reguest IRQ: %d\n", ret);
1282             return ret;
1283         }
1284     }
1285 
1286     ret = devm_snd_soc_register_component(&i2c->dev,
1287                      &soc_component_dev_rt298,
1288                      rt298_dai, ARRAY_SIZE(rt298_dai));
1289 
1290     return ret;
1291 }
1292 
1293 static int rt298_i2c_remove(struct i2c_client *i2c)
1294 {
1295     struct rt298_priv *rt298 = i2c_get_clientdata(i2c);
1296 
1297     if (i2c->irq)
1298         free_irq(i2c->irq, rt298);
1299 
1300     return 0;
1301 }
1302 
1303 
1304 static struct i2c_driver rt298_i2c_driver = {
1305     .driver = {
1306            .name = "rt298",
1307            .acpi_match_table = ACPI_PTR(rt298_acpi_match),
1308            },
1309     .probe_new = rt298_i2c_probe,
1310     .remove = rt298_i2c_remove,
1311     .id_table = rt298_i2c_id,
1312 };
1313 
1314 module_i2c_driver(rt298_i2c_driver);
1315 
1316 MODULE_DESCRIPTION("ASoC RT298 driver");
1317 MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
1318 MODULE_LICENSE("GPL");
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