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0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * rt1011.h -- RT1011 ALSA SoC amplifier component driver header
0004  *
0005  * Copyright(c) 2019 Realtek Semiconductor Corp.
0006  */
0007 
0008 #ifndef _RT1011_H_
0009 #define _RT1011_H_
0010 
0011 #define RT1011_DEVICE_ID_NUM 0x1011
0012 
0013 #define RT1011_RESET                0x0000
0014 #define RT1011_CLK_1                0x0002
0015 #define RT1011_CLK_2                0x0004
0016 #define RT1011_CLK_3                0x0006
0017 #define RT1011_CLK_4                0x0008
0018 #define RT1011_PLL_1                0x000a
0019 #define RT1011_PLL_2                0x000c
0020 #define RT1011_SRC_1                0x000e
0021 #define RT1011_SRC_2                0x0010
0022 #define RT1011_SRC_3                0x0012
0023 #define RT1011_CLK_DET              0x0020
0024 #define RT1011_SIL_DET              0x0022
0025 #define RT1011_PRIV_INDEX           0x006a
0026 #define RT1011_PRIV_DATA            0x006c
0027 #define RT1011_CUSTOMER_ID          0x0076
0028 #define RT1011_FM_VER               0x0078
0029 #define RT1011_VERSION_ID           0x007a
0030 #define RT1011_VENDOR_ID            0x007c
0031 #define RT1011_DEVICE_ID            0x007d
0032 #define RT1011_DUM_RW_0             0x00f0
0033 #define RT1011_DUM_YUN              0x00f2
0034 #define RT1011_DUM_RW_1             0x00f3
0035 #define RT1011_DUM_RO               0x00f4
0036 #define RT1011_MAN_I2C_DEV          0x0100
0037 #define RT1011_DAC_SET_1            0x0102
0038 #define RT1011_DAC_SET_2            0x0104
0039 #define RT1011_DAC_SET_3            0x0106
0040 #define RT1011_ADC_SET              0x0107
0041 #define RT1011_ADC_SET_1            0x0108
0042 #define RT1011_ADC_SET_2            0x010a
0043 #define RT1011_ADC_SET_3            0x010c
0044 #define RT1011_ADC_SET_4            0x010e
0045 #define RT1011_ADC_SET_5            0x0110
0046 #define RT1011_TDM_TOTAL_SET        0x0111
0047 #define RT1011_TDM1_SET_TCON        0x0112
0048 #define RT1011_TDM1_SET_1           0x0114
0049 #define RT1011_TDM1_SET_2           0x0116
0050 #define RT1011_TDM1_SET_3           0x0118
0051 #define RT1011_TDM1_SET_4           0x011a
0052 #define RT1011_TDM1_SET_5           0x011c
0053 #define RT1011_TDM2_SET_1           0x011e
0054 #define RT1011_TDM2_SET_2           0x0120
0055 #define RT1011_TDM2_SET_3           0x0122
0056 #define RT1011_TDM2_SET_4           0x0124
0057 #define RT1011_TDM2_SET_5           0x0126
0058 #define RT1011_PWM_CAL              0x0200
0059 #define RT1011_MIXER_1              0x0300
0060 #define RT1011_MIXER_2              0x0302
0061 #define RT1011_ADRC_LIMIT           0x0310
0062 #define RT1011_A_PRO                0x0311
0063 #define RT1011_A_TIMING_1           0x0313
0064 #define RT1011_A_TIMING_2           0x0314
0065 #define RT1011_A_TEMP_SEN           0x0316
0066 #define RT1011_SPK_VOL_DET_1        0x0319
0067 #define RT1011_SPK_VOL_DET_2        0x031a
0068 #define RT1011_SPK_VOL_TEST_OUT     0x031b
0069 #define RT1011_VBAT_VOL_DET_1       0x031c
0070 #define RT1011_VBAT_VOL_DET_2       0x031d
0071 #define RT1011_VBAT_TEST_OUT_1      0x031e
0072 #define RT1011_VBAT_TEST_OUT_2      0x031f
0073 #define RT1011_VBAT_PROTECTION          0x0320
0074 #define RT1011_VBAT_DET             0x0321
0075 #define RT1011_POWER_1              0x0322
0076 #define RT1011_POWER_2              0x0324
0077 #define RT1011_POWER_3              0x0326
0078 #define RT1011_POWER_4              0x0328
0079 #define RT1011_POWER_5              0x0329
0080 #define RT1011_POWER_6              0x032a
0081 #define RT1011_POWER_7              0x032b
0082 #define RT1011_POWER_8              0x032c
0083 #define RT1011_POWER_9              0x032d
0084 #define RT1011_CLASS_D_POS          0x032e
0085 #define RT1011_BOOST_CON_1          0x0330
0086 #define RT1011_BOOST_CON_2          0x0332
0087 #define RT1011_ANALOG_CTRL          0x0334
0088 #define RT1011_POWER_SEQ            0x0340
0089 #define RT1011_SHORT_CIRCUIT_DET_1  0x0508
0090 #define RT1011_SHORT_CIRCUIT_DET_2  0x050a
0091 #define RT1011_SPK_TEMP_PROTECT_0       0x050c
0092 #define RT1011_SPK_TEMP_PROTECT_1       0x050d
0093 #define RT1011_SPK_TEMP_PROTECT_2       0x050e
0094 #define RT1011_SPK_TEMP_PROTECT_3       0x050f
0095 #define RT1011_SPK_TEMP_PROTECT_4       0x0510
0096 #define RT1011_SPK_TEMP_PROTECT_5       0x0511
0097 #define RT1011_SPK_TEMP_PROTECT_6       0x0512
0098 #define RT1011_SPK_TEMP_PROTECT_7       0x0516
0099 #define RT1011_SPK_TEMP_PROTECT_8       0x0517
0100 #define RT1011_SPK_TEMP_PROTECT_9       0x0518
0101 #define RT1011_SPK_PRO_DC_DET_1     0x0519
0102 #define RT1011_SPK_PRO_DC_DET_2     0x051a
0103 #define RT1011_SPK_PRO_DC_DET_3     0x051b
0104 #define RT1011_SPK_PRO_DC_DET_4     0x051c
0105 #define RT1011_SPK_PRO_DC_DET_5     0x051d
0106 #define RT1011_SPK_PRO_DC_DET_6     0x051e
0107 #define RT1011_SPK_PRO_DC_DET_7     0x051f
0108 #define RT1011_SPK_PRO_DC_DET_8     0x0520
0109 #define RT1011_SPL_1                0x0521
0110 #define RT1011_SPL_2                0x0522
0111 #define RT1011_SPL_3                0x0524
0112 #define RT1011_SPL_4                0x0526
0113 #define RT1011_THER_FOLD_BACK_1     0x0528
0114 #define RT1011_THER_FOLD_BACK_2     0x052a
0115 #define RT1011_EXCUR_PROTECT_1          0x0530
0116 #define RT1011_EXCUR_PROTECT_2          0x0532
0117 #define RT1011_EXCUR_PROTECT_3          0x0534
0118 #define RT1011_EXCUR_PROTECT_4          0x0535
0119 #define RT1011_BAT_GAIN_1           0x0536
0120 #define RT1011_BAT_GAIN_2           0x0538
0121 #define RT1011_BAT_GAIN_3           0x053a
0122 #define RT1011_BAT_GAIN_4           0x053c
0123 #define RT1011_BAT_GAIN_5           0x053d
0124 #define RT1011_BAT_GAIN_6           0x053e
0125 #define RT1011_BAT_GAIN_7           0x053f
0126 #define RT1011_BAT_GAIN_8           0x0540
0127 #define RT1011_BAT_GAIN_9           0x0541
0128 #define RT1011_BAT_GAIN_10          0x0542
0129 #define RT1011_BAT_GAIN_11          0x0543
0130 #define RT1011_BAT_RT_THMAX_1       0x0544
0131 #define RT1011_BAT_RT_THMAX_2       0x0545
0132 #define RT1011_BAT_RT_THMAX_3       0x0546
0133 #define RT1011_BAT_RT_THMAX_4       0x0547
0134 #define RT1011_BAT_RT_THMAX_5       0x0548
0135 #define RT1011_BAT_RT_THMAX_6       0x0549
0136 #define RT1011_BAT_RT_THMAX_7       0x054a
0137 #define RT1011_BAT_RT_THMAX_8       0x054b
0138 #define RT1011_BAT_RT_THMAX_9       0x054c
0139 #define RT1011_BAT_RT_THMAX_10      0x054d
0140 #define RT1011_BAT_RT_THMAX_11      0x054e
0141 #define RT1011_BAT_RT_THMAX_12      0x054f
0142 #define RT1011_SPREAD_SPECTURM      0x0568
0143 #define RT1011_PRO_GAIN_MODE        0x056a
0144 #define RT1011_RT_DRC_CROSS         0x0600
0145 #define RT1011_RT_DRC_HB_1          0x0611
0146 #define RT1011_RT_DRC_HB_2          0x0612
0147 #define RT1011_RT_DRC_HB_3          0x0613
0148 #define RT1011_RT_DRC_HB_4          0x0614
0149 #define RT1011_RT_DRC_HB_5          0x0615
0150 #define RT1011_RT_DRC_HB_6          0x0616
0151 #define RT1011_RT_DRC_HB_7          0x0617
0152 #define RT1011_RT_DRC_HB_8          0x0618
0153 #define RT1011_RT_DRC_BB_1          0x0621
0154 #define RT1011_RT_DRC_BB_2          0x0622
0155 #define RT1011_RT_DRC_BB_3          0x0623
0156 #define RT1011_RT_DRC_BB_4          0x0624
0157 #define RT1011_RT_DRC_BB_5          0x0625
0158 #define RT1011_RT_DRC_BB_6          0x0626
0159 #define RT1011_RT_DRC_BB_7          0x0627
0160 #define RT1011_RT_DRC_BB_8          0x0628
0161 #define RT1011_RT_DRC_POS_1         0x0631
0162 #define RT1011_RT_DRC_POS_2         0x0632
0163 #define RT1011_RT_DRC_POS_3         0x0633
0164 #define RT1011_RT_DRC_POS_4         0x0634
0165 #define RT1011_RT_DRC_POS_5         0x0635
0166 #define RT1011_RT_DRC_POS_6         0x0636
0167 #define RT1011_RT_DRC_POS_7         0x0637
0168 #define RT1011_RT_DRC_POS_8         0x0638
0169 #define RT1011_CROSS_BQ_SET_1       0x0702
0170 #define RT1011_CROSS_BQ_SET_2       0x0704
0171 #define RT1011_BQ_SET_0             0x0706
0172 #define RT1011_BQ_SET_1             0x0708
0173 #define RT1011_BQ_SET_2             0x070a
0174 #define RT1011_BQ_PRE_GAIN_28_16    0x0710
0175 #define RT1011_BQ_PRE_GAIN_15_0     0x0711
0176 #define RT1011_BQ_POST_GAIN_28_16   0x0712
0177 #define RT1011_BQ_POST_GAIN_15_0    0x0713
0178 
0179 #define RT1011_BQ_H0_28_16                  0x0720
0180 #define RT1011_BQ_A2_15_0                       0x0729
0181 #define RT1011_BQ_1_H0_28_16                    0x0730
0182 #define RT1011_BQ_1_A2_15_0                 0x0739
0183 #define RT1011_BQ_2_H0_28_16                    0x0740
0184 #define RT1011_BQ_2_A2_15_0                 0x0749
0185 #define RT1011_BQ_3_H0_28_16                    0x0750
0186 #define RT1011_BQ_3_A2_15_0                 0x0759
0187 #define RT1011_BQ_4_H0_28_16                    0x0760
0188 #define RT1011_BQ_4_A2_15_0                 0x0769
0189 #define RT1011_BQ_5_H0_28_16                    0x0770
0190 #define RT1011_BQ_5_A2_15_0                 0x0779
0191 #define RT1011_BQ_6_H0_28_16                    0x0780
0192 #define RT1011_BQ_6_A2_15_0                 0x0789
0193 #define RT1011_BQ_7_H0_28_16                    0x0790
0194 #define RT1011_BQ_7_A2_15_0                 0x0799
0195 #define RT1011_BQ_8_H0_28_16                    0x07a0
0196 #define RT1011_BQ_8_A2_15_0                 0x07a9
0197 #define RT1011_BQ_9_H0_28_16                    0x07b0
0198 #define RT1011_BQ_9_A2_15_0                 0x07b9
0199 #define RT1011_BQ_10_H0_28_16               0x07c0
0200 #define RT1011_BQ_10_A2_15_0                    0x07c9
0201 #define RT1011_TEST_PAD_STATUS              0x1000
0202 #define RT1011_SYSTEM_RESET_1               0x1007
0203 #define RT1011_SYSTEM_RESET_2               0x1008
0204 #define RT1011_SYSTEM_RESET_3               0x1009
0205 #define RT1011_ADCDAT_OUT_SOURCE            0x100D
0206 #define RT1011_PLL_INTERNAL_SET             0x1010
0207 #define RT1011_TEST_OUT_1                       0x1020
0208 #define RT1011_TEST_OUT_3                       0x1024
0209 #define RT1011_DC_CALIB_CLASSD_1            0x1200
0210 #define RT1011_DC_CALIB_CLASSD_2            0x1202
0211 #define RT1011_DC_CALIB_CLASSD_3            0x1204
0212 #define RT1011_DC_CALIB_CLASSD_5            0x1208
0213 #define RT1011_DC_CALIB_CLASSD_6            0x120a
0214 #define RT1011_DC_CALIB_CLASSD_7            0x120c
0215 #define RT1011_DC_CALIB_CLASSD_8            0x120e
0216 #define RT1011_DC_CALIB_CLASSD_10           0x1212
0217 #define RT1011_CLASSD_INTERNAL_SET_1        0x1300
0218 #define RT1011_CLASSD_INTERNAL_SET_3        0x1304
0219 #define RT1011_CLASSD_INTERNAL_SET_8        0x130c
0220 #define RT1011_VREF_LV_1                        0x131a
0221 #define RT1011_SMART_BOOST_TIMING_1     0x1322
0222 #define RT1011_SMART_BOOST_TIMING_36        0x1349
0223 #define RT1011_SINE_GEN_REG_1               0x1500
0224 #define RT1011_SINE_GEN_REG_2               0x1502
0225 #define RT1011_SINE_GEN_REG_3               0x1504
0226 #define RT1011_STP_INITIAL_RS_TEMP          0x1510
0227 #define RT1011_STP_CALIB_RS_TEMP            0x152a
0228 #define RT1011_INIT_RECIPROCAL_REG_24_16                0x1538
0229 #define RT1011_INIT_RECIPROCAL_REG_15_0             0x1539
0230 #define RT1011_STP_INITIAL_RESISTANCE_TEMP              0x153c
0231 #define RT1011_STP_ALPHA_RECIPROCAL_MSB             0x153e
0232 #define RT1011_SPK_RESISTANCE_1             0x1544
0233 #define RT1011_SPK_RESISTANCE_2             0x1546
0234 #define RT1011_SPK_THERMAL                  0x1548
0235 #define RT1011_STP_OTP_TH                       0x1552
0236 #define RT1011_ALC_BK_GAIN_O                    0x1554
0237 #define RT1011_ALC_BK_GAIN_O_PRE            0x1556
0238 #define RT1011_SPK_DC_O_23_16               0x155a
0239 #define RT1011_SPK_DC_O_15_0                    0x155c
0240 #define RT1011_INIT_RECIPROCAL_SYN_24_16    0x1560
0241 #define RT1011_INIT_RECIPROCAL_SYN_15_0 0x1562
0242 #define RT1011_STP_BQ_1_A1_L_28_16          0x1570
0243 #define RT1011_STP_BQ_1_H0_R_15_0           0x1583
0244 #define RT1011_STP_BQ_2_A1_L_28_16          0x1590
0245 #define RT1011_SPK_EXCURSION_23_16          0x15be
0246 #define RT1011_SPK_EXCURSION_15_0           0x15bf
0247 #define RT1011_SEP_MAIN_OUT_23_16           0x15c0
0248 #define RT1011_SEP_MAIN_OUT_15_0            0x15c1
0249 #define RT1011_SEP_RE_REG_15_0              0x15f9
0250 #define RT1011_DRC_CF_PARAMS_1              0x1600
0251 #define RT1011_DRC_CF_PARAMS_12             0x160b
0252 #define RT1011_ALC_DRC_HB_INTERNAL_1        0x1611
0253 #define RT1011_ALC_DRC_HB_INTERNAL_5        0x1615
0254 #define RT1011_ALC_DRC_HB_INTERNAL_6        0x1616
0255 #define RT1011_ALC_DRC_HB_INTERNAL_7        0x1617
0256 #define RT1011_ALC_DRC_BB_INTERNAL_1        0x1621
0257 #define RT1011_ALC_DRC_BB_INTERNAL_5        0x1625
0258 #define RT1011_ALC_DRC_BB_INTERNAL_6        0x1626
0259 #define RT1011_ALC_DRC_BB_INTERNAL_7        0x1627
0260 #define RT1011_ALC_DRC_POS_INTERNAL_1       0x1631
0261 #define RT1011_ALC_DRC_POS_INTERNAL_5       0x1635
0262 #define RT1011_ALC_DRC_POS_INTERNAL_6       0x1636
0263 #define RT1011_ALC_DRC_POS_INTERNAL_7       0x1637
0264 #define RT1011_ALC_DRC_POS_INTERNAL_8       0x1638
0265 #define RT1011_ALC_DRC_POS_INTERNAL_9       0x163a
0266 #define RT1011_ALC_DRC_POS_INTERNAL_10  0x163c
0267 #define RT1011_ALC_DRC_POS_INTERNAL_11  0x163e
0268 #define RT1011_BQ_1_PARAMS_CHECK_5          0x1648
0269 #define RT1011_BQ_2_PARAMS_CHECK_1          0x1650
0270 #define RT1011_BQ_2_PARAMS_CHECK_5          0x1658
0271 #define RT1011_BQ_3_PARAMS_CHECK_1          0x1660
0272 #define RT1011_BQ_3_PARAMS_CHECK_5          0x1668
0273 #define RT1011_BQ_4_PARAMS_CHECK_1          0x1670
0274 #define RT1011_BQ_4_PARAMS_CHECK_5          0x1678
0275 #define RT1011_BQ_5_PARAMS_CHECK_1          0x1680
0276 #define RT1011_BQ_5_PARAMS_CHECK_5          0x1688
0277 #define RT1011_BQ_6_PARAMS_CHECK_1          0x1690
0278 #define RT1011_BQ_6_PARAMS_CHECK_5          0x1698
0279 #define RT1011_BQ_7_PARAMS_CHECK_1          0x1700
0280 #define RT1011_BQ_7_PARAMS_CHECK_5          0x1708
0281 #define RT1011_BQ_8_PARAMS_CHECK_1          0x1710
0282 #define RT1011_BQ_8_PARAMS_CHECK_5          0x1718
0283 #define RT1011_BQ_9_PARAMS_CHECK_1          0x1720
0284 #define RT1011_BQ_9_PARAMS_CHECK_5          0x1728
0285 #define RT1011_BQ_10_PARAMS_CHECK_1     0x1730
0286 #define RT1011_BQ_10_PARAMS_CHECK_5     0x1738
0287 #define RT1011_IRQ_1                            0x173a
0288 #define RT1011_PART_NUMBER_EFUSE            0x173e
0289 #define RT1011_EFUSE_CONTROL_1              0x17bb
0290 #define RT1011_EFUSE_CONTROL_2              0x17bd
0291 #define RT1011_EFUSE_MATCH_DONE             0x17cb
0292 #define RT1011_EFUSE_ADC_OFFSET_18_16               0x17e5
0293 #define RT1011_EFUSE_ADC_OFFSET_15_0                0x17e7
0294 #define RT1011_EFUSE_DAC_OFFSET_G0_20_16                0x17e9
0295 #define RT1011_EFUSE_DAC_OFFSET_G0_15_0             0x17eb
0296 #define RT1011_EFUSE_DAC_OFFSET_G1_20_16                0x17ed
0297 #define RT1011_EFUSE_DAC_OFFSET_G1_15_0             0x17ef
0298 #define RT1011_EFUSE_READ_R0_3_15_0     0x1803
0299 #define RT1011_MAX_REG              0x1803
0300 #define RT1011_REG_DISP_LEN 23
0301 
0302 
0303 /* CLOCK-2 (0x0004) */
0304 #define RT1011_FS_SYS_PRE_MASK          (0x3 << 14)
0305 #define RT1011_FS_SYS_PRE_SFT           14
0306 #define RT1011_FS_SYS_PRE_MCLK          (0x0 << 14)
0307 #define RT1011_FS_SYS_PRE_BCLK          (0x1 << 14)
0308 #define RT1011_FS_SYS_PRE_PLL1          (0x2 << 14)
0309 #define RT1011_FS_SYS_PRE_RCCLK         (0x3 << 14)
0310 #define RT1011_PLL1_SRC_MASK            (0x1 << 13)
0311 #define RT1011_PLL1_SRC_SFT         13
0312 #define RT1011_PLL1_SRC_PLL2            (0x0 << 13)
0313 #define RT1011_PLL1_SRC_BCLK            (0x1 << 13)
0314 #define RT1011_PLL2_SRC_MASK            (0x1 << 12)
0315 #define RT1011_PLL2_SRC_SFT         12
0316 #define RT1011_PLL2_SRC_MCLK            (0x0 << 12)
0317 #define RT1011_PLL2_SRC_RCCLK           (0x1 << 12)
0318 #define RT1011_PLL2_SRC_DIV_MASK            (0x3 << 10)
0319 #define RT1011_PLL2_SRC_DIV_SFT         10
0320 #define RT1011_SRCIN_DIV_MASK           (0x3 << 8)
0321 #define RT1011_SRCIN_DIV_SFT            8
0322 #define RT1011_FS_SYS_DIV_MASK          (0x7 << 4)
0323 #define RT1011_FS_SYS_DIV_SFT           4
0324 
0325 /* PLL-1 (0x000a) */
0326 #define RT1011_PLL1_QM_MASK         (0xf << 12)
0327 #define RT1011_PLL1_QM_SFT          12
0328 #define RT1011_PLL1_BPM_MASK            (0x1 << 11)
0329 #define RT1011_PLL1_BPM_SFT         11
0330 #define RT1011_PLL1_BPM         (0x1 << 11)
0331 #define RT1011_PLL1_QN_MASK         (0x1ff << 0)
0332 #define RT1011_PLL1_QN_SFT          0
0333 
0334 /* PLL-2 (0x000c) */
0335 #define RT1011_PLL2_BPK_MASK            (0x1 << 5)
0336 #define RT1011_PLL2_BPK_SFT         5
0337 #define RT1011_PLL2_BPK         (0x1 << 5)
0338 #define RT1011_PLL2_QK_MASK         (0x1f << 0)
0339 #define RT1011_PLL2_QK_SFT          0
0340 
0341 /* Clock Detect (0x0020) */
0342 #define RT1011_EN_MCLK_DET_MASK         (0x1 << 15)
0343 #define RT1011_EN_MCLK_DET_SFT          15
0344 #define RT1011_EN_MCLK_DET          (0x1 << 15)
0345 
0346 /* DAC Setting-2 (0x0104) */
0347 #define RT1011_EN_CKGEN_DAC_MASK            (0x1 << 13)
0348 #define RT1011_EN_CKGEN_DAC_SFT         13
0349 #define RT1011_EN_CKGEN_DAC         (0x1 << 13)
0350 
0351 /* DAC Setting-3 (0x0106) */
0352 #define RT1011_DA_MUTE_EN_MASK          (0x1 << 15)
0353 #define RT1011_DA_MUTE_EN_SFT           15
0354 
0355 /* ADC Setting-5 (0x0110) */
0356 #define RT1011_AD_EN_CKGEN_ADC_MASK         (0x1 << 9)
0357 #define RT1011_AD_EN_CKGEN_ADC_SFT          9
0358 #define RT1011_AD_EN_CKGEN_ADC          (0x1 << 9)
0359 
0360 /* TDM Total Setting (0x0111) */
0361 #define RT1011_I2S_TDM_MS_MASK          (0x1 << 14)
0362 #define RT1011_I2S_TDM_MS_SFT           14
0363 #define RT1011_I2S_TDM_MS_S         (0x0 << 14)
0364 #define RT1011_I2S_TDM_MS_M         (0x1 << 14)
0365 #define RT1011_I2S_TX_DL_MASK           (0x7 << 8)
0366 #define RT1011_I2S_TX_DL_SFT            8
0367 #define RT1011_I2S_TX_DL_16B            (0x0 << 8)
0368 #define RT1011_I2S_TX_DL_20B            (0x1 << 8)
0369 #define RT1011_I2S_TX_DL_24B            (0x2 << 8)
0370 #define RT1011_I2S_TX_DL_32B            (0x3 << 8)
0371 #define RT1011_I2S_TX_DL_8B         (0x4 << 8)
0372 #define RT1011_I2S_RX_DL_MASK           (0x7 << 5)
0373 #define RT1011_I2S_RX_DL_SFT            5
0374 #define RT1011_I2S_RX_DL_16B            (0x0 << 5)
0375 #define RT1011_I2S_RX_DL_20B            (0x1 << 5)
0376 #define RT1011_I2S_RX_DL_24B            (0x2 << 5)
0377 #define RT1011_I2S_RX_DL_32B            (0x3 << 5)
0378 #define RT1011_I2S_RX_DL_8B         (0x4 << 5)
0379 #define RT1011_ADCDAT1_PIN_CONFIG           (0x1 << 4)
0380 #define RT1011_ADCDAT1_OUTPUT           (0x0 << 4)
0381 #define RT1011_ADCDAT1_INPUT            (0x1 << 4)
0382 #define RT1011_ADCDAT2_PIN_CONFIG           (0x1 << 3)
0383 #define RT1011_ADCDAT2_OUTPUT           (0x0 << 3)
0384 #define RT1011_ADCDAT2_INPUT            (0x1 << 3)
0385 #define RT1011_I2S_TDM_DF_MASK          (0x7 << 0)
0386 #define RT1011_I2S_TDM_DF_SFT           0
0387 #define RT1011_I2S_TDM_DF_I2S           (0x0)
0388 #define RT1011_I2S_TDM_DF_LEFT          (0x1)
0389 #define RT1011_I2S_TDM_DF_PCM_A         (0x2)
0390 #define RT1011_I2S_TDM_DF_PCM_B         (0x3)
0391 #define RT1011_I2S_TDM_DF_PCM_A_N           (0x6)
0392 #define RT1011_I2S_TDM_DF_PCM_B_N           (0x7)
0393 
0394 /* TDM_tcon Setting (0x0112) */
0395 #define RT1011_TCON_DF_MASK         (0x7 << 13)
0396 #define RT1011_TCON_DF_SFT          13
0397 #define RT1011_TCON_DF_I2S          (0x0 << 13)
0398 #define RT1011_TCON_DF_LEFT         (0x1 << 13)
0399 #define RT1011_TCON_DF_PCM_A            (0x2 << 13)
0400 #define RT1011_TCON_DF_PCM_B            (0x3 << 13)
0401 #define RT1011_TCON_DF_PCM_A_N          (0x6 << 13)
0402 #define RT1011_TCON_DF_PCM_B_N          (0x7 << 13)
0403 #define RT1011_TCON_BCLK_SEL_MASK           (0x3 << 10)
0404 #define RT1011_TCON_BCLK_SEL_SFT            10
0405 #define RT1011_TCON_BCLK_SEL_32FS           (0x0 << 10)
0406 #define RT1011_TCON_BCLK_SEL_64FS           (0x1 << 10)
0407 #define RT1011_TCON_BCLK_SEL_128FS          (0x2 << 10)
0408 #define RT1011_TCON_BCLK_SEL_256FS          (0x3 << 10)
0409 #define RT1011_TCON_CH_LEN_MASK         (0x3 << 5)
0410 #define RT1011_TCON_CH_LEN_SFT          5
0411 #define RT1011_TCON_CH_LEN_16B          (0x0 << 5)
0412 #define RT1011_TCON_CH_LEN_20B          (0x1 << 5)
0413 #define RT1011_TCON_CH_LEN_24B          (0x2 << 5)
0414 #define RT1011_TCON_CH_LEN_32B          (0x3 << 5)
0415 #define RT1011_TCON_BCLK_MST_MASK           (0x1 << 4)
0416 #define RT1011_TCON_BCLK_MST_SFT            4
0417 #define RT1011_TCON_BCLK_MST_INV        (0x1 << 4)
0418 
0419 /* TDM1 Setting-1 (0x0114) */
0420 #define RT1011_TDM_INV_BCLK_MASK            (0x1 << 15)
0421 #define RT1011_TDM_INV_BCLK_SFT         15
0422 #define RT1011_TDM_INV_BCLK     (0x1 << 15)
0423 #define RT1011_I2S_CH_TX_MASK           (0x3 << 10)
0424 #define RT1011_I2S_CH_TX_SFT            10
0425 #define RT1011_I2S_TX_2CH           (0x0 << 10)
0426 #define RT1011_I2S_TX_4CH           (0x1 << 10)
0427 #define RT1011_I2S_TX_6CH           (0x2 << 10)
0428 #define RT1011_I2S_TX_8CH           (0x3 << 10)
0429 #define RT1011_I2S_CH_RX_MASK           (0x3 << 8)
0430 #define RT1011_I2S_CH_RX_SFT            8
0431 #define RT1011_I2S_RX_2CH           (0x0 << 8)
0432 #define RT1011_I2S_RX_4CH           (0x1 << 8)
0433 #define RT1011_I2S_RX_6CH           (0x2 << 8)
0434 #define RT1011_I2S_RX_8CH           (0x3 << 8)
0435 #define RT1011_I2S_LR_CH_SEL_MASK           (0x1 << 7)
0436 #define RT1011_I2S_LR_CH_SEL_SFT            7
0437 #define RT1011_I2S_LEFT_CH_SEL          (0x0 << 7)
0438 #define RT1011_I2S_RIGHT_CH_SEL         (0x1 << 7)
0439 #define RT1011_I2S_CH_TX_LEN_MASK           (0x7 << 4)
0440 #define RT1011_I2S_CH_TX_LEN_SFT            4
0441 #define RT1011_I2S_CH_TX_LEN_16B            (0x0 << 4)
0442 #define RT1011_I2S_CH_TX_LEN_20B            (0x1 << 4)
0443 #define RT1011_I2S_CH_TX_LEN_24B            (0x2 << 4)
0444 #define RT1011_I2S_CH_TX_LEN_32B            (0x3 << 4)
0445 #define RT1011_I2S_CH_TX_LEN_8B         (0x4 << 4)
0446 #define RT1011_I2S_CH_RX_LEN_MASK           (0x7 << 0)
0447 #define RT1011_I2S_CH_RX_LEN_SFT            0
0448 #define RT1011_I2S_CH_RX_LEN_16B            (0x0 << 0)
0449 #define RT1011_I2S_CH_RX_LEN_20B            (0x1 << 0)
0450 #define RT1011_I2S_CH_RX_LEN_24B            (0x2 << 0)
0451 #define RT1011_I2S_CH_RX_LEN_32B            (0x3 << 0)
0452 #define RT1011_I2S_CH_RX_LEN_8B         (0x4 << 0)
0453 
0454 /* TDM1 Setting-2 (0x0116) */
0455 #define RT1011_TDM_I2S_DOCK_ADCDAT_LEN_1_MASK           (0x7 << 13)
0456 #define RT1011_TDM_I2S_DOCK_ADCDAT_2CH          (0x1 << 13)
0457 #define RT1011_TDM_I2S_DOCK_ADCDAT_4CH          (0x3 << 13)
0458 #define RT1011_TDM_I2S_DOCK_ADCDAT_6CH          (0x5 << 13)
0459 #define RT1011_TDM_I2S_DOCK_ADCDAT_8CH          (0x7 << 13)
0460 #define RT1011_TDM_I2S_DOCK_EN_1_MASK           (0x1 << 3)
0461 #define RT1011_TDM_I2S_DOCK_EN_1_SFT            3
0462 #define RT1011_TDM_I2S_DOCK_EN_1        (0x1 << 3)
0463 #define RT1011_TDM_ADCDAT1_DATA_LOCATION            (0x7 << 0)
0464 
0465 /* TDM1 Setting-3 (0x0118) */
0466 #define RT1011_TDM_I2S_RX_ADC1_1_MASK           (0x3 << 6)
0467 #define RT1011_TDM_I2S_RX_ADC2_1_MASK           (0x3 << 4)
0468 #define RT1011_TDM_I2S_RX_ADC3_1_MASK           (0x3 << 2)
0469 #define RT1011_TDM_I2S_RX_ADC4_1_MASK           (0x3 << 0)
0470 #define RT1011_TDM_I2S_RX_ADC1_1_LL         (0x2 << 6)
0471 #define RT1011_TDM_I2S_RX_ADC2_1_LL         (0x2 << 4)
0472 #define RT1011_TDM_I2S_RX_ADC3_1_LL         (0x2 << 2)
0473 #define RT1011_TDM_I2S_RX_ADC4_1_LL         (0x2 << 0)
0474 
0475 /* TDM1 Setting-4 (0x011a) */
0476 #define RT1011_TDM_I2S_TX_L_DAC1_1_MASK         (0x7 << 12)
0477 #define RT1011_TDM_I2S_TX_R_DAC1_1_MASK         (0x7 << 8)
0478 #define RT1011_TDM_I2S_TX_L_DAC1_1_SFT 12
0479 #define RT1011_TDM_I2S_TX_R_DAC1_1_SFT 8
0480 
0481 /* TDM2 Setting-2 (0x0120) */
0482 #define RT1011_TDM_I2S_DOCK_ADCDAT_LEN_2_MASK           (0x7 << 13)
0483 #define RT1011_TDM_I2S_DOCK_EN_2_MASK           (0x1 << 3)
0484 #define RT1011_TDM_I2S_DOCK_EN_2_SFT            3
0485 #define RT1011_TDM_I2S_DOCK_EN_2        (0x1 << 3)
0486 
0487 /* MIXER 1 (0x0300) */
0488 #define RT1011_MIXER_MUTE_MIX_I_MASK            (0x1 << 15)
0489 #define RT1011_MIXER_MUTE_MIX_I_SFT         15
0490 #define RT1011_MIXER_MUTE_MIX_I     (0x1 << 15)
0491 #define RT1011_MIXER_MUTE_SUM_I_MASK            (0x1 << 14)
0492 #define RT1011_MIXER_MUTE_SUM_I_SFT         14
0493 #define RT1011_MIXER_MUTE_SUM_I     (0x1 << 14)
0494 #define RT1011_MIXER_MUTE_MIX_V_MASK            (0x1 << 7)
0495 #define RT1011_MIXER_MUTE_MIX_V_SFT         7
0496 #define RT1011_MIXER_MUTE_MIX_V     (0x1 << 7)
0497 #define RT1011_MIXER_MUTE_SUM_V_MASK            (0x1 << 6)
0498 #define RT1011_MIXER_MUTE_SUM_V_SFT         6
0499 #define RT1011_MIXER_MUTE_SUM_V     (0x1 << 6)
0500 
0501 /* Analog Temperature Sensor (0x0316) */
0502 #define RT1011_POW_TEMP_REG             (0x1 << 2)
0503 #define RT1011_POW_TEMP_REG_BIT         2
0504 
0505 /* POWER-1 (0x0322) */
0506 #define RT1011_POW_LDO2             (0x1 << 15)
0507 #define RT1011_POW_LDO2_BIT         15
0508 #define RT1011_POW_DAC              (0x1 << 14)
0509 #define RT1011_POW_DAC_BIT          14
0510 #define RT1011_POW_CLK12M               (0x1 << 13)
0511 #define RT1011_POW_CLK12M_BIT       13
0512 #define RT1011_POW_TEMP             (0x1 << 12)
0513 #define RT1011_POW_TEMP_BIT         12
0514 #define RT1011_POW_ISENSE_SPK               (0x1 << 7)
0515 #define RT1011_POW_ISENSE_SPK_BIT           7
0516 #define RT1011_POW_LPF_SPK              (0x1 << 6)
0517 #define RT1011_POW_LPF_SPK_BIT          6
0518 #define RT1011_POW_VSENSE_SPK               (0x1 << 5)
0519 #define RT1011_POW_VSENSE_SPK_BIT           5
0520 #define RT1011_POW_TWO_BATTERY_SPK              (0x1 << 4)
0521 #define RT1011_POW_TWO_BATTERY_SPK_BIT          4
0522 
0523 /* POWER-2 (0x0324) */
0524 #define RT1011_PLLEN                (0x1 << 2)
0525 #define RT1011_PLLEN_BIT            2
0526 #define RT1011_POW_BG               (0x1 << 1)
0527 #define RT1011_POW_BG_BIT           1
0528 #define RT1011_POW_BG_MBIAS_LV              (0x1 << 0)
0529 #define RT1011_POW_BG_MBIAS_LV_BIT      0
0530 
0531 /* POWER-3 (0x0326) */
0532 #define RT1011_POW_DET_SPKVDD           (0x1 << 15)
0533 #define RT1011_POW_DET_SPKVDD_BIT       15
0534 #define RT1011_POW_DET_VBAT             (0x1 << 14)
0535 #define RT1011_POW_DET_VBAT_BIT         14
0536 #define RT1011_POW_FC                       (0x1 << 13)
0537 #define RT1011_POW_FC_BIT                   13
0538 #define RT1011_POW_MBIAS_LV             (0x1 << 12)
0539 #define RT1011_POW_MBIAS_LV_BIT         12
0540 #define RT1011_POW_ADC_I                    (0x1 << 11)
0541 #define RT1011_POW_ADC_I_BIT                11
0542 #define RT1011_POW_ADC_V                    (0x1 << 10)
0543 #define RT1011_POW_ADC_V_BIT                10
0544 #define RT1011_POW_ADC_T                    (0x1 << 9)
0545 #define RT1011_POW_ADC_T_BIT                9
0546 #define RT1011_POWD_ADC_T                   (0x1 << 8)
0547 #define RT1011_POWD_ADC_T_BIT           8
0548 #define RT1011_POW_MIX_I                    (0x1 << 7)
0549 #define RT1011_POW_MIX_I_BIT                7
0550 #define RT1011_POW_MIX_V                    (0x1 << 6)
0551 #define RT1011_POW_MIX_V_BIT                6
0552 #define RT1011_POW_SUM_I                    (0x1 << 5)
0553 #define RT1011_POW_SUM_I_BIT                5
0554 #define RT1011_POW_SUM_V                    (0x1 << 4)
0555 #define RT1011_POW_SUM_V_BIT                4
0556 #define RT1011_POW_MIX_T                    (0x1 << 2)
0557 #define RT1011_POW_MIX_T_BIT                2
0558 #define RT1011_BYPASS_MIX_T             (0x1 << 1)
0559 #define RT1011_BYPASS_MIX_T_BIT         1
0560 #define RT1011_POW_VREF_LV              (0x1 << 0)
0561 #define RT1011_POW_VREF_LV_BIT          0
0562 
0563 /* POWER-4 (0x0328) */
0564 #define RT1011_POW_EN_SWR           (0x1 << 12)
0565 #define RT1011_POW_EN_SWR_BIT       12
0566 #define RT1011_POW_EN_PASS_BGOK_SWR         (0x1 << 10)
0567 #define RT1011_POW_EN_PASS_BGOK_SWR_BIT     10
0568 #define RT1011_POW_EN_PASS_VPOK_SWR         (0x1 << 9)
0569 #define RT1011_POW_EN_PASS_VPOK_SWR_BIT     9
0570 
0571 /* POWER-9 (0x032d) */
0572 #define RT1011_POW_SDB_REG_MASK         (0x1 << 9)
0573 #define RT1011_POW_SDB_REG_BIT      9
0574 #define RT1011_POW_SDB_REG      (0x1 << 9)
0575 #define RT1011_POW_SEL_SDB_MODE_MASK            (0x1 << 6)
0576 #define RT1011_POW_SEL_SDB_MODE_BIT     6
0577 #define RT1011_POW_SEL_SDB_MODE     (0x1 << 6)
0578 #define RT1011_POW_MNL_SDB_MASK         (0x1 << 5)
0579 #define RT1011_POW_MNL_SDB_BIT      5
0580 #define RT1011_POW_MNL_SDB      (0x1 << 5)
0581 
0582 /* SPK Protection-Temperature Protection (0x050c) */
0583 #define RT1011_STP_EN_MASK          (0x1 << 15)
0584 #define RT1011_STP_EN_BIT       15
0585 #define RT1011_STP_EN       (0x1 << 15)
0586 #define RT1011_STP_RS_CLB_EN_MASK           (0x1 << 14)
0587 #define RT1011_STP_RS_CLB_EN_BIT        14
0588 #define RT1011_STP_RS_CLB_EN        (0x1 << 14)
0589 
0590 /* SPK Protection-Temperature Protection-4 (0x0510) */
0591 #define RT1011_STP_R0_SELECT_MASK           (0x3 << 6)
0592 #define RT1011_STP_R0_SELECT_EFUSE          (0x0 << 6)
0593 #define RT1011_STP_R0_SELECT_START_VAL  (0x1 << 6)
0594 #define RT1011_STP_R0_SELECT_REG            (0x2 << 6)
0595 #define RT1011_STP_R0_SELECT_FORCE_ZERO (0x3 << 6)
0596 
0597 /* SPK Protection-Temperature Protection-6 (0x0512) */
0598 #define RT1011_STP_R0_EN_MASK           (0x1 << 7)
0599 #define RT1011_STP_R0_EN_BIT        7
0600 #define RT1011_STP_R0_EN        (0x1 << 7)
0601 #define RT1011_STP_T0_EN_MASK           (0x1 << 6)
0602 #define RT1011_STP_T0_EN_BIT        6
0603 #define RT1011_STP_T0_EN        (0x1 << 6)
0604 
0605 /* Cross Biquad Setting-1 (0x0702) */
0606 #define RT1011_MONO_LR_SEL_MASK         (0x3 << 5)
0607 #define RT1011_MONO_L_CHANNEL           (0x0 << 5)
0608 #define RT1011_MONO_R_CHANNEL           (0x1 << 5)
0609 #define RT1011_MONO_LR_MIX_CHANNEL          (0x2 << 5)
0610 
0611 /* ClassD Internal Setting-1 (0x1300) */
0612 #define RT1011_DRIVER_READY_SPK         (0x1 << 12)
0613 #define RT1011_DRIVER_READY_SPK_BIT     12
0614 #define RT1011_RECV_MODE_SPK_MASK           (0x1 << 5)
0615 #define RT1011_SPK_MODE         (0x0 << 5)
0616 #define RT1011_RECV_MODE            (0x1 << 5)
0617 #define RT1011_RECV_MODE_SPK_BIT        5
0618 
0619 /* ClassD Internal Setting-3 (0x1304) */
0620 #define RT1011_REG_GAIN_CLASSD_RI_SPK_MASK          (0x7 << 12)
0621 #define RT1011_REG_GAIN_CLASSD_RI_410K (0x0 << 12)
0622 #define RT1011_REG_GAIN_CLASSD_RI_95K (0x1 << 12)
0623 #define RT1011_REG_GAIN_CLASSD_RI_82P5K (0x2 << 12)
0624 #define RT1011_REG_GAIN_CLASSD_RI_72P5K (0x3 << 12)
0625 #define RT1011_REG_GAIN_CLASSD_RI_62P5K (0x4 << 12)
0626 
0627 /* ClassD Internal Setting-8 (0x130c) */
0628 #define RT1011_TM_PORPVDD_SPK       (0x1 << 1)
0629 #define RT1011_TM_PORPVDD_SPK_BIT       1
0630 
0631 /* SPK Protection-Temperature Protection-SINE_GEN_REG-1 (0x1500) */
0632 #define RT1011_STP_SIN_GEN_EN_MASK (0x1 << 13)
0633 #define RT1011_STP_SIN_GEN_EN       (0x1 << 13)
0634 #define RT1011_STP_SIN_GEN_EN_BIT       13
0635 
0636 
0637 /* System Clock Source */
0638 enum {
0639     RT1011_FS_SYS_PRE_S_MCLK,
0640     RT1011_FS_SYS_PRE_S_BCLK,
0641     RT1011_FS_SYS_PRE_S_PLL1,
0642     RT1011_FS_SYS_PRE_S_RCCLK,  /* 12M Hz */
0643 };
0644 
0645 /* PLL Source 1/2 */
0646 enum {
0647     RT1011_PLL1_S_BCLK,
0648     RT1011_PLL2_S_MCLK,
0649     RT1011_PLL2_S_RCCLK,    /* 12M Hz */
0650 };
0651 
0652 enum {
0653     RT1011_AIF1,
0654     RT1011_AIFS
0655 };
0656 
0657 enum {
0658     RT1011_I2S_REF_NONE,
0659     RT1011_I2S_REF_LEFT_CH,
0660     RT1011_I2S_REF_RIGHT_CH,
0661 };
0662 
0663 /* BiQual & DRC related settings */
0664 #define RT1011_BQ_DRC_NUM 128
0665 struct rt1011_bq_drc_params {
0666     unsigned short val;
0667     unsigned short reg;
0668 #ifdef CONFIG_64BIT
0669     unsigned int reserved;
0670 #endif
0671 };
0672 enum {
0673     RT1011_ADVMODE_INITIAL_SET,
0674     RT1011_ADVMODE_SEP_BQ_COEFF,
0675     RT1011_ADVMODE_EQ_BQ_COEFF,
0676     RT1011_ADVMODE_BQ_UI_COEFF,
0677     RT1011_ADVMODE_SMARTBOOST_COEFF,
0678     RT1011_ADVMODE_NUM,
0679 };
0680 
0681 struct rt1011_priv {
0682     struct snd_soc_component *component;
0683     struct regmap *regmap;
0684     struct work_struct cali_work;
0685     struct rt1011_bq_drc_params **bq_drc_params;
0686 
0687     int sysclk;
0688     int sysclk_src;
0689     int lrck;
0690     int bclk;
0691     int id;
0692 
0693     int pll_src;
0694     int pll_in;
0695     int pll_out;
0696 
0697     int bq_drc_set;
0698     unsigned int r0_reg, cali_done;
0699     unsigned int r0_calib, temperature_calib;
0700     int recv_spk_mode;
0701     int i2s_ref;
0702 };
0703 
0704 #endif      /* end of _RT1011_H_ */