soc/codecs/pcm512x.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Driver for the PCM512x CODECs
0004  *
0005  * Author:  Mark Brown <broonie@kernel.org>
0006  *      Copyright 2014 Linaro Ltd
0007  */
0008
0009 #ifndef _SND_SOC_PCM512X
0010 #define _SND_SOC_PCM512X
0011
0012 #include <linux/pm.h>
0013 #include <linux/regmap.h>
0014
0015 #define PCM512x_VIRT_BASE 0x100
0016 #define PCM512x_PAGE_LEN  0x100
0017 #define PCM512x_PAGE_BASE(n)  (PCM512x_VIRT_BASE + (PCM512x_PAGE_LEN * n))
0018
0019 #define PCM512x_PAGE              0
0020
0021 #define PCM512x_RESET             (PCM512x_PAGE_BASE(0) +   1)
0022 #define PCM512x_POWER             (PCM512x_PAGE_BASE(0) +   2)
0023 #define PCM512x_MUTE              (PCM512x_PAGE_BASE(0) +   3)
0024 #define PCM512x_PLL_EN            (PCM512x_PAGE_BASE(0) +   4)
0025 #define PCM512x_SPI_MISO_FUNCTION (PCM512x_PAGE_BASE(0) +   6)
0026 #define PCM512x_DSP               (PCM512x_PAGE_BASE(0) +   7)
0027 #define PCM512x_GPIO_EN           (PCM512x_PAGE_BASE(0) +   8)
0028 #define PCM512x_BCLK_LRCLK_CFG    (PCM512x_PAGE_BASE(0) +   9)
0029 #define PCM512x_DSP_GPIO_INPUT    (PCM512x_PAGE_BASE(0) +  10)
0030 #define PCM512x_MASTER_MODE       (PCM512x_PAGE_BASE(0) +  12)
0031 #define PCM512x_PLL_REF           (PCM512x_PAGE_BASE(0) +  13)
0032 #define PCM512x_DAC_REF           (PCM512x_PAGE_BASE(0) +  14)
0033 #define PCM512x_GPIO_DACIN        (PCM512x_PAGE_BASE(0) +  16)
0034 #define PCM512x_GPIO_PLLIN        (PCM512x_PAGE_BASE(0) +  18)
0035 #define PCM512x_SYNCHRONIZE       (PCM512x_PAGE_BASE(0) +  19)
0036 #define PCM512x_PLL_COEFF_0       (PCM512x_PAGE_BASE(0) +  20)
0037 #define PCM512x_PLL_COEFF_1       (PCM512x_PAGE_BASE(0) +  21)
0038 #define PCM512x_PLL_COEFF_2       (PCM512x_PAGE_BASE(0) +  22)
0039 #define PCM512x_PLL_COEFF_3       (PCM512x_PAGE_BASE(0) +  23)
0040 #define PCM512x_PLL_COEFF_4       (PCM512x_PAGE_BASE(0) +  24)
0041 #define PCM512x_DSP_CLKDIV        (PCM512x_PAGE_BASE(0) +  27)
0042 #define PCM512x_DAC_CLKDIV        (PCM512x_PAGE_BASE(0) +  28)
0043 #define PCM512x_NCP_CLKDIV        (PCM512x_PAGE_BASE(0) +  29)
0044 #define PCM512x_OSR_CLKDIV        (PCM512x_PAGE_BASE(0) +  30)
0045 #define PCM512x_MASTER_CLKDIV_1   (PCM512x_PAGE_BASE(0) +  32)
0046 #define PCM512x_MASTER_CLKDIV_2   (PCM512x_PAGE_BASE(0) +  33)
0047 #define PCM512x_FS_SPEED_MODE     (PCM512x_PAGE_BASE(0) +  34)
0048 #define PCM512x_IDAC_1            (PCM512x_PAGE_BASE(0) +  35)
0049 #define PCM512x_IDAC_2            (PCM512x_PAGE_BASE(0) +  36)
0050 #define PCM512x_ERROR_DETECT      (PCM512x_PAGE_BASE(0) +  37)
0051 #define PCM512x_I2S_1             (PCM512x_PAGE_BASE(0) +  40)
0052 #define PCM512x_I2S_2             (PCM512x_PAGE_BASE(0) +  41)
0053 #define PCM512x_DAC_ROUTING       (PCM512x_PAGE_BASE(0) +  42)
0054 #define PCM512x_DSP_PROGRAM       (PCM512x_PAGE_BASE(0) +  43)
0055 #define PCM512x_CLKDET            (PCM512x_PAGE_BASE(0) +  44)
0056 #define PCM512x_AUTO_MUTE         (PCM512x_PAGE_BASE(0) +  59)
0057 #define PCM512x_DIGITAL_VOLUME_1  (PCM512x_PAGE_BASE(0) +  60)
0058 #define PCM512x_DIGITAL_VOLUME_2  (PCM512x_PAGE_BASE(0) +  61)
0059 #define PCM512x_DIGITAL_VOLUME_3  (PCM512x_PAGE_BASE(0) +  62)
0060 #define PCM512x_DIGITAL_MUTE_1    (PCM512x_PAGE_BASE(0) +  63)
0061 #define PCM512x_DIGITAL_MUTE_2    (PCM512x_PAGE_BASE(0) +  64)
0062 #define PCM512x_DIGITAL_MUTE_3    (PCM512x_PAGE_BASE(0) +  65)
0063 #define PCM512x_GPIO_OUTPUT_1     (PCM512x_PAGE_BASE(0) +  80)
0064 #define PCM512x_GPIO_OUTPUT_2     (PCM512x_PAGE_BASE(0) +  81)
0065 #define PCM512x_GPIO_OUTPUT_3     (PCM512x_PAGE_BASE(0) +  82)
0066 #define PCM512x_GPIO_OUTPUT_4     (PCM512x_PAGE_BASE(0) +  83)
0067 #define PCM512x_GPIO_OUTPUT_5     (PCM512x_PAGE_BASE(0) +  84)
0068 #define PCM512x_GPIO_OUTPUT_6     (PCM512x_PAGE_BASE(0) +  85)
0069 #define PCM512x_GPIO_CONTROL_1    (PCM512x_PAGE_BASE(0) +  86)
0070 #define PCM512x_GPIO_CONTROL_2    (PCM512x_PAGE_BASE(0) +  87)
0071 #define PCM512x_OVERFLOW          (PCM512x_PAGE_BASE(0) +  90)
0072 #define PCM512x_RATE_DET_1        (PCM512x_PAGE_BASE(0) +  91)
0073 #define PCM512x_RATE_DET_2        (PCM512x_PAGE_BASE(0) +  92)
0074 #define PCM512x_RATE_DET_3        (PCM512x_PAGE_BASE(0) +  93)
0075 #define PCM512x_RATE_DET_4        (PCM512x_PAGE_BASE(0) +  94)
0076 #define PCM512x_CLOCK_STATUS      (PCM512x_PAGE_BASE(0) +  95)
0077 #define PCM512x_ANALOG_MUTE_DET   (PCM512x_PAGE_BASE(0) + 108)
0078 #define PCM512x_GPIN              (PCM512x_PAGE_BASE(0) + 119)
0079 #define PCM512x_DIGITAL_MUTE_DET  (PCM512x_PAGE_BASE(0) + 120)
0080
0081 #define PCM512x_OUTPUT_AMPLITUDE  (PCM512x_PAGE_BASE(1) +   1)
0082 #define PCM512x_ANALOG_GAIN_CTRL  (PCM512x_PAGE_BASE(1) +   2)
0083 #define PCM512x_UNDERVOLTAGE_PROT (PCM512x_PAGE_BASE(1) +   5)
0084 #define PCM512x_ANALOG_MUTE_CTRL  (PCM512x_PAGE_BASE(1) +   6)
0085 #define PCM512x_ANALOG_GAIN_BOOST (PCM512x_PAGE_BASE(1) +   7)
0086 #define PCM512x_VCOM_CTRL_1       (PCM512x_PAGE_BASE(1) +   8)
0087 #define PCM512x_VCOM_CTRL_2       (PCM512x_PAGE_BASE(1) +   9)
0088
0089 #define PCM512x_CRAM_CTRL         (PCM512x_PAGE_BASE(44) +  1)
0090
0091 #define PCM512x_FLEX_A            (PCM512x_PAGE_BASE(253) + 63)
0092 #define PCM512x_FLEX_B            (PCM512x_PAGE_BASE(253) + 64)
0093
0094 #define PCM512x_MAX_REGISTER      (PCM512x_PAGE_BASE(253) + 64)
0095
0096 /* Page 0, Register 1 - reset */
0097 #define PCM512x_RSTR (1 << 0)
0098 #define PCM512x_RSTM (1 << 4)
0099
0100 /* Page 0, Register 2 - power */
0101 #define PCM512x_RQPD       (1 << 0)
0102 #define PCM512x_RQPD_SHIFT 0
0103 #define PCM512x_RQST       (1 << 4)
0104 #define PCM512x_RQST_SHIFT 4
0105
0106 /* Page 0, Register 3 - mute */
0107 #define PCM512x_RQMR (1 << 0)
0108 #define PCM512x_RQMR_SHIFT 0
0109 #define PCM512x_RQML (1 << 4)
0110 #define PCM512x_RQML_SHIFT 4
0111
0112 /* Page 0, Register 4 - PLL */
0113 #define PCM512x_PLLE       (1 << 0)
0114 #define PCM512x_PLLE_SHIFT 0
0115 #define PCM512x_PLCK       (1 << 4)
0116 #define PCM512x_PLCK_SHIFT 4
0117
0118 /* Page 0, Register 7 - DSP */
0119 #define PCM512x_SDSL       (1 << 0)
0120 #define PCM512x_SDSL_SHIFT 0
0121 #define PCM512x_DEMP       (1 << 4)
0122 #define PCM512x_DEMP_SHIFT 4
0123
0124 /* Page 0, Register 8 - GPIO output enable */
0125 #define PCM512x_G1OE       (1 << 0)
0126 #define PCM512x_G2OE       (1 << 1)
0127 #define PCM512x_G3OE       (1 << 2)
0128 #define PCM512x_G4OE       (1 << 3)
0129 #define PCM512x_G5OE       (1 << 4)
0130 #define PCM512x_G6OE       (1 << 5)
0131
0132 /* Page 0, Register 9 - BCK, LRCLK configuration */
0133 #define PCM512x_LRKO       (1 << 0)
0134 #define PCM512x_LRKO_SHIFT 0
0135 #define PCM512x_BCKO       (1 << 4)
0136 #define PCM512x_BCKO_SHIFT 4
0137 #define PCM512x_BCKP       (1 << 5)
0138 #define PCM512x_BCKP_SHIFT 5
0139
0140 /* Page 0, Register 12 - Master mode BCK, LRCLK reset */
0141 #define PCM512x_RLRK       (1 << 0)
0142 #define PCM512x_RLRK_SHIFT 0
0143 #define PCM512x_RBCK       (1 << 1)
0144 #define PCM512x_RBCK_SHIFT 1
0145
0146 /* Page 0, Register 13 - PLL reference */
0147 #define PCM512x_SREF        (7 << 4)
0148 #define PCM512x_SREF_SHIFT  4
0149 #define PCM512x_SREF_SCK    (0 << 4)
0150 #define PCM512x_SREF_BCK    (1 << 4)
0151 #define PCM512x_SREF_GPIO   (3 << 4)
0152
0153 /* Page 0, Register 14 - DAC reference */
0154 #define PCM512x_SDAC        (7 << 4)
0155 #define PCM512x_SDAC_SHIFT  4
0156 #define PCM512x_SDAC_MCK    (0 << 4)
0157 #define PCM512x_SDAC_PLL    (1 << 4)
0158 #define PCM512x_SDAC_SCK    (3 << 4)
0159 #define PCM512x_SDAC_BCK    (4 << 4)
0160 #define PCM512x_SDAC_GPIO   (5 << 4)
0161
0162 /* Page 0, Register 16, 18 - GPIO source for DAC, PLL */
0163 #define PCM512x_GREF        (7 << 0)
0164 #define PCM512x_GREF_SHIFT  0
0165 #define PCM512x_GREF_GPIO1  (0 << 0)
0166 #define PCM512x_GREF_GPIO2  (1 << 0)
0167 #define PCM512x_GREF_GPIO3  (2 << 0)
0168 #define PCM512x_GREF_GPIO4  (3 << 0)
0169 #define PCM512x_GREF_GPIO5  (4 << 0)
0170 #define PCM512x_GREF_GPIO6  (5 << 0)
0171
0172 /* Page 0, Register 19 - synchronize */
0173 #define PCM512x_RQSY        (1 << 0)
0174 #define PCM512x_RQSY_RESUME (0 << 0)
0175 #define PCM512x_RQSY_HALT   (1 << 0)
0176
0177 /* Page 0, Register 34 - fs speed mode */
0178 #define PCM512x_FSSP        (3 << 0)
0179 #define PCM512x_FSSP_SHIFT  0
0180 #define PCM512x_FSSP_48KHZ  (0 << 0)
0181 #define PCM512x_FSSP_96KHZ  (1 << 0)
0182 #define PCM512x_FSSP_192KHZ (2 << 0)
0183 #define PCM512x_FSSP_384KHZ (3 << 0)
0184
0185 /* Page 0, Register 37 - Error detection */
0186 #define PCM512x_IPLK (1 << 0)
0187 #define PCM512x_DCAS (1 << 1)
0188 #define PCM512x_IDCM (1 << 2)
0189 #define PCM512x_IDCH (1 << 3)
0190 #define PCM512x_IDSK (1 << 4)
0191 #define PCM512x_IDBK (1 << 5)
0192 #define PCM512x_IDFS (1 << 6)
0193
0194 /* Page 0, Register 40 - I2S configuration */
0195 #define PCM512x_ALEN       (3 << 0)
0196 #define PCM512x_ALEN_SHIFT 0
0197 #define PCM512x_ALEN_16    (0 << 0)
0198 #define PCM512x_ALEN_20    (1 << 0)
0199 #define PCM512x_ALEN_24    (2 << 0)
0200 #define PCM512x_ALEN_32    (3 << 0)
0201 #define PCM512x_AFMT       (3 << 4)
0202 #define PCM512x_AFMT_SHIFT 4
0203 #define PCM512x_AFMT_I2S   (0 << 4)
0204 #define PCM512x_AFMT_DSP   (1 << 4)
0205 #define PCM512x_AFMT_RTJ   (2 << 4)
0206 #define PCM512x_AFMT_LTJ   (3 << 4)
0207
0208 /* Page 0, Register 42 - DAC routing */
0209 #define PCM512x_AUPR_SHIFT 0
0210 #define PCM512x_AUPL_SHIFT 4
0211
0212 /* Page 0, Register 59 - auto mute */
0213 #define PCM512x_ATMR_SHIFT 0
0214 #define PCM512x_ATML_SHIFT 4
0215
0216 /* Page 0, Register 63 - ramp rates */
0217 #define PCM512x_VNDF_SHIFT 6
0218 #define PCM512x_VNDS_SHIFT 4
0219 #define PCM512x_VNUF_SHIFT 2
0220 #define PCM512x_VNUS_SHIFT 0
0221
0222 /* Page 0, Register 64 - emergency ramp rates */
0223 #define PCM512x_VEDF_SHIFT 6
0224 #define PCM512x_VEDS_SHIFT 4
0225
0226 /* Page 0, Register 65 - Digital mute enables */
0227 #define PCM512x_ACTL_SHIFT 2
0228 #define PCM512x_AMLE_SHIFT 1
0229 #define PCM512x_AMRE_SHIFT 0
0230
0231 /* Page 0, Register 80-85, GPIO output selection */
0232 #define PCM512x_GxSL       (31 << 0)
0233 #define PCM512x_GxSL_SHIFT 0
0234 #define PCM512x_GxSL_OFF   (0 << 0)
0235 #define PCM512x_GxSL_DSP   (1 << 0)
0236 #define PCM512x_GxSL_REG   (2 << 0)
0237 #define PCM512x_GxSL_AMUTB (3 << 0)
0238 #define PCM512x_GxSL_AMUTL (4 << 0)
0239 #define PCM512x_GxSL_AMUTR (5 << 0)
0240 #define PCM512x_GxSL_CLKI  (6 << 0)
0241 #define PCM512x_GxSL_SDOUT (7 << 0)
0242 #define PCM512x_GxSL_ANMUL (8 << 0)
0243 #define PCM512x_GxSL_ANMUR (9 << 0)
0244 #define PCM512x_GxSL_PLLLK (10 << 0)
0245 #define PCM512x_GxSL_CPCLK (11 << 0)
0246 #define PCM512x_GxSL_UV0_7 (14 << 0)
0247 #define PCM512x_GxSL_UV0_3 (15 << 0)
0248 #define PCM512x_GxSL_PLLCK (16 << 0)
0249
0250 /* Page 1, Register 2 - analog volume control */
0251 #define PCM512x_RAGN_SHIFT 0
0252 #define PCM512x_LAGN_SHIFT 4
0253
0254 /* Page 1, Register 7 - analog boost control */
0255 #define PCM512x_AGBR_SHIFT 0
0256 #define PCM512x_AGBL_SHIFT 4
0257
0258 extern const struct dev_pm_ops pcm512x_pm_ops;
0259 extern const struct regmap_config pcm512x_regmap;
0260
0261 int pcm512x_probe(struct device *dev, struct regmap *regmap);
0262 void pcm512x_remove(struct device *dev);
0263
0264 #endif