soc/codecs/pcm3060.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * PCM3060 codec driver
0004  *
0005  * Copyright (C) 2018 Kirill Marinushkin <kmarinushkin@birdec.com>
0006  */
0007
0008 #ifndef _SND_SOC_PCM3060_H
0009 #define _SND_SOC_PCM3060_H
0010
0011 #include <linux/device.h>
0012 #include <linux/regmap.h>
0013
0014 extern const struct regmap_config pcm3060_regmap;
0015
0016 #define PCM3060_DAI_ID_DAC  0
0017 #define PCM3060_DAI_ID_ADC  1
0018 #define PCM3060_DAI_IDS_NUM 2
0019
0020 /* ADC and DAC can be clocked from separate or same sources CLK1 and CLK2 */
0021 #define PCM3060_CLK_DEF 0 /* default: CLK1->ADC, CLK2->DAC */
0022 #define PCM3060_CLK1        1
0023 #define PCM3060_CLK2        2
0024
0025 struct pcm3060_priv_dai {
0026     bool is_provider;
0027     unsigned int sclk_freq;
0028 };
0029
0030 struct pcm3060_priv {
0031     struct regmap *regmap;
0032     struct pcm3060_priv_dai dai[PCM3060_DAI_IDS_NUM];
0033     u8 out_se: 1;
0034 };
0035
0036 int pcm3060_probe(struct device *dev);
0037 int pcm3060_remove(struct device *dev);
0038
0039 /* registers */
0040
0041 #define PCM3060_REG64           0x40
0042 #define PCM3060_REG_MRST        0x80
0043 #define PCM3060_REG_SRST        0x40
0044 #define PCM3060_REG_ADPSV       0x20
0045 #define PCM3060_REG_SHIFT_ADPSV 0x05
0046 #define PCM3060_REG_DAPSV       0x10
0047 #define PCM3060_REG_SHIFT_DAPSV 0x04
0048 #define PCM3060_REG_SE          0x01
0049
0050 #define PCM3060_REG65           0x41
0051 #define PCM3060_REG66           0x42
0052 #define PCM3060_REG_AT2_MIN     0x36
0053 #define PCM3060_REG_AT2_MAX     0xFF
0054
0055 #define PCM3060_REG67           0x43
0056 #define PCM3060_REG72           0x48
0057 #define PCM3060_REG_CSEL        0x80
0058 #define PCM3060_REG_MASK_MS     0x70
0059 #define PCM3060_REG_MS_S        0x00
0060 #define PCM3060_REG_MS_M768     (0x01 << 4)
0061 #define PCM3060_REG_MS_M512     (0x02 << 4)
0062 #define PCM3060_REG_MS_M384     (0x03 << 4)
0063 #define PCM3060_REG_MS_M256     (0x04 << 4)
0064 #define PCM3060_REG_MS_M192     (0x05 << 4)
0065 #define PCM3060_REG_MS_M128     (0x06 << 4)
0066 #define PCM3060_REG_MASK_FMT        0x03
0067 #define PCM3060_REG_FMT_I2S     0x00
0068 #define PCM3060_REG_FMT_LJ      0x01
0069 #define PCM3060_REG_FMT_RJ      0x02
0070
0071 #define PCM3060_REG68           0x44
0072 #define PCM3060_REG_OVER        0x40
0073 #define PCM3060_REG_DREV2       0x04
0074 #define PCM3060_REG_SHIFT_MUT21 0x00
0075 #define PCM3060_REG_SHIFT_MUT22 0x01
0076
0077 #define PCM3060_REG69           0x45
0078 #define PCM3060_REG_FLT     0x80
0079 #define PCM3060_REG_MASK_DMF        0x60
0080 #define PCM3060_REG_DMC     0x10
0081 #define PCM3060_REG_ZREV        0x02
0082 #define PCM3060_REG_AZRO        0x01
0083
0084 #define PCM3060_REG70           0x46
0085 #define PCM3060_REG71           0x47
0086 #define PCM3060_REG_AT1_MIN     0x0E
0087 #define PCM3060_REG_AT1_MAX     0xFF
0088
0089 #define PCM3060_REG73           0x49
0090 #define PCM3060_REG_ZCDD        0x10
0091 #define PCM3060_REG_BYP     0x08
0092 #define PCM3060_REG_DREV1       0x04
0093 #define PCM3060_REG_SHIFT_MUT11 0x00
0094 #define PCM3060_REG_SHIFT_MUT12 0x01
0095
0096 #endif /* _SND_SOC_PCM3060_H */