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OSCL-LXR
 
 

     

0001 // SPDX-License-Identifier: GPL-2.0
0002 
0003 // Copyright (c) 2019 MediaTek Inc.
0004 
0005 #include <linux/module.h>
0006 #include <linux/kernel.h>
0007 #include <linux/err.h>
0008 #include <linux/i2c.h>
0009 #include <linux/pm_runtime.h>
0010 #include <linux/delay.h>
0011 #include <sound/soc.h>
0012 #include <sound/tlv.h>
0013 #include <sound/pcm_params.h>
0014 
0015 #include "mt6660.h"
0016 
0017 struct reg_size_table {
0018     u32 addr;
0019     u8 size;
0020 };
0021 
0022 static const struct reg_size_table mt6660_reg_size_table[] = {
0023     { MT6660_REG_HPF1_COEF, 4 },
0024     { MT6660_REG_HPF2_COEF, 4 },
0025     { MT6660_REG_TDM_CFG3, 2 },
0026     { MT6660_REG_RESV17, 2 },
0027     { MT6660_REG_RESV23, 2 },
0028     { MT6660_REG_SIGMAX, 2 },
0029     { MT6660_REG_DEVID, 2 },
0030     { MT6660_REG_HCLIP_CTRL, 2 },
0031     { MT6660_REG_DA_GAIN, 2 },
0032 };
0033 
0034 static int mt6660_get_reg_size(uint32_t addr)
0035 {
0036     int i;
0037 
0038     for (i = 0; i < ARRAY_SIZE(mt6660_reg_size_table); i++) {
0039         if (mt6660_reg_size_table[i].addr == addr)
0040             return mt6660_reg_size_table[i].size;
0041     }
0042     return 1;
0043 }
0044 
0045 static int mt6660_reg_write(void *context, unsigned int reg, unsigned int val)
0046 {
0047     struct mt6660_chip *chip = context;
0048     int size = mt6660_get_reg_size(reg);
0049     u8 reg_data[4];
0050     int i;
0051 
0052     for (i = 0; i < size; i++)
0053         reg_data[size - i - 1] = (val >> (8 * i)) & 0xff;
0054 
0055     return i2c_smbus_write_i2c_block_data(chip->i2c, reg, size, reg_data);
0056 }
0057 
0058 static int mt6660_reg_read(void *context, unsigned int reg, unsigned int *val)
0059 {
0060     struct mt6660_chip *chip = context;
0061     int size = mt6660_get_reg_size(reg);
0062     int i, ret;
0063     u8 data[4];
0064     u32 reg_data = 0;
0065 
0066     ret = i2c_smbus_read_i2c_block_data(chip->i2c, reg, size, data);
0067     if (ret < 0)
0068         return ret;
0069     for (i = 0; i < size; i++) {
0070         reg_data <<= 8;
0071         reg_data |= data[i];
0072     }
0073     *val = reg_data;
0074     return 0;
0075 }
0076 
0077 static const struct regmap_config mt6660_regmap_config = {
0078     .reg_bits = 8,
0079     .val_bits = 32,
0080     .reg_write = mt6660_reg_write,
0081     .reg_read = mt6660_reg_read,
0082 };
0083 
0084 static int mt6660_codec_dac_event(struct snd_soc_dapm_widget *w,
0085     struct snd_kcontrol *kcontrol, int event)
0086 {
0087     if (event == SND_SOC_DAPM_POST_PMU)
0088         usleep_range(1000, 1100);
0089     return 0;
0090 }
0091 
0092 static int mt6660_codec_classd_event(struct snd_soc_dapm_widget *w,
0093     struct snd_kcontrol *kcontrol, int event)
0094 {
0095     struct snd_soc_component *component =
0096         snd_soc_dapm_to_component(w->dapm);
0097     int ret;
0098 
0099     switch (event) {
0100     case SND_SOC_DAPM_PRE_PMU:
0101         dev_dbg(component->dev,
0102             "%s: before classd turn on\n", __func__);
0103         /* config to adaptive mode */
0104         ret = snd_soc_component_update_bits(component,
0105             MT6660_REG_BST_CTRL, 0x03, 0x03);
0106         if (ret < 0) {
0107             dev_err(component->dev, "config mode adaptive fail\n");
0108             return ret;
0109         }
0110         break;
0111     case SND_SOC_DAPM_POST_PMU:
0112         /* voltage sensing enable */
0113         ret = snd_soc_component_update_bits(component,
0114             MT6660_REG_RESV7, 0x04, 0x04);
0115         if (ret < 0) {
0116             dev_err(component->dev,
0117                 "enable voltage sensing fail\n");
0118             return ret;
0119         }
0120         dev_dbg(component->dev, "Amp on\n");
0121         break;
0122     case SND_SOC_DAPM_PRE_PMD:
0123         dev_dbg(component->dev, "Amp off\n");
0124         /* voltage sensing disable */
0125         ret = snd_soc_component_update_bits(component,
0126             MT6660_REG_RESV7, 0x04, 0x00);
0127         if (ret < 0) {
0128             dev_err(component->dev,
0129                 "disable voltage sensing fail\n");
0130             return ret;
0131         }
0132         /* pop-noise improvement 1 */
0133         ret = snd_soc_component_update_bits(component,
0134             MT6660_REG_RESV10, 0x10, 0x10);
0135         if (ret < 0) {
0136             dev_err(component->dev,
0137                 "pop-noise improvement 1 fail\n");
0138             return ret;
0139         }
0140         break;
0141     case SND_SOC_DAPM_POST_PMD:
0142         dev_dbg(component->dev,
0143             "%s: after classd turn off\n", __func__);
0144         /* pop-noise improvement 2 */
0145         ret = snd_soc_component_update_bits(component,
0146             MT6660_REG_RESV10, 0x10, 0x00);
0147         if (ret < 0) {
0148             dev_err(component->dev,
0149                 "pop-noise improvement 2 fail\n");
0150             return ret;
0151         }
0152         /* config to off mode */
0153         ret = snd_soc_component_update_bits(component,
0154             MT6660_REG_BST_CTRL, 0x03, 0x00);
0155         if (ret < 0) {
0156             dev_err(component->dev, "config mode off fail\n");
0157             return ret;
0158         }
0159         break;
0160     }
0161     return 0;
0162 }
0163 
0164 static const struct snd_soc_dapm_widget mt6660_component_dapm_widgets[] = {
0165     SND_SOC_DAPM_DAC_E("DAC", NULL, MT6660_REG_PLL_CFG1,
0166         0, 1, mt6660_codec_dac_event, SND_SOC_DAPM_POST_PMU),
0167     SND_SOC_DAPM_ADC("VI ADC", NULL, SND_SOC_NOPM, 0, 0),
0168     SND_SOC_DAPM_PGA("PGA", SND_SOC_NOPM, 0, 0, NULL, 0),
0169     SND_SOC_DAPM_OUT_DRV_E("ClassD", MT6660_REG_SYSTEM_CTRL, 2, 0,
0170                    NULL, 0, mt6660_codec_classd_event,
0171                    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
0172                    SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
0173     SND_SOC_DAPM_OUTPUT("OUTP"),
0174     SND_SOC_DAPM_OUTPUT("OUTN"),
0175 };
0176 
0177 static const struct snd_soc_dapm_route mt6660_component_dapm_routes[] = {
0178     { "DAC", NULL, "aif_playback" },
0179     { "PGA", NULL, "DAC" },
0180     { "ClassD", NULL, "PGA" },
0181     { "OUTP", NULL, "ClassD" },
0182     { "OUTN", NULL, "ClassD" },
0183     { "VI ADC", NULL, "ClassD" },
0184     { "aif_capture", NULL, "VI ADC" },
0185 };
0186 
0187 static int mt6660_component_get_volsw(struct snd_kcontrol *kcontrol,
0188                   struct snd_ctl_elem_value *ucontrol)
0189 {
0190     struct snd_soc_component *component =
0191         snd_soc_kcontrol_component(kcontrol);
0192     struct mt6660_chip *chip = (struct mt6660_chip *)
0193         snd_soc_component_get_drvdata(component);
0194 
0195     ucontrol->value.integer.value[0] = chip->chip_rev & 0x0f;
0196     return 0;
0197 }
0198 
0199 static const DECLARE_TLV_DB_SCALE(vol_ctl_tlv, -1155, 5, 0);
0200 
0201 static const struct snd_kcontrol_new mt6660_component_snd_controls[] = {
0202     SOC_SINGLE_TLV("Digital Volume", MT6660_REG_VOL_CTRL, 0, 255,
0203                1, vol_ctl_tlv),
0204     SOC_SINGLE("Hard Clip Switch", MT6660_REG_HCLIP_CTRL, 8, 1, 0),
0205     SOC_SINGLE("Clip Switch", MT6660_REG_SPS_CTRL, 0, 1, 0),
0206     SOC_SINGLE("Boost Mode", MT6660_REG_BST_CTRL, 0, 3, 0),
0207     SOC_SINGLE("DRE Switch", MT6660_REG_DRE_CTRL, 0, 1, 0),
0208     SOC_SINGLE("DC Protect Switch", MT6660_REG_DC_PROTECT_CTRL, 3, 1, 0),
0209     SOC_SINGLE("Data Output Left Channel Selection",
0210            MT6660_REG_DATAO_SEL, 3, 7, 0),
0211     SOC_SINGLE("Data Output Right Channel Selection",
0212            MT6660_REG_DATAO_SEL, 0, 7, 0),
0213     SOC_SINGLE_EXT("T0 SEL", MT6660_REG_CALI_T0, 0, 7, 0,
0214                snd_soc_get_volsw, NULL),
0215     SOC_SINGLE_EXT("Chip Rev", MT6660_REG_DEVID, 8, 15, 0,
0216                mt6660_component_get_volsw, NULL),
0217 };
0218 
0219 static int _mt6660_chip_power_on(struct mt6660_chip *chip, int on_off)
0220 {
0221     return regmap_write_bits(chip->regmap, MT6660_REG_SYSTEM_CTRL,
0222                  0x01, on_off ? 0x00 : 0x01);
0223 }
0224 
0225 struct reg_table {
0226     uint32_t addr;
0227     uint32_t mask;
0228     uint32_t val;
0229 };
0230 
0231 static const struct reg_table mt6660_setting_table[] = {
0232     { 0x20, 0x80, 0x00 },
0233     { 0x30, 0x01, 0x00 },
0234     { 0x50, 0x1c, 0x04 },
0235     { 0xB1, 0x0c, 0x00 },
0236     { 0xD3, 0x03, 0x03 },
0237     { 0xE0, 0x01, 0x00 },
0238     { 0x98, 0x44, 0x04 },
0239     { 0xB9, 0xff, 0x82 },
0240     { 0xB7, 0x7777, 0x7273 },
0241     { 0xB6, 0x07, 0x03 },
0242     { 0x6B, 0xe0, 0x20 },
0243     { 0x07, 0xff, 0x70 },
0244     { 0xBB, 0xff, 0x20 },
0245     { 0x69, 0xff, 0x40 },
0246     { 0xBD, 0xffff, 0x17f8 },
0247     { 0x70, 0xff, 0x15 },
0248     { 0x7C, 0xff, 0x00 },
0249     { 0x46, 0xff, 0x1d },
0250     { 0x1A, 0xffffffff, 0x7fdb7ffe },
0251     { 0x1B, 0xffffffff, 0x7fdb7ffe },
0252     { 0x51, 0xff, 0x58 },
0253     { 0xA2, 0xff, 0xce },
0254     { 0x33, 0xffff, 0x7fff },
0255     { 0x4C, 0xffff, 0x0116 },
0256     { 0x16, 0x1800, 0x0800 },
0257     { 0x68, 0x1f, 0x07 },
0258 };
0259 
0260 static int mt6660_component_setting(struct snd_soc_component *component)
0261 {
0262     struct mt6660_chip *chip = snd_soc_component_get_drvdata(component);
0263     int ret = 0;
0264     size_t i = 0;
0265 
0266     ret = _mt6660_chip_power_on(chip, 1);
0267     if (ret < 0) {
0268         dev_err(component->dev, "%s chip power on failed\n", __func__);
0269         return ret;
0270     }
0271 
0272     for (i = 0; i < ARRAY_SIZE(mt6660_setting_table); i++) {
0273         ret = snd_soc_component_update_bits(component,
0274                 mt6660_setting_table[i].addr,
0275                 mt6660_setting_table[i].mask,
0276                 mt6660_setting_table[i].val);
0277         if (ret < 0) {
0278             dev_err(component->dev, "%s update 0x%02x failed\n",
0279                 __func__, mt6660_setting_table[i].addr);
0280             return ret;
0281         }
0282     }
0283 
0284     ret = _mt6660_chip_power_on(chip, 0);
0285     if (ret < 0) {
0286         dev_err(component->dev, "%s chip power off failed\n", __func__);
0287         return ret;
0288     }
0289 
0290     return 0;
0291 }
0292 
0293 static int mt6660_component_probe(struct snd_soc_component *component)
0294 {
0295     struct mt6660_chip *chip = snd_soc_component_get_drvdata(component);
0296     int ret;
0297 
0298     dev_dbg(component->dev, "%s\n", __func__);
0299     snd_soc_component_init_regmap(component, chip->regmap);
0300 
0301     ret = mt6660_component_setting(component);
0302     if (ret < 0)
0303         dev_err(chip->dev, "mt6660 component setting failed\n");
0304 
0305     return ret;
0306 }
0307 
0308 static void mt6660_component_remove(struct snd_soc_component *component)
0309 {
0310     dev_dbg(component->dev, "%s\n", __func__);
0311     snd_soc_component_exit_regmap(component);
0312 }
0313 
0314 static const struct snd_soc_component_driver mt6660_component_driver = {
0315     .probe = mt6660_component_probe,
0316     .remove = mt6660_component_remove,
0317 
0318     .controls = mt6660_component_snd_controls,
0319     .num_controls = ARRAY_SIZE(mt6660_component_snd_controls),
0320     .dapm_widgets = mt6660_component_dapm_widgets,
0321     .num_dapm_widgets = ARRAY_SIZE(mt6660_component_dapm_widgets),
0322     .dapm_routes = mt6660_component_dapm_routes,
0323     .num_dapm_routes = ARRAY_SIZE(mt6660_component_dapm_routes),
0324 
0325     .idle_bias_on = false, /* idle_bias_off = true */
0326     .endianness = 1,
0327 };
0328 
0329 static int mt6660_component_aif_hw_params(struct snd_pcm_substream *substream,
0330     struct snd_pcm_hw_params *hw_params, struct snd_soc_dai *dai)
0331 {
0332     int word_len = params_physical_width(hw_params);
0333     int aud_bit = params_width(hw_params);
0334     u16 reg_data = 0;
0335     int ret;
0336 
0337     dev_dbg(dai->dev, "%s: ++\n", __func__);
0338     dev_dbg(dai->dev, "format: 0x%08x\n", params_format(hw_params));
0339     dev_dbg(dai->dev, "rate: 0x%08x\n", params_rate(hw_params));
0340     dev_dbg(dai->dev, "word_len: %d, aud_bit: %d\n", word_len, aud_bit);
0341     if (word_len > 32 || word_len < 16) {
0342         dev_err(dai->dev, "not supported word length\n");
0343         return -ENOTSUPP;
0344     }
0345     switch (aud_bit) {
0346     case 16:
0347         reg_data = 3;
0348         break;
0349     case 18:
0350         reg_data = 2;
0351         break;
0352     case 20:
0353         reg_data = 1;
0354         break;
0355     case 24:
0356     case 32:
0357         reg_data = 0;
0358         break;
0359     default:
0360         return -ENOTSUPP;
0361     }
0362     ret = snd_soc_component_update_bits(dai->component,
0363         MT6660_REG_SERIAL_CFG1, 0xc0, (reg_data << 6));
0364     if (ret < 0) {
0365         dev_err(dai->dev, "config aud bit fail\n");
0366         return ret;
0367     }
0368     ret = snd_soc_component_update_bits(dai->component,
0369         MT6660_REG_TDM_CFG3, 0x3f0, word_len << 4);
0370     if (ret < 0) {
0371         dev_err(dai->dev, "config word len fail\n");
0372         return ret;
0373     }
0374     dev_dbg(dai->dev, "%s: --\n", __func__);
0375     return 0;
0376 }
0377 
0378 static const struct snd_soc_dai_ops mt6660_component_aif_ops = {
0379     .hw_params = mt6660_component_aif_hw_params,
0380 };
0381 
0382 #define STUB_RATES  SNDRV_PCM_RATE_8000_192000
0383 #define STUB_FORMATS    (SNDRV_PCM_FMTBIT_S16_LE | \
0384             SNDRV_PCM_FMTBIT_U16_LE | \
0385             SNDRV_PCM_FMTBIT_S24_LE | \
0386             SNDRV_PCM_FMTBIT_U24_LE | \
0387             SNDRV_PCM_FMTBIT_S32_LE | \
0388             SNDRV_PCM_FMTBIT_U32_LE)
0389 
0390 static struct snd_soc_dai_driver mt6660_codec_dai = {
0391     .name = "mt6660-aif",
0392     .playback = {
0393         .stream_name    = "aif_playback",
0394         .channels_min   = 1,
0395         .channels_max   = 2,
0396         .rates      = STUB_RATES,
0397         .formats    = STUB_FORMATS,
0398     },
0399     .capture = {
0400         .stream_name    = "aif_capture",
0401         .channels_min   = 1,
0402         .channels_max   = 2,
0403         .rates = STUB_RATES,
0404         .formats = STUB_FORMATS,
0405     },
0406     /* dai properties */
0407     .symmetric_rate = 1,
0408     .symmetric_channels = 1,
0409     .symmetric_sample_bits = 1,
0410     /* dai operations */
0411     .ops = &mt6660_component_aif_ops,
0412 };
0413 
0414 static int _mt6660_chip_id_check(struct mt6660_chip *chip)
0415 {
0416     int ret;
0417     unsigned int val;
0418 
0419     ret = regmap_read(chip->regmap, MT6660_REG_DEVID, &val);
0420     if (ret < 0)
0421         return ret;
0422     val &= 0x0ff0;
0423     if (val != 0x00e0 && val != 0x01e0) {
0424         dev_err(chip->dev, "%s id(%x) not match\n", __func__, val);
0425         return -ENODEV;
0426     }
0427     return 0;
0428 }
0429 
0430 static int _mt6660_chip_sw_reset(struct mt6660_chip *chip)
0431 {
0432     int ret;
0433 
0434     /* turn on main pll first, then trigger reset */
0435     ret = regmap_write(chip->regmap, MT6660_REG_SYSTEM_CTRL, 0x00);
0436     if (ret < 0)
0437         return ret;
0438     ret = regmap_write(chip->regmap, MT6660_REG_SYSTEM_CTRL, 0x80);
0439     if (ret < 0)
0440         return ret;
0441     msleep(30);
0442     return 0;
0443 }
0444 
0445 static int _mt6660_read_chip_revision(struct mt6660_chip *chip)
0446 {
0447     int ret;
0448     unsigned int val;
0449 
0450     ret = regmap_read(chip->regmap, MT6660_REG_DEVID, &val);
0451     if (ret < 0) {
0452         dev_err(chip->dev, "get chip revision fail\n");
0453         return ret;
0454     }
0455     chip->chip_rev = val&0xff;
0456     dev_info(chip->dev, "%s chip_rev = %x\n", __func__, chip->chip_rev);
0457     return 0;
0458 }
0459 
0460 static int mt6660_i2c_probe(struct i2c_client *client)
0461 {
0462     struct mt6660_chip *chip = NULL;
0463     int ret;
0464 
0465     dev_dbg(&client->dev, "%s\n", __func__);
0466     chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
0467     if (!chip)
0468         return -ENOMEM;
0469     chip->i2c = client;
0470     chip->dev = &client->dev;
0471     mutex_init(&chip->io_lock);
0472     i2c_set_clientdata(client, chip);
0473 
0474     chip->regmap = devm_regmap_init(&client->dev,
0475         NULL, chip, &mt6660_regmap_config);
0476     if (IS_ERR(chip->regmap)) {
0477         ret = PTR_ERR(chip->regmap);
0478         dev_err(&client->dev, "failed to initialise regmap: %d\n", ret);
0479         return ret;
0480     }
0481 
0482     /* chip reset first */
0483     ret = _mt6660_chip_sw_reset(chip);
0484     if (ret < 0) {
0485         dev_err(chip->dev, "chip reset fail\n");
0486         goto probe_fail;
0487     }
0488     /* chip power on */
0489     ret = _mt6660_chip_power_on(chip, 1);
0490     if (ret < 0) {
0491         dev_err(chip->dev, "chip power on 2 fail\n");
0492         goto probe_fail;
0493     }
0494     /* chip devid check */
0495     ret = _mt6660_chip_id_check(chip);
0496     if (ret < 0) {
0497         dev_err(chip->dev, "chip id check fail\n");
0498         goto probe_fail;
0499     }
0500     /* chip revision get */
0501     ret = _mt6660_read_chip_revision(chip);
0502     if (ret < 0) {
0503         dev_err(chip->dev, "read chip revision fail\n");
0504         goto probe_fail;
0505     }
0506     pm_runtime_set_active(chip->dev);
0507     pm_runtime_enable(chip->dev);
0508 
0509     ret = devm_snd_soc_register_component(chip->dev,
0510                            &mt6660_component_driver,
0511                            &mt6660_codec_dai, 1);
0512     return ret;
0513 probe_fail:
0514     _mt6660_chip_power_on(chip, 0);
0515     mutex_destroy(&chip->io_lock);
0516     return ret;
0517 }
0518 
0519 static int mt6660_i2c_remove(struct i2c_client *client)
0520 {
0521     struct mt6660_chip *chip = i2c_get_clientdata(client);
0522 
0523     pm_runtime_disable(chip->dev);
0524     pm_runtime_set_suspended(chip->dev);
0525     mutex_destroy(&chip->io_lock);
0526     return 0;
0527 }
0528 
0529 static int __maybe_unused mt6660_i2c_runtime_suspend(struct device *dev)
0530 {
0531     struct mt6660_chip *chip = dev_get_drvdata(dev);
0532 
0533     dev_dbg(dev, "enter low power mode\n");
0534     return regmap_update_bits(chip->regmap,
0535         MT6660_REG_SYSTEM_CTRL, 0x01, 0x01);
0536 }
0537 
0538 static int __maybe_unused mt6660_i2c_runtime_resume(struct device *dev)
0539 {
0540     struct mt6660_chip *chip = dev_get_drvdata(dev);
0541 
0542     dev_dbg(dev, "exit low power mode\n");
0543     return regmap_update_bits(chip->regmap,
0544         MT6660_REG_SYSTEM_CTRL, 0x01, 0x00);
0545 }
0546 
0547 static const struct dev_pm_ops mt6660_dev_pm_ops = {
0548     SET_RUNTIME_PM_OPS(mt6660_i2c_runtime_suspend,
0549                mt6660_i2c_runtime_resume, NULL)
0550 };
0551 
0552 static const struct of_device_id __maybe_unused mt6660_of_id[] = {
0553     { .compatible = "mediatek,mt6660",},
0554     {},
0555 };
0556 MODULE_DEVICE_TABLE(of, mt6660_of_id);
0557 
0558 static const struct i2c_device_id mt6660_i2c_id[] = {
0559     {"mt6660", 0 },
0560     {},
0561 };
0562 MODULE_DEVICE_TABLE(i2c, mt6660_i2c_id);
0563 
0564 static struct i2c_driver mt6660_i2c_driver = {
0565     .driver = {
0566         .name = "mt6660",
0567         .of_match_table = of_match_ptr(mt6660_of_id),
0568         .pm = &mt6660_dev_pm_ops,
0569     },
0570     .probe_new = mt6660_i2c_probe,
0571     .remove = mt6660_i2c_remove,
0572     .id_table = mt6660_i2c_id,
0573 };
0574 module_i2c_driver(mt6660_i2c_driver);
0575 
0576 MODULE_AUTHOR("Jeff Chang <jeff_chang@richtek.com>");
0577 MODULE_DESCRIPTION("MT6660 SPKAMP Driver");
0578 MODULE_LICENSE("GPL");
0579 MODULE_VERSION("1.0.8_G");
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