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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * max98926.c -- ALSA SoC MAX98926 driver
0004  * Copyright 2013-15 Maxim Integrated Products
0005  */
0006 #include <linux/delay.h>
0007 #include <linux/i2c.h>
0008 #include <linux/module.h>
0009 #include <linux/regmap.h>
0010 #include <linux/slab.h>
0011 #include <linux/cdev.h>
0012 #include <sound/pcm.h>
0013 #include <sound/pcm_params.h>
0014 #include <sound/soc.h>
0015 #include <sound/tlv.h>
0016 #include "max98926.h"
0017 
0018 static const char * const max98926_boost_voltage_txt[] = {
0019     "8.5V", "8.25V", "8.0V", "7.75V", "7.5V", "7.25V", "7.0V", "6.75V",
0020     "6.5V", "6.5V", "6.5V", "6.5V", "6.5V", "6.5V", "6.5V", "6.5V"
0021 };
0022 
0023 static const char *const max98926_pdm_ch_text[] = {
0024     "Current", "Voltage",
0025 };
0026 
0027 static const char *const max98926_hpf_cutoff_txt[] = {
0028     "Disable", "DC Block", "100Hz",
0029     "200Hz", "400Hz", "800Hz",
0030 };
0031 
0032 static const struct reg_default max98926_reg[] = {
0033     { 0x0B, 0x00 }, /* IRQ Enable0 */
0034     { 0x0C, 0x00 }, /* IRQ Enable1 */
0035     { 0x0D, 0x00 }, /* IRQ Enable2 */
0036     { 0x0E, 0x00 }, /* IRQ Clear0 */
0037     { 0x0F, 0x00 }, /* IRQ Clear1 */
0038     { 0x10, 0x00 }, /* IRQ Clear2 */
0039     { 0x11, 0xC0 }, /* Map0 */
0040     { 0x12, 0x00 }, /* Map1 */
0041     { 0x13, 0x00 }, /* Map2 */
0042     { 0x14, 0xF0 }, /* Map3 */
0043     { 0x15, 0x00 }, /* Map4 */
0044     { 0x16, 0xAB }, /* Map5 */
0045     { 0x17, 0x89 }, /* Map6 */
0046     { 0x18, 0x00 }, /* Map7 */
0047     { 0x19, 0x00 }, /* Map8 */
0048     { 0x1A, 0x04 }, /* DAI Clock Mode 1 */
0049     { 0x1B, 0x00 }, /* DAI Clock Mode 2 */
0050     { 0x1C, 0x00 }, /* DAI Clock Divider Denominator MSBs */
0051     { 0x1D, 0x00 }, /* DAI Clock Divider Denominator LSBs */
0052     { 0x1E, 0xF0 }, /* DAI Clock Divider Numerator MSBs */
0053     { 0x1F, 0x00 }, /* DAI Clock Divider Numerator LSBs */
0054     { 0x20, 0x50 }, /* Format */
0055     { 0x21, 0x00 }, /* TDM Slot Select */
0056     { 0x22, 0x00 }, /* DOUT Configuration VMON */
0057     { 0x23, 0x00 }, /* DOUT Configuration IMON */
0058     { 0x24, 0x00 }, /* DOUT Configuration VBAT */
0059     { 0x25, 0x00 }, /* DOUT Configuration VBST */
0060     { 0x26, 0x00 }, /* DOUT Configuration FLAG */
0061     { 0x27, 0xFF }, /* DOUT HiZ Configuration 1 */
0062     { 0x28, 0xFF }, /* DOUT HiZ Configuration 2 */
0063     { 0x29, 0xFF }, /* DOUT HiZ Configuration 3 */
0064     { 0x2A, 0xFF }, /* DOUT HiZ Configuration 4 */
0065     { 0x2B, 0x02 }, /* DOUT Drive Strength */
0066     { 0x2C, 0x90 }, /* Filters */
0067     { 0x2D, 0x00 }, /* Gain */
0068     { 0x2E, 0x02 }, /* Gain Ramping */
0069     { 0x2F, 0x00 }, /* Speaker Amplifier */
0070     { 0x30, 0x0A }, /* Threshold */
0071     { 0x31, 0x00 }, /* ALC Attack */
0072     { 0x32, 0x80 }, /* ALC Atten and Release */
0073     { 0x33, 0x00 }, /* ALC Infinite Hold Release */
0074     { 0x34, 0x92 }, /* ALC Configuration */
0075     { 0x35, 0x01 }, /* Boost Converter */
0076     { 0x36, 0x00 }, /* Block Enable */
0077     { 0x37, 0x00 }, /* Configuration */
0078     { 0x38, 0x00 }, /* Global Enable */
0079     { 0x3A, 0x00 }, /* Boost Limiter */
0080 };
0081 
0082 static const struct soc_enum max98926_voltage_enum[] = {
0083     SOC_ENUM_SINGLE(MAX98926_DAI_CLK_DIV_N_LSBS, 0,
0084         ARRAY_SIZE(max98926_pdm_ch_text),
0085         max98926_pdm_ch_text),
0086 };
0087 
0088 static const struct snd_kcontrol_new max98926_voltage_control =
0089     SOC_DAPM_ENUM("Route", max98926_voltage_enum);
0090 
0091 static const struct soc_enum max98926_current_enum[] = {
0092     SOC_ENUM_SINGLE(MAX98926_DAI_CLK_DIV_N_LSBS,
0093         MAX98926_PDM_SOURCE_1_SHIFT,
0094         ARRAY_SIZE(max98926_pdm_ch_text),
0095         max98926_pdm_ch_text),
0096 };
0097 
0098 static const struct snd_kcontrol_new max98926_current_control =
0099     SOC_DAPM_ENUM("Route", max98926_current_enum);
0100 
0101 static const struct snd_kcontrol_new max98926_mixer_controls[] = {
0102     SOC_DAPM_SINGLE("PCM Single Switch", MAX98926_SPK_AMP,
0103         MAX98926_INSELECT_MODE_SHIFT, 0, 0),
0104     SOC_DAPM_SINGLE("PDM Single Switch", MAX98926_SPK_AMP,
0105         MAX98926_INSELECT_MODE_SHIFT, 1, 0),
0106 };
0107 
0108 static const struct snd_kcontrol_new max98926_dai_controls[] = {
0109     SOC_DAPM_SINGLE("Left", MAX98926_GAIN,
0110         MAX98926_DAC_IN_SEL_SHIFT, 0, 0),
0111     SOC_DAPM_SINGLE("Right", MAX98926_GAIN,
0112         MAX98926_DAC_IN_SEL_SHIFT, 1, 0),
0113     SOC_DAPM_SINGLE("LeftRight", MAX98926_GAIN,
0114         MAX98926_DAC_IN_SEL_SHIFT, 2, 0),
0115     SOC_DAPM_SINGLE("(Left+Right)/2 Switch", MAX98926_GAIN,
0116         MAX98926_DAC_IN_SEL_SHIFT, 3, 0),
0117 };
0118 
0119 static const struct snd_soc_dapm_widget max98926_dapm_widgets[] = {
0120     SND_SOC_DAPM_AIF_IN("DAI_OUT", "HiFi Playback", 0,
0121         SND_SOC_NOPM, 0, 0),
0122     SND_SOC_DAPM_DAC("Amp Enable", NULL, MAX98926_BLOCK_ENABLE,
0123         MAX98926_SPK_EN_SHIFT, 0),
0124     SND_SOC_DAPM_SUPPLY("Global Enable", MAX98926_GLOBAL_ENABLE,
0125         MAX98926_EN_SHIFT, 0, NULL, 0),
0126     SND_SOC_DAPM_SUPPLY("VI Enable", MAX98926_BLOCK_ENABLE,
0127         MAX98926_ADC_IMON_EN_WIDTH |
0128         MAX98926_ADC_VMON_EN_SHIFT,
0129         0, NULL, 0),
0130     SND_SOC_DAPM_PGA("BST Enable", MAX98926_BLOCK_ENABLE,
0131         MAX98926_BST_EN_SHIFT, 0, NULL, 0),
0132     SND_SOC_DAPM_OUTPUT("BE_OUT"),
0133     SND_SOC_DAPM_MIXER("PCM Sel", MAX98926_SPK_AMP,
0134         MAX98926_INSELECT_MODE_SHIFT, 0,
0135         &max98926_mixer_controls[0],
0136         ARRAY_SIZE(max98926_mixer_controls)),
0137     SND_SOC_DAPM_MIXER("DAI Sel",
0138         MAX98926_GAIN, MAX98926_DAC_IN_SEL_SHIFT, 0,
0139         &max98926_dai_controls[0],
0140         ARRAY_SIZE(max98926_dai_controls)),
0141     SND_SOC_DAPM_MUX("PDM CH1 Source",
0142         MAX98926_DAI_CLK_DIV_N_LSBS,
0143         MAX98926_PDM_CURRENT_SHIFT,
0144         0, &max98926_current_control),
0145     SND_SOC_DAPM_MUX("PDM CH0 Source",
0146         MAX98926_DAI_CLK_DIV_N_LSBS,
0147         MAX98926_PDM_VOLTAGE_SHIFT,
0148         0, &max98926_voltage_control),
0149 };
0150 
0151 static const struct snd_soc_dapm_route max98926_audio_map[] = {
0152     {"VI Enable", NULL, "DAI_OUT"},
0153     {"DAI Sel", "Left", "VI Enable"},
0154     {"DAI Sel", "Right", "VI Enable"},
0155     {"DAI Sel", "LeftRight", "VI Enable"},
0156     {"DAI Sel", "LeftRightDiv2", "VI Enable"},
0157     {"PCM Sel", "PCM", "DAI Sel"},
0158 
0159     {"PDM CH1 Source", "Current", "DAI_OUT"},
0160     {"PDM CH1 Source", "Voltage", "DAI_OUT"},
0161     {"PDM CH0 Source", "Current", "DAI_OUT"},
0162     {"PDM CH0 Source", "Voltage", "DAI_OUT"},
0163     {"PCM Sel", "Analog", "PDM CH1 Source"},
0164     {"PCM Sel", "Analog", "PDM CH0 Source"},
0165     {"Amp Enable", NULL, "PCM Sel"},
0166 
0167     {"BST Enable", NULL, "Amp Enable"},
0168     {"BE_OUT", NULL, "BST Enable"},
0169 };
0170 
0171 static bool max98926_volatile_register(struct device *dev, unsigned int reg)
0172 {
0173     switch (reg) {
0174     case MAX98926_VBAT_DATA:
0175     case MAX98926_VBST_DATA:
0176     case MAX98926_LIVE_STATUS0:
0177     case MAX98926_LIVE_STATUS1:
0178     case MAX98926_LIVE_STATUS2:
0179     case MAX98926_STATE0:
0180     case MAX98926_STATE1:
0181     case MAX98926_STATE2:
0182     case MAX98926_FLAG0:
0183     case MAX98926_FLAG1:
0184     case MAX98926_FLAG2:
0185     case MAX98926_VERSION:
0186         return true;
0187     default:
0188         return false;
0189     }
0190 }
0191 
0192 static bool max98926_readable_register(struct device *dev, unsigned int reg)
0193 {
0194     switch (reg) {
0195     case MAX98926_IRQ_CLEAR0:
0196     case MAX98926_IRQ_CLEAR1:
0197     case MAX98926_IRQ_CLEAR2:
0198     case MAX98926_ALC_HOLD_RLS:
0199         return false;
0200     default:
0201         return true;
0202     }
0203 };
0204 
0205 static DECLARE_TLV_DB_SCALE(max98926_spk_tlv, -600, 100, 0);
0206 static DECLARE_TLV_DB_RANGE(max98926_current_tlv,
0207     0, 11, TLV_DB_SCALE_ITEM(20, 20, 0),
0208     12, 15, TLV_DB_SCALE_ITEM(320, 40, 0),
0209 );
0210 
0211 static SOC_ENUM_SINGLE_DECL(max98926_dac_hpf_cutoff,
0212         MAX98926_FILTERS, MAX98926_DAC_HPF_SHIFT,
0213         max98926_hpf_cutoff_txt);
0214 
0215 static SOC_ENUM_SINGLE_DECL(max98926_boost_voltage,
0216         MAX98926_CONFIGURATION, MAX98926_BST_VOUT_SHIFT,
0217         max98926_boost_voltage_txt);
0218 
0219 static const struct snd_kcontrol_new max98926_snd_controls[] = {
0220     SOC_SINGLE_TLV("Speaker Volume", MAX98926_GAIN,
0221         MAX98926_SPK_GAIN_SHIFT,
0222         (1<<MAX98926_SPK_GAIN_WIDTH)-1, 0,
0223         max98926_spk_tlv),
0224     SOC_SINGLE("Ramp Switch", MAX98926_GAIN_RAMPING,
0225         MAX98926_SPK_RMP_EN_SHIFT, 1, 0),
0226     SOC_SINGLE("ZCD Switch", MAX98926_GAIN_RAMPING,
0227         MAX98926_SPK_ZCD_EN_SHIFT, 1, 0),
0228     SOC_SINGLE("ALC Switch", MAX98926_THRESHOLD,
0229         MAX98926_ALC_EN_SHIFT, 1, 0),
0230     SOC_SINGLE("ALC Threshold", MAX98926_THRESHOLD,
0231         MAX98926_ALC_TH_SHIFT,
0232         (1<<MAX98926_ALC_TH_WIDTH)-1, 0),
0233     SOC_ENUM("Boost Output Voltage", max98926_boost_voltage),
0234     SOC_SINGLE_TLV("Boost Current Limit", MAX98926_BOOST_LIMITER,
0235         MAX98926_BST_ILIM_SHIFT,
0236         (1<<MAX98926_BST_ILIM_SHIFT)-1, 0,
0237         max98926_current_tlv),
0238     SOC_ENUM("DAC HPF Cutoff", max98926_dac_hpf_cutoff),
0239     SOC_DOUBLE("PDM Channel One", MAX98926_DAI_CLK_DIV_N_LSBS,
0240         MAX98926_PDM_CHANNEL_1_SHIFT,
0241         MAX98926_PDM_CHANNEL_1_HIZ, 1, 0),
0242     SOC_DOUBLE("PDM Channel Zero", MAX98926_DAI_CLK_DIV_N_LSBS,
0243         MAX98926_PDM_CHANNEL_0_SHIFT,
0244         MAX98926_PDM_CHANNEL_0_HIZ, 1, 0),
0245 };
0246 
0247 static const struct {
0248     int rate;
0249     int  sr;
0250 } rate_table[] = {
0251     {
0252         .rate = 8000,
0253         .sr = 0,
0254     },
0255     {
0256         .rate = 11025,
0257         .sr = 1,
0258     },
0259     {
0260         .rate = 12000,
0261         .sr = 2,
0262     },
0263     {
0264         .rate = 16000,
0265         .sr = 3,
0266     },
0267     {
0268         .rate = 22050,
0269         .sr = 4,
0270     },
0271     {
0272         .rate = 24000,
0273         .sr = 5,
0274     },
0275     {
0276         .rate = 32000,
0277         .sr = 6,
0278     },
0279     {
0280         .rate = 44100,
0281         .sr = 7,
0282     },
0283     {
0284         .rate = 48000,
0285         .sr = 8,
0286     },
0287 };
0288 
0289 static void max98926_set_sense_data(struct max98926_priv *max98926)
0290 {
0291     regmap_update_bits(max98926->regmap,
0292         MAX98926_DOUT_CFG_VMON,
0293         MAX98926_DAI_VMON_EN_MASK,
0294         MAX98926_DAI_VMON_EN_MASK);
0295     regmap_update_bits(max98926->regmap,
0296         MAX98926_DOUT_CFG_IMON,
0297         MAX98926_DAI_IMON_EN_MASK,
0298         MAX98926_DAI_IMON_EN_MASK);
0299 
0300     if (!max98926->interleave_mode) {
0301         /* set VMON slots */
0302         regmap_update_bits(max98926->regmap,
0303             MAX98926_DOUT_CFG_VMON,
0304             MAX98926_DAI_VMON_SLOT_MASK,
0305             max98926->v_slot);
0306         /* set IMON slots */
0307         regmap_update_bits(max98926->regmap,
0308             MAX98926_DOUT_CFG_IMON,
0309             MAX98926_DAI_IMON_SLOT_MASK,
0310             max98926->i_slot);
0311     } else {
0312         /* enable interleave mode */
0313         regmap_update_bits(max98926->regmap,
0314             MAX98926_FORMAT,
0315             MAX98926_DAI_INTERLEAVE_MASK,
0316             MAX98926_DAI_INTERLEAVE_MASK);
0317         /* set interleave slots */
0318         regmap_update_bits(max98926->regmap,
0319             MAX98926_DOUT_CFG_VBAT,
0320             MAX98926_DAI_INTERLEAVE_SLOT_MASK,
0321             max98926->v_slot);
0322     }
0323 }
0324 
0325 static int max98926_dai_set_fmt(struct snd_soc_dai *codec_dai,
0326         unsigned int fmt)
0327 {
0328     struct snd_soc_component *component = codec_dai->component;
0329     struct max98926_priv *max98926 = snd_soc_component_get_drvdata(component);
0330     unsigned int invert = 0;
0331 
0332     dev_dbg(component->dev, "%s: fmt 0x%08X\n", __func__, fmt);
0333 
0334     switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
0335     case SND_SOC_DAIFMT_CBC_CFC:
0336         max98926_set_sense_data(max98926);
0337         break;
0338     default:
0339         dev_err(component->dev, "DAI clock mode unsupported\n");
0340         return -EINVAL;
0341     }
0342 
0343     switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
0344     case SND_SOC_DAIFMT_NB_NF:
0345         break;
0346     case SND_SOC_DAIFMT_NB_IF:
0347         invert = MAX98926_DAI_WCI_MASK;
0348         break;
0349     case SND_SOC_DAIFMT_IB_NF:
0350         invert = MAX98926_DAI_BCI_MASK;
0351         break;
0352     case SND_SOC_DAIFMT_IB_IF:
0353         invert = MAX98926_DAI_BCI_MASK | MAX98926_DAI_WCI_MASK;
0354         break;
0355     default:
0356         dev_err(component->dev, "DAI invert mode unsupported\n");
0357         return -EINVAL;
0358     }
0359 
0360     regmap_write(max98926->regmap,
0361             MAX98926_FORMAT, MAX98926_DAI_DLY_MASK);
0362     regmap_update_bits(max98926->regmap, MAX98926_FORMAT,
0363             MAX98926_DAI_BCI_MASK, invert);
0364     return 0;
0365 }
0366 
0367 static int max98926_dai_hw_params(struct snd_pcm_substream *substream,
0368         struct snd_pcm_hw_params *params,
0369         struct snd_soc_dai *dai)
0370 {
0371     int dai_sr = -EINVAL;
0372     int rate = params_rate(params), i;
0373     struct snd_soc_component *component = dai->component;
0374     struct max98926_priv *max98926 = snd_soc_component_get_drvdata(component);
0375     int blr_clk_ratio;
0376 
0377     switch (params_format(params)) {
0378     case SNDRV_PCM_FORMAT_S16_LE:
0379         regmap_update_bits(max98926->regmap,
0380             MAX98926_FORMAT,
0381             MAX98926_DAI_CHANSZ_MASK,
0382             MAX98926_DAI_CHANSZ_16);
0383         max98926->ch_size = 16;
0384         break;
0385     case SNDRV_PCM_FORMAT_S24_LE:
0386         regmap_update_bits(max98926->regmap,
0387             MAX98926_FORMAT,
0388             MAX98926_DAI_CHANSZ_MASK,
0389             MAX98926_DAI_CHANSZ_24);
0390         max98926->ch_size = 24;
0391         break;
0392     case SNDRV_PCM_FORMAT_S32_LE:
0393         regmap_update_bits(max98926->regmap,
0394             MAX98926_FORMAT,
0395             MAX98926_DAI_CHANSZ_MASK,
0396             MAX98926_DAI_CHANSZ_32);
0397         max98926->ch_size = 32;
0398         break;
0399     default:
0400         dev_dbg(component->dev, "format unsupported %d\n",
0401             params_format(params));
0402         return -EINVAL;
0403     }
0404 
0405     /* BCLK/LRCLK ratio calculation */
0406     blr_clk_ratio = params_channels(params) * max98926->ch_size;
0407 
0408     switch (blr_clk_ratio) {
0409     case 32:
0410         regmap_update_bits(max98926->regmap,
0411             MAX98926_DAI_CLK_MODE2,
0412             MAX98926_DAI_BSEL_MASK,
0413             MAX98926_DAI_BSEL_32);
0414         break;
0415     case 48:
0416         regmap_update_bits(max98926->regmap,
0417             MAX98926_DAI_CLK_MODE2,
0418             MAX98926_DAI_BSEL_MASK,
0419             MAX98926_DAI_BSEL_48);
0420         break;
0421     case 64:
0422         regmap_update_bits(max98926->regmap,
0423             MAX98926_DAI_CLK_MODE2,
0424             MAX98926_DAI_BSEL_MASK,
0425             MAX98926_DAI_BSEL_64);
0426         break;
0427     default:
0428         return -EINVAL;
0429     }
0430 
0431     /* find the closest rate */
0432     for (i = 0; i < ARRAY_SIZE(rate_table); i++) {
0433         if (rate_table[i].rate >= rate) {
0434             dai_sr = rate_table[i].sr;
0435             break;
0436         }
0437     }
0438     if (dai_sr < 0)
0439         return -EINVAL;
0440 
0441     /* set DAI_SR to correct LRCLK frequency */
0442     regmap_update_bits(max98926->regmap,
0443         MAX98926_DAI_CLK_MODE2,
0444         MAX98926_DAI_SR_MASK, dai_sr << MAX98926_DAI_SR_SHIFT);
0445     return 0;
0446 }
0447 
0448 #define MAX98926_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \
0449         SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
0450 
0451 static const struct snd_soc_dai_ops max98926_dai_ops = {
0452     .set_fmt = max98926_dai_set_fmt,
0453     .hw_params = max98926_dai_hw_params,
0454 };
0455 
0456 static struct snd_soc_dai_driver max98926_dai[] = {
0457 {
0458     .name = "max98926-aif1",
0459     .playback = {
0460         .stream_name = "HiFi Playback",
0461         .channels_min = 1,
0462         .channels_max = 2,
0463         .rates = SNDRV_PCM_RATE_8000_48000,
0464         .formats = MAX98926_FORMATS,
0465     },
0466     .capture = {
0467         .stream_name = "HiFi Capture",
0468         .channels_min = 1,
0469         .channels_max = 2,
0470         .rates = SNDRV_PCM_RATE_8000_48000,
0471         .formats = MAX98926_FORMATS,
0472     },
0473     .ops = &max98926_dai_ops,
0474 }
0475 };
0476 
0477 static int max98926_probe(struct snd_soc_component *component)
0478 {
0479     struct max98926_priv *max98926 = snd_soc_component_get_drvdata(component);
0480 
0481     max98926->component = component;
0482 
0483     /* Hi-Z all the slots */
0484     regmap_write(max98926->regmap, MAX98926_DOUT_HIZ_CFG4, 0xF0);
0485     return 0;
0486 }
0487 
0488 static const struct snd_soc_component_driver soc_component_dev_max98926 = {
0489     .probe          = max98926_probe,
0490     .controls       = max98926_snd_controls,
0491     .num_controls       = ARRAY_SIZE(max98926_snd_controls),
0492     .dapm_routes        = max98926_audio_map,
0493     .num_dapm_routes    = ARRAY_SIZE(max98926_audio_map),
0494     .dapm_widgets       = max98926_dapm_widgets,
0495     .num_dapm_widgets   = ARRAY_SIZE(max98926_dapm_widgets),
0496     .idle_bias_on       = 1,
0497     .use_pmdown_time    = 1,
0498     .endianness     = 1,
0499 };
0500 
0501 static const struct regmap_config max98926_regmap = {
0502     .reg_bits   = 8,
0503     .val_bits   = 8,
0504     .max_register   = MAX98926_VERSION,
0505     .reg_defaults   = max98926_reg,
0506     .num_reg_defaults = ARRAY_SIZE(max98926_reg),
0507     .volatile_reg   = max98926_volatile_register,
0508     .readable_reg   = max98926_readable_register,
0509     .cache_type     = REGCACHE_RBTREE,
0510 };
0511 
0512 static int max98926_i2c_probe(struct i2c_client *i2c)
0513 {
0514     int ret, reg;
0515     u32 value;
0516     struct max98926_priv *max98926;
0517 
0518     max98926 = devm_kzalloc(&i2c->dev,
0519             sizeof(*max98926), GFP_KERNEL);
0520     if (!max98926)
0521         return -ENOMEM;
0522 
0523     i2c_set_clientdata(i2c, max98926);
0524     max98926->regmap = devm_regmap_init_i2c(i2c, &max98926_regmap);
0525     if (IS_ERR(max98926->regmap)) {
0526         ret = PTR_ERR(max98926->regmap);
0527         dev_err(&i2c->dev,
0528                 "Failed to allocate regmap: %d\n", ret);
0529         goto err_out;
0530     }
0531     if (of_property_read_bool(i2c->dev.of_node, "interleave-mode"))
0532         max98926->interleave_mode = true;
0533 
0534     if (!of_property_read_u32(i2c->dev.of_node, "vmon-slot-no", &value)) {
0535         if (value > MAX98926_DAI_VMON_SLOT_1E_1F) {
0536             dev_err(&i2c->dev, "vmon slot number is wrong:\n");
0537             return -EINVAL;
0538         }
0539         max98926->v_slot = value;
0540     }
0541     if (!of_property_read_u32(i2c->dev.of_node, "imon-slot-no", &value)) {
0542         if (value > MAX98926_DAI_IMON_SLOT_1E_1F) {
0543             dev_err(&i2c->dev, "imon slot number is wrong:\n");
0544             return -EINVAL;
0545         }
0546         max98926->i_slot = value;
0547     }
0548     ret = regmap_read(max98926->regmap,
0549             MAX98926_VERSION, &reg);
0550     if (ret < 0) {
0551         dev_err(&i2c->dev, "Failed to read: %x\n", reg);
0552         return ret;
0553     }
0554 
0555     ret = devm_snd_soc_register_component(&i2c->dev,
0556             &soc_component_dev_max98926,
0557             max98926_dai, ARRAY_SIZE(max98926_dai));
0558     if (ret < 0)
0559         dev_err(&i2c->dev,
0560                 "Failed to register component: %d\n", ret);
0561     dev_info(&i2c->dev, "device version: %x\n", reg);
0562 err_out:
0563     return ret;
0564 }
0565 
0566 static const struct i2c_device_id max98926_i2c_id[] = {
0567     { "max98926", 0 },
0568     { }
0569 };
0570 MODULE_DEVICE_TABLE(i2c, max98926_i2c_id);
0571 
0572 #ifdef CONFIG_OF
0573 static const struct of_device_id max98926_of_match[] = {
0574     { .compatible = "maxim,max98926", },
0575     { }
0576 };
0577 MODULE_DEVICE_TABLE(of, max98926_of_match);
0578 #endif
0579 
0580 static struct i2c_driver max98926_i2c_driver = {
0581     .driver = {
0582         .name = "max98926",
0583         .of_match_table = of_match_ptr(max98926_of_match),
0584     },
0585     .probe_new = max98926_i2c_probe,
0586     .id_table = max98926_i2c_id,
0587 };
0588 
0589 module_i2c_driver(max98926_i2c_driver)
0590 MODULE_DESCRIPTION("ALSA SoC MAX98926 driver");
0591 MODULE_AUTHOR("Anish kumar <anish.kumar@maximintegrated.com>");
0592 MODULE_LICENSE("GPL");
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