soc/codecs/max98371.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * max98371.c -- ALSA SoC Stereo MAX98371 driver
0004  *
0005  * Copyright 2015-16 Maxim Integrated Products
0006  */
0007
0008 #include <linux/i2c.h>
0009 #include <linux/module.h>
0010 #include <linux/regmap.h>
0011 #include <linux/slab.h>
0012 #include <sound/pcm.h>
0013 #include <sound/pcm_params.h>
0014 #include <sound/soc.h>
0015 #include <sound/tlv.h>
0016 #include "max98371.h"
0017
0018 static const char *const monomix_text[] = {
0019     "Left", "Right", "LeftRightDiv2",
0020 };
0021
0022 static const char *const hpf_cutoff_txt[] = {
0023     "Disable", "DC Block", "50Hz",
0024     "100Hz", "200Hz", "400Hz", "800Hz",
0025 };
0026
0027 static SOC_ENUM_SINGLE_DECL(max98371_monomix, MAX98371_MONOMIX_CFG, 0,
0028         monomix_text);
0029
0030 static SOC_ENUM_SINGLE_DECL(max98371_hpf_cutoff, MAX98371_HPF, 0,
0031         hpf_cutoff_txt);
0032
0033 static const DECLARE_TLV_DB_RANGE(max98371_dht_min_gain,
0034     0, 1, TLV_DB_SCALE_ITEM(537, 66, 0),
0035     2, 3, TLV_DB_SCALE_ITEM(677, 82, 0),
0036     4, 5, TLV_DB_SCALE_ITEM(852, 104, 0),
0037     6, 7, TLV_DB_SCALE_ITEM(1072, 131, 0),
0038     8, 9, TLV_DB_SCALE_ITEM(1350, 165, 0),
0039     10, 11, TLV_DB_SCALE_ITEM(1699, 101, 0),
0040 );
0041
0042 static const DECLARE_TLV_DB_RANGE(max98371_dht_max_gain,
0043     0, 1, TLV_DB_SCALE_ITEM(537, 66, 0),
0044     2, 3, TLV_DB_SCALE_ITEM(677, 82, 0),
0045     4, 5, TLV_DB_SCALE_ITEM(852, 104, 0),
0046     6, 7, TLV_DB_SCALE_ITEM(1072, 131, 0),
0047     8, 9, TLV_DB_SCALE_ITEM(1350, 165, 0),
0048     10, 11, TLV_DB_SCALE_ITEM(1699, 208, 0),
0049 );
0050
0051 static const DECLARE_TLV_DB_RANGE(max98371_dht_rot_gain,
0052     0, 1, TLV_DB_SCALE_ITEM(-50, -50, 0),
0053     2, 6, TLV_DB_SCALE_ITEM(-100, -100, 0),
0054     7, 8, TLV_DB_SCALE_ITEM(-800, -200, 0),
0055     9, 11, TLV_DB_SCALE_ITEM(-1200, -300, 0),
0056     12, 13, TLV_DB_SCALE_ITEM(-2000, -200, 0),
0057     14, 15, TLV_DB_SCALE_ITEM(-2500, -500, 0),
0058 );
0059
0060 static const struct reg_default max98371_reg[] = {
0061     { 0x01, 0x00 },
0062     { 0x02, 0x00 },
0063     { 0x03, 0x00 },
0064     { 0x04, 0x00 },
0065     { 0x05, 0x00 },
0066     { 0x06, 0x00 },
0067     { 0x07, 0x00 },
0068     { 0x08, 0x00 },
0069     { 0x09, 0x00 },
0070     { 0x0A, 0x00 },
0071     { 0x10, 0x06 },
0072     { 0x11, 0x08 },
0073     { 0x14, 0x80 },
0074     { 0x15, 0x00 },
0075     { 0x16, 0x00 },
0076     { 0x18, 0x00 },
0077     { 0x19, 0x00 },
0078     { 0x1C, 0x00 },
0079     { 0x1D, 0x00 },
0080     { 0x1E, 0x00 },
0081     { 0x1F, 0x00 },
0082     { 0x20, 0x00 },
0083     { 0x21, 0x00 },
0084     { 0x22, 0x00 },
0085     { 0x23, 0x00 },
0086     { 0x24, 0x00 },
0087     { 0x25, 0x00 },
0088     { 0x26, 0x00 },
0089     { 0x27, 0x00 },
0090     { 0x28, 0x00 },
0091     { 0x29, 0x00 },
0092     { 0x2A, 0x00 },
0093     { 0x2B, 0x00 },
0094     { 0x2C, 0x00 },
0095     { 0x2D, 0x00 },
0096     { 0x2E, 0x0B },
0097     { 0x31, 0x00 },
0098     { 0x32, 0x18 },
0099     { 0x33, 0x00 },
0100     { 0x34, 0x00 },
0101     { 0x36, 0x00 },
0102     { 0x37, 0x00 },
0103     { 0x38, 0x00 },
0104     { 0x39, 0x00 },
0105     { 0x3A, 0x00 },
0106     { 0x3B, 0x00 },
0107     { 0x3C, 0x00 },
0108     { 0x3D, 0x00 },
0109     { 0x3E, 0x00 },
0110     { 0x3F, 0x00 },
0111     { 0x40, 0x00 },
0112     { 0x41, 0x00 },
0113     { 0x42, 0x00 },
0114     { 0x43, 0x00 },
0115     { 0x4A, 0x00 },
0116     { 0x4B, 0x00 },
0117     { 0x4C, 0x00 },
0118     { 0x4D, 0x00 },
0119     { 0x4E, 0x00 },
0120     { 0x50, 0x00 },
0121     { 0x51, 0x00 },
0122     { 0x55, 0x00 },
0123     { 0x58, 0x00 },
0124     { 0x59, 0x00 },
0125     { 0x5C, 0x00 },
0126     { 0xFF, 0x43 },
0127 };
0128
0129 static bool max98371_volatile_register(struct device *dev, unsigned int reg)
0130 {
0131     switch (reg) {
0132     case MAX98371_IRQ_CLEAR1:
0133     case MAX98371_IRQ_CLEAR2:
0134     case MAX98371_IRQ_CLEAR3:
0135     case MAX98371_VERSION:
0136         return true;
0137     default:
0138         return false;
0139     }
0140 }
0141
0142 static bool max98371_readable_register(struct device *dev, unsigned int reg)
0143 {
0144     switch (reg) {
0145     case MAX98371_SOFT_RESET:
0146         return false;
0147     default:
0148         return true;
0149     }
0150 };
0151
0152 static const DECLARE_TLV_DB_RANGE(max98371_gain_tlv,
0153     0, 7, TLV_DB_SCALE_ITEM(0, 50, 0),
0154     8, 10, TLV_DB_SCALE_ITEM(400, 100, 0)
0155 );
0156
0157 static const DECLARE_TLV_DB_SCALE(digital_tlv, -6300, 50, 1);
0158
0159 static const struct snd_kcontrol_new max98371_snd_controls[] = {
0160     SOC_SINGLE_TLV("Speaker Volume", MAX98371_GAIN,
0161             MAX98371_GAIN_SHIFT, (1<<MAX98371_GAIN_WIDTH)-1, 0,
0162             max98371_gain_tlv),
0163     SOC_SINGLE_TLV("Digital Volume", MAX98371_DIGITAL_GAIN, 0,
0164             (1<<MAX98371_DIGITAL_GAIN_WIDTH)-1, 1, digital_tlv),
0165     SOC_SINGLE_TLV("Speaker DHT Max Volume", MAX98371_GAIN,
0166             0, (1<<MAX98371_DHT_MAX_WIDTH)-1, 0,
0167             max98371_dht_max_gain),
0168     SOC_SINGLE_TLV("Speaker DHT Min Volume", MAX98371_DHT_GAIN,
0169             0, (1<<MAX98371_DHT_GAIN_WIDTH)-1, 0,
0170             max98371_dht_min_gain),
0171     SOC_SINGLE_TLV("Speaker DHT Rotation Volume", MAX98371_DHT_GAIN,
0172             0, (1<<MAX98371_DHT_ROT_WIDTH)-1, 0,
0173             max98371_dht_rot_gain),
0174     SOC_SINGLE("DHT Attack Step", MAX98371_DHT, MAX98371_DHT_STEP, 3, 0),
0175     SOC_SINGLE("DHT Attack Rate", MAX98371_DHT, 0, 7, 0),
0176     SOC_ENUM("Monomix Select", max98371_monomix),
0177     SOC_ENUM("HPF Cutoff", max98371_hpf_cutoff),
0178 };
0179
0180 static int max98371_dai_set_fmt(struct snd_soc_dai *codec_dai,
0181         unsigned int fmt)
0182 {
0183     struct snd_soc_component *component = codec_dai->component;
0184     struct max98371_priv *max98371 = snd_soc_component_get_drvdata(component);
0185     unsigned int val = 0;
0186
0187     switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
0188     case SND_SOC_DAIFMT_CBC_CFC:
0189         break;
0190     default:
0191         dev_err(component->dev, "DAI clock mode unsupported");
0192         return -EINVAL;
0193     }
0194
0195     switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
0196     case SND_SOC_DAIFMT_I2S:
0197         val |= 0;
0198         break;
0199     case SND_SOC_DAIFMT_RIGHT_J:
0200         val |= MAX98371_DAI_RIGHT;
0201         break;
0202     case SND_SOC_DAIFMT_LEFT_J:
0203         val |= MAX98371_DAI_LEFT;
0204         break;
0205     default:
0206         dev_err(component->dev, "DAI wrong mode unsupported");
0207         return -EINVAL;
0208     }
0209     regmap_update_bits(max98371->regmap, MAX98371_FMT,
0210             MAX98371_FMT_MODE_MASK, val);
0211     return 0;
0212 }
0213
0214 static int max98371_dai_hw_params(struct snd_pcm_substream *substream,
0215         struct snd_pcm_hw_params *params,
0216         struct snd_soc_dai *dai)
0217 {
0218     struct snd_soc_component *component = dai->component;
0219     struct max98371_priv *max98371 = snd_soc_component_get_drvdata(component);
0220     int blr_clk_ratio, ch_size, channels = params_channels(params);
0221     int rate = params_rate(params);
0222
0223     switch (params_format(params)) {
0224     case SNDRV_PCM_FORMAT_S8:
0225         regmap_update_bits(max98371->regmap, MAX98371_FMT,
0226                 MAX98371_FMT_MASK, MAX98371_DAI_CHANSZ_16);
0227         ch_size = 8;
0228         break;
0229     case SNDRV_PCM_FORMAT_S16_LE:
0230         regmap_update_bits(max98371->regmap, MAX98371_FMT,
0231                 MAX98371_FMT_MASK, MAX98371_DAI_CHANSZ_16);
0232         ch_size = 16;
0233         break;
0234     case SNDRV_PCM_FORMAT_S24_LE:
0235         regmap_update_bits(max98371->regmap, MAX98371_FMT,
0236                 MAX98371_FMT_MASK, MAX98371_DAI_CHANSZ_32);
0237         ch_size = 24;
0238         break;
0239     case SNDRV_PCM_FORMAT_S32_LE:
0240         regmap_update_bits(max98371->regmap, MAX98371_FMT,
0241                 MAX98371_FMT_MASK, MAX98371_DAI_CHANSZ_32);
0242         ch_size = 32;
0243         break;
0244     default:
0245         return -EINVAL;
0246     }
0247
0248     /* BCLK/LRCLK ratio calculation */
0249     blr_clk_ratio = channels * ch_size;
0250     switch (blr_clk_ratio) {
0251     case 32:
0252         regmap_update_bits(max98371->regmap,
0253             MAX98371_DAI_CLK,
0254             MAX98371_DAI_BSEL_MASK, MAX98371_DAI_BSEL_32);
0255         break;
0256     case 48:
0257         regmap_update_bits(max98371->regmap,
0258             MAX98371_DAI_CLK,
0259             MAX98371_DAI_BSEL_MASK, MAX98371_DAI_BSEL_48);
0260         break;
0261     case 64:
0262         regmap_update_bits(max98371->regmap,
0263             MAX98371_DAI_CLK,
0264             MAX98371_DAI_BSEL_MASK, MAX98371_DAI_BSEL_64);
0265         break;
0266     default:
0267         return -EINVAL;
0268     }
0269
0270     switch (rate) {
0271     case 32000:
0272         regmap_update_bits(max98371->regmap,
0273             MAX98371_SPK_SR,
0274             MAX98371_SPK_SR_MASK, MAX98371_SPK_SR_32);
0275         break;
0276     case 44100:
0277         regmap_update_bits(max98371->regmap,
0278             MAX98371_SPK_SR,
0279             MAX98371_SPK_SR_MASK, MAX98371_SPK_SR_44);
0280         break;
0281     case 48000:
0282         regmap_update_bits(max98371->regmap,
0283             MAX98371_SPK_SR,
0284             MAX98371_SPK_SR_MASK, MAX98371_SPK_SR_48);
0285         break;
0286     case 88200:
0287         regmap_update_bits(max98371->regmap,
0288             MAX98371_SPK_SR,
0289             MAX98371_SPK_SR_MASK, MAX98371_SPK_SR_88);
0290         break;
0291     case 96000:
0292         regmap_update_bits(max98371->regmap,
0293             MAX98371_SPK_SR,
0294             MAX98371_SPK_SR_MASK, MAX98371_SPK_SR_96);
0295         break;
0296     default:
0297         return -EINVAL;
0298     }
0299
0300     /* enabling both the RX channels*/
0301     regmap_update_bits(max98371->regmap, MAX98371_MONOMIX_SRC,
0302             MAX98371_MONOMIX_SRC_MASK, MONOMIX_RX_0_1);
0303     regmap_update_bits(max98371->regmap, MAX98371_DAI_CHANNEL,
0304             MAX98371_CHANNEL_MASK, MAX98371_CHANNEL_MASK);
0305     return 0;
0306 }
0307
0308 static const struct snd_soc_dapm_widget max98371_dapm_widgets[] = {
0309     SND_SOC_DAPM_DAC("DAC", NULL, MAX98371_SPK_ENABLE, 0, 0),
0310     SND_SOC_DAPM_SUPPLY("Global Enable", MAX98371_GLOBAL_ENABLE,
0311         0, 0, NULL, 0),
0312     SND_SOC_DAPM_OUTPUT("SPK_OUT"),
0313 };
0314
0315 static const struct snd_soc_dapm_route max98371_audio_map[] = {
0316     {"DAC", NULL, "HiFi Playback"},
0317     {"SPK_OUT", NULL, "DAC"},
0318     {"SPK_OUT", NULL, "Global Enable"},
0319 };
0320
0321 #define MAX98371_RATES SNDRV_PCM_RATE_8000_48000
0322 #define MAX98371_FORMATS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_BE | \
0323         SNDRV_PCM_FMTBIT_S24_BE | SNDRV_PCM_FMTBIT_S32_BE)
0324
0325 static const struct snd_soc_dai_ops max98371_dai_ops = {
0326     .set_fmt = max98371_dai_set_fmt,
0327     .hw_params = max98371_dai_hw_params,
0328 };
0329
0330 static struct snd_soc_dai_driver max98371_dai[] = {
0331     {
0332         .name = "max98371-aif1",
0333         .playback = {
0334             .stream_name = "HiFi Playback",
0335             .channels_min = 1,
0336             .channels_max = 2,
0337             .rates = SNDRV_PCM_RATE_8000_48000,
0338             .formats = MAX98371_FORMATS,
0339         },
0340         .ops = &max98371_dai_ops,
0341     }
0342 };
0343
0344 static const struct snd_soc_component_driver max98371_component = {
0345     .controls       = max98371_snd_controls,
0346     .num_controls       = ARRAY_SIZE(max98371_snd_controls),
0347     .dapm_routes        = max98371_audio_map,
0348     .num_dapm_routes    = ARRAY_SIZE(max98371_audio_map),
0349     .dapm_widgets       = max98371_dapm_widgets,
0350     .num_dapm_widgets   = ARRAY_SIZE(max98371_dapm_widgets),
0351     .idle_bias_on       = 1,
0352     .use_pmdown_time    = 1,
0353     .endianness     = 1,
0354 };
0355
0356 static const struct regmap_config max98371_regmap = {
0357     .reg_bits         = 8,
0358     .val_bits         = 8,
0359     .max_register     = MAX98371_VERSION,
0360     .reg_defaults     = max98371_reg,
0361     .num_reg_defaults = ARRAY_SIZE(max98371_reg),
0362     .volatile_reg     = max98371_volatile_register,
0363     .readable_reg     = max98371_readable_register,
0364     .cache_type       = REGCACHE_RBTREE,
0365 };
0366
0367 static int max98371_i2c_probe(struct i2c_client *i2c)
0368 {
0369     struct max98371_priv *max98371;
0370     int ret, reg;
0371
0372     max98371 = devm_kzalloc(&i2c->dev,
0373             sizeof(*max98371), GFP_KERNEL);
0374     if (!max98371)
0375         return -ENOMEM;
0376
0377     i2c_set_clientdata(i2c, max98371);
0378     max98371->regmap = devm_regmap_init_i2c(i2c, &max98371_regmap);
0379     if (IS_ERR(max98371->regmap)) {
0380         ret = PTR_ERR(max98371->regmap);
0381         dev_err(&i2c->dev,
0382                 "Failed to allocate regmap: %d\n", ret);
0383         return ret;
0384     }
0385
0386     ret = regmap_read(max98371->regmap, MAX98371_VERSION, &reg);
0387     if (ret < 0) {
0388         dev_info(&i2c->dev, "device error %d\n", ret);
0389         return ret;
0390     }
0391     dev_info(&i2c->dev, "device version %x\n", reg);
0392
0393     ret = devm_snd_soc_register_component(&i2c->dev, &max98371_component,
0394             max98371_dai, ARRAY_SIZE(max98371_dai));
0395     if (ret < 0) {
0396         dev_err(&i2c->dev, "Failed to register component: %d\n", ret);
0397         return ret;
0398     }
0399     return ret;
0400 }
0401
0402 static const struct i2c_device_id max98371_i2c_id[] = {
0403     { "max98371", 0 },
0404     { }
0405 };
0406
0407 MODULE_DEVICE_TABLE(i2c, max98371_i2c_id);
0408
0409 #ifdef CONFIG_OF
0410 static const struct of_device_id max98371_of_match[] = {
0411     { .compatible = "maxim,max98371", },
0412     { }
0413 };
0414 MODULE_DEVICE_TABLE(of, max98371_of_match);
0415 #endif
0416
0417 static struct i2c_driver max98371_i2c_driver = {
0418     .driver = {
0419         .name = "max98371",
0420         .of_match_table = of_match_ptr(max98371_of_match),
0421     },
0422     .probe_new  = max98371_i2c_probe,
0423     .id_table = max98371_i2c_id,
0424 };
0425
0426 module_i2c_driver(max98371_i2c_driver);
0427
0428 MODULE_AUTHOR("anish kumar <yesanishhere@gmail.com>");
0429 MODULE_DESCRIPTION("ALSA SoC MAX98371 driver");
0430 MODULE_LICENSE("GPL");