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OSCL-LXR
 
 

     

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * lm49453.c  -  LM49453 ALSA Soc Audio driver
0004  *
0005  * Copyright (c) 2012 Texas Instruments, Inc
0006  *
0007  * Initially based on sound/soc/codecs/wm8350.c
0008  */
0009 
0010 #include <linux/module.h>
0011 #include <linux/moduleparam.h>
0012 #include <linux/kernel.h>
0013 #include <linux/init.h>
0014 #include <linux/delay.h>
0015 #include <linux/pm.h>
0016 #include <linux/i2c.h>
0017 #include <linux/regmap.h>
0018 #include <linux/slab.h>
0019 #include <sound/core.h>
0020 #include <sound/pcm.h>
0021 #include <sound/pcm_params.h>
0022 #include <sound/soc.h>
0023 #include <sound/soc-dapm.h>
0024 #include <sound/tlv.h>
0025 #include <sound/jack.h>
0026 #include <sound/initval.h>
0027 #include <asm/div64.h>
0028 #include "lm49453.h"
0029 
0030 static const struct reg_default lm49453_reg_defs[] = {
0031     { 0, 0x00 },
0032     { 1, 0x00 },
0033     { 2, 0x00 },
0034     { 3, 0x00 },
0035     { 4, 0x00 },
0036     { 5, 0x00 },
0037     { 6, 0x00 },
0038     { 7, 0x00 },
0039     { 8, 0x00 },
0040     { 9, 0x00 },
0041     { 10, 0x00 },
0042     { 11, 0x00 },
0043     { 12, 0x00 },
0044     { 13, 0x00 },
0045     { 14, 0x00 },
0046     { 15, 0x00 },
0047     { 16, 0x00 },
0048     { 17, 0x00 },
0049     { 18, 0x00 },
0050     { 19, 0x00 },
0051     { 20, 0x00 },
0052     { 21, 0x00 },
0053     { 22, 0x00 },
0054     { 23, 0x00 },
0055     { 32, 0x00 },
0056     { 33, 0x00 },
0057     { 35, 0x00 },
0058     { 36, 0x00 },
0059     { 37, 0x00 },
0060     { 46, 0x00 },
0061     { 48, 0x00 },
0062     { 49, 0x00 },
0063     { 51, 0x00 },
0064     { 56, 0x00 },
0065     { 58, 0x00 },
0066     { 59, 0x00 },
0067     { 60, 0x00 },
0068     { 61, 0x00 },
0069     { 62, 0x00 },
0070     { 63, 0x00 },
0071     { 64, 0x00 },
0072     { 65, 0x00 },
0073     { 66, 0x00 },
0074     { 67, 0x00 },
0075     { 68, 0x00 },
0076     { 69, 0x00 },
0077     { 70, 0x00 },
0078     { 71, 0x00 },
0079     { 72, 0x00 },
0080     { 73, 0x00 },
0081     { 74, 0x00 },
0082     { 75, 0x00 },
0083     { 76, 0x00 },
0084     { 77, 0x00 },
0085     { 78, 0x00 },
0086     { 79, 0x00 },
0087     { 80, 0x00 },
0088     { 81, 0x00 },
0089     { 82, 0x00 },
0090     { 83, 0x00 },
0091     { 85, 0x00 },
0092     { 85, 0x00 },
0093     { 86, 0x00 },
0094     { 87, 0x00 },
0095     { 88, 0x00 },
0096     { 89, 0x00 },
0097     { 90, 0x00 },
0098     { 91, 0x00 },
0099     { 92, 0x00 },
0100     { 93, 0x00 },
0101     { 94, 0x00 },
0102     { 95, 0x00 },
0103     { 96, 0x01 },
0104     { 97, 0x00 },
0105     { 98, 0x00 },
0106     { 99, 0x00 },
0107     { 100, 0x00 },
0108     { 101, 0x00 },
0109     { 102, 0x00 },
0110     { 103, 0x01 },
0111     { 104, 0x01 },
0112     { 105, 0x00 },
0113     { 106, 0x01 },
0114     { 107, 0x00 },
0115     { 108, 0x00 },
0116     { 109, 0x00 },
0117     { 110, 0x00 },
0118     { 111, 0x02 },
0119     { 112, 0x02 },
0120     { 113, 0x00 },
0121     { 121, 0x80 },
0122     { 122, 0xBB },
0123     { 123, 0x80 },
0124     { 124, 0xBB },
0125     { 128, 0x00 },
0126     { 130, 0x00 },
0127     { 131, 0x00 },
0128     { 132, 0x00 },
0129     { 133, 0x0A },
0130     { 134, 0x0A },
0131     { 135, 0x0A },
0132     { 136, 0x0F },
0133     { 137, 0x00 },
0134     { 138, 0x73 },
0135     { 139, 0x33 },
0136     { 140, 0x73 },
0137     { 141, 0x33 },
0138     { 142, 0x73 },
0139     { 143, 0x33 },
0140     { 144, 0x73 },
0141     { 145, 0x33 },
0142     { 146, 0x73 },
0143     { 147, 0x33 },
0144     { 148, 0x73 },
0145     { 149, 0x33 },
0146     { 150, 0x73 },
0147     { 151, 0x33 },
0148     { 152, 0x00 },
0149     { 153, 0x00 },
0150     { 154, 0x00 },
0151     { 155, 0x00 },
0152     { 176, 0x00 },
0153     { 177, 0x00 },
0154     { 178, 0x00 },
0155     { 179, 0x00 },
0156     { 180, 0x00 },
0157     { 181, 0x00 },
0158     { 182, 0x00 },
0159     { 183, 0x00 },
0160     { 184, 0x00 },
0161     { 185, 0x00 },
0162     { 186, 0x00 },
0163     { 187, 0x00 },
0164     { 188, 0x00 },
0165     { 189, 0x00 },
0166     { 208, 0x06 },
0167     { 209, 0x00 },
0168     { 210, 0x08 },
0169     { 211, 0x54 },
0170     { 212, 0x14 },
0171     { 213, 0x0d },
0172     { 214, 0x0d },
0173     { 215, 0x14 },
0174     { 216, 0x60 },
0175     { 221, 0x00 },
0176     { 222, 0x00 },
0177     { 223, 0x00 },
0178     { 224, 0x00 },
0179     { 248, 0x00 },
0180     { 249, 0x00 },
0181     { 250, 0x00 },
0182     { 255, 0x00 },
0183 };
0184 
0185 /* codec private data */
0186 struct lm49453_priv {
0187     struct regmap *regmap;
0188 };
0189 
0190 /* capture path controls */
0191 
0192 static const char *lm49453_mic2mode_text[] = {"Single Ended", "Differential"};
0193 
0194 static SOC_ENUM_SINGLE_DECL(lm49453_mic2mode_enum, LM49453_P0_MICR_REG, 5,
0195                 lm49453_mic2mode_text);
0196 
0197 static const char *lm49453_dmic_cfg_text[] = {"DMICDAT1", "DMICDAT2"};
0198 
0199 static SOC_ENUM_SINGLE_DECL(lm49453_dmic12_cfg_enum,
0200                 LM49453_P0_DIGITAL_MIC1_CONFIG_REG, 7,
0201                 lm49453_dmic_cfg_text);
0202 
0203 static SOC_ENUM_SINGLE_DECL(lm49453_dmic34_cfg_enum,
0204                 LM49453_P0_DIGITAL_MIC2_CONFIG_REG, 7,
0205                 lm49453_dmic_cfg_text);
0206 
0207 /* MUX Controls */
0208 static const char *lm49453_adcl_mux_text[] = { "MIC1", "Aux_L" };
0209 
0210 static const char *lm49453_adcr_mux_text[] = { "MIC2", "Aux_R" };
0211 
0212 static SOC_ENUM_SINGLE_DECL(lm49453_adcl_enum,
0213                 LM49453_P0_ANALOG_MIXER_ADC_REG, 0,
0214                 lm49453_adcl_mux_text);
0215 
0216 static SOC_ENUM_SINGLE_DECL(lm49453_adcr_enum,
0217                 LM49453_P0_ANALOG_MIXER_ADC_REG, 1,
0218                 lm49453_adcr_mux_text);
0219 
0220 static const struct snd_kcontrol_new lm49453_adcl_mux_control =
0221     SOC_DAPM_ENUM("ADC Left Mux", lm49453_adcl_enum);
0222 
0223 static const struct snd_kcontrol_new lm49453_adcr_mux_control =
0224     SOC_DAPM_ENUM("ADC Right Mux", lm49453_adcr_enum);
0225 
0226 static const struct snd_kcontrol_new lm49453_headset_left_mixer[] = {
0227 SOC_DAPM_SINGLE("Port1_1 Switch", LM49453_P0_DACHPL1_REG, 0, 1, 0),
0228 SOC_DAPM_SINGLE("Port1_2 Switch", LM49453_P0_DACHPL1_REG, 1, 1, 0),
0229 SOC_DAPM_SINGLE("Port1_3 Switch", LM49453_P0_DACHPL1_REG, 2, 1, 0),
0230 SOC_DAPM_SINGLE("Port1_4 Switch", LM49453_P0_DACHPL1_REG, 3, 1, 0),
0231 SOC_DAPM_SINGLE("Port1_5 Switch", LM49453_P0_DACHPL1_REG, 4, 1, 0),
0232 SOC_DAPM_SINGLE("Port1_6 Switch", LM49453_P0_DACHPL1_REG, 5, 1, 0),
0233 SOC_DAPM_SINGLE("Port1_7 Switch", LM49453_P0_DACHPL1_REG, 6, 1, 0),
0234 SOC_DAPM_SINGLE("Port1_8 Switch", LM49453_P0_DACHPL1_REG, 7, 1, 0),
0235 SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_DACHPL2_REG, 0, 1, 0),
0236 SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_DACHPL2_REG, 1, 1, 0),
0237 SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_DACHPL2_REG, 2, 1, 0),
0238 SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_DACHPL2_REG, 3, 1, 0),
0239 SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_DACHPL2_REG, 4, 1, 0),
0240 SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_DACHPL2_REG, 5, 1, 0),
0241 SOC_DAPM_SINGLE("Port2_1 Switch", LM49453_P0_DACHPL2_REG, 6, 1, 0),
0242 SOC_DAPM_SINGLE("Port2_2 Switch", LM49453_P0_DACHPL2_REG, 7, 1, 0),
0243 SOC_DAPM_SINGLE("Sidetone Switch", LM49453_P0_STN_SEL_REG, 0, 0, 0),
0244 };
0245 
0246 static const struct snd_kcontrol_new lm49453_headset_right_mixer[] = {
0247 SOC_DAPM_SINGLE("Port1_1 Switch", LM49453_P0_DACHPR1_REG, 0, 1, 0),
0248 SOC_DAPM_SINGLE("Port1_2 Switch", LM49453_P0_DACHPR1_REG, 1, 1, 0),
0249 SOC_DAPM_SINGLE("Port1_3 Switch", LM49453_P0_DACHPR1_REG, 2, 1, 0),
0250 SOC_DAPM_SINGLE("Port1_4 Switch", LM49453_P0_DACHPR1_REG, 3, 1, 0),
0251 SOC_DAPM_SINGLE("Port1_5 Switch", LM49453_P0_DACHPR1_REG, 4, 1, 0),
0252 SOC_DAPM_SINGLE("Port1_6 Switch", LM49453_P0_DACHPR1_REG, 5, 1, 0),
0253 SOC_DAPM_SINGLE("Port1_7 Switch", LM49453_P0_DACHPR1_REG, 6, 1, 0),
0254 SOC_DAPM_SINGLE("Port1_8 Switch", LM49453_P0_DACHPR1_REG, 7, 1, 0),
0255 SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_DACHPR2_REG, 0, 1, 0),
0256 SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_DACHPR2_REG, 1, 1, 0),
0257 SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_DACHPR2_REG, 2, 1, 0),
0258 SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_DACHPR2_REG, 3, 1, 0),
0259 SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_DACHPR2_REG, 4, 1, 0),
0260 SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_DACHPR2_REG, 5, 1, 0),
0261 SOC_DAPM_SINGLE("Port2_1 Switch", LM49453_P0_DACHPR2_REG, 6, 1, 0),
0262 SOC_DAPM_SINGLE("Port2_2 Switch", LM49453_P0_DACHPR2_REG, 7, 1, 0),
0263 SOC_DAPM_SINGLE("Sidetone Switch", LM49453_P0_STN_SEL_REG, 1, 0, 0),
0264 };
0265 
0266 static const struct snd_kcontrol_new lm49453_speaker_left_mixer[] = {
0267 SOC_DAPM_SINGLE("Port1_1 Switch", LM49453_P0_DACLSL1_REG, 0, 1, 0),
0268 SOC_DAPM_SINGLE("Port1_2 Switch", LM49453_P0_DACLSL1_REG, 1, 1, 0),
0269 SOC_DAPM_SINGLE("Port1_3 Switch", LM49453_P0_DACLSL1_REG, 2, 1, 0),
0270 SOC_DAPM_SINGLE("Port1_4 Switch", LM49453_P0_DACLSL1_REG, 3, 1, 0),
0271 SOC_DAPM_SINGLE("Port1_5 Switch", LM49453_P0_DACLSL1_REG, 4, 1, 0),
0272 SOC_DAPM_SINGLE("Port1_6 Switch", LM49453_P0_DACLSL1_REG, 5, 1, 0),
0273 SOC_DAPM_SINGLE("Port1_7 Switch", LM49453_P0_DACLSL1_REG, 6, 1, 0),
0274 SOC_DAPM_SINGLE("Port1_8 Switch", LM49453_P0_DACLSL1_REG, 7, 1, 0),
0275 SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_DACLSL2_REG, 0, 1, 0),
0276 SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_DACLSL2_REG, 1, 1, 0),
0277 SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_DACLSL2_REG, 2, 1, 0),
0278 SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_DACLSL2_REG, 3, 1, 0),
0279 SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_DACLSL2_REG, 4, 1, 0),
0280 SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_DACLSL2_REG, 5, 1, 0),
0281 SOC_DAPM_SINGLE("Port2_1 Switch", LM49453_P0_DACLSL2_REG, 6, 1, 0),
0282 SOC_DAPM_SINGLE("Port2_2 Switch", LM49453_P0_DACLSL2_REG, 7, 1, 0),
0283 SOC_DAPM_SINGLE("Sidetone Switch", LM49453_P0_STN_SEL_REG, 2, 0, 0),
0284 };
0285 
0286 static const struct snd_kcontrol_new lm49453_speaker_right_mixer[] = {
0287 SOC_DAPM_SINGLE("Port1_1 Switch", LM49453_P0_DACLSR1_REG, 0, 1, 0),
0288 SOC_DAPM_SINGLE("Port1_2 Switch", LM49453_P0_DACLSR1_REG, 1, 1, 0),
0289 SOC_DAPM_SINGLE("Port1_3 Switch", LM49453_P0_DACLSR1_REG, 2, 1, 0),
0290 SOC_DAPM_SINGLE("Port1_4 Switch", LM49453_P0_DACLSR1_REG, 3, 1, 0),
0291 SOC_DAPM_SINGLE("Port1_5 Switch", LM49453_P0_DACLSR1_REG, 4, 1, 0),
0292 SOC_DAPM_SINGLE("Port1_6 Switch", LM49453_P0_DACLSR1_REG, 5, 1, 0),
0293 SOC_DAPM_SINGLE("Port1_7 Switch", LM49453_P0_DACLSR1_REG, 6, 1, 0),
0294 SOC_DAPM_SINGLE("Port1_8 Switch", LM49453_P0_DACLSR1_REG, 7, 1, 0),
0295 SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_DACLSR2_REG, 0, 1, 0),
0296 SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_DACLSR2_REG, 1, 1, 0),
0297 SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_DACLSR2_REG, 2, 1, 0),
0298 SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_DACLSR2_REG, 3, 1, 0),
0299 SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_DACLSR2_REG, 4, 1, 0),
0300 SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_DACLSR2_REG, 5, 1, 0),
0301 SOC_DAPM_SINGLE("Port2_1 Switch", LM49453_P0_DACLSR2_REG, 6, 1, 0),
0302 SOC_DAPM_SINGLE("Port2_2 Switch", LM49453_P0_DACLSR2_REG, 7, 1, 0),
0303 SOC_DAPM_SINGLE("Sidetone Switch", LM49453_P0_STN_SEL_REG, 3, 0, 0),
0304 };
0305 
0306 static const struct snd_kcontrol_new lm49453_haptic_left_mixer[] = {
0307 SOC_DAPM_SINGLE("Port1_1 Switch", LM49453_P0_DACHAL1_REG, 0, 1, 0),
0308 SOC_DAPM_SINGLE("Port1_2 Switch", LM49453_P0_DACHAL1_REG, 1, 1, 0),
0309 SOC_DAPM_SINGLE("Port1_3 Switch", LM49453_P0_DACHAL1_REG, 2, 1, 0),
0310 SOC_DAPM_SINGLE("Port1_4 Switch", LM49453_P0_DACHAL1_REG, 3, 1, 0),
0311 SOC_DAPM_SINGLE("Port1_5 Switch", LM49453_P0_DACHAL1_REG, 4, 1, 0),
0312 SOC_DAPM_SINGLE("Port1_6 Switch", LM49453_P0_DACHAL1_REG, 5, 1, 0),
0313 SOC_DAPM_SINGLE("Port1_7 Switch", LM49453_P0_DACHAL1_REG, 6, 1, 0),
0314 SOC_DAPM_SINGLE("Port1_8 Switch", LM49453_P0_DACHAL1_REG, 7, 1, 0),
0315 SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_DACHAL2_REG, 0, 1, 0),
0316 SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_DACHAL2_REG, 1, 1, 0),
0317 SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_DACHAL2_REG, 2, 1, 0),
0318 SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_DACHAL2_REG, 3, 1, 0),
0319 SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_DACHAL2_REG, 4, 1, 0),
0320 SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_DACHAL2_REG, 5, 1, 0),
0321 SOC_DAPM_SINGLE("Port2_1 Switch", LM49453_P0_DACHAL2_REG, 6, 1, 0),
0322 SOC_DAPM_SINGLE("Port2_2 Switch", LM49453_P0_DACHAL2_REG, 7, 1, 0),
0323 SOC_DAPM_SINGLE("Sidetone Switch", LM49453_P0_STN_SEL_REG, 4, 0, 0),
0324 };
0325 
0326 static const struct snd_kcontrol_new lm49453_haptic_right_mixer[] = {
0327 SOC_DAPM_SINGLE("Port1_1 Switch", LM49453_P0_DACHAR1_REG, 0, 1, 0),
0328 SOC_DAPM_SINGLE("Port1_2 Switch", LM49453_P0_DACHAR1_REG, 1, 1, 0),
0329 SOC_DAPM_SINGLE("Port1_3 Switch", LM49453_P0_DACHAR1_REG, 2, 1, 0),
0330 SOC_DAPM_SINGLE("Port1_4 Switch", LM49453_P0_DACHAR1_REG, 3, 1, 0),
0331 SOC_DAPM_SINGLE("Port1_5 Switch", LM49453_P0_DACHAR1_REG, 4, 1, 0),
0332 SOC_DAPM_SINGLE("Port1_6 Switch", LM49453_P0_DACHAR1_REG, 5, 1, 0),
0333 SOC_DAPM_SINGLE("Port1_7 Switch", LM49453_P0_DACHAR1_REG, 6, 1, 0),
0334 SOC_DAPM_SINGLE("Port1_8 Switch", LM49453_P0_DACHAR1_REG, 7, 1, 0),
0335 SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_DACHAR2_REG, 0, 1, 0),
0336 SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_DACHAR2_REG, 1, 1, 0),
0337 SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_DACHAR2_REG, 2, 1, 0),
0338 SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_DACHAR2_REG, 3, 1, 0),
0339 SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_DACHAR2_REG, 4, 1, 0),
0340 SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_DACHAR2_REG, 5, 1, 0),
0341 SOC_DAPM_SINGLE("Port2_1 Switch", LM49453_P0_DACHAR2_REG, 6, 1, 0),
0342 SOC_DAPM_SINGLE("Port2_2 Switch", LM49453_P0_DACHAR2_REG, 7, 1, 0),
0343 SOC_DAPM_SINGLE("Sidetone Switch", LM49453_P0_STN_SEL_REG, 5, 0, 0),
0344 };
0345 
0346 static const struct snd_kcontrol_new lm49453_lineout_left_mixer[] = {
0347 SOC_DAPM_SINGLE("Port1_1 Switch", LM49453_P0_DACLOL1_REG, 0, 1, 0),
0348 SOC_DAPM_SINGLE("Port1_2 Switch", LM49453_P0_DACLOL1_REG, 1, 1, 0),
0349 SOC_DAPM_SINGLE("Port1_3 Switch", LM49453_P0_DACLOL1_REG, 2, 1, 0),
0350 SOC_DAPM_SINGLE("Port1_4 Switch", LM49453_P0_DACLOL1_REG, 3, 1, 0),
0351 SOC_DAPM_SINGLE("Port1_5 Switch", LM49453_P0_DACLOL1_REG, 4, 1, 0),
0352 SOC_DAPM_SINGLE("Port1_6 Switch", LM49453_P0_DACLOL1_REG, 5, 1, 0),
0353 SOC_DAPM_SINGLE("Port1_7 Switch", LM49453_P0_DACLOL1_REG, 6, 1, 0),
0354 SOC_DAPM_SINGLE("Port1_8 Switch", LM49453_P0_DACLOL1_REG, 7, 1, 0),
0355 SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_DACLOL2_REG, 0, 1, 0),
0356 SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_DACLOL2_REG, 1, 1, 0),
0357 SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_DACLOL2_REG, 2, 1, 0),
0358 SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_DACLOL2_REG, 3, 1, 0),
0359 SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_DACLOL2_REG, 4, 1, 0),
0360 SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_DACLOL2_REG, 5, 1, 0),
0361 SOC_DAPM_SINGLE("Port2_1 Switch", LM49453_P0_DACLOL2_REG, 6, 1, 0),
0362 SOC_DAPM_SINGLE("Port2_2 Switch", LM49453_P0_DACLOL2_REG, 7, 1, 0),
0363 SOC_DAPM_SINGLE("Sidetone Switch", LM49453_P0_STN_SEL_REG, 6, 0, 0),
0364 };
0365 
0366 static const struct snd_kcontrol_new lm49453_lineout_right_mixer[] = {
0367 SOC_DAPM_SINGLE("Port1_1 Switch", LM49453_P0_DACLOR1_REG, 0, 1, 0),
0368 SOC_DAPM_SINGLE("Port1_2 Switch", LM49453_P0_DACLOR1_REG, 1, 1, 0),
0369 SOC_DAPM_SINGLE("Port1_3 Switch", LM49453_P0_DACLOR1_REG, 2, 1, 0),
0370 SOC_DAPM_SINGLE("Port1_4 Switch", LM49453_P0_DACLOR1_REG, 3, 1, 0),
0371 SOC_DAPM_SINGLE("Port1_5 Switch", LM49453_P0_DACLOR1_REG, 4, 1, 0),
0372 SOC_DAPM_SINGLE("Port1_6 Switch", LM49453_P0_DACLOR1_REG, 5, 1, 0),
0373 SOC_DAPM_SINGLE("Port1_7 Switch", LM49453_P0_DACLOR1_REG, 6, 1, 0),
0374 SOC_DAPM_SINGLE("Port1_8 Switch", LM49453_P0_DACLOR1_REG, 7, 1, 0),
0375 SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_DACLOR2_REG, 0, 1, 0),
0376 SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_DACLOR2_REG, 1, 1, 0),
0377 SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_DACLOR2_REG, 2, 1, 0),
0378 SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_DACLOR2_REG, 3, 1, 0),
0379 SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_DACLOR2_REG, 4, 1, 0),
0380 SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_DACLOR2_REG, 5, 1, 0),
0381 SOC_DAPM_SINGLE("Port2_1 Switch", LM49453_P0_DACLOR2_REG, 6, 1, 0),
0382 SOC_DAPM_SINGLE("Port2_2 Switch", LM49453_P0_DACLOR2_REG, 7, 1, 0),
0383 SOC_DAPM_SINGLE("Sidetone Switch", LM49453_P0_STN_SEL_REG, 7, 0, 0),
0384 };
0385 
0386 static const struct snd_kcontrol_new lm49453_port1_tx1_mixer[] = {
0387 SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_PORT1_TX1_REG, 0, 1, 0),
0388 SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_PORT1_TX1_REG, 1, 1, 0),
0389 SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_PORT1_TX1_REG, 2, 1, 0),
0390 SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_PORT1_TX1_REG, 3, 1, 0),
0391 SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_PORT1_TX1_REG, 4, 1, 0),
0392 SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_PORT1_TX1_REG, 5, 1, 0),
0393 SOC_DAPM_SINGLE("Port1_1 Switch", LM49453_P0_PORT1_TX1_REG, 6, 1, 0),
0394 SOC_DAPM_SINGLE("Port2_1 Switch", LM49453_P0_PORT1_TX1_REG, 7, 1, 0),
0395 };
0396 
0397 static const struct snd_kcontrol_new lm49453_port1_tx2_mixer[] = {
0398 SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_PORT1_TX2_REG, 0, 1, 0),
0399 SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_PORT1_TX2_REG, 1, 1, 0),
0400 SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_PORT1_TX2_REG, 2, 1, 0),
0401 SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_PORT1_TX2_REG, 3, 1, 0),
0402 SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_PORT1_TX2_REG, 4, 1, 0),
0403 SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_PORT1_TX2_REG, 5, 1, 0),
0404 SOC_DAPM_SINGLE("Port1_2 Switch", LM49453_P0_PORT1_TX2_REG, 6, 1, 0),
0405 SOC_DAPM_SINGLE("Port2_2 Switch", LM49453_P0_PORT1_TX2_REG, 7, 1, 0),
0406 };
0407 
0408 static const struct snd_kcontrol_new lm49453_port1_tx3_mixer[] = {
0409 SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_PORT1_TX3_REG, 0, 1, 0),
0410 SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_PORT1_TX3_REG, 1, 1, 0),
0411 SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_PORT1_TX3_REG, 2, 1, 0),
0412 SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_PORT1_TX3_REG, 3, 1, 0),
0413 SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_PORT1_TX3_REG, 4, 1, 0),
0414 SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_PORT1_TX3_REG, 5, 1, 0),
0415 SOC_DAPM_SINGLE("Port1_3 Switch", LM49453_P0_PORT1_TX3_REG, 6, 1, 0),
0416 };
0417 
0418 static const struct snd_kcontrol_new lm49453_port1_tx4_mixer[] = {
0419 SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_PORT1_TX4_REG, 0, 1, 0),
0420 SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_PORT1_TX4_REG, 1, 1, 0),
0421 SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_PORT1_TX4_REG, 2, 1, 0),
0422 SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_PORT1_TX4_REG, 3, 1, 0),
0423 SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_PORT1_TX4_REG, 4, 1, 0),
0424 SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_PORT1_TX4_REG, 5, 1, 0),
0425 SOC_DAPM_SINGLE("Port1_4 Switch", LM49453_P0_PORT1_TX4_REG, 6, 1, 0),
0426 };
0427 
0428 static const struct snd_kcontrol_new lm49453_port1_tx5_mixer[] = {
0429 SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_PORT1_TX5_REG, 0, 1, 0),
0430 SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_PORT1_TX5_REG, 1, 1, 0),
0431 SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_PORT1_TX5_REG, 2, 1, 0),
0432 SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_PORT1_TX5_REG, 3, 1, 0),
0433 SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_PORT1_TX5_REG, 4, 1, 0),
0434 SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_PORT1_TX5_REG, 5, 1, 0),
0435 SOC_DAPM_SINGLE("Port1_5 Switch", LM49453_P0_PORT1_TX5_REG, 6, 1, 0),
0436 };
0437 
0438 static const struct snd_kcontrol_new lm49453_port1_tx6_mixer[] = {
0439 SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_PORT1_TX6_REG, 0, 1, 0),
0440 SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_PORT1_TX6_REG, 1, 1, 0),
0441 SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_PORT1_TX6_REG, 2, 1, 0),
0442 SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_PORT1_TX6_REG, 3, 1, 0),
0443 SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_PORT1_TX6_REG, 4, 1, 0),
0444 SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_PORT1_TX6_REG, 5, 1, 0),
0445 SOC_DAPM_SINGLE("Port1_6 Switch", LM49453_P0_PORT1_TX6_REG, 6, 1, 0),
0446 };
0447 
0448 static const struct snd_kcontrol_new lm49453_port1_tx7_mixer[] = {
0449 SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_PORT1_TX7_REG, 0, 1, 0),
0450 SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_PORT1_TX7_REG, 1, 1, 0),
0451 SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_PORT1_TX7_REG, 2, 1, 0),
0452 SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_PORT1_TX7_REG, 3, 1, 0),
0453 SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_PORT1_TX7_REG, 4, 1, 0),
0454 SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_PORT1_TX7_REG, 5, 1, 0),
0455 SOC_DAPM_SINGLE("Port1_7 Switch", LM49453_P0_PORT1_TX7_REG, 6, 1, 0),
0456 };
0457 
0458 static const struct snd_kcontrol_new lm49453_port1_tx8_mixer[] = {
0459 SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_PORT1_TX8_REG, 0, 1, 0),
0460 SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_PORT1_TX8_REG, 1, 1, 0),
0461 SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_PORT1_TX8_REG, 2, 1, 0),
0462 SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_PORT1_TX8_REG, 3, 1, 0),
0463 SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_PORT1_TX8_REG, 4, 1, 0),
0464 SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_PORT1_TX8_REG, 5, 1, 0),
0465 SOC_DAPM_SINGLE("Port1_8 Switch", LM49453_P0_PORT1_TX8_REG, 6, 1, 0),
0466 };
0467 
0468 static const struct snd_kcontrol_new lm49453_port2_tx1_mixer[] = {
0469 SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_PORT2_TX1_REG, 0, 1, 0),
0470 SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_PORT2_TX1_REG, 1, 1, 0),
0471 SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_PORT2_TX1_REG, 2, 1, 0),
0472 SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_PORT2_TX1_REG, 3, 1, 0),
0473 SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_PORT2_TX1_REG, 4, 1, 0),
0474 SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_PORT2_TX1_REG, 5, 1, 0),
0475 SOC_DAPM_SINGLE("Port1_1 Switch", LM49453_P0_PORT2_TX1_REG, 6, 1, 0),
0476 SOC_DAPM_SINGLE("Port2_1 Switch", LM49453_P0_PORT2_TX1_REG, 7, 1, 0),
0477 };
0478 
0479 static const struct snd_kcontrol_new lm49453_port2_tx2_mixer[] = {
0480 SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_PORT2_TX2_REG, 0, 1, 0),
0481 SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_PORT2_TX2_REG, 1, 1, 0),
0482 SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_PORT2_TX2_REG, 2, 1, 0),
0483 SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_PORT2_TX2_REG, 3, 1, 0),
0484 SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_PORT2_TX2_REG, 4, 1, 0),
0485 SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_PORT2_TX2_REG, 5, 1, 0),
0486 SOC_DAPM_SINGLE("Port1_2 Switch", LM49453_P0_PORT2_TX2_REG, 6, 1, 0),
0487 SOC_DAPM_SINGLE("Port2_2 Switch", LM49453_P0_PORT2_TX2_REG, 7, 1, 0),
0488 };
0489 
0490 /* TLV Declarations */
0491 static const DECLARE_TLV_DB_SCALE(adc_dac_tlv, -7650, 150, 1);
0492 static const DECLARE_TLV_DB_SCALE(mic_tlv, 0, 200, 1);
0493 static const DECLARE_TLV_DB_SCALE(port_tlv, -1800, 600, 0);
0494 static const DECLARE_TLV_DB_SCALE(stn_tlv, -7200, 150, 0);
0495 
0496 static const struct snd_kcontrol_new lm49453_sidetone_mixer_controls[] = {
0497 /* Sidetone supports mono only */
0498 SOC_DAPM_SINGLE_TLV("Sidetone ADCL Volume", LM49453_P0_STN_VOL_ADCL_REG,
0499              0, 0x3F, 0, stn_tlv),
0500 SOC_DAPM_SINGLE_TLV("Sidetone ADCR Volume", LM49453_P0_STN_VOL_ADCR_REG,
0501              0, 0x3F, 0, stn_tlv),
0502 SOC_DAPM_SINGLE_TLV("Sidetone DMIC1L Volume", LM49453_P0_STN_VOL_DMIC1L_REG,
0503              0, 0x3F, 0, stn_tlv),
0504 SOC_DAPM_SINGLE_TLV("Sidetone DMIC1R Volume", LM49453_P0_STN_VOL_DMIC1R_REG,
0505              0, 0x3F, 0, stn_tlv),
0506 SOC_DAPM_SINGLE_TLV("Sidetone DMIC2L Volume", LM49453_P0_STN_VOL_DMIC2L_REG,
0507              0, 0x3F, 0, stn_tlv),
0508 SOC_DAPM_SINGLE_TLV("Sidetone DMIC2R Volume", LM49453_P0_STN_VOL_DMIC2R_REG,
0509              0, 0x3F, 0, stn_tlv),
0510 };
0511 
0512 static const struct snd_kcontrol_new lm49453_snd_controls[] = {
0513     /* mic1 and mic2 supports mono only */
0514     SOC_SINGLE_TLV("Mic1 Volume", LM49453_P0_MICL_REG, 0, 15, 0, mic_tlv),
0515     SOC_SINGLE_TLV("Mic2 Volume", LM49453_P0_MICR_REG, 0, 15, 0, mic_tlv),
0516 
0517     SOC_SINGLE_TLV("ADCL Volume", LM49453_P0_ADC_LEVELL_REG, 0, 63,
0518             0, adc_dac_tlv),
0519     SOC_SINGLE_TLV("ADCR Volume", LM49453_P0_ADC_LEVELR_REG, 0, 63,
0520             0, adc_dac_tlv),
0521 
0522     SOC_DOUBLE_R_TLV("DMIC1 Volume", LM49453_P0_DMIC1_LEVELL_REG,
0523               LM49453_P0_DMIC1_LEVELR_REG, 0, 63, 0, adc_dac_tlv),
0524     SOC_DOUBLE_R_TLV("DMIC2 Volume", LM49453_P0_DMIC2_LEVELL_REG,
0525               LM49453_P0_DMIC2_LEVELR_REG, 0, 63, 0, adc_dac_tlv),
0526 
0527     SOC_DAPM_ENUM("Mic2Mode", lm49453_mic2mode_enum),
0528     SOC_DAPM_ENUM("DMIC12 SRC", lm49453_dmic12_cfg_enum),
0529     SOC_DAPM_ENUM("DMIC34 SRC", lm49453_dmic34_cfg_enum),
0530 
0531     /* Capture path filter enable */
0532     SOC_SINGLE("DMIC1 HPFilter Switch", LM49453_P0_ADC_FX_ENABLES_REG,
0533                         0, 1, 0),
0534     SOC_SINGLE("DMIC2 HPFilter Switch", LM49453_P0_ADC_FX_ENABLES_REG,
0535                         1, 1, 0),
0536     SOC_SINGLE("ADC HPFilter Switch", LM49453_P0_ADC_FX_ENABLES_REG,
0537                       2, 1, 0),
0538 
0539     SOC_DOUBLE_R_TLV("DAC HP Volume", LM49453_P0_DAC_HP_LEVELL_REG,
0540               LM49453_P0_DAC_HP_LEVELR_REG, 0, 63, 0, adc_dac_tlv),
0541     SOC_DOUBLE_R_TLV("DAC LO Volume", LM49453_P0_DAC_LO_LEVELL_REG,
0542               LM49453_P0_DAC_LO_LEVELR_REG, 0, 63, 0, adc_dac_tlv),
0543     SOC_DOUBLE_R_TLV("DAC LS Volume", LM49453_P0_DAC_LS_LEVELL_REG,
0544               LM49453_P0_DAC_LS_LEVELR_REG, 0, 63, 0, adc_dac_tlv),
0545     SOC_DOUBLE_R_TLV("DAC HA Volume", LM49453_P0_DAC_HA_LEVELL_REG,
0546               LM49453_P0_DAC_HA_LEVELR_REG, 0, 63, 0, adc_dac_tlv),
0547 
0548     SOC_SINGLE_TLV("EP Volume", LM49453_P0_DAC_LS_LEVELL_REG,
0549             0, 63, 0, adc_dac_tlv),
0550 
0551     SOC_SINGLE_TLV("PORT1_1_RX_LVL Volume", LM49453_P0_PORT1_RX_LVL1_REG,
0552             0, 3, 0, port_tlv),
0553     SOC_SINGLE_TLV("PORT1_2_RX_LVL Volume", LM49453_P0_PORT1_RX_LVL1_REG,
0554             2, 3, 0, port_tlv),
0555     SOC_SINGLE_TLV("PORT1_3_RX_LVL Volume", LM49453_P0_PORT1_RX_LVL1_REG,
0556             4, 3, 0, port_tlv),
0557     SOC_SINGLE_TLV("PORT1_4_RX_LVL Volume", LM49453_P0_PORT1_RX_LVL1_REG,
0558             6, 3, 0, port_tlv),
0559     SOC_SINGLE_TLV("PORT1_5_RX_LVL Volume", LM49453_P0_PORT1_RX_LVL2_REG,
0560             0, 3, 0, port_tlv),
0561     SOC_SINGLE_TLV("PORT1_6_RX_LVL Volume", LM49453_P0_PORT1_RX_LVL2_REG,
0562             2, 3, 0, port_tlv),
0563     SOC_SINGLE_TLV("PORT1_7_RX_LVL Volume", LM49453_P0_PORT1_RX_LVL2_REG,
0564             4, 3, 0, port_tlv),
0565     SOC_SINGLE_TLV("PORT1_8_RX_LVL Volume", LM49453_P0_PORT1_RX_LVL2_REG,
0566             6, 3, 0, port_tlv),
0567 
0568     SOC_SINGLE_TLV("PORT2_1_RX_LVL Volume", LM49453_P0_PORT2_RX_LVL_REG,
0569             0, 3, 0, port_tlv),
0570     SOC_SINGLE_TLV("PORT2_2_RX_LVL Volume", LM49453_P0_PORT2_RX_LVL_REG,
0571             2, 3, 0, port_tlv),
0572 
0573     SOC_SINGLE("Port1 Playback Switch", LM49453_P0_AUDIO_PORT1_BASIC_REG,
0574             1, 1, 0),
0575     SOC_SINGLE("Port2 Playback Switch", LM49453_P0_AUDIO_PORT2_BASIC_REG,
0576             1, 1, 0),
0577     SOC_SINGLE("Port1 Capture Switch", LM49453_P0_AUDIO_PORT1_BASIC_REG,
0578             2, 1, 0),
0579     SOC_SINGLE("Port2 Capture Switch", LM49453_P0_AUDIO_PORT2_BASIC_REG,
0580             2, 1, 0)
0581 
0582 };
0583 
0584 /* DAPM widgets */
0585 static const struct snd_soc_dapm_widget lm49453_dapm_widgets[] = {
0586 
0587     /* All end points HP,EP, LS, Lineout and Haptic */
0588     SND_SOC_DAPM_OUTPUT("HPOUTL"),
0589     SND_SOC_DAPM_OUTPUT("HPOUTR"),
0590     SND_SOC_DAPM_OUTPUT("EPOUT"),
0591     SND_SOC_DAPM_OUTPUT("LSOUTL"),
0592     SND_SOC_DAPM_OUTPUT("LSOUTR"),
0593     SND_SOC_DAPM_OUTPUT("LOOUTR"),
0594     SND_SOC_DAPM_OUTPUT("LOOUTL"),
0595     SND_SOC_DAPM_OUTPUT("HAOUTL"),
0596     SND_SOC_DAPM_OUTPUT("HAOUTR"),
0597 
0598     SND_SOC_DAPM_INPUT("AMIC1"),
0599     SND_SOC_DAPM_INPUT("AMIC2"),
0600     SND_SOC_DAPM_INPUT("DMIC1DAT"),
0601     SND_SOC_DAPM_INPUT("DMIC2DAT"),
0602     SND_SOC_DAPM_INPUT("AUXL"),
0603     SND_SOC_DAPM_INPUT("AUXR"),
0604 
0605     SND_SOC_DAPM_PGA("PORT1_1_RX", SND_SOC_NOPM, 0, 0, NULL, 0),
0606     SND_SOC_DAPM_PGA("PORT1_2_RX", SND_SOC_NOPM, 0, 0, NULL, 0),
0607     SND_SOC_DAPM_PGA("PORT1_3_RX", SND_SOC_NOPM, 0, 0, NULL, 0),
0608     SND_SOC_DAPM_PGA("PORT1_4_RX", SND_SOC_NOPM, 0, 0, NULL, 0),
0609     SND_SOC_DAPM_PGA("PORT1_5_RX", SND_SOC_NOPM, 0, 0, NULL, 0),
0610     SND_SOC_DAPM_PGA("PORT1_6_RX", SND_SOC_NOPM, 0, 0, NULL, 0),
0611     SND_SOC_DAPM_PGA("PORT1_7_RX", SND_SOC_NOPM, 0, 0, NULL, 0),
0612     SND_SOC_DAPM_PGA("PORT1_8_RX", SND_SOC_NOPM, 0, 0, NULL, 0),
0613     SND_SOC_DAPM_PGA("PORT2_1_RX", SND_SOC_NOPM, 0, 0, NULL, 0),
0614     SND_SOC_DAPM_PGA("PORT2_2_RX", SND_SOC_NOPM, 0, 0, NULL, 0),
0615 
0616     SND_SOC_DAPM_SUPPLY("AMIC1Bias", LM49453_P0_MICL_REG, 6, 0, NULL, 0),
0617     SND_SOC_DAPM_SUPPLY("AMIC2Bias", LM49453_P0_MICR_REG, 6, 0, NULL, 0),
0618 
0619     /* playback path driver enables */
0620     SND_SOC_DAPM_OUT_DRV("Headset Switch",
0621             LM49453_P0_PMC_SETUP_REG, 0, 0, NULL, 0),
0622     SND_SOC_DAPM_OUT_DRV("Earpiece Switch",
0623             LM49453_P0_EP_REG, 0, 0, NULL, 0),
0624     SND_SOC_DAPM_OUT_DRV("Speaker Left Switch",
0625             LM49453_P0_DIS_PKVL_FB_REG, 0, 1, NULL, 0),
0626     SND_SOC_DAPM_OUT_DRV("Speaker Right Switch",
0627             LM49453_P0_DIS_PKVL_FB_REG, 1, 1, NULL, 0),
0628     SND_SOC_DAPM_OUT_DRV("Haptic Left Switch",
0629             LM49453_P0_DIS_PKVL_FB_REG, 2, 1, NULL, 0),
0630     SND_SOC_DAPM_OUT_DRV("Haptic Right Switch",
0631             LM49453_P0_DIS_PKVL_FB_REG, 3, 1, NULL, 0),
0632 
0633     /* DAC */
0634     SND_SOC_DAPM_DAC("HPL DAC", "Headset", SND_SOC_NOPM, 0, 0),
0635     SND_SOC_DAPM_DAC("HPR DAC", "Headset", SND_SOC_NOPM, 0, 0),
0636     SND_SOC_DAPM_DAC("LSL DAC", "Speaker", SND_SOC_NOPM, 0, 0),
0637     SND_SOC_DAPM_DAC("LSR DAC", "Speaker", SND_SOC_NOPM, 0, 0),
0638     SND_SOC_DAPM_DAC("HAL DAC", "Haptic", SND_SOC_NOPM, 0, 0),
0639     SND_SOC_DAPM_DAC("HAR DAC", "Haptic", SND_SOC_NOPM, 0, 0),
0640     SND_SOC_DAPM_DAC("LOL DAC", "Lineout", SND_SOC_NOPM, 0, 0),
0641     SND_SOC_DAPM_DAC("LOR DAC", "Lineout", SND_SOC_NOPM, 0, 0),
0642 
0643 
0644     SND_SOC_DAPM_PGA("AUXL Input",
0645             LM49453_P0_ANALOG_MIXER_ADC_REG, 2, 0, NULL, 0),
0646     SND_SOC_DAPM_PGA("AUXR Input",
0647             LM49453_P0_ANALOG_MIXER_ADC_REG, 3, 0, NULL, 0),
0648 
0649     SND_SOC_DAPM_PGA("Sidetone", SND_SOC_NOPM, 0, 0, NULL, 0),
0650 
0651     /* ADC */
0652     SND_SOC_DAPM_ADC("DMIC1 Left", "Capture", SND_SOC_NOPM, 1, 0),
0653     SND_SOC_DAPM_ADC("DMIC1 Right", "Capture", SND_SOC_NOPM, 1, 0),
0654     SND_SOC_DAPM_ADC("DMIC2 Left", "Capture", SND_SOC_NOPM, 1, 0),
0655     SND_SOC_DAPM_ADC("DMIC2 Right", "Capture", SND_SOC_NOPM, 1, 0),
0656 
0657     SND_SOC_DAPM_ADC("ADC Left", "Capture", SND_SOC_NOPM, 1, 0),
0658     SND_SOC_DAPM_ADC("ADC Right", "Capture", SND_SOC_NOPM, 0, 0),
0659 
0660     SND_SOC_DAPM_MUX("ADCL Mux", SND_SOC_NOPM, 0, 0,
0661               &lm49453_adcl_mux_control),
0662     SND_SOC_DAPM_MUX("ADCR Mux", SND_SOC_NOPM, 0, 0,
0663               &lm49453_adcr_mux_control),
0664 
0665     SND_SOC_DAPM_MUX("Mic1 Input",
0666             SND_SOC_NOPM, 0, 0, &lm49453_adcl_mux_control),
0667 
0668     SND_SOC_DAPM_MUX("Mic2 Input",
0669             SND_SOC_NOPM, 0, 0, &lm49453_adcr_mux_control),
0670 
0671     /* AIF */
0672     SND_SOC_DAPM_AIF_IN("PORT1_SDI", NULL, 0,
0673                 LM49453_P0_PULL_CONFIG1_REG, 2, 0),
0674     SND_SOC_DAPM_AIF_IN("PORT2_SDI", NULL, 0,
0675                 LM49453_P0_PULL_CONFIG1_REG, 6, 0),
0676 
0677     SND_SOC_DAPM_AIF_OUT("PORT1_SDO", NULL, 0,
0678                  LM49453_P0_PULL_CONFIG1_REG, 3, 0),
0679     SND_SOC_DAPM_AIF_OUT("PORT2_SDO", NULL, 0,
0680                   LM49453_P0_PULL_CONFIG1_REG, 7, 0),
0681 
0682     /* Port1 TX controls */
0683     SND_SOC_DAPM_OUT_DRV("P1_1_TX", SND_SOC_NOPM, 0, 0, NULL, 0),
0684     SND_SOC_DAPM_OUT_DRV("P1_2_TX", SND_SOC_NOPM, 0, 0, NULL, 0),
0685     SND_SOC_DAPM_OUT_DRV("P1_3_TX", SND_SOC_NOPM, 0, 0, NULL, 0),
0686     SND_SOC_DAPM_OUT_DRV("P1_4_TX", SND_SOC_NOPM, 0, 0, NULL, 0),
0687     SND_SOC_DAPM_OUT_DRV("P1_5_TX", SND_SOC_NOPM, 0, 0, NULL, 0),
0688     SND_SOC_DAPM_OUT_DRV("P1_6_TX", SND_SOC_NOPM, 0, 0, NULL, 0),
0689     SND_SOC_DAPM_OUT_DRV("P1_7_TX", SND_SOC_NOPM, 0, 0, NULL, 0),
0690     SND_SOC_DAPM_OUT_DRV("P1_8_TX", SND_SOC_NOPM, 0, 0, NULL, 0),
0691 
0692     /* Port2 TX controls */
0693     SND_SOC_DAPM_OUT_DRV("P2_1_TX", SND_SOC_NOPM, 0, 0, NULL, 0),
0694     SND_SOC_DAPM_OUT_DRV("P2_2_TX", SND_SOC_NOPM, 0, 0, NULL, 0),
0695 
0696     /* Sidetone Mixer */
0697     SND_SOC_DAPM_MIXER("Sidetone Mixer", SND_SOC_NOPM, 0, 0,
0698                 lm49453_sidetone_mixer_controls,
0699                 ARRAY_SIZE(lm49453_sidetone_mixer_controls)),
0700 
0701     /* DAC MIXERS */
0702     SND_SOC_DAPM_MIXER("HPL Mixer", SND_SOC_NOPM, 0, 0,
0703                 lm49453_headset_left_mixer,
0704                 ARRAY_SIZE(lm49453_headset_left_mixer)),
0705     SND_SOC_DAPM_MIXER("HPR Mixer", SND_SOC_NOPM, 0, 0,
0706                 lm49453_headset_right_mixer,
0707                 ARRAY_SIZE(lm49453_headset_right_mixer)),
0708     SND_SOC_DAPM_MIXER("LOL Mixer", SND_SOC_NOPM, 0, 0,
0709                 lm49453_lineout_left_mixer,
0710                 ARRAY_SIZE(lm49453_lineout_left_mixer)),
0711     SND_SOC_DAPM_MIXER("LOR Mixer", SND_SOC_NOPM, 0, 0,
0712                 lm49453_lineout_right_mixer,
0713                 ARRAY_SIZE(lm49453_lineout_right_mixer)),
0714     SND_SOC_DAPM_MIXER("LSL Mixer", SND_SOC_NOPM, 0, 0,
0715                 lm49453_speaker_left_mixer,
0716                 ARRAY_SIZE(lm49453_speaker_left_mixer)),
0717     SND_SOC_DAPM_MIXER("LSR Mixer", SND_SOC_NOPM, 0, 0,
0718                 lm49453_speaker_right_mixer,
0719                 ARRAY_SIZE(lm49453_speaker_right_mixer)),
0720     SND_SOC_DAPM_MIXER("HAL Mixer", SND_SOC_NOPM, 0, 0,
0721                 lm49453_haptic_left_mixer,
0722                 ARRAY_SIZE(lm49453_haptic_left_mixer)),
0723     SND_SOC_DAPM_MIXER("HAR Mixer", SND_SOC_NOPM, 0, 0,
0724                 lm49453_haptic_right_mixer,
0725                 ARRAY_SIZE(lm49453_haptic_right_mixer)),
0726 
0727     /* Capture Mixer */
0728     SND_SOC_DAPM_MIXER("Port1_1 Mixer", SND_SOC_NOPM, 0, 0,
0729                 lm49453_port1_tx1_mixer,
0730                 ARRAY_SIZE(lm49453_port1_tx1_mixer)),
0731     SND_SOC_DAPM_MIXER("Port1_2 Mixer", SND_SOC_NOPM, 0, 0,
0732                 lm49453_port1_tx2_mixer,
0733                 ARRAY_SIZE(lm49453_port1_tx2_mixer)),
0734     SND_SOC_DAPM_MIXER("Port1_3 Mixer", SND_SOC_NOPM, 0, 0,
0735                 lm49453_port1_tx3_mixer,
0736                 ARRAY_SIZE(lm49453_port1_tx3_mixer)),
0737     SND_SOC_DAPM_MIXER("Port1_4 Mixer", SND_SOC_NOPM, 0, 0,
0738                 lm49453_port1_tx4_mixer,
0739                 ARRAY_SIZE(lm49453_port1_tx4_mixer)),
0740     SND_SOC_DAPM_MIXER("Port1_5 Mixer", SND_SOC_NOPM, 0, 0,
0741                 lm49453_port1_tx5_mixer,
0742                 ARRAY_SIZE(lm49453_port1_tx5_mixer)),
0743     SND_SOC_DAPM_MIXER("Port1_6 Mixer", SND_SOC_NOPM, 0, 0,
0744                 lm49453_port1_tx6_mixer,
0745                 ARRAY_SIZE(lm49453_port1_tx6_mixer)),
0746     SND_SOC_DAPM_MIXER("Port1_7 Mixer", SND_SOC_NOPM, 0, 0,
0747                 lm49453_port1_tx7_mixer,
0748                 ARRAY_SIZE(lm49453_port1_tx7_mixer)),
0749     SND_SOC_DAPM_MIXER("Port1_8 Mixer", SND_SOC_NOPM, 0, 0,
0750                 lm49453_port1_tx8_mixer,
0751                 ARRAY_SIZE(lm49453_port1_tx8_mixer)),
0752 
0753     SND_SOC_DAPM_MIXER("Port2_1 Mixer", SND_SOC_NOPM, 0, 0,
0754                 lm49453_port2_tx1_mixer,
0755                 ARRAY_SIZE(lm49453_port2_tx1_mixer)),
0756     SND_SOC_DAPM_MIXER("Port2_2 Mixer", SND_SOC_NOPM, 0, 0,
0757                 lm49453_port2_tx2_mixer,
0758                 ARRAY_SIZE(lm49453_port2_tx2_mixer)),
0759 };
0760 
0761 static const struct snd_soc_dapm_route lm49453_audio_map[] = {
0762     /* Port SDI mapping */
0763     { "PORT1_1_RX", "Port1 Playback Switch", "PORT1_SDI" },
0764     { "PORT1_2_RX", "Port1 Playback Switch", "PORT1_SDI" },
0765     { "PORT1_3_RX", "Port1 Playback Switch", "PORT1_SDI" },
0766     { "PORT1_4_RX", "Port1 Playback Switch", "PORT1_SDI" },
0767     { "PORT1_5_RX", "Port1 Playback Switch", "PORT1_SDI" },
0768     { "PORT1_6_RX", "Port1 Playback Switch", "PORT1_SDI" },
0769     { "PORT1_7_RX", "Port1 Playback Switch", "PORT1_SDI" },
0770     { "PORT1_8_RX", "Port1 Playback Switch", "PORT1_SDI" },
0771 
0772     { "PORT2_1_RX", "Port2 Playback Switch", "PORT2_SDI" },
0773     { "PORT2_2_RX", "Port2 Playback Switch", "PORT2_SDI" },
0774 
0775     /* HP mapping */
0776     { "HPL Mixer", "Port1_1 Switch", "PORT1_1_RX" },
0777     { "HPL Mixer", "Port1_2 Switch", "PORT1_2_RX" },
0778     { "HPL Mixer", "Port1_3 Switch", "PORT1_3_RX" },
0779     { "HPL Mixer", "Port1_4 Switch", "PORT1_4_RX" },
0780     { "HPL Mixer", "Port1_5 Switch", "PORT1_5_RX" },
0781     { "HPL Mixer", "Port1_6 Switch", "PORT1_6_RX" },
0782     { "HPL Mixer", "Port1_7 Switch", "PORT1_7_RX" },
0783     { "HPL Mixer", "Port1_8 Switch", "PORT1_8_RX" },
0784 
0785     { "HPL Mixer", "Port2_1 Switch", "PORT2_1_RX" },
0786     { "HPL Mixer", "Port2_2 Switch", "PORT2_2_RX" },
0787 
0788     { "HPL Mixer", "ADCL Switch", "ADC Left" },
0789     { "HPL Mixer", "ADCR Switch", "ADC Right" },
0790     { "HPL Mixer", "DMIC1L Switch", "DMIC1 Left" },
0791     { "HPL Mixer", "DMIC1R Switch", "DMIC1 Right" },
0792     { "HPL Mixer", "DMIC2L Switch", "DMIC2 Left" },
0793     { "HPL Mixer", "DMIC2R Switch", "DMIC2 Right" },
0794     { "HPL Mixer", "Sidetone Switch", "Sidetone" },
0795 
0796     { "HPL DAC", NULL, "HPL Mixer" },
0797 
0798     { "HPR Mixer", "Port1_1 Switch", "PORT1_1_RX" },
0799     { "HPR Mixer", "Port1_2 Switch", "PORT1_2_RX" },
0800     { "HPR Mixer", "Port1_3 Switch", "PORT1_3_RX" },
0801     { "HPR Mixer", "Port1_4 Switch", "PORT1_4_RX" },
0802     { "HPR Mixer", "Port1_5 Switch", "PORT1_5_RX" },
0803     { "HPR Mixer", "Port1_6 Switch", "PORT1_6_RX" },
0804     { "HPR Mixer", "Port1_7 Switch", "PORT1_7_RX" },
0805     { "HPR Mixer", "Port1_8 Switch", "PORT1_8_RX" },
0806 
0807     /* Port 2 */
0808     { "HPR Mixer", "Port2_1 Switch", "PORT2_1_RX" },
0809     { "HPR Mixer", "Port2_2 Switch", "PORT2_2_RX" },
0810 
0811     { "HPR Mixer", "ADCL Switch", "ADC Left" },
0812     { "HPR Mixer", "ADCR Switch", "ADC Right" },
0813     { "HPR Mixer", "DMIC1L Switch", "DMIC1 Left" },
0814     { "HPR Mixer", "DMIC1R Switch", "DMIC1 Right" },
0815     { "HPR Mixer", "DMIC2L Switch", "DMIC2 Left" },
0816     { "HPR Mixer", "DMIC2L Switch", "DMIC2 Right" },
0817     { "HPR Mixer", "Sidetone Switch", "Sidetone" },
0818 
0819     { "HPR DAC", NULL, "HPR Mixer" },
0820 
0821     { "HPOUTL", "Headset Switch", "HPL DAC"},
0822     { "HPOUTR", "Headset Switch", "HPR DAC"},
0823 
0824     /* EP map */
0825     { "EPOUT", "Earpiece Switch", "HPL DAC" },
0826 
0827     /* Speaker map */
0828     { "LSL Mixer", "Port1_1 Switch", "PORT1_1_RX" },
0829     { "LSL Mixer", "Port1_2 Switch", "PORT1_2_RX" },
0830     { "LSL Mixer", "Port1_3 Switch", "PORT1_3_RX" },
0831     { "LSL Mixer", "Port1_4 Switch", "PORT1_4_RX" },
0832     { "LSL Mixer", "Port1_5 Switch", "PORT1_5_RX" },
0833     { "LSL Mixer", "Port1_6 Switch", "PORT1_6_RX" },
0834     { "LSL Mixer", "Port1_7 Switch", "PORT1_7_RX" },
0835     { "LSL Mixer", "Port1_8 Switch", "PORT1_8_RX" },
0836 
0837     /* Port 2 */
0838     { "LSL Mixer", "Port2_1 Switch", "PORT2_1_RX" },
0839     { "LSL Mixer", "Port2_2 Switch", "PORT2_2_RX" },
0840 
0841     { "LSL Mixer", "ADCL Switch", "ADC Left" },
0842     { "LSL Mixer", "ADCR Switch", "ADC Right" },
0843     { "LSL Mixer", "DMIC1L Switch", "DMIC1 Left" },
0844     { "LSL Mixer", "DMIC1R Switch", "DMIC1 Right" },
0845     { "LSL Mixer", "DMIC2L Switch", "DMIC2 Left" },
0846     { "LSL Mixer", "DMIC2R Switch", "DMIC2 Right" },
0847     { "LSL Mixer", "Sidetone Switch", "Sidetone" },
0848 
0849     { "LSL DAC", NULL, "LSL Mixer" },
0850 
0851     { "LSR Mixer", "Port1_1 Switch", "PORT1_1_RX" },
0852     { "LSR Mixer", "Port1_2 Switch", "PORT1_2_RX" },
0853     { "LSR Mixer", "Port1_3 Switch", "PORT1_3_RX" },
0854     { "LSR Mixer", "Port1_4 Switch", "PORT1_4_RX" },
0855     { "LSR Mixer", "Port1_5 Switch", "PORT1_5_RX" },
0856     { "LSR Mixer", "Port1_6 Switch", "PORT1_6_RX" },
0857     { "LSR Mixer", "Port1_7 Switch", "PORT1_7_RX" },
0858     { "LSR Mixer", "Port1_8 Switch", "PORT1_8_RX" },
0859 
0860     /* Port 2 */
0861     { "LSR Mixer", "Port2_1 Switch", "PORT2_1_RX" },
0862     { "LSR Mixer", "Port2_2 Switch", "PORT2_2_RX" },
0863 
0864     { "LSR Mixer", "ADCL Switch", "ADC Left" },
0865     { "LSR Mixer", "ADCR Switch", "ADC Right" },
0866     { "LSR Mixer", "DMIC1L Switch", "DMIC1 Left" },
0867     { "LSR Mixer", "DMIC1R Switch", "DMIC1 Right" },
0868     { "LSR Mixer", "DMIC2L Switch", "DMIC2 Left" },
0869     { "LSR Mixer", "DMIC2R Switch", "DMIC2 Right" },
0870     { "LSR Mixer", "Sidetone Switch", "Sidetone" },
0871 
0872     { "LSR DAC", NULL, "LSR Mixer" },
0873 
0874     { "LSOUTL", "Speaker Left Switch", "LSL DAC"},
0875     { "LSOUTR", "Speaker Left Switch", "LSR DAC"},
0876 
0877     /* Haptic map */
0878     { "HAL Mixer", "Port1_1 Switch", "PORT1_1_RX" },
0879     { "HAL Mixer", "Port1_2 Switch", "PORT1_2_RX" },
0880     { "HAL Mixer", "Port1_3 Switch", "PORT1_3_RX" },
0881     { "HAL Mixer", "Port1_4 Switch", "PORT1_4_RX" },
0882     { "HAL Mixer", "Port1_5 Switch", "PORT1_5_RX" },
0883     { "HAL Mixer", "Port1_6 Switch", "PORT1_6_RX" },
0884     { "HAL Mixer", "Port1_7 Switch", "PORT1_7_RX" },
0885     { "HAL Mixer", "Port1_8 Switch", "PORT1_8_RX" },
0886 
0887     /* Port 2 */
0888     { "HAL Mixer", "Port2_1 Switch", "PORT2_1_RX" },
0889     { "HAL Mixer", "Port2_2 Switch", "PORT2_2_RX" },
0890 
0891     { "HAL Mixer", "ADCL Switch", "ADC Left" },
0892     { "HAL Mixer", "ADCR Switch", "ADC Right" },
0893     { "HAL Mixer", "DMIC1L Switch", "DMIC1 Left" },
0894     { "HAL Mixer", "DMIC1R Switch", "DMIC1 Right" },
0895     { "HAL Mixer", "DMIC2L Switch", "DMIC2 Left" },
0896     { "HAL Mixer", "DMIC2R Switch", "DMIC2 Right" },
0897     { "HAL Mixer", "Sidetone Switch", "Sidetone" },
0898 
0899     { "HAL DAC", NULL, "HAL Mixer" },
0900 
0901     { "HAR Mixer", "Port1_1 Switch", "PORT1_1_RX" },
0902     { "HAR Mixer", "Port1_2 Switch", "PORT1_2_RX" },
0903     { "HAR Mixer", "Port1_3 Switch", "PORT1_3_RX" },
0904     { "HAR Mixer", "Port1_4 Switch", "PORT1_4_RX" },
0905     { "HAR Mixer", "Port1_5 Switch", "PORT1_5_RX" },
0906     { "HAR Mixer", "Port1_6 Switch", "PORT1_6_RX" },
0907     { "HAR Mixer", "Port1_7 Switch", "PORT1_7_RX" },
0908     { "HAR Mixer", "Port1_8 Switch", "PORT1_8_RX" },
0909 
0910     /* Port 2 */
0911     { "HAR Mixer", "Port2_1 Switch", "PORT2_1_RX" },
0912     { "HAR Mixer", "Port2_2 Switch", "PORT2_2_RX" },
0913 
0914     { "HAR Mixer", "ADCL Switch", "ADC Left" },
0915     { "HAR Mixer", "ADCR Switch", "ADC Right" },
0916     { "HAR Mixer", "DMIC1L Switch", "DMIC1 Left" },
0917     { "HAR Mixer", "DMIC1R Switch", "DMIC1 Right" },
0918     { "HAR Mixer", "DMIC2L Switch", "DMIC2 Left" },
0919     { "HAR Mixer", "DMIC2R Switch", "DMIC2 Right" },
0920     { "HAR Mixer", "Sideton Switch", "Sidetone" },
0921 
0922     { "HAR DAC", NULL, "HAR Mixer" },
0923 
0924     { "HAOUTL", "Haptic Left Switch", "HAL DAC" },
0925     { "HAOUTR", "Haptic Right Switch", "HAR DAC" },
0926 
0927     /* Lineout map */
0928     { "LOL Mixer", "Port1_1 Switch", "PORT1_1_RX" },
0929     { "LOL Mixer", "Port1_2 Switch", "PORT1_2_RX" },
0930     { "LOL Mixer", "Port1_3 Switch", "PORT1_3_RX" },
0931     { "LOL Mixer", "Port1_4 Switch", "PORT1_4_RX" },
0932     { "LOL Mixer", "Port1_5 Switch", "PORT1_5_RX" },
0933     { "LOL Mixer", "Port1_6 Switch", "PORT1_6_RX" },
0934     { "LOL Mixer", "Port1_7 Switch", "PORT1_7_RX" },
0935     { "LOL Mixer", "Port1_8 Switch", "PORT1_8_RX" },
0936 
0937     /* Port 2 */
0938     { "LOL Mixer", "Port2_1 Switch", "PORT2_1_RX" },
0939     { "LOL Mixer", "Port2_2 Switch", "PORT2_2_RX" },
0940 
0941     { "LOL Mixer", "ADCL Switch", "ADC Left" },
0942     { "LOL Mixer", "ADCR Switch", "ADC Right" },
0943     { "LOL Mixer", "DMIC1L Switch", "DMIC1 Left" },
0944     { "LOL Mixer", "DMIC1R Switch", "DMIC1 Right" },
0945     { "LOL Mixer", "DMIC2L Switch", "DMIC2 Left" },
0946     { "LOL Mixer", "DMIC2R Switch", "DMIC2 Right" },
0947     { "LOL Mixer", "Sidetone Switch", "Sidetone" },
0948 
0949     { "LOL DAC", NULL, "LOL Mixer" },
0950 
0951     { "LOR Mixer", "Port1_1 Switch", "PORT1_1_RX" },
0952     { "LOR Mixer", "Port1_2 Switch", "PORT1_2_RX" },
0953     { "LOR Mixer", "Port1_3 Switch", "PORT1_3_RX" },
0954     { "LOR Mixer", "Port1_4 Switch", "PORT1_4_RX" },
0955     { "LOR Mixer", "Port1_5 Switch", "PORT1_5_RX" },
0956     { "LOR Mixer", "Port1_6 Switch", "PORT1_6_RX" },
0957     { "LOR Mixer", "Port1_7 Switch", "PORT1_7_RX" },
0958     { "LOR Mixer", "Port1_8 Switch", "PORT1_8_RX" },
0959 
0960     /* Port 2 */
0961     { "LOR Mixer", "Port2_1 Switch", "PORT2_1_RX" },
0962     { "LOR Mixer", "Port2_2 Switch", "PORT2_2_RX" },
0963 
0964     { "LOR Mixer", "ADCL Switch", "ADC Left" },
0965     { "LOR Mixer", "ADCR Switch", "ADC Right" },
0966     { "LOR Mixer", "DMIC1L Switch", "DMIC1 Left" },
0967     { "LOR Mixer", "DMIC1R Switch", "DMIC1 Right" },
0968     { "LOR Mixer", "DMIC2L Switch", "DMIC2 Left" },
0969     { "LOR Mixer", "DMIC2R Switch", "DMIC2 Right" },
0970     { "LOR Mixer", "Sidetone Switch", "Sidetone" },
0971 
0972     { "LOR DAC", NULL, "LOR Mixer" },
0973 
0974     { "LOOUTL", NULL, "LOL DAC" },
0975     { "LOOUTR", NULL, "LOR DAC" },
0976 
0977     /* TX map */
0978     /* Port1 mappings */
0979     { "Port1_1 Mixer", "ADCL Switch", "ADC Left" },
0980     { "Port1_1 Mixer", "ADCR Switch", "ADC Right" },
0981     { "Port1_1 Mixer", "DMIC1L Switch", "DMIC1 Left" },
0982     { "Port1_1 Mixer", "DMIC1R Switch", "DMIC1 Right" },
0983     { "Port1_1 Mixer", "DMIC2L Switch", "DMIC2 Left" },
0984     { "Port1_1 Mixer", "DMIC2R Switch", "DMIC2 Right" },
0985 
0986     { "Port1_2 Mixer", "ADCL Switch", "ADC Left" },
0987     { "Port1_2 Mixer", "ADCR Switch", "ADC Right" },
0988     { "Port1_2 Mixer", "DMIC1L Switch", "DMIC1 Left" },
0989     { "Port1_2 Mixer", "DMIC1R Switch", "DMIC1 Right" },
0990     { "Port1_2 Mixer", "DMIC2L Switch", "DMIC2 Left" },
0991     { "Port1_2 Mixer", "DMIC2R Switch", "DMIC2 Right" },
0992 
0993     { "Port1_3 Mixer", "ADCL Switch", "ADC Left" },
0994     { "Port1_3 Mixer", "ADCR Switch", "ADC Right" },
0995     { "Port1_3 Mixer", "DMIC1L Switch", "DMIC1 Left" },
0996     { "Port1_3 Mixer", "DMIC1R Switch", "DMIC1 Right" },
0997     { "Port1_3 Mixer", "DMIC2L Switch", "DMIC2 Left" },
0998     { "Port1_3 Mixer", "DMIC2R Switch", "DMIC2 Right" },
0999 
1000     { "Port1_4 Mixer", "ADCL Switch", "ADC Left" },
1001     { "Port1_4 Mixer", "ADCR Switch", "ADC Right" },
1002     { "Port1_4 Mixer", "DMIC1L Switch", "DMIC1 Left" },
1003     { "Port1_4 Mixer", "DMIC1R Switch", "DMIC1 Right" },
1004     { "Port1_4 Mixer", "DMIC2L Switch", "DMIC2 Left" },
1005     { "Port1_4 Mixer", "DMIC2R Switch", "DMIC2 Right" },
1006 
1007     { "Port1_5 Mixer", "ADCL Switch", "ADC Left" },
1008     { "Port1_5 Mixer", "ADCR Switch", "ADC Right" },
1009     { "Port1_5 Mixer", "DMIC1L Switch", "DMIC1 Left" },
1010     { "Port1_5 Mixer", "DMIC1R Switch", "DMIC1 Right" },
1011     { "Port1_5 Mixer", "DMIC2L Switch", "DMIC2 Left" },
1012     { "Port1_5 Mixer", "DMIC2R Switch", "DMIC2 Right" },
1013 
1014     { "Port1_6 Mixer", "ADCL Switch", "ADC Left" },
1015     { "Port1_6 Mixer", "ADCR Switch", "ADC Right" },
1016     { "Port1_6 Mixer", "DMIC1L Switch", "DMIC1 Left" },
1017     { "Port1_6 Mixer", "DMIC1R Switch", "DMIC1 Right" },
1018     { "Port1_6 Mixer", "DMIC2L Switch", "DMIC2 Left" },
1019     { "Port1_6 Mixer", "DMIC2R Switch", "DMIC2 Right" },
1020 
1021     { "Port1_7 Mixer", "ADCL Switch", "ADC Left" },
1022     { "Port1_7 Mixer", "ADCR Switch", "ADC Right" },
1023     { "Port1_7 Mixer", "DMIC1L Switch", "DMIC1 Left" },
1024     { "Port1_7 Mixer", "DMIC1R Switch", "DMIC1 Right" },
1025     { "Port1_7 Mixer", "DMIC2L Switch", "DMIC2 Left" },
1026     { "Port1_7 Mixer", "DMIC2R Switch", "DMIC2 Right" },
1027 
1028     { "Port1_8 Mixer", "ADCL Switch", "ADC Left" },
1029     { "Port1_8 Mixer", "ADCR Switch", "ADC Right" },
1030     { "Port1_8 Mixer", "DMIC1L Switch", "DMIC1 Left" },
1031     { "Port1_8 Mixer", "DMIC1R Switch", "DMIC1 Right" },
1032     { "Port1_8 Mixer", "DMIC2L Switch", "DMIC2 Left" },
1033     { "Port1_8 Mixer", "DMIC2R Switch", "DMIC2 Right" },
1034 
1035     { "Port2_1 Mixer", "ADCL Switch", "ADC Left" },
1036     { "Port2_1 Mixer", "ADCR Switch", "ADC Right" },
1037     { "Port2_1 Mixer", "DMIC1L Switch", "DMIC1 Left" },
1038     { "Port2_1 Mixer", "DMIC1R Switch", "DMIC1 Right" },
1039     { "Port2_1 Mixer", "DMIC2L Switch", "DMIC2 Left" },
1040     { "Port2_1 Mixer", "DMIC2R Switch", "DMIC2 Right" },
1041 
1042     { "Port2_2 Mixer", "ADCL Switch", "ADC Left" },
1043     { "Port2_2 Mixer", "ADCR Switch", "ADC Right" },
1044     { "Port2_2 Mixer", "DMIC1L Switch", "DMIC1 Left" },
1045     { "Port2_2 Mixer", "DMIC1R Switch", "DMIC1 Right" },
1046     { "Port2_2 Mixer", "DMIC2L Switch", "DMIC2 Left" },
1047     { "Port2_2 Mixer", "DMIC2R Switch", "DMIC2 Right" },
1048 
1049     { "P1_1_TX", NULL, "Port1_1 Mixer" },
1050     { "P1_2_TX", NULL, "Port1_2 Mixer" },
1051     { "P1_3_TX", NULL, "Port1_3 Mixer" },
1052     { "P1_4_TX", NULL, "Port1_4 Mixer" },
1053     { "P1_5_TX", NULL, "Port1_5 Mixer" },
1054     { "P1_6_TX", NULL, "Port1_6 Mixer" },
1055     { "P1_7_TX", NULL, "Port1_7 Mixer" },
1056     { "P1_8_TX", NULL, "Port1_8 Mixer" },
1057 
1058     { "P2_1_TX", NULL, "Port2_1 Mixer" },
1059     { "P2_2_TX", NULL, "Port2_2 Mixer" },
1060 
1061     { "PORT1_SDO", "Port1 Capture Switch", "P1_1_TX"},
1062     { "PORT1_SDO", "Port1 Capture Switch", "P1_2_TX"},
1063     { "PORT1_SDO", "Port1 Capture Switch", "P1_3_TX"},
1064     { "PORT1_SDO", "Port1 Capture Switch", "P1_4_TX"},
1065     { "PORT1_SDO", "Port1 Capture Switch", "P1_5_TX"},
1066     { "PORT1_SDO", "Port1 Capture Switch", "P1_6_TX"},
1067     { "PORT1_SDO", "Port1 Capture Switch", "P1_7_TX"},
1068     { "PORT1_SDO", "Port1 Capture Switch", "P1_8_TX"},
1069 
1070     { "PORT2_SDO", "Port2 Capture Switch", "P2_1_TX"},
1071     { "PORT2_SDO", "Port2 Capture Switch", "P2_2_TX"},
1072 
1073     { "Mic1 Input", NULL, "AMIC1" },
1074     { "Mic2 Input", NULL, "AMIC2" },
1075 
1076     { "AUXL Input", NULL, "AUXL" },
1077     { "AUXR Input", NULL, "AUXR" },
1078 
1079     /* AUX connections */
1080     { "ADCL Mux", "Aux_L", "AUXL Input" },
1081     { "ADCL Mux", "MIC1", "Mic1 Input" },
1082 
1083     { "ADCR Mux", "Aux_R", "AUXR Input" },
1084     { "ADCR Mux", "MIC2", "Mic2 Input" },
1085 
1086     /* ADC connection */
1087     { "ADC Left", NULL, "ADCL Mux"},
1088     { "ADC Right", NULL, "ADCR Mux"},
1089 
1090     { "DMIC1 Left", NULL, "DMIC1DAT"},
1091     { "DMIC1 Right", NULL, "DMIC1DAT"},
1092     { "DMIC2 Left", NULL, "DMIC2DAT"},
1093     { "DMIC2 Right", NULL, "DMIC2DAT"},
1094 
1095     /* Sidetone map */
1096     { "Sidetone Mixer", NULL, "ADC Left" },
1097     { "Sidetone Mixer", NULL, "ADC Right" },
1098     { "Sidetone Mixer", NULL, "DMIC1 Left" },
1099     { "Sidetone Mixer", NULL, "DMIC1 Right" },
1100     { "Sidetone Mixer", NULL, "DMIC2 Left" },
1101     { "Sidetone Mixer", NULL, "DMIC2 Right" },
1102 
1103     { "Sidetone", "Sidetone Switch", "Sidetone Mixer" },
1104 };
1105 
1106 static int lm49453_hw_params(struct snd_pcm_substream *substream,
1107                  struct snd_pcm_hw_params *params,
1108                  struct snd_soc_dai *dai)
1109 {
1110     struct snd_soc_component *component = dai->component;
1111     u16 clk_div = 0;
1112 
1113     /* Setting DAC clock dividers based on substream sample rate. */
1114     switch (params_rate(params)) {
1115     case 8000:
1116     case 16000:
1117     case 32000:
1118     case 24000:
1119     case 48000:
1120         clk_div = 256;
1121         break;
1122     case 11025:
1123     case 22050:
1124     case 44100:
1125         clk_div = 216;
1126         break;
1127     case 96000:
1128         clk_div = 127;
1129         break;
1130     default:
1131         return -EINVAL;
1132     }
1133 
1134     snd_soc_component_write(component, LM49453_P0_ADC_CLK_DIV_REG, clk_div);
1135     snd_soc_component_write(component, LM49453_P0_DAC_HP_CLK_DIV_REG, clk_div);
1136 
1137     return 0;
1138 }
1139 
1140 static int lm49453_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
1141 {
1142     struct snd_soc_component *component = codec_dai->component;
1143 
1144     u16 aif_val;
1145     int mode = 0;
1146     int clk_phase = 0;
1147     int clk_shift = 0;
1148 
1149     switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
1150     case SND_SOC_DAIFMT_CBC_CFC:
1151         aif_val = 0;
1152         break;
1153     case SND_SOC_DAIFMT_CBC_CFP:
1154         aif_val = LM49453_AUDIO_PORT1_BASIC_SYNC_MS;
1155         break;
1156     case SND_SOC_DAIFMT_CBP_CFC:
1157         aif_val = LM49453_AUDIO_PORT1_BASIC_CLK_MS;
1158         break;
1159     case SND_SOC_DAIFMT_CBP_CFP:
1160         aif_val = LM49453_AUDIO_PORT1_BASIC_CLK_MS |
1161               LM49453_AUDIO_PORT1_BASIC_SYNC_MS;
1162         break;
1163     default:
1164         return -EINVAL;
1165     }
1166 
1167 
1168     switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1169     case SND_SOC_DAIFMT_I2S:
1170         break;
1171     case SND_SOC_DAIFMT_DSP_A:
1172         mode = 1;
1173         clk_phase = (1 << 5);
1174         clk_shift = 1;
1175         break;
1176     case SND_SOC_DAIFMT_DSP_B:
1177         mode = 1;
1178         clk_phase = (1 << 5);
1179         clk_shift = 0;
1180         break;
1181     default:
1182         return -EINVAL;
1183     }
1184 
1185     snd_soc_component_update_bits(component, LM49453_P0_AUDIO_PORT1_BASIC_REG,
1186                 LM49453_AUDIO_PORT1_BASIC_FMT_MASK|BIT(0)|BIT(5),
1187                 (aif_val | mode | clk_phase));
1188 
1189     snd_soc_component_write(component, LM49453_P0_AUDIO_PORT1_RX_MSB_REG, clk_shift);
1190 
1191     return 0;
1192 }
1193 
1194 static int lm49453_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id,
1195                   unsigned int freq, int dir)
1196 {
1197     struct snd_soc_component *component = dai->component;
1198     u16 pll_clk = 0;
1199 
1200     switch (freq) {
1201     case 12288000:
1202     case 26000000:
1203     case 19200000:
1204         /* pll clk slection */
1205         pll_clk = 0;
1206         break;
1207     case 48000:
1208     case 32576:
1209         return 0;
1210     default:
1211         return -EINVAL;
1212     }
1213 
1214     snd_soc_component_update_bits(component, LM49453_P0_PMC_SETUP_REG, BIT(4), pll_clk);
1215 
1216     return 0;
1217 }
1218 
1219 static int lm49453_hp_mute(struct snd_soc_dai *dai, int mute, int direction)
1220 {
1221     snd_soc_component_update_bits(dai->component, LM49453_P0_DAC_DSP_REG, BIT(1)|BIT(0),
1222                 (mute ? (BIT(1)|BIT(0)) : 0));
1223     return 0;
1224 }
1225 
1226 static int lm49453_lo_mute(struct snd_soc_dai *dai, int mute, int direction)
1227 {
1228     snd_soc_component_update_bits(dai->component, LM49453_P0_DAC_DSP_REG, BIT(3)|BIT(2),
1229                 (mute ? (BIT(3)|BIT(2)) : 0));
1230     return 0;
1231 }
1232 
1233 static int lm49453_ls_mute(struct snd_soc_dai *dai, int mute, int direction)
1234 {
1235     snd_soc_component_update_bits(dai->component, LM49453_P0_DAC_DSP_REG, BIT(5)|BIT(4),
1236                 (mute ? (BIT(5)|BIT(4)) : 0));
1237     return 0;
1238 }
1239 
1240 static int lm49453_ep_mute(struct snd_soc_dai *dai, int mute, int direction)
1241 {
1242     snd_soc_component_update_bits(dai->component, LM49453_P0_DAC_DSP_REG, BIT(4),
1243                 (mute ? BIT(4) : 0));
1244     return 0;
1245 }
1246 
1247 static int lm49453_ha_mute(struct snd_soc_dai *dai, int mute, int direction)
1248 {
1249     snd_soc_component_update_bits(dai->component, LM49453_P0_DAC_DSP_REG, BIT(7)|BIT(6),
1250                 (mute ? (BIT(7)|BIT(6)) : 0));
1251     return 0;
1252 }
1253 
1254 static int lm49453_set_bias_level(struct snd_soc_component *component,
1255                   enum snd_soc_bias_level level)
1256 {
1257     struct lm49453_priv *lm49453 = snd_soc_component_get_drvdata(component);
1258 
1259     switch (level) {
1260     case SND_SOC_BIAS_ON:
1261     case SND_SOC_BIAS_PREPARE:
1262         break;
1263 
1264     case SND_SOC_BIAS_STANDBY:
1265         if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF)
1266             regcache_sync(lm49453->regmap);
1267 
1268         snd_soc_component_update_bits(component, LM49453_P0_PMC_SETUP_REG,
1269                     LM49453_PMC_SETUP_CHIP_EN, LM49453_CHIP_EN);
1270         break;
1271 
1272     case SND_SOC_BIAS_OFF:
1273         snd_soc_component_update_bits(component, LM49453_P0_PMC_SETUP_REG,
1274                     LM49453_PMC_SETUP_CHIP_EN, 0);
1275         break;
1276     }
1277 
1278     return 0;
1279 }
1280 
1281 /* Formates supported by LM49453 driver. */
1282 #define LM49453_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
1283              SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
1284 
1285 static const struct snd_soc_dai_ops lm49453_headset_dai_ops = {
1286     .hw_params  = lm49453_hw_params,
1287     .set_sysclk = lm49453_set_dai_sysclk,
1288     .set_fmt    = lm49453_set_dai_fmt,
1289     .mute_stream    = lm49453_hp_mute,
1290     .no_capture_mute = 1,
1291 };
1292 
1293 static const struct snd_soc_dai_ops lm49453_speaker_dai_ops = {
1294     .hw_params  = lm49453_hw_params,
1295     .set_sysclk = lm49453_set_dai_sysclk,
1296     .set_fmt    = lm49453_set_dai_fmt,
1297     .mute_stream    = lm49453_ls_mute,
1298     .no_capture_mute = 1,
1299 };
1300 
1301 static const struct snd_soc_dai_ops lm49453_haptic_dai_ops = {
1302     .hw_params  = lm49453_hw_params,
1303     .set_sysclk = lm49453_set_dai_sysclk,
1304     .set_fmt    = lm49453_set_dai_fmt,
1305     .mute_stream    = lm49453_ha_mute,
1306     .no_capture_mute = 1,
1307 };
1308 
1309 static const struct snd_soc_dai_ops lm49453_ep_dai_ops = {
1310     .hw_params  = lm49453_hw_params,
1311     .set_sysclk = lm49453_set_dai_sysclk,
1312     .set_fmt    = lm49453_set_dai_fmt,
1313     .mute_stream    = lm49453_ep_mute,
1314     .no_capture_mute = 1,
1315 };
1316 
1317 static const struct snd_soc_dai_ops lm49453_lineout_dai_ops = {
1318     .hw_params  = lm49453_hw_params,
1319     .set_sysclk = lm49453_set_dai_sysclk,
1320     .set_fmt    = lm49453_set_dai_fmt,
1321     .mute_stream    = lm49453_lo_mute,
1322     .no_capture_mute = 1,
1323 };
1324 
1325 /* LM49453 dai structure. */
1326 static struct snd_soc_dai_driver lm49453_dai[] = {
1327     {
1328         .name = "LM49453 Headset",
1329         .playback = {
1330             .stream_name = "Headset",
1331             .channels_min = 2,
1332             .channels_max = 2,
1333             .rates = SNDRV_PCM_RATE_8000_192000,
1334             .formats = LM49453_FORMATS,
1335         },
1336         .capture = {
1337             .stream_name = "Capture",
1338             .channels_min = 1,
1339             .channels_max = 5,
1340             .rates = SNDRV_PCM_RATE_8000_192000,
1341             .formats = LM49453_FORMATS,
1342         },
1343         .ops = &lm49453_headset_dai_ops,
1344         .symmetric_rate = 1,
1345     },
1346     {
1347         .name = "LM49453 Speaker",
1348         .playback = {
1349             .stream_name = "Speaker",
1350             .channels_min = 2,
1351             .channels_max = 2,
1352             .rates = SNDRV_PCM_RATE_8000_192000,
1353             .formats = LM49453_FORMATS,
1354         },
1355         .ops = &lm49453_speaker_dai_ops,
1356     },
1357     {
1358         .name = "LM49453 Haptic",
1359         .playback = {
1360             .stream_name = "Haptic",
1361             .channels_min = 2,
1362             .channels_max = 2,
1363             .rates = SNDRV_PCM_RATE_8000_192000,
1364             .formats = LM49453_FORMATS,
1365         },
1366         .ops = &lm49453_haptic_dai_ops,
1367     },
1368     {
1369         .name = "LM49453 Earpiece",
1370         .playback = {
1371             .stream_name = "Earpiece",
1372             .channels_min = 1,
1373             .channels_max = 1,
1374             .rates = SNDRV_PCM_RATE_8000_192000,
1375             .formats = LM49453_FORMATS,
1376         },
1377         .ops = &lm49453_ep_dai_ops,
1378     },
1379     {
1380         .name = "LM49453 line out",
1381         .playback = {
1382             .stream_name = "Lineout",
1383             .channels_min = 2,
1384             .channels_max = 2,
1385             .rates = SNDRV_PCM_RATE_8000_192000,
1386             .formats = LM49453_FORMATS,
1387         },
1388         .ops = &lm49453_lineout_dai_ops,
1389     },
1390 };
1391 
1392 static const struct snd_soc_component_driver soc_component_dev_lm49453 = {
1393     .set_bias_level     = lm49453_set_bias_level,
1394     .controls       = lm49453_snd_controls,
1395     .num_controls       = ARRAY_SIZE(lm49453_snd_controls),
1396     .dapm_widgets       = lm49453_dapm_widgets,
1397     .num_dapm_widgets   = ARRAY_SIZE(lm49453_dapm_widgets),
1398     .dapm_routes        = lm49453_audio_map,
1399     .num_dapm_routes    = ARRAY_SIZE(lm49453_audio_map),
1400     .use_pmdown_time    = 1,
1401     .endianness     = 1,
1402 };
1403 
1404 static const struct regmap_config lm49453_regmap_config = {
1405     .reg_bits = 8,
1406     .val_bits = 8,
1407 
1408     .max_register = LM49453_MAX_REGISTER,
1409     .reg_defaults = lm49453_reg_defs,
1410     .num_reg_defaults = ARRAY_SIZE(lm49453_reg_defs),
1411     .cache_type = REGCACHE_RBTREE,
1412 };
1413 
1414 static int lm49453_i2c_probe(struct i2c_client *i2c)
1415 {
1416     struct lm49453_priv *lm49453;
1417     int ret = 0;
1418 
1419     lm49453 = devm_kzalloc(&i2c->dev, sizeof(struct lm49453_priv),
1420                 GFP_KERNEL);
1421 
1422     if (lm49453 == NULL)
1423         return -ENOMEM;
1424 
1425     i2c_set_clientdata(i2c, lm49453);
1426 
1427     lm49453->regmap = devm_regmap_init_i2c(i2c, &lm49453_regmap_config);
1428     if (IS_ERR(lm49453->regmap)) {
1429         ret = PTR_ERR(lm49453->regmap);
1430         dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
1431             ret);
1432         return ret;
1433     }
1434 
1435     ret =  devm_snd_soc_register_component(&i2c->dev,
1436                       &soc_component_dev_lm49453,
1437                       lm49453_dai, ARRAY_SIZE(lm49453_dai));
1438     if (ret < 0)
1439         dev_err(&i2c->dev, "Failed to register component: %d\n", ret);
1440 
1441     return ret;
1442 }
1443 
1444 static const struct i2c_device_id lm49453_i2c_id[] = {
1445     { "lm49453", 0 },
1446     { }
1447 };
1448 MODULE_DEVICE_TABLE(i2c, lm49453_i2c_id);
1449 
1450 static struct i2c_driver lm49453_i2c_driver = {
1451     .driver = {
1452         .name = "lm49453",
1453     },
1454     .probe_new = lm49453_i2c_probe,
1455     .id_table = lm49453_i2c_id,
1456 };
1457 
1458 module_i2c_driver(lm49453_i2c_driver);
1459 
1460 MODULE_DESCRIPTION("ASoC LM49453 driver");
1461 MODULE_AUTHOR("M R Swami Reddy <MR.Swami.Reddy@ti.com>");
1462 MODULE_LICENSE("GPL v2");
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