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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * da732x.c --- Dialog DA732X ALSA SoC Audio Driver
0004  *
0005  * Copyright (C) 2012 Dialog Semiconductor GmbH
0006  *
0007  * Author: Michal Hajduk <Michal.Hajduk@diasemi.com>
0008  */
0009 
0010 #include <linux/module.h>
0011 #include <linux/moduleparam.h>
0012 #include <linux/init.h>
0013 #include <linux/delay.h>
0014 #include <linux/pm.h>
0015 #include <linux/i2c.h>
0016 #include <linux/regmap.h>
0017 #include <linux/platform_device.h>
0018 #include <linux/slab.h>
0019 #include <linux/sysfs.h>
0020 #include <sound/core.h>
0021 #include <sound/pcm.h>
0022 #include <sound/pcm_params.h>
0023 #include <sound/soc.h>
0024 #include <sound/soc-dapm.h>
0025 #include <sound/initval.h>
0026 #include <sound/tlv.h>
0027 #include <asm/div64.h>
0028 
0029 #include "da732x.h"
0030 #include "da732x_reg.h"
0031 
0032 
0033 struct da732x_priv {
0034     struct regmap *regmap;
0035 
0036     unsigned int sysclk;
0037     bool pll_en;
0038 };
0039 
0040 /*
0041  * da732x register cache - default settings
0042  */
0043 static const struct reg_default da732x_reg_cache[] = {
0044     { DA732X_REG_REF1       , 0x02 },
0045     { DA732X_REG_BIAS_EN        , 0x80 },
0046     { DA732X_REG_BIAS1      , 0x00 },
0047     { DA732X_REG_BIAS2      , 0x00 },
0048     { DA732X_REG_BIAS3      , 0x00 },
0049     { DA732X_REG_BIAS4      , 0x00 },
0050     { DA732X_REG_MICBIAS2       , 0x00 },
0051     { DA732X_REG_MICBIAS1       , 0x00 },
0052     { DA732X_REG_MICDET     , 0x00 },
0053     { DA732X_REG_MIC1_PRE       , 0x01 },
0054     { DA732X_REG_MIC1       , 0x40 },
0055     { DA732X_REG_MIC2_PRE       , 0x01 },
0056     { DA732X_REG_MIC2       , 0x40 },
0057     { DA732X_REG_AUX1L      , 0x75 },
0058     { DA732X_REG_AUX1R      , 0x75 },
0059     { DA732X_REG_MIC3_PRE       , 0x01 },
0060     { DA732X_REG_MIC3       , 0x40 },
0061     { DA732X_REG_INP_PINBIAS    , 0x00 },
0062     { DA732X_REG_INP_ZC_EN      , 0x00 },
0063     { DA732X_REG_INP_MUX        , 0x50 },
0064     { DA732X_REG_HP_DET     , 0x00 },
0065     { DA732X_REG_HPL_DAC_OFFSET , 0x00 },
0066     { DA732X_REG_HPL_DAC_OFF_CNTL   , 0x00 },
0067     { DA732X_REG_HPL_OUT_OFFSET , 0x00 },
0068     { DA732X_REG_HPL        , 0x40 },
0069     { DA732X_REG_HPL_VOL        , 0x0F },
0070     { DA732X_REG_HPR_DAC_OFFSET , 0x00 },
0071     { DA732X_REG_HPR_DAC_OFF_CNTL   , 0x00 },
0072     { DA732X_REG_HPR_OUT_OFFSET , 0x00 },
0073     { DA732X_REG_HPR        , 0x40 },
0074     { DA732X_REG_HPR_VOL        , 0x0F },
0075     { DA732X_REG_LIN2       , 0x4F },
0076     { DA732X_REG_LIN3       , 0x4F },
0077     { DA732X_REG_LIN4       , 0x4F },
0078     { DA732X_REG_OUT_ZC_EN      , 0x00 },
0079     { DA732X_REG_HP_LIN1_GNDSEL , 0x00 },
0080     { DA732X_REG_CP_HP1     , 0x0C },
0081     { DA732X_REG_CP_HP2     , 0x03 },
0082     { DA732X_REG_CP_CTRL1       , 0x00 },
0083     { DA732X_REG_CP_CTRL2       , 0x99 },
0084     { DA732X_REG_CP_CTRL3       , 0x25 },
0085     { DA732X_REG_CP_LEVEL_MASK  , 0x3F },
0086     { DA732X_REG_CP_DET     , 0x00 },
0087     { DA732X_REG_CP_STATUS      , 0x00 },
0088     { DA732X_REG_CP_THRESH1     , 0x00 },
0089     { DA732X_REG_CP_THRESH2     , 0x00 },
0090     { DA732X_REG_CP_THRESH3     , 0x00 },
0091     { DA732X_REG_CP_THRESH4     , 0x00 },
0092     { DA732X_REG_CP_THRESH5     , 0x00 },
0093     { DA732X_REG_CP_THRESH6     , 0x00 },
0094     { DA732X_REG_CP_THRESH7     , 0x00 },
0095     { DA732X_REG_CP_THRESH8     , 0x00 },
0096     { DA732X_REG_PLL_DIV_LO     , 0x00 },
0097     { DA732X_REG_PLL_DIV_MID    , 0x00 },
0098     { DA732X_REG_PLL_DIV_HI     , 0x00 },
0099     { DA732X_REG_PLL_CTRL       , 0x02 },
0100     { DA732X_REG_CLK_CTRL       , 0xaa },
0101     { DA732X_REG_CLK_DSP        , 0x07 },
0102     { DA732X_REG_CLK_EN1        , 0x00 },
0103     { DA732X_REG_CLK_EN2        , 0x00 },
0104     { DA732X_REG_CLK_EN3        , 0x00 },
0105     { DA732X_REG_CLK_EN4        , 0x00 },
0106     { DA732X_REG_CLK_EN5        , 0x00 },
0107     { DA732X_REG_AIF_MCLK       , 0x00 },
0108     { DA732X_REG_AIFA1      , 0x02 },
0109     { DA732X_REG_AIFA2      , 0x00 },
0110     { DA732X_REG_AIFA3      , 0x08 },
0111     { DA732X_REG_AIFB1      , 0x02 },
0112     { DA732X_REG_AIFB2      , 0x00 },
0113     { DA732X_REG_AIFB3      , 0x08 },
0114     { DA732X_REG_PC_CTRL        , 0xC0 },
0115     { DA732X_REG_DATA_ROUTE     , 0x00 },
0116     { DA732X_REG_DSP_CTRL       , 0x00 },
0117     { DA732X_REG_CIF_CTRL2      , 0x00 },
0118     { DA732X_REG_HANDSHAKE      , 0x00 },
0119     { DA732X_REG_SPARE1_OUT     , 0x00 },
0120     { DA732X_REG_SPARE2_OUT     , 0x00 },
0121     { DA732X_REG_SPARE1_IN      , 0x00 },
0122     { DA732X_REG_ADC1_PD        , 0x00 },
0123     { DA732X_REG_ADC1_HPF       , 0x00 },
0124     { DA732X_REG_ADC1_SEL       , 0x00 },
0125     { DA732X_REG_ADC1_EQ12      , 0x00 },
0126     { DA732X_REG_ADC1_EQ34      , 0x00 },
0127     { DA732X_REG_ADC1_EQ5       , 0x00 },
0128     { DA732X_REG_ADC2_PD        , 0x00 },
0129     { DA732X_REG_ADC2_HPF       , 0x00 },
0130     { DA732X_REG_ADC2_SEL       , 0x00 },
0131     { DA732X_REG_ADC2_EQ12      , 0x00 },
0132     { DA732X_REG_ADC2_EQ34      , 0x00 },
0133     { DA732X_REG_ADC2_EQ5       , 0x00 },
0134     { DA732X_REG_DAC1_HPF       , 0x00 },
0135     { DA732X_REG_DAC1_L_VOL     , 0x00 },
0136     { DA732X_REG_DAC1_R_VOL     , 0x00 },
0137     { DA732X_REG_DAC1_SEL       , 0x00 },
0138     { DA732X_REG_DAC1_SOFTMUTE  , 0x00 },
0139     { DA732X_REG_DAC1_EQ12      , 0x00 },
0140     { DA732X_REG_DAC1_EQ34      , 0x00 },
0141     { DA732X_REG_DAC1_EQ5       , 0x00 },
0142     { DA732X_REG_DAC2_HPF       , 0x00 },
0143     { DA732X_REG_DAC2_L_VOL     , 0x00 },
0144     { DA732X_REG_DAC2_R_VOL     , 0x00 },
0145     { DA732X_REG_DAC2_SEL       , 0x00 },
0146     { DA732X_REG_DAC2_SOFTMUTE  , 0x00 },
0147     { DA732X_REG_DAC2_EQ12      , 0x00 },
0148     { DA732X_REG_DAC2_EQ34      , 0x00 },
0149     { DA732X_REG_DAC2_EQ5       , 0x00 },
0150     { DA732X_REG_DAC3_HPF       , 0x00 },
0151     { DA732X_REG_DAC3_VOL       , 0x00 },
0152     { DA732X_REG_DAC3_SEL       , 0x00 },
0153     { DA732X_REG_DAC3_SOFTMUTE  , 0x00 },
0154     { DA732X_REG_DAC3_EQ12      , 0x00 },
0155     { DA732X_REG_DAC3_EQ34      , 0x00 },
0156     { DA732X_REG_DAC3_EQ5       , 0x00 },
0157     { DA732X_REG_BIQ_BYP        , 0x00 },
0158     { DA732X_REG_DMA_CMD        , 0x00 },
0159     { DA732X_REG_DMA_ADDR0      , 0x00 },
0160     { DA732X_REG_DMA_ADDR1      , 0x00 },
0161     { DA732X_REG_DMA_DATA0      , 0x00 },
0162     { DA732X_REG_DMA_DATA1      , 0x00 },
0163     { DA732X_REG_DMA_DATA2      , 0x00 },
0164     { DA732X_REG_DMA_DATA3      , 0x00 },
0165     { DA732X_REG_UNLOCK     , 0x00 },
0166 };
0167 
0168 static inline int da732x_get_input_div(struct snd_soc_component *component, int sysclk)
0169 {
0170     int val;
0171 
0172     if (sysclk < DA732X_MCLK_10MHZ) {
0173         val = DA732X_MCLK_VAL_0_10MHZ;
0174     } else if ((sysclk >= DA732X_MCLK_10MHZ) &&
0175         (sysclk < DA732X_MCLK_20MHZ)) {
0176         val = DA732X_MCLK_VAL_10_20MHZ;
0177     } else if ((sysclk >= DA732X_MCLK_20MHZ) &&
0178         (sysclk < DA732X_MCLK_40MHZ)) {
0179         val = DA732X_MCLK_VAL_20_40MHZ;
0180     } else if ((sysclk >= DA732X_MCLK_40MHZ) &&
0181         (sysclk <= DA732X_MCLK_54MHZ)) {
0182         val = DA732X_MCLK_VAL_40_54MHZ;
0183     } else {
0184         return -EINVAL;
0185     }
0186 
0187     snd_soc_component_write(component, DA732X_REG_PLL_CTRL, val);
0188 
0189     return val;
0190 }
0191 
0192 static void da732x_set_charge_pump(struct snd_soc_component *component, int state)
0193 {
0194     switch (state) {
0195     case DA732X_ENABLE_CP:
0196         snd_soc_component_write(component, DA732X_REG_CLK_EN2, DA732X_CP_CLK_EN);
0197         snd_soc_component_write(component, DA732X_REG_CP_HP2, DA732X_HP_CP_EN |
0198                   DA732X_HP_CP_REG | DA732X_HP_CP_PULSESKIP);
0199         snd_soc_component_write(component, DA732X_REG_CP_CTRL1, DA732X_CP_EN |
0200                   DA732X_CP_CTRL_CPVDD1);
0201         snd_soc_component_write(component, DA732X_REG_CP_CTRL2,
0202                   DA732X_CP_MANAGE_MAGNITUDE | DA732X_CP_BOOST);
0203         snd_soc_component_write(component, DA732X_REG_CP_CTRL3, DA732X_CP_1MHZ);
0204         break;
0205     case DA732X_DISABLE_CP:
0206         snd_soc_component_write(component, DA732X_REG_CLK_EN2, DA732X_CP_CLK_DIS);
0207         snd_soc_component_write(component, DA732X_REG_CP_HP2, DA732X_HP_CP_DIS);
0208         snd_soc_component_write(component, DA732X_REG_CP_CTRL1, DA723X_CP_DIS);
0209         break;
0210     default:
0211         pr_err("Wrong charge pump state\n");
0212         break;
0213     }
0214 }
0215 
0216 static const DECLARE_TLV_DB_SCALE(mic_boost_tlv, DA732X_MIC_PRE_VOL_DB_MIN,
0217                   DA732X_MIC_PRE_VOL_DB_INC, 0);
0218 
0219 static const DECLARE_TLV_DB_SCALE(mic_pga_tlv, DA732X_MIC_VOL_DB_MIN,
0220                   DA732X_MIC_VOL_DB_INC, 0);
0221 
0222 static const DECLARE_TLV_DB_SCALE(aux_pga_tlv, DA732X_AUX_VOL_DB_MIN,
0223                   DA732X_AUX_VOL_DB_INC, 0);
0224 
0225 static const DECLARE_TLV_DB_SCALE(hp_pga_tlv, DA732X_HP_VOL_DB_MIN,
0226                   DA732X_AUX_VOL_DB_INC, 0);
0227 
0228 static const DECLARE_TLV_DB_SCALE(lin2_pga_tlv, DA732X_LIN2_VOL_DB_MIN,
0229                   DA732X_LIN2_VOL_DB_INC, 0);
0230 
0231 static const DECLARE_TLV_DB_SCALE(lin3_pga_tlv, DA732X_LIN3_VOL_DB_MIN,
0232                   DA732X_LIN3_VOL_DB_INC, 0);
0233 
0234 static const DECLARE_TLV_DB_SCALE(lin4_pga_tlv, DA732X_LIN4_VOL_DB_MIN,
0235                   DA732X_LIN4_VOL_DB_INC, 0);
0236 
0237 static const DECLARE_TLV_DB_SCALE(adc_pga_tlv, DA732X_ADC_VOL_DB_MIN,
0238                   DA732X_ADC_VOL_DB_INC, 0);
0239 
0240 static const DECLARE_TLV_DB_SCALE(dac_pga_tlv, DA732X_DAC_VOL_DB_MIN,
0241                   DA732X_DAC_VOL_DB_INC, 0);
0242 
0243 static const DECLARE_TLV_DB_SCALE(eq_band_pga_tlv, DA732X_EQ_BAND_VOL_DB_MIN,
0244                   DA732X_EQ_BAND_VOL_DB_INC, 0);
0245 
0246 static const DECLARE_TLV_DB_SCALE(eq_overall_tlv, DA732X_EQ_OVERALL_VOL_DB_MIN,
0247                   DA732X_EQ_OVERALL_VOL_DB_INC, 0);
0248 
0249 /* High Pass Filter */
0250 static const char *da732x_hpf_mode[] = {
0251     "Disable", "Music", "Voice",
0252 };
0253 
0254 static const char *da732x_hpf_music[] = {
0255     "1.8Hz", "3.75Hz", "7.5Hz", "15Hz",
0256 };
0257 
0258 static const char *da732x_hpf_voice[] = {
0259     "2.5Hz", "25Hz", "50Hz", "100Hz",
0260     "150Hz", "200Hz", "300Hz", "400Hz"
0261 };
0262 
0263 static SOC_ENUM_SINGLE_DECL(da732x_dac1_hpf_mode_enum,
0264                 DA732X_REG_DAC1_HPF, DA732X_HPF_MODE_SHIFT,
0265                 da732x_hpf_mode);
0266 
0267 static SOC_ENUM_SINGLE_DECL(da732x_dac2_hpf_mode_enum,
0268                 DA732X_REG_DAC2_HPF, DA732X_HPF_MODE_SHIFT,
0269                 da732x_hpf_mode);
0270 
0271 static SOC_ENUM_SINGLE_DECL(da732x_dac3_hpf_mode_enum,
0272                 DA732X_REG_DAC3_HPF, DA732X_HPF_MODE_SHIFT,
0273                 da732x_hpf_mode);
0274 
0275 static SOC_ENUM_SINGLE_DECL(da732x_adc1_hpf_mode_enum,
0276                 DA732X_REG_ADC1_HPF, DA732X_HPF_MODE_SHIFT,
0277                 da732x_hpf_mode);
0278 
0279 static SOC_ENUM_SINGLE_DECL(da732x_adc2_hpf_mode_enum,
0280                 DA732X_REG_ADC2_HPF, DA732X_HPF_MODE_SHIFT,
0281                 da732x_hpf_mode);
0282 
0283 static SOC_ENUM_SINGLE_DECL(da732x_dac1_hp_filter_enum,
0284                 DA732X_REG_DAC1_HPF, DA732X_HPF_MUSIC_SHIFT,
0285                 da732x_hpf_music);
0286 
0287 static SOC_ENUM_SINGLE_DECL(da732x_dac2_hp_filter_enum,
0288                 DA732X_REG_DAC2_HPF, DA732X_HPF_MUSIC_SHIFT,
0289                 da732x_hpf_music);
0290 
0291 static SOC_ENUM_SINGLE_DECL(da732x_dac3_hp_filter_enum,
0292                 DA732X_REG_DAC3_HPF, DA732X_HPF_MUSIC_SHIFT,
0293                 da732x_hpf_music);
0294 
0295 static SOC_ENUM_SINGLE_DECL(da732x_adc1_hp_filter_enum,
0296                 DA732X_REG_ADC1_HPF, DA732X_HPF_MUSIC_SHIFT,
0297                 da732x_hpf_music);
0298 
0299 static SOC_ENUM_SINGLE_DECL(da732x_adc2_hp_filter_enum,
0300                 DA732X_REG_ADC2_HPF, DA732X_HPF_MUSIC_SHIFT,
0301                 da732x_hpf_music);
0302 
0303 static SOC_ENUM_SINGLE_DECL(da732x_dac1_voice_filter_enum,
0304                 DA732X_REG_DAC1_HPF, DA732X_HPF_VOICE_SHIFT,
0305                 da732x_hpf_voice);
0306 
0307 static SOC_ENUM_SINGLE_DECL(da732x_dac2_voice_filter_enum,
0308                 DA732X_REG_DAC2_HPF, DA732X_HPF_VOICE_SHIFT,
0309                 da732x_hpf_voice);
0310 
0311 static SOC_ENUM_SINGLE_DECL(da732x_dac3_voice_filter_enum,
0312                 DA732X_REG_DAC3_HPF, DA732X_HPF_VOICE_SHIFT,
0313                 da732x_hpf_voice);
0314 
0315 static SOC_ENUM_SINGLE_DECL(da732x_adc1_voice_filter_enum,
0316                 DA732X_REG_ADC1_HPF, DA732X_HPF_VOICE_SHIFT,
0317                 da732x_hpf_voice);
0318 
0319 static SOC_ENUM_SINGLE_DECL(da732x_adc2_voice_filter_enum,
0320                 DA732X_REG_ADC2_HPF, DA732X_HPF_VOICE_SHIFT,
0321                 da732x_hpf_voice);
0322 
0323 static int da732x_hpf_set(struct snd_kcontrol *kcontrol,
0324               struct snd_ctl_elem_value *ucontrol)
0325 {
0326     struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
0327     struct soc_enum *enum_ctrl = (struct soc_enum *)kcontrol->private_value;
0328     unsigned int reg = enum_ctrl->reg;
0329     unsigned int sel = ucontrol->value.enumerated.item[0];
0330     unsigned int bits;
0331 
0332     switch (sel) {
0333     case DA732X_HPF_DISABLED:
0334         bits = DA732X_HPF_DIS;
0335         break;
0336     case DA732X_HPF_VOICE:
0337         bits = DA732X_HPF_VOICE_EN;
0338         break;
0339     case DA732X_HPF_MUSIC:
0340         bits = DA732X_HPF_MUSIC_EN;
0341         break;
0342     default:
0343         return -EINVAL;
0344     }
0345 
0346     snd_soc_component_update_bits(component, reg, DA732X_HPF_MASK, bits);
0347 
0348     return 0;
0349 }
0350 
0351 static int da732x_hpf_get(struct snd_kcontrol *kcontrol,
0352               struct snd_ctl_elem_value *ucontrol)
0353 {
0354     struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
0355     struct soc_enum *enum_ctrl = (struct soc_enum *)kcontrol->private_value;
0356     unsigned int reg = enum_ctrl->reg;
0357     int val;
0358 
0359     val = snd_soc_component_read(component, reg) & DA732X_HPF_MASK;
0360 
0361     switch (val) {
0362     case DA732X_HPF_VOICE_EN:
0363         ucontrol->value.enumerated.item[0] = DA732X_HPF_VOICE;
0364         break;
0365     case DA732X_HPF_MUSIC_EN:
0366         ucontrol->value.enumerated.item[0] = DA732X_HPF_MUSIC;
0367         break;
0368     default:
0369         ucontrol->value.enumerated.item[0] = DA732X_HPF_DISABLED;
0370         break;
0371     }
0372 
0373     return 0;
0374 }
0375 
0376 static const struct snd_kcontrol_new da732x_snd_controls[] = {
0377     /* Input PGAs */
0378     SOC_SINGLE_RANGE_TLV("MIC1 Boost Volume", DA732X_REG_MIC1_PRE,
0379                  DA732X_MICBOOST_SHIFT, DA732X_MICBOOST_MIN,
0380                  DA732X_MICBOOST_MAX, 0, mic_boost_tlv),
0381     SOC_SINGLE_RANGE_TLV("MIC2 Boost Volume", DA732X_REG_MIC2_PRE,
0382                  DA732X_MICBOOST_SHIFT, DA732X_MICBOOST_MIN,
0383                  DA732X_MICBOOST_MAX, 0, mic_boost_tlv),
0384     SOC_SINGLE_RANGE_TLV("MIC3 Boost Volume", DA732X_REG_MIC3_PRE,
0385                  DA732X_MICBOOST_SHIFT, DA732X_MICBOOST_MIN,
0386                  DA732X_MICBOOST_MAX, 0, mic_boost_tlv),
0387 
0388     /* MICs */
0389     SOC_SINGLE("MIC1 Switch", DA732X_REG_MIC1, DA732X_MIC_MUTE_SHIFT,
0390            DA732X_SWITCH_MAX, DA732X_INVERT),
0391     SOC_SINGLE_RANGE_TLV("MIC1 Volume", DA732X_REG_MIC1,
0392                  DA732X_MIC_VOL_SHIFT, DA732X_MIC_VOL_VAL_MIN,
0393                  DA732X_MIC_VOL_VAL_MAX, 0, mic_pga_tlv),
0394     SOC_SINGLE("MIC2 Switch", DA732X_REG_MIC2, DA732X_MIC_MUTE_SHIFT,
0395            DA732X_SWITCH_MAX, DA732X_INVERT),
0396     SOC_SINGLE_RANGE_TLV("MIC2 Volume", DA732X_REG_MIC2,
0397                  DA732X_MIC_VOL_SHIFT, DA732X_MIC_VOL_VAL_MIN,
0398                  DA732X_MIC_VOL_VAL_MAX, 0, mic_pga_tlv),
0399     SOC_SINGLE("MIC3 Switch", DA732X_REG_MIC3, DA732X_MIC_MUTE_SHIFT,
0400            DA732X_SWITCH_MAX, DA732X_INVERT),
0401     SOC_SINGLE_RANGE_TLV("MIC3 Volume", DA732X_REG_MIC3,
0402                  DA732X_MIC_VOL_SHIFT, DA732X_MIC_VOL_VAL_MIN,
0403                  DA732X_MIC_VOL_VAL_MAX, 0, mic_pga_tlv),
0404 
0405     /* AUXs */
0406     SOC_SINGLE("AUX1L Switch", DA732X_REG_AUX1L, DA732X_AUX_MUTE_SHIFT,
0407            DA732X_SWITCH_MAX, DA732X_INVERT),
0408     SOC_SINGLE_TLV("AUX1L Volume", DA732X_REG_AUX1L,
0409                DA732X_AUX_VOL_SHIFT, DA732X_AUX_VOL_VAL_MAX,
0410                DA732X_NO_INVERT, aux_pga_tlv),
0411     SOC_SINGLE("AUX1R Switch", DA732X_REG_AUX1R, DA732X_AUX_MUTE_SHIFT,
0412            DA732X_SWITCH_MAX, DA732X_INVERT),
0413     SOC_SINGLE_TLV("AUX1R Volume", DA732X_REG_AUX1R,
0414                DA732X_AUX_VOL_SHIFT, DA732X_AUX_VOL_VAL_MAX,
0415                DA732X_NO_INVERT, aux_pga_tlv),
0416 
0417     /* ADCs */
0418     SOC_DOUBLE_TLV("ADC1 Volume", DA732X_REG_ADC1_SEL,
0419                DA732X_ADCL_VOL_SHIFT, DA732X_ADCR_VOL_SHIFT,
0420                DA732X_ADC_VOL_VAL_MAX, DA732X_INVERT, adc_pga_tlv),
0421 
0422     SOC_DOUBLE_TLV("ADC2 Volume", DA732X_REG_ADC2_SEL,
0423                DA732X_ADCL_VOL_SHIFT, DA732X_ADCR_VOL_SHIFT,
0424                DA732X_ADC_VOL_VAL_MAX, DA732X_INVERT, adc_pga_tlv),
0425 
0426     /* DACs */
0427     SOC_DOUBLE("Digital Playback DAC12 Switch", DA732X_REG_DAC1_SEL,
0428            DA732X_DACL_MUTE_SHIFT, DA732X_DACR_MUTE_SHIFT,
0429            DA732X_SWITCH_MAX, DA732X_INVERT),
0430     SOC_DOUBLE_R_TLV("Digital Playback DAC12 Volume", DA732X_REG_DAC1_L_VOL,
0431              DA732X_REG_DAC1_R_VOL, DA732X_DAC_VOL_SHIFT,
0432              DA732X_DAC_VOL_VAL_MAX, DA732X_INVERT, dac_pga_tlv),
0433     SOC_SINGLE("Digital Playback DAC3 Switch", DA732X_REG_DAC2_SEL,
0434            DA732X_DACL_MUTE_SHIFT, DA732X_SWITCH_MAX, DA732X_INVERT),
0435     SOC_SINGLE_TLV("Digital Playback DAC3 Volume", DA732X_REG_DAC2_L_VOL,
0436             DA732X_DAC_VOL_SHIFT, DA732X_DAC_VOL_VAL_MAX,
0437             DA732X_INVERT, dac_pga_tlv),
0438     SOC_SINGLE("Digital Playback DAC4 Switch", DA732X_REG_DAC2_SEL,
0439            DA732X_DACR_MUTE_SHIFT, DA732X_SWITCH_MAX, DA732X_INVERT),
0440     SOC_SINGLE_TLV("Digital Playback DAC4 Volume", DA732X_REG_DAC2_R_VOL,
0441                DA732X_DAC_VOL_SHIFT, DA732X_DAC_VOL_VAL_MAX,
0442                DA732X_INVERT, dac_pga_tlv),
0443     SOC_SINGLE("Digital Playback DAC5 Switch", DA732X_REG_DAC3_SEL,
0444            DA732X_DACL_MUTE_SHIFT, DA732X_SWITCH_MAX, DA732X_INVERT),
0445     SOC_SINGLE_TLV("Digital Playback DAC5 Volume", DA732X_REG_DAC3_VOL,
0446                DA732X_DAC_VOL_SHIFT, DA732X_DAC_VOL_VAL_MAX,
0447                DA732X_INVERT, dac_pga_tlv),
0448 
0449     /* High Pass Filters */
0450     SOC_ENUM_EXT("DAC1 High Pass Filter Mode",
0451              da732x_dac1_hpf_mode_enum, da732x_hpf_get, da732x_hpf_set),
0452     SOC_ENUM("DAC1 High Pass Filter", da732x_dac1_hp_filter_enum),
0453     SOC_ENUM("DAC1 Voice Filter", da732x_dac1_voice_filter_enum),
0454 
0455     SOC_ENUM_EXT("DAC2 High Pass Filter Mode",
0456              da732x_dac2_hpf_mode_enum, da732x_hpf_get, da732x_hpf_set),
0457     SOC_ENUM("DAC2 High Pass Filter", da732x_dac2_hp_filter_enum),
0458     SOC_ENUM("DAC2 Voice Filter", da732x_dac2_voice_filter_enum),
0459 
0460     SOC_ENUM_EXT("DAC3 High Pass Filter Mode",
0461              da732x_dac3_hpf_mode_enum, da732x_hpf_get, da732x_hpf_set),
0462     SOC_ENUM("DAC3 High Pass Filter", da732x_dac3_hp_filter_enum),
0463     SOC_ENUM("DAC3 Filter Mode", da732x_dac3_voice_filter_enum),
0464 
0465     SOC_ENUM_EXT("ADC1 High Pass Filter Mode",
0466              da732x_adc1_hpf_mode_enum, da732x_hpf_get, da732x_hpf_set),
0467     SOC_ENUM("ADC1 High Pass Filter", da732x_adc1_hp_filter_enum),
0468     SOC_ENUM("ADC1 Voice Filter", da732x_adc1_voice_filter_enum),
0469 
0470     SOC_ENUM_EXT("ADC2 High Pass Filter Mode",
0471              da732x_adc2_hpf_mode_enum, da732x_hpf_get, da732x_hpf_set),
0472     SOC_ENUM("ADC2 High Pass Filter", da732x_adc2_hp_filter_enum),
0473     SOC_ENUM("ADC2 Voice Filter", da732x_adc2_voice_filter_enum),
0474 
0475     /* Equalizers */
0476     SOC_SINGLE("ADC1 EQ Switch", DA732X_REG_ADC1_EQ5,
0477            DA732X_EQ_EN_SHIFT, DA732X_EQ_EN_MAX, DA732X_NO_INVERT),
0478     SOC_SINGLE_TLV("ADC1 EQ Band 1 Volume", DA732X_REG_ADC1_EQ12,
0479                DA732X_EQ_BAND1_SHIFT, DA732X_EQ_VOL_VAL_MAX,
0480                DA732X_INVERT, eq_band_pga_tlv),
0481     SOC_SINGLE_TLV("ADC1 EQ Band 2 Volume", DA732X_REG_ADC1_EQ12,
0482                DA732X_EQ_BAND2_SHIFT, DA732X_EQ_VOL_VAL_MAX,
0483                DA732X_INVERT, eq_band_pga_tlv),
0484     SOC_SINGLE_TLV("ADC1 EQ Band 3 Volume", DA732X_REG_ADC1_EQ34,
0485                DA732X_EQ_BAND3_SHIFT, DA732X_EQ_VOL_VAL_MAX,
0486                DA732X_INVERT, eq_band_pga_tlv),
0487     SOC_SINGLE_TLV("ADC1 EQ Band 4 Volume", DA732X_REG_ADC1_EQ34,
0488                DA732X_EQ_BAND4_SHIFT, DA732X_EQ_VOL_VAL_MAX,
0489                DA732X_INVERT, eq_band_pga_tlv),
0490     SOC_SINGLE_TLV("ADC1 EQ Band 5 Volume", DA732X_REG_ADC1_EQ5,
0491                DA732X_EQ_BAND5_SHIFT, DA732X_EQ_VOL_VAL_MAX,
0492                DA732X_INVERT, eq_band_pga_tlv),
0493     SOC_SINGLE_TLV("ADC1 EQ Overall Volume", DA732X_REG_ADC1_EQ5,
0494                DA732X_EQ_OVERALL_SHIFT, DA732X_EQ_OVERALL_VOL_VAL_MAX,
0495                DA732X_INVERT, eq_overall_tlv),
0496 
0497     SOC_SINGLE("ADC2 EQ Switch", DA732X_REG_ADC2_EQ5,
0498            DA732X_EQ_EN_SHIFT, DA732X_EQ_EN_MAX, DA732X_NO_INVERT),
0499     SOC_SINGLE_TLV("ADC2 EQ Band 1 Volume", DA732X_REG_ADC2_EQ12,
0500                DA732X_EQ_BAND1_SHIFT, DA732X_EQ_VOL_VAL_MAX,
0501                DA732X_INVERT, eq_band_pga_tlv),
0502     SOC_SINGLE_TLV("ADC2 EQ Band 2 Volume", DA732X_REG_ADC2_EQ12,
0503                DA732X_EQ_BAND2_SHIFT, DA732X_EQ_VOL_VAL_MAX,
0504                DA732X_INVERT, eq_band_pga_tlv),
0505     SOC_SINGLE_TLV("ADC2 EQ Band 3 Volume", DA732X_REG_ADC2_EQ34,
0506                DA732X_EQ_BAND3_SHIFT, DA732X_EQ_VOL_VAL_MAX,
0507                DA732X_INVERT, eq_band_pga_tlv),
0508     SOC_SINGLE_TLV("ACD2 EQ Band 4 Volume", DA732X_REG_ADC2_EQ34,
0509                DA732X_EQ_BAND4_SHIFT, DA732X_EQ_VOL_VAL_MAX,
0510                DA732X_INVERT, eq_band_pga_tlv),
0511     SOC_SINGLE_TLV("ACD2 EQ Band 5 Volume", DA732X_REG_ADC2_EQ5,
0512                DA732X_EQ_BAND5_SHIFT, DA732X_EQ_VOL_VAL_MAX,
0513                DA732X_INVERT, eq_band_pga_tlv),
0514     SOC_SINGLE_TLV("ADC2 EQ Overall Volume", DA732X_REG_ADC1_EQ5,
0515                DA732X_EQ_OVERALL_SHIFT, DA732X_EQ_OVERALL_VOL_VAL_MAX,
0516                DA732X_INVERT, eq_overall_tlv),
0517 
0518     SOC_SINGLE("DAC1 EQ Switch", DA732X_REG_DAC1_EQ5,
0519            DA732X_EQ_EN_SHIFT, DA732X_EQ_EN_MAX, DA732X_NO_INVERT),
0520     SOC_SINGLE_TLV("DAC1 EQ Band 1 Volume", DA732X_REG_DAC1_EQ12,
0521                DA732X_EQ_BAND1_SHIFT, DA732X_EQ_VOL_VAL_MAX,
0522                DA732X_INVERT, eq_band_pga_tlv),
0523     SOC_SINGLE_TLV("DAC1 EQ Band 2 Volume", DA732X_REG_DAC1_EQ12,
0524                DA732X_EQ_BAND2_SHIFT, DA732X_EQ_VOL_VAL_MAX,
0525                DA732X_INVERT, eq_band_pga_tlv),
0526     SOC_SINGLE_TLV("DAC1 EQ Band 3 Volume", DA732X_REG_DAC1_EQ34,
0527                DA732X_EQ_BAND3_SHIFT, DA732X_EQ_VOL_VAL_MAX,
0528                DA732X_INVERT, eq_band_pga_tlv),
0529     SOC_SINGLE_TLV("DAC1 EQ Band 4 Volume", DA732X_REG_DAC1_EQ34,
0530                DA732X_EQ_BAND4_SHIFT, DA732X_EQ_VOL_VAL_MAX,
0531                DA732X_INVERT, eq_band_pga_tlv),
0532     SOC_SINGLE_TLV("DAC1 EQ Band 5 Volume", DA732X_REG_DAC1_EQ5,
0533                DA732X_EQ_BAND5_SHIFT, DA732X_EQ_VOL_VAL_MAX,
0534                DA732X_INVERT, eq_band_pga_tlv),
0535 
0536     SOC_SINGLE("DAC2 EQ Switch", DA732X_REG_DAC2_EQ5,
0537            DA732X_EQ_EN_SHIFT, DA732X_EQ_EN_MAX, DA732X_NO_INVERT),
0538     SOC_SINGLE_TLV("DAC2 EQ Band 1 Volume", DA732X_REG_DAC2_EQ12,
0539                DA732X_EQ_BAND1_SHIFT, DA732X_EQ_VOL_VAL_MAX,
0540                DA732X_INVERT, eq_band_pga_tlv),
0541     SOC_SINGLE_TLV("DAC2 EQ Band 2 Volume", DA732X_REG_DAC2_EQ12,
0542                DA732X_EQ_BAND2_SHIFT, DA732X_EQ_VOL_VAL_MAX,
0543                DA732X_INVERT, eq_band_pga_tlv),
0544     SOC_SINGLE_TLV("DAC2 EQ Band 3 Volume", DA732X_REG_DAC2_EQ34,
0545                DA732X_EQ_BAND3_SHIFT, DA732X_EQ_VOL_VAL_MAX,
0546                DA732X_INVERT, eq_band_pga_tlv),
0547     SOC_SINGLE_TLV("DAC2 EQ Band 4 Volume", DA732X_REG_DAC2_EQ34,
0548                DA732X_EQ_BAND4_SHIFT, DA732X_EQ_VOL_VAL_MAX,
0549                DA732X_INVERT, eq_band_pga_tlv),
0550     SOC_SINGLE_TLV("DAC2 EQ Band 5 Volume", DA732X_REG_DAC2_EQ5,
0551                DA732X_EQ_BAND5_SHIFT, DA732X_EQ_VOL_VAL_MAX,
0552                DA732X_INVERT, eq_band_pga_tlv),
0553 
0554     SOC_SINGLE("DAC3 EQ Switch", DA732X_REG_DAC3_EQ5,
0555            DA732X_EQ_EN_SHIFT, DA732X_EQ_EN_MAX, DA732X_NO_INVERT),
0556     SOC_SINGLE_TLV("DAC3 EQ Band 1 Volume", DA732X_REG_DAC3_EQ12,
0557                DA732X_EQ_BAND1_SHIFT, DA732X_EQ_VOL_VAL_MAX,
0558                DA732X_INVERT, eq_band_pga_tlv),
0559     SOC_SINGLE_TLV("DAC3 EQ Band 2 Volume", DA732X_REG_DAC3_EQ12,
0560                DA732X_EQ_BAND2_SHIFT, DA732X_EQ_VOL_VAL_MAX,
0561                DA732X_INVERT, eq_band_pga_tlv),
0562     SOC_SINGLE_TLV("DAC3 EQ Band 3 Volume", DA732X_REG_DAC3_EQ34,
0563                DA732X_EQ_BAND3_SHIFT, DA732X_EQ_VOL_VAL_MAX,
0564                DA732X_INVERT, eq_band_pga_tlv),
0565     SOC_SINGLE_TLV("DAC3 EQ Band 4 Volume", DA732X_REG_DAC3_EQ34,
0566                DA732X_EQ_BAND4_SHIFT, DA732X_EQ_VOL_VAL_MAX,
0567                DA732X_INVERT, eq_band_pga_tlv),
0568     SOC_SINGLE_TLV("DAC3 EQ Band 5 Volume", DA732X_REG_DAC3_EQ5,
0569                DA732X_EQ_BAND5_SHIFT, DA732X_EQ_VOL_VAL_MAX,
0570                DA732X_INVERT, eq_band_pga_tlv),
0571 
0572     /* Lineout 2 Reciever*/
0573     SOC_SINGLE("Lineout 2 Switch", DA732X_REG_LIN2, DA732X_LOUT_MUTE_SHIFT,
0574            DA732X_SWITCH_MAX, DA732X_INVERT),
0575     SOC_SINGLE_TLV("Lineout 2 Volume", DA732X_REG_LIN2,
0576                DA732X_LOUT_VOL_SHIFT, DA732X_LOUT_VOL_VAL_MAX,
0577                DA732X_NO_INVERT, lin2_pga_tlv),
0578 
0579     /* Lineout 3 SPEAKER*/
0580     SOC_SINGLE("Lineout 3 Switch", DA732X_REG_LIN3, DA732X_LOUT_MUTE_SHIFT,
0581            DA732X_SWITCH_MAX, DA732X_INVERT),
0582     SOC_SINGLE_TLV("Lineout 3 Volume", DA732X_REG_LIN3,
0583                DA732X_LOUT_VOL_SHIFT, DA732X_LOUT_VOL_VAL_MAX,
0584                DA732X_NO_INVERT, lin3_pga_tlv),
0585 
0586     /* Lineout 4 */
0587     SOC_SINGLE("Lineout 4 Switch", DA732X_REG_LIN4, DA732X_LOUT_MUTE_SHIFT,
0588            DA732X_SWITCH_MAX, DA732X_INVERT),
0589     SOC_SINGLE_TLV("Lineout 4 Volume", DA732X_REG_LIN4,
0590                DA732X_LOUT_VOL_SHIFT, DA732X_LOUT_VOL_VAL_MAX,
0591                DA732X_NO_INVERT, lin4_pga_tlv),
0592 
0593     /* Headphones */
0594     SOC_DOUBLE_R("Headphone Switch", DA732X_REG_HPR, DA732X_REG_HPL,
0595              DA732X_HP_MUTE_SHIFT, DA732X_SWITCH_MAX, DA732X_INVERT),
0596     SOC_DOUBLE_R_TLV("Headphone Volume", DA732X_REG_HPL_VOL,
0597              DA732X_REG_HPR_VOL, DA732X_HP_VOL_SHIFT,
0598              DA732X_HP_VOL_VAL_MAX, DA732X_NO_INVERT, hp_pga_tlv),
0599 };
0600 
0601 static int da732x_adc_event(struct snd_soc_dapm_widget *w,
0602                 struct snd_kcontrol *kcontrol, int event)
0603 {
0604     struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
0605 
0606     switch (event) {
0607     case SND_SOC_DAPM_POST_PMU:
0608         switch (w->reg) {
0609         case DA732X_REG_ADC1_PD:
0610             snd_soc_component_update_bits(component, DA732X_REG_CLK_EN3,
0611                         DA732X_ADCA_BB_CLK_EN,
0612                         DA732X_ADCA_BB_CLK_EN);
0613             break;
0614         case DA732X_REG_ADC2_PD:
0615             snd_soc_component_update_bits(component, DA732X_REG_CLK_EN3,
0616                         DA732X_ADCC_BB_CLK_EN,
0617                         DA732X_ADCC_BB_CLK_EN);
0618             break;
0619         default:
0620             return -EINVAL;
0621         }
0622 
0623         snd_soc_component_update_bits(component, w->reg, DA732X_ADC_RST_MASK,
0624                     DA732X_ADC_SET_ACT);
0625         snd_soc_component_update_bits(component, w->reg, DA732X_ADC_PD_MASK,
0626                     DA732X_ADC_ON);
0627         break;
0628     case SND_SOC_DAPM_POST_PMD:
0629         snd_soc_component_update_bits(component, w->reg, DA732X_ADC_PD_MASK,
0630                     DA732X_ADC_OFF);
0631         snd_soc_component_update_bits(component, w->reg, DA732X_ADC_RST_MASK,
0632                     DA732X_ADC_SET_RST);
0633 
0634         switch (w->reg) {
0635         case DA732X_REG_ADC1_PD:
0636             snd_soc_component_update_bits(component, DA732X_REG_CLK_EN3,
0637                         DA732X_ADCA_BB_CLK_EN, 0);
0638             break;
0639         case DA732X_REG_ADC2_PD:
0640             snd_soc_component_update_bits(component, DA732X_REG_CLK_EN3,
0641                         DA732X_ADCC_BB_CLK_EN, 0);
0642             break;
0643         default:
0644             return -EINVAL;
0645         }
0646 
0647         break;
0648     default:
0649         return -EINVAL;
0650     }
0651 
0652     return 0;
0653 }
0654 
0655 static int da732x_out_pga_event(struct snd_soc_dapm_widget *w,
0656                 struct snd_kcontrol *kcontrol, int event)
0657 {
0658     struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
0659 
0660     switch (event) {
0661     case SND_SOC_DAPM_POST_PMU:
0662         snd_soc_component_update_bits(component, w->reg,
0663                     (1 << w->shift) | DA732X_OUT_HIZ_EN,
0664                     (1 << w->shift) | DA732X_OUT_HIZ_EN);
0665         break;
0666     case SND_SOC_DAPM_POST_PMD:
0667         snd_soc_component_update_bits(component, w->reg,
0668                     (1 << w->shift) | DA732X_OUT_HIZ_EN,
0669                     (1 << w->shift) | DA732X_OUT_HIZ_DIS);
0670         break;
0671     default:
0672         return -EINVAL;
0673     }
0674 
0675     return 0;
0676 }
0677 
0678 static const char *adcl_text[] = {
0679     "AUX1L", "MIC1"
0680 };
0681 
0682 static const char *adcr_text[] = {
0683     "AUX1R", "MIC2", "MIC3"
0684 };
0685 
0686 static const char *enable_text[] = {
0687     "Disabled",
0688     "Enabled"
0689 };
0690 
0691 /* ADC1LMUX */
0692 static SOC_ENUM_SINGLE_DECL(adc1l_enum,
0693                 DA732X_REG_INP_MUX, DA732X_ADC1L_MUX_SEL_SHIFT,
0694                 adcl_text);
0695 static const struct snd_kcontrol_new adc1l_mux =
0696     SOC_DAPM_ENUM("ADC Route", adc1l_enum);
0697 
0698 /* ADC1RMUX */
0699 static SOC_ENUM_SINGLE_DECL(adc1r_enum,
0700                 DA732X_REG_INP_MUX, DA732X_ADC1R_MUX_SEL_SHIFT,
0701                 adcr_text);
0702 static const struct snd_kcontrol_new adc1r_mux =
0703     SOC_DAPM_ENUM("ADC Route", adc1r_enum);
0704 
0705 /* ADC2LMUX */
0706 static SOC_ENUM_SINGLE_DECL(adc2l_enum,
0707                 DA732X_REG_INP_MUX, DA732X_ADC2L_MUX_SEL_SHIFT,
0708                 adcl_text);
0709 static const struct snd_kcontrol_new adc2l_mux =
0710     SOC_DAPM_ENUM("ADC Route", adc2l_enum);
0711 
0712 /* ADC2RMUX */
0713 static SOC_ENUM_SINGLE_DECL(adc2r_enum,
0714                 DA732X_REG_INP_MUX, DA732X_ADC2R_MUX_SEL_SHIFT,
0715                 adcr_text);
0716 
0717 static const struct snd_kcontrol_new adc2r_mux =
0718     SOC_DAPM_ENUM("ADC Route", adc2r_enum);
0719 
0720 static SOC_ENUM_SINGLE_DECL(da732x_hp_left_output,
0721                 DA732X_REG_HPL, DA732X_HP_OUT_DAC_EN_SHIFT,
0722                 enable_text);
0723 
0724 static const struct snd_kcontrol_new hpl_mux =
0725     SOC_DAPM_ENUM("HPL Switch", da732x_hp_left_output);
0726 
0727 static SOC_ENUM_SINGLE_DECL(da732x_hp_right_output,
0728                 DA732X_REG_HPR, DA732X_HP_OUT_DAC_EN_SHIFT,
0729                 enable_text);
0730 
0731 static const struct snd_kcontrol_new hpr_mux =
0732     SOC_DAPM_ENUM("HPR Switch", da732x_hp_right_output);
0733 
0734 static SOC_ENUM_SINGLE_DECL(da732x_speaker_output,
0735                 DA732X_REG_LIN3, DA732X_LOUT_DAC_EN_SHIFT,
0736                 enable_text);
0737 
0738 static const struct snd_kcontrol_new spk_mux =
0739     SOC_DAPM_ENUM("SPK Switch", da732x_speaker_output);
0740 
0741 static SOC_ENUM_SINGLE_DECL(da732x_lout4_output,
0742                 DA732X_REG_LIN4, DA732X_LOUT_DAC_EN_SHIFT,
0743                 enable_text);
0744 
0745 static const struct snd_kcontrol_new lout4_mux =
0746     SOC_DAPM_ENUM("LOUT4 Switch", da732x_lout4_output);
0747 
0748 static SOC_ENUM_SINGLE_DECL(da732x_lout2_output,
0749                 DA732X_REG_LIN2, DA732X_LOUT_DAC_EN_SHIFT,
0750                 enable_text);
0751 
0752 static const struct snd_kcontrol_new lout2_mux =
0753     SOC_DAPM_ENUM("LOUT2 Switch", da732x_lout2_output);
0754 
0755 static const struct snd_soc_dapm_widget da732x_dapm_widgets[] = {
0756     /* Supplies */
0757     SND_SOC_DAPM_SUPPLY("ADC1 Supply", DA732X_REG_ADC1_PD, 0,
0758                 DA732X_NO_INVERT, da732x_adc_event,
0759                 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
0760     SND_SOC_DAPM_SUPPLY("ADC2 Supply", DA732X_REG_ADC2_PD, 0,
0761                 DA732X_NO_INVERT, da732x_adc_event,
0762                 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
0763     SND_SOC_DAPM_SUPPLY("DAC1 CLK", DA732X_REG_CLK_EN4,
0764                 DA732X_DACA_BB_CLK_SHIFT, DA732X_NO_INVERT,
0765                 NULL, 0),
0766     SND_SOC_DAPM_SUPPLY("DAC2 CLK", DA732X_REG_CLK_EN4,
0767                 DA732X_DACC_BB_CLK_SHIFT, DA732X_NO_INVERT,
0768                 NULL, 0),
0769     SND_SOC_DAPM_SUPPLY("DAC3 CLK", DA732X_REG_CLK_EN5,
0770                 DA732X_DACE_BB_CLK_SHIFT, DA732X_NO_INVERT,
0771                 NULL, 0),
0772 
0773     /* Micbias */
0774     SND_SOC_DAPM_SUPPLY("MICBIAS1", DA732X_REG_MICBIAS1,
0775                 DA732X_MICBIAS_EN_SHIFT,
0776                 DA732X_NO_INVERT, NULL, 0),
0777     SND_SOC_DAPM_SUPPLY("MICBIAS2", DA732X_REG_MICBIAS2,
0778                 DA732X_MICBIAS_EN_SHIFT,
0779                 DA732X_NO_INVERT, NULL, 0),
0780 
0781     /* Inputs */
0782     SND_SOC_DAPM_INPUT("MIC1"),
0783     SND_SOC_DAPM_INPUT("MIC2"),
0784     SND_SOC_DAPM_INPUT("MIC3"),
0785     SND_SOC_DAPM_INPUT("AUX1L"),
0786     SND_SOC_DAPM_INPUT("AUX1R"),
0787 
0788     /* Outputs */
0789     SND_SOC_DAPM_OUTPUT("HPL"),
0790     SND_SOC_DAPM_OUTPUT("HPR"),
0791     SND_SOC_DAPM_OUTPUT("LOUTL"),
0792     SND_SOC_DAPM_OUTPUT("LOUTR"),
0793     SND_SOC_DAPM_OUTPUT("ClassD"),
0794 
0795     /* ADCs */
0796     SND_SOC_DAPM_ADC("ADC1L", NULL, DA732X_REG_ADC1_SEL,
0797              DA732X_ADCL_EN_SHIFT, DA732X_NO_INVERT),
0798     SND_SOC_DAPM_ADC("ADC1R", NULL, DA732X_REG_ADC1_SEL,
0799              DA732X_ADCR_EN_SHIFT, DA732X_NO_INVERT),
0800     SND_SOC_DAPM_ADC("ADC2L", NULL, DA732X_REG_ADC2_SEL,
0801              DA732X_ADCL_EN_SHIFT, DA732X_NO_INVERT),
0802     SND_SOC_DAPM_ADC("ADC2R", NULL, DA732X_REG_ADC2_SEL,
0803              DA732X_ADCR_EN_SHIFT, DA732X_NO_INVERT),
0804 
0805     /* DACs */
0806     SND_SOC_DAPM_DAC("DAC1L", NULL, DA732X_REG_DAC1_SEL,
0807              DA732X_DACL_EN_SHIFT, DA732X_NO_INVERT),
0808     SND_SOC_DAPM_DAC("DAC1R", NULL, DA732X_REG_DAC1_SEL,
0809              DA732X_DACR_EN_SHIFT, DA732X_NO_INVERT),
0810     SND_SOC_DAPM_DAC("DAC2L", NULL, DA732X_REG_DAC2_SEL,
0811              DA732X_DACL_EN_SHIFT, DA732X_NO_INVERT),
0812     SND_SOC_DAPM_DAC("DAC2R", NULL, DA732X_REG_DAC2_SEL,
0813              DA732X_DACR_EN_SHIFT, DA732X_NO_INVERT),
0814     SND_SOC_DAPM_DAC("DAC3", NULL, DA732X_REG_DAC3_SEL,
0815              DA732X_DACL_EN_SHIFT, DA732X_NO_INVERT),
0816 
0817     /* Input Pgas */
0818     SND_SOC_DAPM_PGA("MIC1 PGA", DA732X_REG_MIC1, DA732X_MIC_EN_SHIFT,
0819              0, NULL, 0),
0820     SND_SOC_DAPM_PGA("MIC2 PGA", DA732X_REG_MIC2, DA732X_MIC_EN_SHIFT,
0821              0, NULL, 0),
0822     SND_SOC_DAPM_PGA("MIC3 PGA", DA732X_REG_MIC3, DA732X_MIC_EN_SHIFT,
0823              0, NULL, 0),
0824     SND_SOC_DAPM_PGA("AUX1L PGA", DA732X_REG_AUX1L, DA732X_AUX_EN_SHIFT,
0825              0, NULL, 0),
0826     SND_SOC_DAPM_PGA("AUX1R PGA", DA732X_REG_AUX1R, DA732X_AUX_EN_SHIFT,
0827              0, NULL, 0),
0828 
0829     SND_SOC_DAPM_PGA_E("HP Left", DA732X_REG_HPL, DA732X_HP_OUT_EN_SHIFT,
0830                0, NULL, 0, da732x_out_pga_event,
0831                SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
0832     SND_SOC_DAPM_PGA_E("HP Right", DA732X_REG_HPR, DA732X_HP_OUT_EN_SHIFT,
0833                0, NULL, 0, da732x_out_pga_event,
0834                SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
0835     SND_SOC_DAPM_PGA_E("LIN2", DA732X_REG_LIN2, DA732X_LIN_OUT_EN_SHIFT,
0836                0, NULL, 0, da732x_out_pga_event,
0837                SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
0838     SND_SOC_DAPM_PGA_E("LIN3", DA732X_REG_LIN3, DA732X_LIN_OUT_EN_SHIFT,
0839                0, NULL, 0, da732x_out_pga_event,
0840                SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
0841     SND_SOC_DAPM_PGA_E("LIN4", DA732X_REG_LIN4, DA732X_LIN_OUT_EN_SHIFT,
0842                0, NULL, 0, da732x_out_pga_event,
0843                SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
0844 
0845     /* MUXs */
0846     SND_SOC_DAPM_MUX("ADC1 Left MUX", SND_SOC_NOPM, 0, 0, &adc1l_mux),
0847     SND_SOC_DAPM_MUX("ADC1 Right MUX", SND_SOC_NOPM, 0, 0, &adc1r_mux),
0848     SND_SOC_DAPM_MUX("ADC2 Left MUX", SND_SOC_NOPM, 0, 0, &adc2l_mux),
0849     SND_SOC_DAPM_MUX("ADC2 Right MUX", SND_SOC_NOPM, 0, 0, &adc2r_mux),
0850 
0851     SND_SOC_DAPM_MUX("HP Left MUX", SND_SOC_NOPM, 0, 0, &hpl_mux),
0852     SND_SOC_DAPM_MUX("HP Right MUX", SND_SOC_NOPM, 0, 0, &hpr_mux),
0853     SND_SOC_DAPM_MUX("Speaker MUX", SND_SOC_NOPM, 0, 0, &spk_mux),
0854     SND_SOC_DAPM_MUX("LOUT2 MUX", SND_SOC_NOPM, 0, 0, &lout2_mux),
0855     SND_SOC_DAPM_MUX("LOUT4 MUX", SND_SOC_NOPM, 0, 0, &lout4_mux),
0856 
0857     /* AIF interfaces */
0858     SND_SOC_DAPM_AIF_OUT("AIFA Output", "AIFA Capture", 0, DA732X_REG_AIFA3,
0859                  DA732X_AIF_EN_SHIFT, 0),
0860     SND_SOC_DAPM_AIF_IN("AIFA Input", "AIFA Playback", 0, DA732X_REG_AIFA3,
0861                 DA732X_AIF_EN_SHIFT, 0),
0862 
0863     SND_SOC_DAPM_AIF_OUT("AIFB Output", "AIFB Capture", 0, DA732X_REG_AIFB3,
0864                  DA732X_AIF_EN_SHIFT, 0),
0865     SND_SOC_DAPM_AIF_IN("AIFB Input", "AIFB Playback", 0, DA732X_REG_AIFB3,
0866                 DA732X_AIF_EN_SHIFT, 0),
0867 };
0868 
0869 static const struct snd_soc_dapm_route da732x_dapm_routes[] = {
0870     /* Inputs */
0871     {"AUX1L PGA", NULL, "AUX1L"},
0872     {"AUX1R PGA", NULL, "AUX1R"},
0873     {"MIC1 PGA", NULL, "MIC1"},
0874     {"MIC2 PGA", NULL, "MIC2"},
0875     {"MIC3 PGA", NULL, "MIC3"},
0876 
0877     /* Capture Path */
0878     {"ADC1 Left MUX", "MIC1", "MIC1 PGA"},
0879     {"ADC1 Left MUX", "AUX1L", "AUX1L PGA"},
0880 
0881     {"ADC1 Right MUX", "AUX1R", "AUX1R PGA"},
0882     {"ADC1 Right MUX", "MIC2", "MIC2 PGA"},
0883     {"ADC1 Right MUX", "MIC3", "MIC3 PGA"},
0884 
0885     {"ADC2 Left MUX", "AUX1L", "AUX1L PGA"},
0886     {"ADC2 Left MUX", "MIC1", "MIC1 PGA"},
0887 
0888     {"ADC2 Right MUX", "AUX1R", "AUX1R PGA"},
0889     {"ADC2 Right MUX", "MIC2", "MIC2 PGA"},
0890     {"ADC2 Right MUX", "MIC3", "MIC3 PGA"},
0891 
0892     {"ADC1L", NULL, "ADC1 Supply"},
0893     {"ADC1R", NULL, "ADC1 Supply"},
0894     {"ADC2L", NULL, "ADC2 Supply"},
0895     {"ADC2R", NULL, "ADC2 Supply"},
0896 
0897     {"ADC1L", NULL, "ADC1 Left MUX"},
0898     {"ADC1R", NULL, "ADC1 Right MUX"},
0899     {"ADC2L", NULL, "ADC2 Left MUX"},
0900     {"ADC2R", NULL, "ADC2 Right MUX"},
0901 
0902     {"AIFA Output", NULL, "ADC1L"},
0903     {"AIFA Output", NULL, "ADC1R"},
0904     {"AIFB Output", NULL, "ADC2L"},
0905     {"AIFB Output", NULL, "ADC2R"},
0906 
0907     {"HP Left MUX", "Enabled", "AIFA Input"},
0908     {"HP Right MUX", "Enabled", "AIFA Input"},
0909     {"Speaker MUX", "Enabled", "AIFB Input"},
0910     {"LOUT2 MUX", "Enabled", "AIFB Input"},
0911     {"LOUT4 MUX", "Enabled", "AIFB Input"},
0912 
0913     {"DAC1L", NULL, "DAC1 CLK"},
0914     {"DAC1R", NULL, "DAC1 CLK"},
0915     {"DAC2L", NULL, "DAC2 CLK"},
0916     {"DAC2R", NULL, "DAC2 CLK"},
0917     {"DAC3", NULL, "DAC3 CLK"},
0918 
0919     {"DAC1L", NULL, "HP Left MUX"},
0920     {"DAC1R", NULL, "HP Right MUX"},
0921     {"DAC2L", NULL, "Speaker MUX"},
0922     {"DAC2R", NULL, "LOUT4 MUX"},
0923     {"DAC3", NULL, "LOUT2 MUX"},
0924 
0925     /* Output Pgas */
0926     {"HP Left", NULL, "DAC1L"},
0927     {"HP Right", NULL, "DAC1R"},
0928     {"LIN3", NULL, "DAC2L"},
0929     {"LIN4", NULL, "DAC2R"},
0930     {"LIN2", NULL, "DAC3"},
0931 
0932     /* Outputs */
0933     {"ClassD", NULL, "LIN3"},
0934     {"LOUTL", NULL, "LIN2"},
0935     {"LOUTR", NULL, "LIN4"},
0936     {"HPL", NULL, "HP Left"},
0937     {"HPR", NULL, "HP Right"},
0938 };
0939 
0940 static int da732x_hw_params(struct snd_pcm_substream *substream,
0941                 struct snd_pcm_hw_params *params,
0942                 struct snd_soc_dai *dai)
0943 {
0944     struct snd_soc_component *component = dai->component;
0945     u32 aif = 0;
0946     u32 reg_aif;
0947     u32 fs;
0948 
0949     reg_aif = dai->driver->base;
0950 
0951     switch (params_width(params)) {
0952     case 16:
0953         aif |= DA732X_AIF_WORD_16;
0954         break;
0955     case 20:
0956         aif |= DA732X_AIF_WORD_20;
0957         break;
0958     case 24:
0959         aif |= DA732X_AIF_WORD_24;
0960         break;
0961     case 32:
0962         aif |= DA732X_AIF_WORD_32;
0963         break;
0964     default:
0965         return -EINVAL;
0966     }
0967 
0968     switch (params_rate(params)) {
0969     case 8000:
0970         fs = DA732X_SR_8KHZ;
0971         break;
0972     case 11025:
0973         fs = DA732X_SR_11_025KHZ;
0974         break;
0975     case 12000:
0976         fs = DA732X_SR_12KHZ;
0977         break;
0978     case 16000:
0979         fs = DA732X_SR_16KHZ;
0980         break;
0981     case 22050:
0982         fs = DA732X_SR_22_05KHZ;
0983         break;
0984     case 24000:
0985         fs = DA732X_SR_24KHZ;
0986         break;
0987     case 32000:
0988         fs = DA732X_SR_32KHZ;
0989         break;
0990     case 44100:
0991         fs = DA732X_SR_44_1KHZ;
0992         break;
0993     case 48000:
0994         fs = DA732X_SR_48KHZ;
0995         break;
0996     case 88100:
0997         fs = DA732X_SR_88_1KHZ;
0998         break;
0999     case 96000:
1000         fs = DA732X_SR_96KHZ;
1001         break;
1002     default:
1003         return -EINVAL;
1004     }
1005 
1006     snd_soc_component_update_bits(component, reg_aif, DA732X_AIF_WORD_MASK, aif);
1007     snd_soc_component_update_bits(component, DA732X_REG_CLK_CTRL, DA732X_SR1_MASK, fs);
1008 
1009     return 0;
1010 }
1011 
1012 static int da732x_set_dai_fmt(struct snd_soc_dai *dai, u32 fmt)
1013 {
1014     struct snd_soc_component *component = dai->component;
1015     u32 aif_mclk, pc_count;
1016     u32 reg_aif1, aif1;
1017     u32 reg_aif3, aif3;
1018 
1019     switch (dai->id) {
1020     case DA732X_DAI_ID1:
1021         reg_aif1 = DA732X_REG_AIFA1;
1022         reg_aif3 = DA732X_REG_AIFA3;
1023         pc_count = DA732X_PC_PULSE_AIFA | DA732X_PC_RESYNC_NOT_AUT |
1024                DA732X_PC_SAME;
1025         break;
1026     case DA732X_DAI_ID2:
1027         reg_aif1 = DA732X_REG_AIFB1;
1028         reg_aif3 = DA732X_REG_AIFB3;
1029         pc_count = DA732X_PC_PULSE_AIFB | DA732X_PC_RESYNC_NOT_AUT |
1030                DA732X_PC_SAME;
1031         break;
1032     default:
1033         return -EINVAL;
1034     }
1035 
1036     switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1037     case SND_SOC_DAIFMT_CBS_CFS:
1038         aif1 = DA732X_AIF_SLAVE;
1039         aif_mclk = DA732X_AIFM_FRAME_64 | DA732X_AIFM_SRC_SEL_AIFA;
1040         break;
1041     case SND_SOC_DAIFMT_CBM_CFM:
1042         aif1 = DA732X_AIF_CLK_FROM_SRC;
1043         aif_mclk = DA732X_CLK_GENERATION_AIF_A;
1044         break;
1045     default:
1046         return -EINVAL;
1047     }
1048 
1049     switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1050     case SND_SOC_DAIFMT_I2S:
1051         aif3 = DA732X_AIF_I2S_MODE;
1052         break;
1053     case SND_SOC_DAIFMT_RIGHT_J:
1054         aif3 = DA732X_AIF_RIGHT_J_MODE;
1055         break;
1056     case SND_SOC_DAIFMT_LEFT_J:
1057         aif3 = DA732X_AIF_LEFT_J_MODE;
1058         break;
1059     case SND_SOC_DAIFMT_DSP_B:
1060         aif3 = DA732X_AIF_DSP_MODE;
1061         break;
1062     default:
1063         return -EINVAL;
1064     }
1065 
1066     /* Clock inversion */
1067     switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1068     case SND_SOC_DAIFMT_DSP_B:
1069         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1070         case SND_SOC_DAIFMT_NB_NF:
1071             break;
1072         case SND_SOC_DAIFMT_IB_NF:
1073             aif3 |= DA732X_AIF_BCLK_INV;
1074             break;
1075         default:
1076             return -EINVAL;
1077         }
1078         break;
1079     case SND_SOC_DAIFMT_I2S:
1080     case SND_SOC_DAIFMT_RIGHT_J:
1081     case SND_SOC_DAIFMT_LEFT_J:
1082         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1083         case SND_SOC_DAIFMT_NB_NF:
1084             break;
1085         case SND_SOC_DAIFMT_IB_IF:
1086             aif3 |= DA732X_AIF_BCLK_INV | DA732X_AIF_WCLK_INV;
1087             break;
1088         case SND_SOC_DAIFMT_IB_NF:
1089             aif3 |= DA732X_AIF_BCLK_INV;
1090             break;
1091         case SND_SOC_DAIFMT_NB_IF:
1092             aif3 |= DA732X_AIF_WCLK_INV;
1093             break;
1094         default:
1095             return -EINVAL;
1096         }
1097         break;
1098     default:
1099         return -EINVAL;
1100     }
1101 
1102     snd_soc_component_write(component, DA732X_REG_AIF_MCLK, aif_mclk);
1103     snd_soc_component_update_bits(component, reg_aif1, DA732X_AIF1_CLK_MASK, aif1);
1104     snd_soc_component_update_bits(component, reg_aif3, DA732X_AIF_BCLK_INV |
1105                 DA732X_AIF_WCLK_INV | DA732X_AIF_MODE_MASK, aif3);
1106     snd_soc_component_write(component, DA732X_REG_PC_CTRL, pc_count);
1107 
1108     return 0;
1109 }
1110 
1111 
1112 
1113 static int da732x_set_dai_pll(struct snd_soc_component *component, int pll_id,
1114                   int source, unsigned int freq_in,
1115                   unsigned int freq_out)
1116 {
1117     struct da732x_priv *da732x = snd_soc_component_get_drvdata(component);
1118     int fref, indiv;
1119     u8 div_lo, div_mid, div_hi;
1120     u64 frac_div;
1121 
1122     /* Disable PLL */
1123     if (freq_out == 0) {
1124         snd_soc_component_update_bits(component, DA732X_REG_PLL_CTRL,
1125                     DA732X_PLL_EN, 0);
1126         da732x->pll_en = false;
1127         return 0;
1128     }
1129 
1130     if (da732x->pll_en)
1131         return -EBUSY;
1132 
1133     if (source == DA732X_SRCCLK_MCLK) {
1134         /* Validate Sysclk rate */
1135         switch (da732x->sysclk) {
1136         case 11290000:
1137         case 12288000:
1138         case 22580000:
1139         case 24576000:
1140         case 45160000:
1141         case 49152000:
1142             snd_soc_component_write(component, DA732X_REG_PLL_CTRL,
1143                       DA732X_PLL_BYPASS);
1144             return 0;
1145         default:
1146             dev_err(component->dev,
1147                 "Cannot use PLL Bypass, invalid SYSCLK rate\n");
1148             return -EINVAL;
1149         }
1150     }
1151 
1152     indiv = da732x_get_input_div(component, da732x->sysclk);
1153     if (indiv < 0)
1154         return indiv;
1155 
1156     fref = da732x->sysclk / BIT(indiv);
1157     div_hi = freq_out / fref;
1158     frac_div = (u64)(freq_out % fref) * 8192ULL;
1159     do_div(frac_div, fref);
1160     div_mid = (frac_div >> DA732X_1BYTE_SHIFT) & DA732X_U8_MASK;
1161     div_lo = (frac_div) & DA732X_U8_MASK;
1162 
1163     snd_soc_component_write(component, DA732X_REG_PLL_DIV_LO, div_lo);
1164     snd_soc_component_write(component, DA732X_REG_PLL_DIV_MID, div_mid);
1165     snd_soc_component_write(component, DA732X_REG_PLL_DIV_HI, div_hi);
1166 
1167     snd_soc_component_update_bits(component, DA732X_REG_PLL_CTRL, DA732X_PLL_EN,
1168                 DA732X_PLL_EN);
1169 
1170     da732x->pll_en = true;
1171 
1172     return 0;
1173 }
1174 
1175 static int da732x_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id,
1176                  unsigned int freq, int dir)
1177 {
1178     struct snd_soc_component *component = dai->component;
1179     struct da732x_priv *da732x = snd_soc_component_get_drvdata(component);
1180 
1181     da732x->sysclk = freq;
1182 
1183     return 0;
1184 }
1185 
1186 #define DA732X_RATES    SNDRV_PCM_RATE_8000_96000
1187 
1188 #define DA732X_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
1189             SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
1190 
1191 static const struct snd_soc_dai_ops da732x_dai_ops = {
1192     .hw_params  = da732x_hw_params,
1193     .set_fmt    = da732x_set_dai_fmt,
1194     .set_sysclk = da732x_set_dai_sysclk,
1195 };
1196 
1197 static struct snd_soc_dai_driver da732x_dai[] = {
1198     {
1199         .name   = "DA732X_AIFA",
1200         .id = DA732X_DAI_ID1,
1201         .base   = DA732X_REG_AIFA1,
1202         .playback = {
1203             .stream_name = "AIFA Playback",
1204             .channels_min = 1,
1205             .channels_max = 2,
1206             .rates = DA732X_RATES,
1207             .formats = DA732X_FORMATS,
1208         },
1209         .capture = {
1210             .stream_name = "AIFA Capture",
1211             .channels_min = 1,
1212             .channels_max = 2,
1213             .rates = DA732X_RATES,
1214             .formats = DA732X_FORMATS,
1215         },
1216         .ops = &da732x_dai_ops,
1217     },
1218     {
1219         .name   = "DA732X_AIFB",
1220         .id = DA732X_DAI_ID2,
1221         .base   = DA732X_REG_AIFB1,
1222         .playback = {
1223             .stream_name = "AIFB Playback",
1224             .channels_min = 1,
1225             .channels_max = 2,
1226             .rates = DA732X_RATES,
1227             .formats = DA732X_FORMATS,
1228         },
1229         .capture = {
1230             .stream_name = "AIFB Capture",
1231             .channels_min = 1,
1232             .channels_max = 2,
1233             .rates = DA732X_RATES,
1234             .formats = DA732X_FORMATS,
1235         },
1236         .ops = &da732x_dai_ops,
1237     },
1238 };
1239 
1240 static bool da732x_volatile(struct device *dev, unsigned int reg)
1241 {
1242     switch (reg) {
1243     case DA732X_REG_HPL_DAC_OFF_CNTL:
1244     case DA732X_REG_HPR_DAC_OFF_CNTL:
1245         return true;
1246     default:
1247         return false;
1248     }
1249 }
1250 
1251 static const struct regmap_config da732x_regmap = {
1252     .reg_bits       = 8,
1253     .val_bits       = 8,
1254 
1255     .max_register       = DA732X_MAX_REG,
1256     .volatile_reg       = da732x_volatile,
1257     .reg_defaults       = da732x_reg_cache,
1258     .num_reg_defaults   = ARRAY_SIZE(da732x_reg_cache),
1259     .cache_type     = REGCACHE_RBTREE,
1260 };
1261 
1262 
1263 static void da732x_dac_offset_adjust(struct snd_soc_component *component)
1264 {
1265     u8 offset[DA732X_HP_DACS];
1266     u8 sign[DA732X_HP_DACS];
1267     u8 step = DA732X_DAC_OFFSET_STEP;
1268 
1269     /* Initialize DAC offset calibration circuits and registers */
1270     snd_soc_component_write(component, DA732X_REG_HPL_DAC_OFFSET,
1271               DA732X_HP_DAC_OFFSET_TRIM_VAL);
1272     snd_soc_component_write(component, DA732X_REG_HPR_DAC_OFFSET,
1273               DA732X_HP_DAC_OFFSET_TRIM_VAL);
1274     snd_soc_component_write(component, DA732X_REG_HPL_DAC_OFF_CNTL,
1275               DA732X_HP_DAC_OFF_CALIBRATION |
1276               DA732X_HP_DAC_OFF_SCALE_STEPS);
1277     snd_soc_component_write(component, DA732X_REG_HPR_DAC_OFF_CNTL,
1278               DA732X_HP_DAC_OFF_CALIBRATION |
1279               DA732X_HP_DAC_OFF_SCALE_STEPS);
1280 
1281     /* Wait for voltage stabilization */
1282     msleep(DA732X_WAIT_FOR_STABILIZATION);
1283 
1284     /* Check DAC offset sign */
1285     sign[DA732X_HPL_DAC] = (snd_soc_component_read(component, DA732X_REG_HPL_DAC_OFF_CNTL) &
1286                 DA732X_HP_DAC_OFF_CNTL_COMPO);
1287     sign[DA732X_HPR_DAC] = (snd_soc_component_read(component, DA732X_REG_HPR_DAC_OFF_CNTL) &
1288                 DA732X_HP_DAC_OFF_CNTL_COMPO);
1289 
1290     /* Binary search DAC offset values (both channels at once) */
1291     offset[DA732X_HPL_DAC] = sign[DA732X_HPL_DAC] << DA732X_HP_DAC_COMPO_SHIFT;
1292     offset[DA732X_HPR_DAC] = sign[DA732X_HPR_DAC] << DA732X_HP_DAC_COMPO_SHIFT;
1293 
1294     do {
1295         offset[DA732X_HPL_DAC] |= step;
1296         offset[DA732X_HPR_DAC] |= step;
1297         snd_soc_component_write(component, DA732X_REG_HPL_DAC_OFFSET,
1298                   ~offset[DA732X_HPL_DAC] & DA732X_HP_DAC_OFF_MASK);
1299         snd_soc_component_write(component, DA732X_REG_HPR_DAC_OFFSET,
1300                   ~offset[DA732X_HPR_DAC] & DA732X_HP_DAC_OFF_MASK);
1301 
1302         msleep(DA732X_WAIT_FOR_STABILIZATION);
1303 
1304         if ((snd_soc_component_read(component, DA732X_REG_HPL_DAC_OFF_CNTL) &
1305              DA732X_HP_DAC_OFF_CNTL_COMPO) ^ sign[DA732X_HPL_DAC])
1306             offset[DA732X_HPL_DAC] &= ~step;
1307         if ((snd_soc_component_read(component, DA732X_REG_HPR_DAC_OFF_CNTL) &
1308              DA732X_HP_DAC_OFF_CNTL_COMPO) ^ sign[DA732X_HPR_DAC])
1309             offset[DA732X_HPR_DAC] &= ~step;
1310 
1311         step >>= 1;
1312     } while (step);
1313 
1314     /* Write final DAC offsets to registers */
1315     snd_soc_component_write(component, DA732X_REG_HPL_DAC_OFFSET,
1316               ~offset[DA732X_HPL_DAC] & DA732X_HP_DAC_OFF_MASK);
1317     snd_soc_component_write(component, DA732X_REG_HPR_DAC_OFFSET,
1318               ~offset[DA732X_HPR_DAC] & DA732X_HP_DAC_OFF_MASK);
1319 
1320     /* End DAC calibration mode */
1321     snd_soc_component_write(component, DA732X_REG_HPL_DAC_OFF_CNTL,
1322         DA732X_HP_DAC_OFF_SCALE_STEPS);
1323     snd_soc_component_write(component, DA732X_REG_HPR_DAC_OFF_CNTL,
1324         DA732X_HP_DAC_OFF_SCALE_STEPS);
1325 }
1326 
1327 static void da732x_output_offset_adjust(struct snd_soc_component *component)
1328 {
1329     u8 offset[DA732X_HP_AMPS];
1330     u8 sign[DA732X_HP_AMPS];
1331     u8 step = DA732X_OUTPUT_OFFSET_STEP;
1332 
1333     offset[DA732X_HPL_AMP] = DA732X_HP_OUT_TRIM_VAL;
1334     offset[DA732X_HPR_AMP] = DA732X_HP_OUT_TRIM_VAL;
1335 
1336     /* Initialize output offset calibration circuits and registers  */
1337     snd_soc_component_write(component, DA732X_REG_HPL_OUT_OFFSET, DA732X_HP_OUT_TRIM_VAL);
1338     snd_soc_component_write(component, DA732X_REG_HPR_OUT_OFFSET, DA732X_HP_OUT_TRIM_VAL);
1339     snd_soc_component_write(component, DA732X_REG_HPL,
1340               DA732X_HP_OUT_COMP | DA732X_HP_OUT_EN);
1341     snd_soc_component_write(component, DA732X_REG_HPR,
1342               DA732X_HP_OUT_COMP | DA732X_HP_OUT_EN);
1343 
1344     /* Wait for voltage stabilization */
1345     msleep(DA732X_WAIT_FOR_STABILIZATION);
1346 
1347     /* Check output offset sign */
1348     sign[DA732X_HPL_AMP] = snd_soc_component_read(component, DA732X_REG_HPL) &
1349                    DA732X_HP_OUT_COMPO;
1350     sign[DA732X_HPR_AMP] = snd_soc_component_read(component, DA732X_REG_HPR) &
1351                    DA732X_HP_OUT_COMPO;
1352 
1353     snd_soc_component_write(component, DA732X_REG_HPL, DA732X_HP_OUT_COMP |
1354               (sign[DA732X_HPL_AMP] >> DA732X_HP_OUT_COMPO_SHIFT) |
1355               DA732X_HP_OUT_EN);
1356     snd_soc_component_write(component, DA732X_REG_HPR, DA732X_HP_OUT_COMP |
1357               (sign[DA732X_HPR_AMP] >> DA732X_HP_OUT_COMPO_SHIFT) |
1358               DA732X_HP_OUT_EN);
1359 
1360     /* Binary search output offset values (both channels at once) */
1361     do {
1362         offset[DA732X_HPL_AMP] |= step;
1363         offset[DA732X_HPR_AMP] |= step;
1364         snd_soc_component_write(component, DA732X_REG_HPL_OUT_OFFSET,
1365                   offset[DA732X_HPL_AMP]);
1366         snd_soc_component_write(component, DA732X_REG_HPR_OUT_OFFSET,
1367                   offset[DA732X_HPR_AMP]);
1368 
1369         msleep(DA732X_WAIT_FOR_STABILIZATION);
1370 
1371         if ((snd_soc_component_read(component, DA732X_REG_HPL) &
1372              DA732X_HP_OUT_COMPO) ^ sign[DA732X_HPL_AMP])
1373             offset[DA732X_HPL_AMP] &= ~step;
1374         if ((snd_soc_component_read(component, DA732X_REG_HPR) &
1375              DA732X_HP_OUT_COMPO) ^ sign[DA732X_HPR_AMP])
1376             offset[DA732X_HPR_AMP] &= ~step;
1377 
1378         step >>= 1;
1379     } while (step);
1380 
1381     /* Write final DAC offsets to registers */
1382     snd_soc_component_write(component, DA732X_REG_HPL_OUT_OFFSET, offset[DA732X_HPL_AMP]);
1383     snd_soc_component_write(component, DA732X_REG_HPR_OUT_OFFSET, offset[DA732X_HPR_AMP]);
1384 }
1385 
1386 static void da732x_hp_dc_offset_cancellation(struct snd_soc_component *component)
1387 {
1388     /* Make sure that we have Soft Mute enabled */
1389     snd_soc_component_write(component, DA732X_REG_DAC1_SOFTMUTE, DA732X_SOFTMUTE_EN |
1390               DA732X_GAIN_RAMPED | DA732X_16_SAMPLES);
1391     snd_soc_component_write(component, DA732X_REG_DAC1_SEL, DA732X_DACL_EN |
1392               DA732X_DACR_EN | DA732X_DACL_SDM | DA732X_DACR_SDM |
1393               DA732X_DACL_MUTE | DA732X_DACR_MUTE);
1394     snd_soc_component_write(component, DA732X_REG_HPL, DA732X_HP_OUT_DAC_EN |
1395               DA732X_HP_OUT_MUTE | DA732X_HP_OUT_EN);
1396     snd_soc_component_write(component, DA732X_REG_HPR, DA732X_HP_OUT_EN |
1397               DA732X_HP_OUT_MUTE | DA732X_HP_OUT_DAC_EN);
1398 
1399     da732x_dac_offset_adjust(component);
1400     da732x_output_offset_adjust(component);
1401 
1402     snd_soc_component_write(component, DA732X_REG_DAC1_SEL, DA732X_DACS_DIS);
1403     snd_soc_component_write(component, DA732X_REG_HPL, DA732X_HP_DIS);
1404     snd_soc_component_write(component, DA732X_REG_HPR, DA732X_HP_DIS);
1405 }
1406 
1407 static int da732x_set_bias_level(struct snd_soc_component *component,
1408                  enum snd_soc_bias_level level)
1409 {
1410     struct da732x_priv *da732x = snd_soc_component_get_drvdata(component);
1411 
1412     switch (level) {
1413     case SND_SOC_BIAS_ON:
1414         snd_soc_component_update_bits(component, DA732X_REG_BIAS_EN,
1415                     DA732X_BIAS_BOOST_MASK,
1416                     DA732X_BIAS_BOOST_100PC);
1417         break;
1418     case SND_SOC_BIAS_PREPARE:
1419         break;
1420     case SND_SOC_BIAS_STANDBY:
1421         if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
1422             /* Init Codec */
1423             snd_soc_component_write(component, DA732X_REG_REF1,
1424                       DA732X_VMID_FASTCHG);
1425             snd_soc_component_write(component, DA732X_REG_BIAS_EN,
1426                       DA732X_BIAS_EN);
1427 
1428             mdelay(DA732X_STARTUP_DELAY);
1429 
1430             /* Disable Fast Charge and enable DAC ref voltage */
1431             snd_soc_component_write(component, DA732X_REG_REF1,
1432                       DA732X_REFBUFX2_EN);
1433 
1434             /* Enable bypass DSP routing */
1435             snd_soc_component_write(component, DA732X_REG_DATA_ROUTE,
1436                       DA732X_BYPASS_DSP);
1437 
1438             /* Enable Digital subsystem */
1439             snd_soc_component_write(component, DA732X_REG_DSP_CTRL,
1440                       DA732X_DIGITAL_EN);
1441 
1442             snd_soc_component_write(component, DA732X_REG_SPARE1_OUT,
1443                       DA732X_HP_DRIVER_EN |
1444                       DA732X_HP_GATE_LOW |
1445                       DA732X_HP_LOOP_GAIN_CTRL);
1446             snd_soc_component_write(component, DA732X_REG_HP_LIN1_GNDSEL,
1447                       DA732X_HP_OUT_GNDSEL);
1448 
1449             da732x_set_charge_pump(component, DA732X_ENABLE_CP);
1450 
1451             snd_soc_component_write(component, DA732X_REG_CLK_EN1,
1452                   DA732X_SYS3_CLK_EN | DA732X_PC_CLK_EN);
1453 
1454             /* Enable Zero Crossing */
1455             snd_soc_component_write(component, DA732X_REG_INP_ZC_EN,
1456                       DA732X_MIC1_PRE_ZC_EN |
1457                       DA732X_MIC1_ZC_EN |
1458                       DA732X_MIC2_PRE_ZC_EN |
1459                       DA732X_MIC2_ZC_EN |
1460                       DA732X_AUXL_ZC_EN |
1461                       DA732X_AUXR_ZC_EN |
1462                       DA732X_MIC3_PRE_ZC_EN |
1463                       DA732X_MIC3_ZC_EN);
1464             snd_soc_component_write(component, DA732X_REG_OUT_ZC_EN,
1465                       DA732X_HPL_ZC_EN | DA732X_HPR_ZC_EN |
1466                       DA732X_LIN2_ZC_EN | DA732X_LIN3_ZC_EN |
1467                       DA732X_LIN4_ZC_EN);
1468 
1469             da732x_hp_dc_offset_cancellation(component);
1470 
1471             regcache_cache_only(da732x->regmap, false);
1472             regcache_sync(da732x->regmap);
1473         } else {
1474             snd_soc_component_update_bits(component, DA732X_REG_BIAS_EN,
1475                         DA732X_BIAS_BOOST_MASK,
1476                         DA732X_BIAS_BOOST_50PC);
1477             snd_soc_component_update_bits(component, DA732X_REG_PLL_CTRL,
1478                         DA732X_PLL_EN, 0);
1479             da732x->pll_en = false;
1480         }
1481         break;
1482     case SND_SOC_BIAS_OFF:
1483         regcache_cache_only(da732x->regmap, true);
1484         da732x_set_charge_pump(component, DA732X_DISABLE_CP);
1485         snd_soc_component_update_bits(component, DA732X_REG_BIAS_EN, DA732X_BIAS_EN,
1486                     DA732X_BIAS_DIS);
1487         da732x->pll_en = false;
1488         break;
1489     }
1490 
1491     return 0;
1492 }
1493 
1494 static const struct snd_soc_component_driver soc_component_dev_da732x = {
1495     .set_bias_level     = da732x_set_bias_level,
1496     .controls       = da732x_snd_controls,
1497     .num_controls       = ARRAY_SIZE(da732x_snd_controls),
1498     .dapm_widgets       = da732x_dapm_widgets,
1499     .num_dapm_widgets   = ARRAY_SIZE(da732x_dapm_widgets),
1500     .dapm_routes        = da732x_dapm_routes,
1501     .num_dapm_routes    = ARRAY_SIZE(da732x_dapm_routes),
1502     .set_pll        = da732x_set_dai_pll,
1503     .idle_bias_on       = 1,
1504     .use_pmdown_time    = 1,
1505     .endianness     = 1,
1506 };
1507 
1508 static int da732x_i2c_probe(struct i2c_client *i2c)
1509 {
1510     struct da732x_priv *da732x;
1511     unsigned int reg;
1512     int ret;
1513 
1514     da732x = devm_kzalloc(&i2c->dev, sizeof(struct da732x_priv),
1515                   GFP_KERNEL);
1516     if (!da732x)
1517         return -ENOMEM;
1518 
1519     i2c_set_clientdata(i2c, da732x);
1520 
1521     da732x->regmap = devm_regmap_init_i2c(i2c, &da732x_regmap);
1522     if (IS_ERR(da732x->regmap)) {
1523         ret = PTR_ERR(da732x->regmap);
1524         dev_err(&i2c->dev, "Failed to initialize regmap\n");
1525         goto err;
1526     }
1527 
1528     ret = regmap_read(da732x->regmap, DA732X_REG_ID, &reg);
1529     if (ret < 0) {
1530         dev_err(&i2c->dev, "Failed to read ID register: %d\n", ret);
1531         goto err;
1532     }
1533 
1534     dev_info(&i2c->dev, "Revision: %d.%d\n",
1535          (reg & DA732X_ID_MAJOR_MASK) >> 4,
1536          (reg & DA732X_ID_MINOR_MASK));
1537 
1538     ret = devm_snd_soc_register_component(&i2c->dev,
1539                      &soc_component_dev_da732x,
1540                      da732x_dai, ARRAY_SIZE(da732x_dai));
1541     if (ret != 0)
1542         dev_err(&i2c->dev, "Failed to register component.\n");
1543 
1544 err:
1545     return ret;
1546 }
1547 
1548 static const struct i2c_device_id da732x_i2c_id[] = {
1549     { "da7320", 0},
1550     { }
1551 };
1552 MODULE_DEVICE_TABLE(i2c, da732x_i2c_id);
1553 
1554 static struct i2c_driver da732x_i2c_driver = {
1555     .driver     = {
1556         .name   = "da7320",
1557     },
1558     .probe_new  = da732x_i2c_probe,
1559     .id_table   = da732x_i2c_id,
1560 };
1561 
1562 module_i2c_driver(da732x_i2c_driver);
1563 
1564 
1565 MODULE_DESCRIPTION("ASoC DA732X driver");
1566 MODULE_AUTHOR("Michal Hajduk <michal.hajduk@diasemi.com>");
1567 MODULE_LICENSE("GPL");
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