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OSCL-LXR
 
 

     

0001 // SPDX-License-Identifier: GPL-2.0+
0002 //
0003 // DA7210 ALSA Soc codec driver
0004 //
0005 // Copyright (c) 2009 Dialog Semiconductor
0006 // Written by David Chen <Dajun.chen@diasemi.com>
0007 //
0008 // Copyright (C) 2009 Renesas Solutions Corp.
0009 // Cleanups by Kuninori Morimoto <morimoto.kuninori@renesas.com>
0010 //
0011 // Tested on SuperH Ecovec24 board with S16/S24 LE in 48KHz using I2S
0012 
0013 #include <linux/delay.h>
0014 #include <linux/i2c.h>
0015 #include <linux/spi/spi.h>
0016 #include <linux/regmap.h>
0017 #include <linux/slab.h>
0018 #include <linux/module.h>
0019 #include <sound/pcm.h>
0020 #include <sound/pcm_params.h>
0021 #include <sound/soc.h>
0022 #include <sound/initval.h>
0023 #include <sound/tlv.h>
0024 
0025 /* DA7210 register space */
0026 #define DA7210_PAGE_CONTROL     0x00
0027 #define DA7210_CONTROL          0x01
0028 #define DA7210_STATUS           0x02
0029 #define DA7210_STARTUP1         0x03
0030 #define DA7210_STARTUP2         0x04
0031 #define DA7210_STARTUP3         0x05
0032 #define DA7210_MIC_L            0x07
0033 #define DA7210_MIC_R            0x08
0034 #define DA7210_AUX1_L           0x09
0035 #define DA7210_AUX1_R           0x0A
0036 #define DA7210_AUX2         0x0B
0037 #define DA7210_IN_GAIN          0x0C
0038 #define DA7210_INMIX_L          0x0D
0039 #define DA7210_INMIX_R          0x0E
0040 #define DA7210_ADC_HPF          0x0F
0041 #define DA7210_ADC          0x10
0042 #define DA7210_ADC_EQ1_2        0X11
0043 #define DA7210_ADC_EQ3_4        0x12
0044 #define DA7210_ADC_EQ5          0x13
0045 #define DA7210_DAC_HPF          0x14
0046 #define DA7210_DAC_L            0x15
0047 #define DA7210_DAC_R            0x16
0048 #define DA7210_DAC_SEL          0x17
0049 #define DA7210_SOFTMUTE         0x18
0050 #define DA7210_DAC_EQ1_2        0x19
0051 #define DA7210_DAC_EQ3_4        0x1A
0052 #define DA7210_DAC_EQ5          0x1B
0053 #define DA7210_OUTMIX_L         0x1C
0054 #define DA7210_OUTMIX_R         0x1D
0055 #define DA7210_OUT1_L           0x1E
0056 #define DA7210_OUT1_R           0x1F
0057 #define DA7210_OUT2         0x20
0058 #define DA7210_HP_L_VOL         0x21
0059 #define DA7210_HP_R_VOL         0x22
0060 #define DA7210_HP_CFG           0x23
0061 #define DA7210_ZERO_CROSS       0x24
0062 #define DA7210_DAI_SRC_SEL      0x25
0063 #define DA7210_DAI_CFG1         0x26
0064 #define DA7210_DAI_CFG3         0x28
0065 #define DA7210_PLL_DIV1         0x29
0066 #define DA7210_PLL_DIV2         0x2A
0067 #define DA7210_PLL_DIV3         0x2B
0068 #define DA7210_PLL          0x2C
0069 #define DA7210_ALC_MAX          0x83
0070 #define DA7210_ALC_MIN          0x84
0071 #define DA7210_ALC_NOIS         0x85
0072 #define DA7210_ALC_ATT          0x86
0073 #define DA7210_ALC_REL          0x87
0074 #define DA7210_ALC_DEL          0x88
0075 #define DA7210_A_HID_UNLOCK     0x8A
0076 #define DA7210_A_TEST_UNLOCK        0x8B
0077 #define DA7210_A_PLL1           0x90
0078 #define DA7210_A_CP_MODE        0xA7
0079 
0080 /* STARTUP1 bit fields */
0081 #define DA7210_SC_MST_EN        (1 << 0)
0082 
0083 /* MIC_L bit fields */
0084 #define DA7210_MICBIAS_EN       (1 << 6)
0085 #define DA7210_MIC_L_EN         (1 << 7)
0086 
0087 /* MIC_R bit fields */
0088 #define DA7210_MIC_R_EN         (1 << 7)
0089 
0090 /* INMIX_L bit fields */
0091 #define DA7210_IN_L_EN          (1 << 7)
0092 
0093 /* INMIX_R bit fields */
0094 #define DA7210_IN_R_EN          (1 << 7)
0095 
0096 /* ADC bit fields */
0097 #define DA7210_ADC_ALC_EN       (1 << 0)
0098 #define DA7210_ADC_L_EN         (1 << 3)
0099 #define DA7210_ADC_R_EN         (1 << 7)
0100 
0101 /* DAC/ADC HPF fields */
0102 #define DA7210_VOICE_F0_MASK        (0x7 << 4)
0103 #define DA7210_VOICE_F0_25      (1 << 4)
0104 #define DA7210_VOICE_EN         (1 << 7)
0105 
0106 /* DAC_SEL bit fields */
0107 #define DA7210_DAC_L_SRC_DAI_L      (4 << 0)
0108 #define DA7210_DAC_L_EN         (1 << 3)
0109 #define DA7210_DAC_R_SRC_DAI_R      (5 << 4)
0110 #define DA7210_DAC_R_EN         (1 << 7)
0111 
0112 /* OUTMIX_L bit fields */
0113 #define DA7210_OUT_L_EN         (1 << 7)
0114 
0115 /* OUTMIX_R bit fields */
0116 #define DA7210_OUT_R_EN         (1 << 7)
0117 
0118 /* HP_CFG bit fields */
0119 #define DA7210_HP_2CAP_MODE     (1 << 1)
0120 #define DA7210_HP_SENSE_EN      (1 << 2)
0121 #define DA7210_HP_L_EN          (1 << 3)
0122 #define DA7210_HP_MODE          (1 << 6)
0123 #define DA7210_HP_R_EN          (1 << 7)
0124 
0125 /* DAI_SRC_SEL bit fields */
0126 #define DA7210_DAI_OUT_L_SRC        (6 << 0)
0127 #define DA7210_DAI_OUT_R_SRC        (7 << 4)
0128 
0129 /* DAI_CFG1 bit fields */
0130 #define DA7210_DAI_WORD_S16_LE      (0 << 0)
0131 #define DA7210_DAI_WORD_S20_3LE     (1 << 0)
0132 #define DA7210_DAI_WORD_S24_LE      (2 << 0)
0133 #define DA7210_DAI_WORD_S32_LE      (3 << 0)
0134 #define DA7210_DAI_FLEN_64BIT       (1 << 2)
0135 #define DA7210_DAI_MODE_SLAVE       (0 << 7)
0136 #define DA7210_DAI_MODE_MASTER      (1 << 7)
0137 
0138 /* DAI_CFG3 bit fields */
0139 #define DA7210_DAI_FORMAT_I2SMODE   (0 << 0)
0140 #define DA7210_DAI_FORMAT_LEFT_J    (1 << 0)
0141 #define DA7210_DAI_FORMAT_RIGHT_J   (2 << 0)
0142 #define DA7210_DAI_OE           (1 << 3)
0143 #define DA7210_DAI_EN           (1 << 7)
0144 
0145 /*PLL_DIV3 bit fields */
0146 #define DA7210_PLL_DIV_L_MASK       (0xF << 0)
0147 #define DA7210_MCLK_RANGE_10_20_MHZ (1 << 4)
0148 #define DA7210_PLL_BYP          (1 << 6)
0149 
0150 /* PLL bit fields */
0151 #define DA7210_PLL_FS_MASK      (0xF << 0)
0152 #define DA7210_PLL_FS_8000      (0x1 << 0)
0153 #define DA7210_PLL_FS_11025     (0x2 << 0)
0154 #define DA7210_PLL_FS_12000     (0x3 << 0)
0155 #define DA7210_PLL_FS_16000     (0x5 << 0)
0156 #define DA7210_PLL_FS_22050     (0x6 << 0)
0157 #define DA7210_PLL_FS_24000     (0x7 << 0)
0158 #define DA7210_PLL_FS_32000     (0x9 << 0)
0159 #define DA7210_PLL_FS_44100     (0xA << 0)
0160 #define DA7210_PLL_FS_48000     (0xB << 0)
0161 #define DA7210_PLL_FS_88200     (0xE << 0)
0162 #define DA7210_PLL_FS_96000     (0xF << 0)
0163 #define DA7210_MCLK_DET_EN      (0x1 << 5)
0164 #define DA7210_MCLK_SRM_EN      (0x1 << 6)
0165 #define DA7210_PLL_EN           (0x1 << 7)
0166 
0167 /* SOFTMUTE bit fields */
0168 #define DA7210_RAMP_EN          (1 << 6)
0169 
0170 /* CONTROL bit fields */
0171 #define DA7210_REG_EN           (1 << 0)
0172 #define DA7210_BIAS_EN          (1 << 2)
0173 #define DA7210_NOISE_SUP_EN     (1 << 3)
0174 
0175 /* IN_GAIN bit fields */
0176 #define DA7210_INPGA_L_VOL      (0x0F << 0)
0177 #define DA7210_INPGA_R_VOL      (0xF0 << 0)
0178 
0179 /* ZERO_CROSS bit fields */
0180 #define DA7210_AUX1_L_ZC        (1 << 0)
0181 #define DA7210_AUX1_R_ZC        (1 << 1)
0182 #define DA7210_HP_L_ZC          (1 << 6)
0183 #define DA7210_HP_R_ZC          (1 << 7)
0184 
0185 /* AUX1_L bit fields */
0186 #define DA7210_AUX1_L_VOL       (0x3F << 0)
0187 #define DA7210_AUX1_L_EN        (1 << 7)
0188 
0189 /* AUX1_R bit fields */
0190 #define DA7210_AUX1_R_VOL       (0x3F << 0)
0191 #define DA7210_AUX1_R_EN        (1 << 7)
0192 
0193 /* AUX2 bit fields */
0194 #define DA7210_AUX2_EN          (1 << 3)
0195 
0196 /* Minimum INPGA and AUX1 volume to enable noise suppression */
0197 #define DA7210_INPGA_MIN_VOL_NS     0x0A  /* 10.5dB */
0198 #define DA7210_AUX1_MIN_VOL_NS      0x35  /* 6dB */
0199 
0200 /* OUT1_L bit fields */
0201 #define DA7210_OUT1_L_EN        (1 << 7)
0202 
0203 /* OUT1_R bit fields */
0204 #define DA7210_OUT1_R_EN        (1 << 7)
0205 
0206 /* OUT2 bit fields */
0207 #define DA7210_OUT2_OUTMIX_R        (1 << 5)
0208 #define DA7210_OUT2_OUTMIX_L        (1 << 6)
0209 #define DA7210_OUT2_EN          (1 << 7)
0210 
0211 struct pll_div {
0212     int fref;
0213     int fout;
0214     u8 div1;
0215     u8 div2;
0216     u8 div3;
0217     u8 mode;    /* 0 = slave, 1 = master */
0218 };
0219 
0220 /* PLL dividers table */
0221 static const struct pll_div da7210_pll_div[] = {
0222     /* for MASTER mode, fs = 44.1Khz */
0223     { 12000000, 2822400, 0xE8, 0x6C, 0x2, 1},   /* MCLK=12Mhz */
0224     { 13000000, 2822400, 0xDF, 0x28, 0xC, 1},   /* MCLK=13Mhz */
0225     { 13500000, 2822400, 0xDB, 0x0A, 0xD, 1},   /* MCLK=13.5Mhz */
0226     { 14400000, 2822400, 0xD4, 0x5A, 0x2, 1},   /* MCLK=14.4Mhz */
0227     { 19200000, 2822400, 0xBB, 0x43, 0x9, 1},   /* MCLK=19.2Mhz */
0228     { 19680000, 2822400, 0xB9, 0x6D, 0xA, 1},   /* MCLK=19.68Mhz */
0229     { 19800000, 2822400, 0xB8, 0xFB, 0xB, 1},   /* MCLK=19.8Mhz */
0230     /* for MASTER mode, fs = 48Khz */
0231     { 12000000, 3072000, 0xF3, 0x12, 0x7, 1},   /* MCLK=12Mhz */
0232     { 13000000, 3072000, 0xE8, 0xFD, 0x5, 1},   /* MCLK=13Mhz */
0233     { 13500000, 3072000, 0xE4, 0x82, 0x3, 1},   /* MCLK=13.5Mhz */
0234     { 14400000, 3072000, 0xDD, 0x3A, 0x0, 1},   /* MCLK=14.4Mhz */
0235     { 19200000, 3072000, 0xC1, 0xEB, 0x8, 1},   /* MCLK=19.2Mhz */
0236     { 19680000, 3072000, 0xBF, 0xEC, 0x0, 1},   /* MCLK=19.68Mhz */
0237     { 19800000, 3072000, 0xBF, 0x70, 0x0, 1},   /* MCLK=19.8Mhz */
0238     /* for SLAVE mode with SRM */
0239     { 12000000, 2822400, 0xED, 0xBF, 0x5, 0},   /* MCLK=12Mhz */
0240     { 13000000, 2822400, 0xE4, 0x13, 0x0, 0},   /* MCLK=13Mhz */
0241     { 13500000, 2822400, 0xDF, 0xC6, 0x8, 0},   /* MCLK=13.5Mhz */
0242     { 14400000, 2822400, 0xD8, 0xCA, 0x1, 0},   /* MCLK=14.4Mhz */
0243     { 19200000, 2822400, 0xBE, 0x97, 0x9, 0},   /* MCLK=19.2Mhz */
0244     { 19680000, 2822400, 0xBC, 0xAC, 0xD, 0},   /* MCLK=19.68Mhz */
0245     { 19800000, 2822400, 0xBC, 0x35, 0xE, 0},   /* MCLK=19.8Mhz  */
0246 };
0247 
0248 enum clk_src {
0249     DA7210_CLKSRC_MCLK
0250 };
0251 
0252 #define DA7210_VERSION "0.0.1"
0253 
0254 /*
0255  * Playback Volume
0256  *
0257  * max      : 0x3F (+15.0 dB)
0258  *         (1.5 dB step)
0259  * min      : 0x11 (-54.0 dB)
0260  * mute     : 0x10
0261  * reserved : 0x00 - 0x0F
0262  *
0263  * Reserved area are considered as "mute".
0264  */
0265 static const DECLARE_TLV_DB_RANGE(hp_out_tlv,
0266     0x0, 0x10, TLV_DB_SCALE_ITEM(TLV_DB_GAIN_MUTE, 0, 1),
0267     /* -54 dB to +15 dB */
0268     0x11, 0x3f, TLV_DB_SCALE_ITEM(-5400, 150, 0)
0269 );
0270 
0271 static const DECLARE_TLV_DB_RANGE(lineout_vol_tlv,
0272     0x0, 0x10, TLV_DB_SCALE_ITEM(TLV_DB_GAIN_MUTE, 0, 1),
0273     /* -54dB to 15dB */
0274     0x11, 0x3f, TLV_DB_SCALE_ITEM(-5400, 150, 0)
0275 );
0276 
0277 static const DECLARE_TLV_DB_RANGE(mono_vol_tlv,
0278     0x0, 0x2, TLV_DB_SCALE_ITEM(-1800, 0, 1),
0279     /* -18dB to 6dB */
0280     0x3, 0x7, TLV_DB_SCALE_ITEM(-1800, 600, 0)
0281 );
0282 
0283 static const DECLARE_TLV_DB_RANGE(aux1_vol_tlv,
0284     0x0, 0x10, TLV_DB_SCALE_ITEM(TLV_DB_GAIN_MUTE, 0, 1),
0285     /* -48dB to 21dB */
0286     0x11, 0x3f, TLV_DB_SCALE_ITEM(-4800, 150, 0)
0287 );
0288 
0289 static const DECLARE_TLV_DB_SCALE(eq_gain_tlv, -1050, 150, 0);
0290 static const DECLARE_TLV_DB_SCALE(adc_eq_master_gain_tlv, -1800, 600, 1);
0291 static const DECLARE_TLV_DB_SCALE(dac_gain_tlv, -7725, 75, 0);
0292 static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, -600, 600, 0);
0293 static const DECLARE_TLV_DB_SCALE(aux2_vol_tlv, -600, 600, 0);
0294 static const DECLARE_TLV_DB_SCALE(inpga_gain_tlv, -450, 150, 0);
0295 
0296 /* ADC and DAC high pass filter f0 value */
0297 static const char * const da7210_hpf_cutoff_txt[] = {
0298     "Fs/8192*pi", "Fs/4096*pi", "Fs/2048*pi", "Fs/1024*pi"
0299 };
0300 
0301 static SOC_ENUM_SINGLE_DECL(da7210_dac_hpf_cutoff,
0302                 DA7210_DAC_HPF, 0, da7210_hpf_cutoff_txt);
0303 
0304 static SOC_ENUM_SINGLE_DECL(da7210_adc_hpf_cutoff,
0305                 DA7210_ADC_HPF, 0, da7210_hpf_cutoff_txt);
0306 
0307 /* ADC and DAC voice (8kHz) high pass cutoff value */
0308 static const char * const da7210_vf_cutoff_txt[] = {
0309     "2.5Hz", "25Hz", "50Hz", "100Hz", "150Hz", "200Hz", "300Hz", "400Hz"
0310 };
0311 
0312 static SOC_ENUM_SINGLE_DECL(da7210_dac_vf_cutoff,
0313                 DA7210_DAC_HPF, 4, da7210_vf_cutoff_txt);
0314 
0315 static SOC_ENUM_SINGLE_DECL(da7210_adc_vf_cutoff,
0316                 DA7210_ADC_HPF, 4, da7210_vf_cutoff_txt);
0317 
0318 static const char *da7210_hp_mode_txt[] = {
0319     "Class H", "Class G"
0320 };
0321 
0322 static SOC_ENUM_SINGLE_DECL(da7210_hp_mode_sel,
0323                 DA7210_HP_CFG, 0, da7210_hp_mode_txt);
0324 
0325 /* ALC can be enabled only if noise suppression is disabled */
0326 static int da7210_put_alc_sw(struct snd_kcontrol *kcontrol,
0327                  struct snd_ctl_elem_value *ucontrol)
0328 {
0329     struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
0330 
0331     if (ucontrol->value.integer.value[0]) {
0332         /* Check if noise suppression is enabled */
0333         if (snd_soc_component_read(component, DA7210_CONTROL) & DA7210_NOISE_SUP_EN) {
0334             dev_dbg(component->dev,
0335                 "Disable noise suppression to enable ALC\n");
0336             return -EINVAL;
0337         }
0338     }
0339     /* If all conditions are met or we are actually disabling ALC */
0340     return snd_soc_put_volsw(kcontrol, ucontrol);
0341 }
0342 
0343 /* Noise suppression can be enabled only if following conditions are met
0344  *  ALC disabled
0345  *  ZC enabled for HP and AUX1 PGA
0346  *  INPGA_L_VOL and INPGA_R_VOL >= 10.5 dB
0347  *  AUX1_L_VOL and AUX1_R_VOL >= 6 dB
0348  */
0349 static int da7210_put_noise_sup_sw(struct snd_kcontrol *kcontrol,
0350                    struct snd_ctl_elem_value *ucontrol)
0351 {
0352     struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
0353     u8 val;
0354 
0355     if (ucontrol->value.integer.value[0]) {
0356         /* Check if ALC is enabled */
0357         if (snd_soc_component_read(component, DA7210_ADC) & DA7210_ADC_ALC_EN)
0358             goto err;
0359 
0360         /* Check ZC for HP and AUX1 PGA */
0361         if ((snd_soc_component_read(component, DA7210_ZERO_CROSS) &
0362             (DA7210_AUX1_L_ZC | DA7210_AUX1_R_ZC | DA7210_HP_L_ZC |
0363             DA7210_HP_R_ZC)) != (DA7210_AUX1_L_ZC |
0364             DA7210_AUX1_R_ZC | DA7210_HP_L_ZC | DA7210_HP_R_ZC))
0365             goto err;
0366 
0367         /* Check INPGA_L_VOL and INPGA_R_VOL */
0368         val = snd_soc_component_read(component, DA7210_IN_GAIN);
0369         if (((val & DA7210_INPGA_L_VOL) < DA7210_INPGA_MIN_VOL_NS) ||
0370             (((val & DA7210_INPGA_R_VOL) >> 4) <
0371             DA7210_INPGA_MIN_VOL_NS))
0372             goto err;
0373 
0374         /* Check AUX1_L_VOL and AUX1_R_VOL */
0375         if (((snd_soc_component_read(component, DA7210_AUX1_L) & DA7210_AUX1_L_VOL) <
0376             DA7210_AUX1_MIN_VOL_NS) ||
0377             ((snd_soc_component_read(component, DA7210_AUX1_R) & DA7210_AUX1_R_VOL) <
0378             DA7210_AUX1_MIN_VOL_NS))
0379             goto err;
0380     }
0381     /* If all conditions are met or we are actually disabling Noise sup */
0382     return snd_soc_put_volsw(kcontrol, ucontrol);
0383 
0384 err:
0385     return -EINVAL;
0386 }
0387 
0388 static const struct snd_kcontrol_new da7210_snd_controls[] = {
0389 
0390     SOC_DOUBLE_R_TLV("HeadPhone Playback Volume",
0391              DA7210_HP_L_VOL, DA7210_HP_R_VOL,
0392              0, 0x3F, 0, hp_out_tlv),
0393     SOC_DOUBLE_R_TLV("Digital Playback Volume",
0394              DA7210_DAC_L, DA7210_DAC_R,
0395              0, 0x77, 1, dac_gain_tlv),
0396     SOC_DOUBLE_R_TLV("Lineout Playback Volume",
0397              DA7210_OUT1_L, DA7210_OUT1_R,
0398              0, 0x3f, 0, lineout_vol_tlv),
0399     SOC_SINGLE_TLV("Mono Playback Volume", DA7210_OUT2, 0, 0x7, 0,
0400                mono_vol_tlv),
0401 
0402     SOC_DOUBLE_R_TLV("Mic Capture Volume",
0403              DA7210_MIC_L, DA7210_MIC_R,
0404              0, 0x5, 0, mic_vol_tlv),
0405     SOC_DOUBLE_R_TLV("Aux1 Capture Volume",
0406              DA7210_AUX1_L, DA7210_AUX1_R,
0407              0, 0x3f, 0, aux1_vol_tlv),
0408     SOC_SINGLE_TLV("Aux2 Capture Volume", DA7210_AUX2, 0, 0x3, 0,
0409                aux2_vol_tlv),
0410     SOC_DOUBLE_TLV("In PGA Capture Volume", DA7210_IN_GAIN, 0, 4, 0xF, 0,
0411                inpga_gain_tlv),
0412 
0413     /* DAC Equalizer  controls */
0414     SOC_SINGLE("DAC EQ Switch", DA7210_DAC_EQ5, 7, 1, 0),
0415     SOC_SINGLE_TLV("DAC EQ1 Volume", DA7210_DAC_EQ1_2, 0, 0xf, 1,
0416                eq_gain_tlv),
0417     SOC_SINGLE_TLV("DAC EQ2 Volume", DA7210_DAC_EQ1_2, 4, 0xf, 1,
0418                eq_gain_tlv),
0419     SOC_SINGLE_TLV("DAC EQ3 Volume", DA7210_DAC_EQ3_4, 0, 0xf, 1,
0420                eq_gain_tlv),
0421     SOC_SINGLE_TLV("DAC EQ4 Volume", DA7210_DAC_EQ3_4, 4, 0xf, 1,
0422                eq_gain_tlv),
0423     SOC_SINGLE_TLV("DAC EQ5 Volume", DA7210_DAC_EQ5, 0, 0xf, 1,
0424                eq_gain_tlv),
0425 
0426     /* ADC Equalizer  controls */
0427     SOC_SINGLE("ADC EQ Switch", DA7210_ADC_EQ5, 7, 1, 0),
0428     SOC_SINGLE_TLV("ADC EQ Master Volume", DA7210_ADC_EQ5, 4, 0x3,
0429                1, adc_eq_master_gain_tlv),
0430     SOC_SINGLE_TLV("ADC EQ1 Volume", DA7210_ADC_EQ1_2, 0, 0xf, 1,
0431                eq_gain_tlv),
0432     SOC_SINGLE_TLV("ADC EQ2 Volume", DA7210_ADC_EQ1_2, 4, 0xf, 1,
0433                eq_gain_tlv),
0434     SOC_SINGLE_TLV("ADC EQ3 Volume", DA7210_ADC_EQ3_4, 0, 0xf, 1,
0435                eq_gain_tlv),
0436     SOC_SINGLE_TLV("ADC EQ4 Volume", DA7210_ADC_EQ3_4, 4, 0xf, 1,
0437                eq_gain_tlv),
0438     SOC_SINGLE_TLV("ADC EQ5 Volume", DA7210_ADC_EQ5, 0, 0xf, 1,
0439                eq_gain_tlv),
0440 
0441     SOC_SINGLE("DAC HPF Switch", DA7210_DAC_HPF, 3, 1, 0),
0442     SOC_ENUM("DAC HPF Cutoff", da7210_dac_hpf_cutoff),
0443     SOC_SINGLE("DAC Voice Mode Switch", DA7210_DAC_HPF, 7, 1, 0),
0444     SOC_ENUM("DAC Voice Cutoff", da7210_dac_vf_cutoff),
0445 
0446     SOC_SINGLE("ADC HPF Switch", DA7210_ADC_HPF, 3, 1, 0),
0447     SOC_ENUM("ADC HPF Cutoff", da7210_adc_hpf_cutoff),
0448     SOC_SINGLE("ADC Voice Mode Switch", DA7210_ADC_HPF, 7, 1, 0),
0449     SOC_ENUM("ADC Voice Cutoff", da7210_adc_vf_cutoff),
0450 
0451     /* Mute controls */
0452     SOC_DOUBLE_R("Mic Capture Switch", DA7210_MIC_L, DA7210_MIC_R, 3, 1, 0),
0453     SOC_SINGLE("Aux2 Capture Switch", DA7210_AUX2, 2, 1, 0),
0454     SOC_DOUBLE("ADC Capture Switch", DA7210_ADC, 2, 6, 1, 0),
0455     SOC_SINGLE("Digital Soft Mute Switch", DA7210_SOFTMUTE, 7, 1, 0),
0456     SOC_SINGLE("Digital Soft Mute Rate", DA7210_SOFTMUTE, 0, 0x7, 0),
0457 
0458     /* Zero cross controls */
0459     SOC_DOUBLE("Aux1 ZC Switch", DA7210_ZERO_CROSS, 0, 1, 1, 0),
0460     SOC_DOUBLE("In PGA ZC Switch", DA7210_ZERO_CROSS, 2, 3, 1, 0),
0461     SOC_DOUBLE("Lineout ZC Switch", DA7210_ZERO_CROSS, 4, 5, 1, 0),
0462     SOC_DOUBLE("Headphone ZC Switch", DA7210_ZERO_CROSS, 6, 7, 1, 0),
0463 
0464     SOC_ENUM("Headphone Class", da7210_hp_mode_sel),
0465 
0466     /* ALC controls */
0467     SOC_SINGLE_EXT("ALC Enable Switch", DA7210_ADC, 0, 1, 0,
0468                snd_soc_get_volsw, da7210_put_alc_sw),
0469     SOC_SINGLE("ALC Capture Max Volume", DA7210_ALC_MAX, 0, 0x3F, 0),
0470     SOC_SINGLE("ALC Capture Min Volume", DA7210_ALC_MIN, 0, 0x3F, 0),
0471     SOC_SINGLE("ALC Capture Noise Volume", DA7210_ALC_NOIS, 0, 0x3F, 0),
0472     SOC_SINGLE("ALC Capture Attack Rate", DA7210_ALC_ATT, 0, 0xFF, 0),
0473     SOC_SINGLE("ALC Capture Release Rate", DA7210_ALC_REL, 0, 0xFF, 0),
0474     SOC_SINGLE("ALC Capture Release Delay", DA7210_ALC_DEL, 0, 0xFF, 0),
0475 
0476     SOC_SINGLE_EXT("Noise Suppression Enable Switch", DA7210_CONTROL, 3, 1,
0477                0, snd_soc_get_volsw, da7210_put_noise_sup_sw),
0478 };
0479 
0480 /*
0481  * DAPM Controls
0482  *
0483  * Current DAPM implementation covers almost all codec components e.g. IOs,
0484  * mixers, PGAs,ADC and DAC.
0485  */
0486 /* In Mixer Left */
0487 static const struct snd_kcontrol_new da7210_dapm_inmixl_controls[] = {
0488     SOC_DAPM_SINGLE("Mic Left Switch", DA7210_INMIX_L, 0, 1, 0),
0489     SOC_DAPM_SINGLE("Mic Right Switch", DA7210_INMIX_L, 1, 1, 0),
0490     SOC_DAPM_SINGLE("Aux1 Left Switch", DA7210_INMIX_L, 2, 1, 0),
0491     SOC_DAPM_SINGLE("Aux2 Switch", DA7210_INMIX_L, 3, 1, 0),
0492     SOC_DAPM_SINGLE("Outmix Left Switch", DA7210_INMIX_L, 4, 1, 0),
0493 };
0494 
0495 /* In Mixer Right */
0496 static const struct snd_kcontrol_new da7210_dapm_inmixr_controls[] = {
0497     SOC_DAPM_SINGLE("Mic Right Switch", DA7210_INMIX_R, 0, 1, 0),
0498     SOC_DAPM_SINGLE("Mic Left Switch", DA7210_INMIX_R, 1, 1, 0),
0499     SOC_DAPM_SINGLE("Aux1 Right Switch", DA7210_INMIX_R, 2, 1, 0),
0500     SOC_DAPM_SINGLE("Aux2 Switch", DA7210_INMIX_R, 3, 1, 0),
0501     SOC_DAPM_SINGLE("Outmix Right Switch", DA7210_INMIX_R, 4, 1, 0),
0502 };
0503 
0504 /* Out Mixer Left */
0505 static const struct snd_kcontrol_new da7210_dapm_outmixl_controls[] = {
0506     SOC_DAPM_SINGLE("Aux1 Left Switch", DA7210_OUTMIX_L, 0, 1, 0),
0507     SOC_DAPM_SINGLE("Aux2 Switch", DA7210_OUTMIX_L, 1, 1, 0),
0508     SOC_DAPM_SINGLE("INPGA Left Switch", DA7210_OUTMIX_L, 2, 1, 0),
0509     SOC_DAPM_SINGLE("INPGA Right Switch", DA7210_OUTMIX_L, 3, 1, 0),
0510     SOC_DAPM_SINGLE("DAC Left Switch", DA7210_OUTMIX_L, 4, 1, 0),
0511 };
0512 
0513 /* Out Mixer Right */
0514 static const struct snd_kcontrol_new da7210_dapm_outmixr_controls[] = {
0515     SOC_DAPM_SINGLE("Aux1 Right Switch", DA7210_OUTMIX_R, 0, 1, 0),
0516     SOC_DAPM_SINGLE("Aux2 Switch", DA7210_OUTMIX_R, 1, 1, 0),
0517     SOC_DAPM_SINGLE("INPGA Left Switch", DA7210_OUTMIX_R, 2, 1, 0),
0518     SOC_DAPM_SINGLE("INPGA Right Switch", DA7210_OUTMIX_R, 3, 1, 0),
0519     SOC_DAPM_SINGLE("DAC Right Switch", DA7210_OUTMIX_R, 4, 1, 0),
0520 };
0521 
0522 /* Mono Mixer */
0523 static const struct snd_kcontrol_new da7210_dapm_monomix_controls[] = {
0524     SOC_DAPM_SINGLE("INPGA Right Switch", DA7210_OUT2, 3, 1, 0),
0525     SOC_DAPM_SINGLE("INPGA Left Switch", DA7210_OUT2, 4, 1, 0),
0526     SOC_DAPM_SINGLE("Outmix Right Switch", DA7210_OUT2, 5, 1, 0),
0527     SOC_DAPM_SINGLE("Outmix Left Switch", DA7210_OUT2, 6, 1, 0),
0528 };
0529 
0530 /* DAPM widgets */
0531 static const struct snd_soc_dapm_widget da7210_dapm_widgets[] = {
0532     /* Input Side */
0533     /* Input Lines */
0534     SND_SOC_DAPM_INPUT("MICL"),
0535     SND_SOC_DAPM_INPUT("MICR"),
0536     SND_SOC_DAPM_INPUT("AUX1L"),
0537     SND_SOC_DAPM_INPUT("AUX1R"),
0538     SND_SOC_DAPM_INPUT("AUX2"),
0539 
0540     /* Input PGAs */
0541     SND_SOC_DAPM_PGA("Mic Left", DA7210_STARTUP3, 0, 1, NULL, 0),
0542     SND_SOC_DAPM_PGA("Mic Right", DA7210_STARTUP3, 1, 1, NULL, 0),
0543     SND_SOC_DAPM_PGA("Aux1 Left", DA7210_STARTUP3, 2, 1, NULL, 0),
0544     SND_SOC_DAPM_PGA("Aux1 Right", DA7210_STARTUP3, 3, 1, NULL, 0),
0545     SND_SOC_DAPM_PGA("Aux2 Mono", DA7210_STARTUP3, 4, 1, NULL, 0),
0546 
0547     SND_SOC_DAPM_PGA("INPGA Left", DA7210_INMIX_L, 7, 0, NULL, 0),
0548     SND_SOC_DAPM_PGA("INPGA Right", DA7210_INMIX_R, 7, 0, NULL, 0),
0549 
0550     /* MICBIAS */
0551     SND_SOC_DAPM_SUPPLY("Mic Bias", DA7210_MIC_L, 6, 0, NULL, 0),
0552 
0553     /* Input Mixers */
0554     SND_SOC_DAPM_MIXER("In Mixer Left", SND_SOC_NOPM, 0, 0,
0555         &da7210_dapm_inmixl_controls[0],
0556         ARRAY_SIZE(da7210_dapm_inmixl_controls)),
0557 
0558     SND_SOC_DAPM_MIXER("In Mixer Right", SND_SOC_NOPM, 0, 0,
0559         &da7210_dapm_inmixr_controls[0],
0560         ARRAY_SIZE(da7210_dapm_inmixr_controls)),
0561 
0562     /* ADCs */
0563     SND_SOC_DAPM_ADC("ADC Left", "Capture", DA7210_STARTUP3, 5, 1),
0564     SND_SOC_DAPM_ADC("ADC Right", "Capture", DA7210_STARTUP3, 6, 1),
0565 
0566     /* Output Side */
0567     /* DACs */
0568     SND_SOC_DAPM_DAC("DAC Left", "Playback", DA7210_STARTUP2, 5, 1),
0569     SND_SOC_DAPM_DAC("DAC Right", "Playback", DA7210_STARTUP2, 6, 1),
0570 
0571     /* Output Mixers */
0572     SND_SOC_DAPM_MIXER("Out Mixer Left", SND_SOC_NOPM, 0, 0,
0573         &da7210_dapm_outmixl_controls[0],
0574         ARRAY_SIZE(da7210_dapm_outmixl_controls)),
0575 
0576     SND_SOC_DAPM_MIXER("Out Mixer Right", SND_SOC_NOPM, 0, 0,
0577         &da7210_dapm_outmixr_controls[0],
0578         ARRAY_SIZE(da7210_dapm_outmixr_controls)),
0579 
0580     SND_SOC_DAPM_MIXER("Mono Mixer", SND_SOC_NOPM, 0, 0,
0581         &da7210_dapm_monomix_controls[0],
0582         ARRAY_SIZE(da7210_dapm_monomix_controls)),
0583 
0584     /* Output PGAs */
0585     SND_SOC_DAPM_PGA("OUTPGA Left Enable", DA7210_OUTMIX_L, 7, 0, NULL, 0),
0586     SND_SOC_DAPM_PGA("OUTPGA Right Enable", DA7210_OUTMIX_R, 7, 0, NULL, 0),
0587 
0588     SND_SOC_DAPM_PGA("Out1 Left", DA7210_STARTUP2, 0, 1, NULL, 0),
0589     SND_SOC_DAPM_PGA("Out1 Right", DA7210_STARTUP2, 1, 1, NULL, 0),
0590     SND_SOC_DAPM_PGA("Out2 Mono", DA7210_STARTUP2, 2, 1, NULL, 0),
0591     SND_SOC_DAPM_PGA("Headphone Left", DA7210_STARTUP2, 3, 1, NULL, 0),
0592     SND_SOC_DAPM_PGA("Headphone Right", DA7210_STARTUP2, 4, 1, NULL, 0),
0593 
0594     /* Output Lines */
0595     SND_SOC_DAPM_OUTPUT("OUT1L"),
0596     SND_SOC_DAPM_OUTPUT("OUT1R"),
0597     SND_SOC_DAPM_OUTPUT("HPL"),
0598     SND_SOC_DAPM_OUTPUT("HPR"),
0599     SND_SOC_DAPM_OUTPUT("OUT2"),
0600 };
0601 
0602 /* DAPM audio route definition */
0603 static const struct snd_soc_dapm_route da7210_audio_map[] = {
0604     /* Dest       Connecting Widget    source */
0605     /* Input path */
0606     {"Mic Left", NULL, "MICL"},
0607     {"Mic Right", NULL, "MICR"},
0608     {"Aux1 Left", NULL, "AUX1L"},
0609     {"Aux1 Right", NULL, "AUX1R"},
0610     {"Aux2 Mono", NULL, "AUX2"},
0611 
0612     {"In Mixer Left", "Mic Left Switch", "Mic Left"},
0613     {"In Mixer Left", "Mic Right Switch", "Mic Right"},
0614     {"In Mixer Left", "Aux1 Left Switch", "Aux1 Left"},
0615     {"In Mixer Left", "Aux2 Switch", "Aux2 Mono"},
0616     {"In Mixer Left", "Outmix Left Switch", "Out Mixer Left"},
0617 
0618     {"In Mixer Right", "Mic Right Switch", "Mic Right"},
0619     {"In Mixer Right", "Mic Left Switch", "Mic Left"},
0620     {"In Mixer Right", "Aux1 Right Switch", "Aux1 Right"},
0621     {"In Mixer Right", "Aux2 Switch", "Aux2 Mono"},
0622     {"In Mixer Right", "Outmix Right Switch", "Out Mixer Right"},
0623 
0624     {"INPGA Left", NULL, "In Mixer Left"},
0625     {"ADC Left", NULL, "INPGA Left"},
0626 
0627     {"INPGA Right", NULL, "In Mixer Right"},
0628     {"ADC Right", NULL, "INPGA Right"},
0629 
0630     /* Output path */
0631     {"Out Mixer Left", "Aux1 Left Switch", "Aux1 Left"},
0632     {"Out Mixer Left", "Aux2 Switch", "Aux2 Mono"},
0633     {"Out Mixer Left", "INPGA Left Switch", "INPGA Left"},
0634     {"Out Mixer Left", "INPGA Right Switch", "INPGA Right"},
0635     {"Out Mixer Left", "DAC Left Switch", "DAC Left"},
0636 
0637     {"Out Mixer Right", "Aux1 Right Switch", "Aux1 Right"},
0638     {"Out Mixer Right", "Aux2 Switch", "Aux2 Mono"},
0639     {"Out Mixer Right", "INPGA Right Switch", "INPGA Right"},
0640     {"Out Mixer Right", "INPGA Left Switch", "INPGA Left"},
0641     {"Out Mixer Right", "DAC Right Switch", "DAC Right"},
0642 
0643     {"Mono Mixer", "INPGA Right Switch", "INPGA Right"},
0644     {"Mono Mixer", "INPGA Left Switch", "INPGA Left"},
0645     {"Mono Mixer", "Outmix Right Switch", "Out Mixer Right"},
0646     {"Mono Mixer", "Outmix Left Switch", "Out Mixer Left"},
0647 
0648     {"OUTPGA Left Enable", NULL, "Out Mixer Left"},
0649     {"OUTPGA Right Enable", NULL, "Out Mixer Right"},
0650 
0651     {"Out1 Left", NULL, "OUTPGA Left Enable"},
0652     {"OUT1L", NULL, "Out1 Left"},
0653 
0654     {"Out1 Right", NULL, "OUTPGA Right Enable"},
0655     {"OUT1R", NULL, "Out1 Right"},
0656 
0657     {"Headphone Left", NULL, "OUTPGA Left Enable"},
0658     {"HPL", NULL, "Headphone Left"},
0659 
0660     {"Headphone Right", NULL, "OUTPGA Right Enable"},
0661     {"HPR", NULL, "Headphone Right"},
0662 
0663     {"Out2 Mono", NULL, "Mono Mixer"},
0664     {"OUT2", NULL, "Out2 Mono"},
0665 };
0666 
0667 /* Codec private data */
0668 struct da7210_priv {
0669     struct regmap *regmap;
0670     unsigned int mclk_rate;
0671     int master;
0672 };
0673 
0674 static const struct reg_default da7210_reg_defaults[] = {
0675     { 0x00, 0x00 },
0676     { 0x01, 0x11 },
0677     { 0x03, 0x00 },
0678     { 0x04, 0x00 },
0679     { 0x05, 0x00 },
0680     { 0x06, 0x00 },
0681     { 0x07, 0x00 },
0682     { 0x08, 0x00 },
0683     { 0x09, 0x00 },
0684     { 0x0a, 0x00 },
0685     { 0x0b, 0x00 },
0686     { 0x0c, 0x00 },
0687     { 0x0d, 0x00 },
0688     { 0x0e, 0x00 },
0689     { 0x0f, 0x08 },
0690     { 0x10, 0x00 },
0691     { 0x11, 0x00 },
0692     { 0x12, 0x00 },
0693     { 0x13, 0x00 },
0694     { 0x14, 0x08 },
0695     { 0x15, 0x10 },
0696     { 0x16, 0x10 },
0697     { 0x17, 0x54 },
0698     { 0x18, 0x40 },
0699     { 0x19, 0x00 },
0700     { 0x1a, 0x00 },
0701     { 0x1b, 0x00 },
0702     { 0x1c, 0x00 },
0703     { 0x1d, 0x00 },
0704     { 0x1e, 0x00 },
0705     { 0x1f, 0x00 },
0706     { 0x20, 0x00 },
0707     { 0x21, 0x00 },
0708     { 0x22, 0x00 },
0709     { 0x23, 0x02 },
0710     { 0x24, 0x00 },
0711     { 0x25, 0x76 },
0712     { 0x26, 0x00 },
0713     { 0x27, 0x00 },
0714     { 0x28, 0x04 },
0715     { 0x29, 0x00 },
0716     { 0x2a, 0x00 },
0717     { 0x2b, 0x30 },
0718     { 0x2c, 0x2A },
0719     { 0x83, 0x00 },
0720     { 0x84, 0x00 },
0721     { 0x85, 0x00 },
0722     { 0x86, 0x00 },
0723     { 0x87, 0x00 },
0724     { 0x88, 0x00 },
0725 };
0726 
0727 static bool da7210_readable_register(struct device *dev, unsigned int reg)
0728 {
0729     switch (reg) {
0730     case DA7210_A_HID_UNLOCK:
0731     case DA7210_A_TEST_UNLOCK:
0732     case DA7210_A_PLL1:
0733     case DA7210_A_CP_MODE:
0734         return false;
0735     default:
0736         return true;
0737     }
0738 }
0739 
0740 static bool da7210_volatile_register(struct device *dev,
0741                     unsigned int reg)
0742 {
0743     switch (reg) {
0744     case DA7210_STATUS:
0745         return true;
0746     default:
0747         return false;
0748     }
0749 }
0750 
0751 /*
0752  * Set PCM DAI word length.
0753  */
0754 static int da7210_hw_params(struct snd_pcm_substream *substream,
0755                 struct snd_pcm_hw_params *params,
0756                 struct snd_soc_dai *dai)
0757 {
0758     struct snd_soc_component *component = dai->component;
0759     struct da7210_priv *da7210 = snd_soc_component_get_drvdata(component);
0760     u32 dai_cfg1;
0761     u32 fs, sysclk;
0762 
0763     /* set DAI source to Left and Right ADC */
0764     snd_soc_component_write(component, DA7210_DAI_SRC_SEL,
0765              DA7210_DAI_OUT_R_SRC | DA7210_DAI_OUT_L_SRC);
0766 
0767     /* Enable DAI */
0768     snd_soc_component_write(component, DA7210_DAI_CFG3, DA7210_DAI_OE | DA7210_DAI_EN);
0769 
0770     dai_cfg1 = 0xFC & snd_soc_component_read(component, DA7210_DAI_CFG1);
0771 
0772     switch (params_width(params)) {
0773     case 16:
0774         dai_cfg1 |= DA7210_DAI_WORD_S16_LE;
0775         break;
0776     case 20:
0777         dai_cfg1 |= DA7210_DAI_WORD_S20_3LE;
0778         break;
0779     case 24:
0780         dai_cfg1 |= DA7210_DAI_WORD_S24_LE;
0781         break;
0782     case 32:
0783         dai_cfg1 |= DA7210_DAI_WORD_S32_LE;
0784         break;
0785     default:
0786         return -EINVAL;
0787     }
0788 
0789     snd_soc_component_write(component, DA7210_DAI_CFG1, dai_cfg1);
0790 
0791     switch (params_rate(params)) {
0792     case 8000:
0793         fs      = DA7210_PLL_FS_8000;
0794         sysclk      = 3072000;
0795         break;
0796     case 11025:
0797         fs      = DA7210_PLL_FS_11025;
0798         sysclk      = 2822400;
0799         break;
0800     case 12000:
0801         fs      = DA7210_PLL_FS_12000;
0802         sysclk      = 3072000;
0803         break;
0804     case 16000:
0805         fs      = DA7210_PLL_FS_16000;
0806         sysclk      = 3072000;
0807         break;
0808     case 22050:
0809         fs      = DA7210_PLL_FS_22050;
0810         sysclk      = 2822400;
0811         break;
0812     case 32000:
0813         fs      = DA7210_PLL_FS_32000;
0814         sysclk      = 3072000;
0815         break;
0816     case 44100:
0817         fs      = DA7210_PLL_FS_44100;
0818         sysclk      = 2822400;
0819         break;
0820     case 48000:
0821         fs      = DA7210_PLL_FS_48000;
0822         sysclk      = 3072000;
0823         break;
0824     case 88200:
0825         fs      = DA7210_PLL_FS_88200;
0826         sysclk      = 2822400;
0827         break;
0828     case 96000:
0829         fs      = DA7210_PLL_FS_96000;
0830         sysclk      = 3072000;
0831         break;
0832     default:
0833         return -EINVAL;
0834     }
0835 
0836     /* Disable active mode */
0837     snd_soc_component_update_bits(component, DA7210_STARTUP1, DA7210_SC_MST_EN, 0);
0838 
0839     snd_soc_component_update_bits(component, DA7210_PLL, DA7210_PLL_FS_MASK, fs);
0840 
0841     if (da7210->mclk_rate && (da7210->mclk_rate != sysclk)) {
0842         /* PLL mode, disable PLL bypass */
0843         snd_soc_component_update_bits(component, DA7210_PLL_DIV3, DA7210_PLL_BYP, 0);
0844 
0845         if (!da7210->master) {
0846             /* PLL slave mode, also enable SRM */
0847             snd_soc_component_update_bits(component, DA7210_PLL,
0848                            (DA7210_MCLK_SRM_EN |
0849                             DA7210_MCLK_DET_EN),
0850                            (DA7210_MCLK_SRM_EN |
0851                             DA7210_MCLK_DET_EN));
0852         }
0853     } else {
0854         /* PLL bypass mode, enable PLL bypass and Auto Detection */
0855         snd_soc_component_update_bits(component, DA7210_PLL, DA7210_MCLK_DET_EN,
0856                                DA7210_MCLK_DET_EN);
0857         snd_soc_component_update_bits(component, DA7210_PLL_DIV3, DA7210_PLL_BYP,
0858                                 DA7210_PLL_BYP);
0859     }
0860     /* Enable active mode */
0861     snd_soc_component_update_bits(component, DA7210_STARTUP1,
0862                 DA7210_SC_MST_EN, DA7210_SC_MST_EN);
0863 
0864     return 0;
0865 }
0866 
0867 /*
0868  * Set DAI mode and Format
0869  */
0870 static int da7210_set_dai_fmt(struct snd_soc_dai *codec_dai, u32 fmt)
0871 {
0872     struct snd_soc_component *component = codec_dai->component;
0873     struct da7210_priv *da7210 = snd_soc_component_get_drvdata(component);
0874     u32 dai_cfg1;
0875     u32 dai_cfg3;
0876 
0877     dai_cfg1 = 0x7f & snd_soc_component_read(component, DA7210_DAI_CFG1);
0878     dai_cfg3 = 0xfc & snd_soc_component_read(component, DA7210_DAI_CFG3);
0879 
0880     if ((snd_soc_component_read(component, DA7210_PLL) & DA7210_PLL_EN) &&
0881         (!(snd_soc_component_read(component, DA7210_PLL_DIV3) & DA7210_PLL_BYP)))
0882         return -EINVAL;
0883 
0884     switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
0885     case SND_SOC_DAIFMT_CBM_CFM:
0886         da7210->master = 1;
0887         dai_cfg1 |= DA7210_DAI_MODE_MASTER;
0888         break;
0889     case SND_SOC_DAIFMT_CBS_CFS:
0890         da7210->master = 0;
0891         dai_cfg1 |= DA7210_DAI_MODE_SLAVE;
0892         break;
0893     default:
0894         return -EINVAL;
0895     }
0896 
0897     /* FIXME
0898      *
0899      * It support I2S only now
0900      */
0901     switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
0902     case SND_SOC_DAIFMT_I2S:
0903         dai_cfg3 |= DA7210_DAI_FORMAT_I2SMODE;
0904         break;
0905     case SND_SOC_DAIFMT_LEFT_J:
0906         dai_cfg3 |= DA7210_DAI_FORMAT_LEFT_J;
0907         break;
0908     case SND_SOC_DAIFMT_RIGHT_J:
0909         dai_cfg3 |= DA7210_DAI_FORMAT_RIGHT_J;
0910         break;
0911     default:
0912         return -EINVAL;
0913     }
0914 
0915     /* FIXME
0916      *
0917      * It support 64bit data transmission only now
0918      */
0919     dai_cfg1 |= DA7210_DAI_FLEN_64BIT;
0920 
0921     snd_soc_component_write(component, DA7210_DAI_CFG1, dai_cfg1);
0922     snd_soc_component_write(component, DA7210_DAI_CFG3, dai_cfg3);
0923 
0924     return 0;
0925 }
0926 
0927 static int da7210_mute(struct snd_soc_dai *dai, int mute, int direction)
0928 {
0929     struct snd_soc_component *component = dai->component;
0930     u8 mute_reg = snd_soc_component_read(component, DA7210_DAC_HPF) & 0xFB;
0931 
0932     if (mute)
0933         snd_soc_component_write(component, DA7210_DAC_HPF, mute_reg | 0x4);
0934     else
0935         snd_soc_component_write(component, DA7210_DAC_HPF, mute_reg);
0936     return 0;
0937 }
0938 
0939 #define DA7210_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
0940             SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
0941 
0942 static int da7210_set_dai_sysclk(struct snd_soc_dai *codec_dai,
0943                  int clk_id, unsigned int freq, int dir)
0944 {
0945     struct snd_soc_component *component = codec_dai->component;
0946     struct da7210_priv *da7210 = snd_soc_component_get_drvdata(component);
0947 
0948     switch (clk_id) {
0949     case DA7210_CLKSRC_MCLK:
0950         switch (freq) {
0951         case 12000000:
0952         case 13000000:
0953         case 13500000:
0954         case 14400000:
0955         case 19200000:
0956         case 19680000:
0957         case 19800000:
0958             da7210->mclk_rate = freq;
0959             return 0;
0960         default:
0961             dev_err(codec_dai->dev, "Unsupported MCLK value %d\n",
0962                 freq);
0963             return -EINVAL;
0964         }
0965         break;
0966     default:
0967         dev_err(codec_dai->dev, "Unknown clock source %d\n", clk_id);
0968         return -EINVAL;
0969     }
0970 }
0971 
0972 /**
0973  * da7210_set_dai_pll   :Configure the codec PLL
0974  * @codec_dai: pointer to codec DAI
0975  * @pll_id: da7210 has only one pll, so pll_id is always zero
0976  * @source: clock source
0977  * @fref: MCLK frequency, should be < 20MHz
0978  * @fout: FsDM value, Refer page 44 & 45 of datasheet
0979  *
0980  * Note: Supported PLL input frequencies are 12MHz, 13MHz, 13.5MHz, 14.4MHz,
0981  *       19.2MHz, 19.6MHz and 19.8MHz
0982  *
0983  * Return: Zero for success, negative error code for error
0984  */
0985 static int da7210_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
0986                   int source, unsigned int fref, unsigned int fout)
0987 {
0988     struct snd_soc_component *component = codec_dai->component;
0989     struct da7210_priv *da7210 = snd_soc_component_get_drvdata(component);
0990 
0991     u8 pll_div1, pll_div2, pll_div3, cnt;
0992 
0993     /* In slave mode, there is only one set of divisors */
0994     if (!da7210->master)
0995         fout = 2822400;
0996 
0997     /* Search pll div array for correct divisors */
0998     for (cnt = 0; cnt < ARRAY_SIZE(da7210_pll_div); cnt++) {
0999         /* check fref, mode  and fout */
1000         if ((fref == da7210_pll_div[cnt].fref) &&
1001             (da7210->master ==  da7210_pll_div[cnt].mode) &&
1002             (fout == da7210_pll_div[cnt].fout)) {
1003             /* all match, pick up divisors */
1004             pll_div1 = da7210_pll_div[cnt].div1;
1005             pll_div2 = da7210_pll_div[cnt].div2;
1006             pll_div3 = da7210_pll_div[cnt].div3;
1007             break;
1008         }
1009     }
1010     if (cnt >= ARRAY_SIZE(da7210_pll_div))
1011         goto err;
1012 
1013     /* Disable active mode */
1014     snd_soc_component_update_bits(component, DA7210_STARTUP1, DA7210_SC_MST_EN, 0);
1015     /* Write PLL dividers */
1016     snd_soc_component_write(component, DA7210_PLL_DIV1, pll_div1);
1017     snd_soc_component_write(component, DA7210_PLL_DIV2, pll_div2);
1018     snd_soc_component_update_bits(component, DA7210_PLL_DIV3,
1019                    DA7210_PLL_DIV_L_MASK, pll_div3);
1020 
1021     /* Enable PLL */
1022     snd_soc_component_update_bits(component, DA7210_PLL, DA7210_PLL_EN, DA7210_PLL_EN);
1023 
1024     /* Enable active mode */
1025     snd_soc_component_update_bits(component, DA7210_STARTUP1, DA7210_SC_MST_EN,
1026                             DA7210_SC_MST_EN);
1027     return 0;
1028 err:
1029     dev_err(codec_dai->dev, "Unsupported PLL input frequency %d\n", fref);
1030     return -EINVAL;
1031 }
1032 
1033 /* DAI operations */
1034 static const struct snd_soc_dai_ops da7210_dai_ops = {
1035     .hw_params  = da7210_hw_params,
1036     .set_fmt    = da7210_set_dai_fmt,
1037     .set_sysclk = da7210_set_dai_sysclk,
1038     .set_pll    = da7210_set_dai_pll,
1039     .mute_stream    = da7210_mute,
1040     .no_capture_mute = 1,
1041 };
1042 
1043 static struct snd_soc_dai_driver da7210_dai = {
1044     .name = "da7210-hifi",
1045     /* playback capabilities */
1046     .playback = {
1047         .stream_name = "Playback",
1048         .channels_min = 1,
1049         .channels_max = 2,
1050         .rates = SNDRV_PCM_RATE_8000_96000,
1051         .formats = DA7210_FORMATS,
1052     },
1053     /* capture capabilities */
1054     .capture = {
1055         .stream_name = "Capture",
1056         .channels_min = 1,
1057         .channels_max = 2,
1058         .rates = SNDRV_PCM_RATE_8000_96000,
1059         .formats = DA7210_FORMATS,
1060     },
1061     .ops = &da7210_dai_ops,
1062     .symmetric_rate = 1,
1063 };
1064 
1065 static int da7210_probe(struct snd_soc_component *component)
1066 {
1067     struct da7210_priv *da7210 = snd_soc_component_get_drvdata(component);
1068 
1069     dev_info(component->dev, "DA7210 Audio Codec %s\n", DA7210_VERSION);
1070 
1071     da7210->mclk_rate       = 0;    /* This will be set from set_sysclk() */
1072     da7210->master          = 0;    /* This will be set from set_fmt() */
1073 
1074     /* Enable internal regulator & bias current */
1075     snd_soc_component_write(component, DA7210_CONTROL, DA7210_REG_EN | DA7210_BIAS_EN);
1076 
1077     /*
1078      * ADC settings
1079      */
1080 
1081     /* Enable Left & Right MIC PGA and Mic Bias */
1082     snd_soc_component_write(component, DA7210_MIC_L, DA7210_MIC_L_EN | DA7210_MICBIAS_EN);
1083     snd_soc_component_write(component, DA7210_MIC_R, DA7210_MIC_R_EN);
1084 
1085     /* Enable Left and Right input PGA */
1086     snd_soc_component_write(component, DA7210_INMIX_L, DA7210_IN_L_EN);
1087     snd_soc_component_write(component, DA7210_INMIX_R, DA7210_IN_R_EN);
1088 
1089     /* Enable Left and Right ADC */
1090     snd_soc_component_write(component, DA7210_ADC, DA7210_ADC_L_EN | DA7210_ADC_R_EN);
1091 
1092     /*
1093      * DAC settings
1094      */
1095 
1096     /* Enable Left and Right DAC */
1097     snd_soc_component_write(component, DA7210_DAC_SEL,
1098              DA7210_DAC_L_SRC_DAI_L | DA7210_DAC_L_EN |
1099              DA7210_DAC_R_SRC_DAI_R | DA7210_DAC_R_EN);
1100 
1101     /* Enable Left and Right out PGA */
1102     snd_soc_component_write(component, DA7210_OUTMIX_L, DA7210_OUT_L_EN);
1103     snd_soc_component_write(component, DA7210_OUTMIX_R, DA7210_OUT_R_EN);
1104 
1105     /* Enable Left and Right HeadPhone PGA */
1106     snd_soc_component_write(component, DA7210_HP_CFG,
1107              DA7210_HP_2CAP_MODE | DA7210_HP_SENSE_EN |
1108              DA7210_HP_L_EN | DA7210_HP_MODE | DA7210_HP_R_EN);
1109 
1110     /* Enable ramp mode for DAC gain update */
1111     snd_soc_component_write(component, DA7210_SOFTMUTE, DA7210_RAMP_EN);
1112 
1113     /*
1114      * For DA7210 codec, there are two ways to enable/disable analog IOs
1115      * and ADC/DAC,
1116      * (1) Using "Enable Bit" of register associated with that IO
1117      * (or ADC/DAC)
1118      *  e.g. Mic Left can be enabled using bit 7 of MIC_L(0x7) reg
1119      *
1120      * (2) Using "Standby Bit" of STARTUP2 or STARTUP3 register
1121      *  e.g. Mic left can be put to STANDBY using bit 0 of STARTUP3(0x5)
1122      *
1123      * Out of these two methods, the one using STANDBY bits is preferred
1124      * way to enable/disable individual blocks. This is because STANDBY
1125      * registers are part of system controller which allows system power
1126      * up/down in a controlled, pop-free manner. Also, as per application
1127      * note of DA7210, STANDBY register bits are only effective if a
1128      * particular IO (or ADC/DAC) is already enabled using enable/disable
1129      * register bits. Keeping these things in mind, current DAPM
1130      * implementation manipulates only STANDBY bits.
1131      *
1132      * Overall implementation can be outlined as below,
1133      *
1134      * - "Enable bit" of an IO or ADC/DAC is used to enable it in probe()
1135      * - "STANDBY bit" is controlled by DAPM
1136      */
1137 
1138     /* Enable Line out amplifiers */
1139     snd_soc_component_write(component, DA7210_OUT1_L, DA7210_OUT1_L_EN);
1140     snd_soc_component_write(component, DA7210_OUT1_R, DA7210_OUT1_R_EN);
1141     snd_soc_component_write(component, DA7210_OUT2, DA7210_OUT2_EN |
1142              DA7210_OUT2_OUTMIX_L | DA7210_OUT2_OUTMIX_R);
1143 
1144     /* Enable Aux1 */
1145     snd_soc_component_write(component, DA7210_AUX1_L, DA7210_AUX1_L_EN);
1146     snd_soc_component_write(component, DA7210_AUX1_R, DA7210_AUX1_R_EN);
1147     /* Enable Aux2 */
1148     snd_soc_component_write(component, DA7210_AUX2, DA7210_AUX2_EN);
1149 
1150     /* Set PLL Master clock range 10-20 MHz, enable PLL bypass */
1151     snd_soc_component_write(component, DA7210_PLL_DIV3, DA7210_MCLK_RANGE_10_20_MHZ |
1152                           DA7210_PLL_BYP);
1153 
1154     /* Diable PLL and bypass it */
1155     snd_soc_component_write(component, DA7210_PLL, DA7210_PLL_FS_48000);
1156 
1157     /* Activate all enabled subsystem */
1158     snd_soc_component_write(component, DA7210_STARTUP1, DA7210_SC_MST_EN);
1159 
1160     dev_info(component->dev, "DA7210 Audio Codec %s\n", DA7210_VERSION);
1161 
1162     return 0;
1163 }
1164 
1165 static const struct snd_soc_component_driver soc_component_dev_da7210 = {
1166     .probe          = da7210_probe,
1167     .controls       = da7210_snd_controls,
1168     .num_controls       = ARRAY_SIZE(da7210_snd_controls),
1169     .dapm_widgets       = da7210_dapm_widgets,
1170     .num_dapm_widgets   = ARRAY_SIZE(da7210_dapm_widgets),
1171     .dapm_routes        = da7210_audio_map,
1172     .num_dapm_routes    = ARRAY_SIZE(da7210_audio_map),
1173     .idle_bias_on       = 1,
1174     .use_pmdown_time    = 1,
1175     .endianness     = 1,
1176 };
1177 
1178 #if IS_ENABLED(CONFIG_I2C)
1179 
1180 static const struct reg_sequence da7210_regmap_i2c_patch[] = {
1181 
1182     /* System controller master disable */
1183     { DA7210_STARTUP1, 0x00 },
1184     /* Set PLL Master clock range 10-20 MHz */
1185     { DA7210_PLL_DIV3, DA7210_MCLK_RANGE_10_20_MHZ },
1186 
1187     /* to unlock */
1188     { DA7210_A_HID_UNLOCK, 0x8B},
1189     { DA7210_A_TEST_UNLOCK, 0xB4},
1190     { DA7210_A_PLL1, 0x01},
1191     { DA7210_A_CP_MODE, 0x7C},
1192     /* to re-lock */
1193     { DA7210_A_HID_UNLOCK, 0x00},
1194     { DA7210_A_TEST_UNLOCK, 0x00},
1195 };
1196 
1197 static const struct regmap_config da7210_regmap_config_i2c = {
1198     .reg_bits = 8,
1199     .val_bits = 8,
1200 
1201     .reg_defaults = da7210_reg_defaults,
1202     .num_reg_defaults = ARRAY_SIZE(da7210_reg_defaults),
1203     .volatile_reg = da7210_volatile_register,
1204     .readable_reg = da7210_readable_register,
1205     .cache_type = REGCACHE_RBTREE,
1206 };
1207 
1208 static int da7210_i2c_probe(struct i2c_client *i2c)
1209 {
1210     struct da7210_priv *da7210;
1211     int ret;
1212 
1213     da7210 = devm_kzalloc(&i2c->dev, sizeof(struct da7210_priv),
1214                   GFP_KERNEL);
1215     if (!da7210)
1216         return -ENOMEM;
1217 
1218     i2c_set_clientdata(i2c, da7210);
1219 
1220     da7210->regmap = devm_regmap_init_i2c(i2c, &da7210_regmap_config_i2c);
1221     if (IS_ERR(da7210->regmap)) {
1222         ret = PTR_ERR(da7210->regmap);
1223         dev_err(&i2c->dev, "regmap_init() failed: %d\n", ret);
1224         return ret;
1225     }
1226 
1227     ret = regmap_register_patch(da7210->regmap, da7210_regmap_i2c_patch,
1228                     ARRAY_SIZE(da7210_regmap_i2c_patch));
1229     if (ret != 0)
1230         dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
1231 
1232     ret =  devm_snd_soc_register_component(&i2c->dev,
1233             &soc_component_dev_da7210, &da7210_dai, 1);
1234     if (ret < 0)
1235         dev_err(&i2c->dev, "Failed to register component: %d\n", ret);
1236 
1237     return ret;
1238 }
1239 
1240 static const struct i2c_device_id da7210_i2c_id[] = {
1241     { "da7210", 0 },
1242     { }
1243 };
1244 MODULE_DEVICE_TABLE(i2c, da7210_i2c_id);
1245 
1246 /* I2C codec control layer */
1247 static struct i2c_driver da7210_i2c_driver = {
1248     .driver = {
1249         .name = "da7210",
1250     },
1251     .probe_new  = da7210_i2c_probe,
1252     .id_table   = da7210_i2c_id,
1253 };
1254 #endif
1255 
1256 #if defined(CONFIG_SPI_MASTER)
1257 
1258 static const struct reg_sequence da7210_regmap_spi_patch[] = {
1259     /* Dummy read to give two pulses over nCS for SPI */
1260     { DA7210_AUX2, 0x00 },
1261     { DA7210_AUX2, 0x00 },
1262 
1263     /* System controller master disable */
1264     { DA7210_STARTUP1, 0x00 },
1265     /* Set PLL Master clock range 10-20 MHz */
1266     { DA7210_PLL_DIV3, DA7210_MCLK_RANGE_10_20_MHZ },
1267 
1268     /* to set PAGE1 of SPI register space */
1269     { DA7210_PAGE_CONTROL, 0x80 },
1270     /* to unlock */
1271     { DA7210_A_HID_UNLOCK, 0x8B},
1272     { DA7210_A_TEST_UNLOCK, 0xB4},
1273     { DA7210_A_PLL1, 0x01},
1274     { DA7210_A_CP_MODE, 0x7C},
1275     /* to re-lock */
1276     { DA7210_A_HID_UNLOCK, 0x00},
1277     { DA7210_A_TEST_UNLOCK, 0x00},
1278     /* to set back PAGE0 of SPI register space */
1279     { DA7210_PAGE_CONTROL, 0x00 },
1280 };
1281 
1282 static const struct regmap_config da7210_regmap_config_spi = {
1283     .reg_bits = 8,
1284     .val_bits = 8,
1285     .read_flag_mask = 0x01,
1286     .write_flag_mask = 0x00,
1287 
1288     .reg_defaults = da7210_reg_defaults,
1289     .num_reg_defaults = ARRAY_SIZE(da7210_reg_defaults),
1290     .volatile_reg = da7210_volatile_register,
1291     .readable_reg = da7210_readable_register,
1292     .cache_type = REGCACHE_RBTREE,
1293 };
1294 
1295 static int da7210_spi_probe(struct spi_device *spi)
1296 {
1297     struct da7210_priv *da7210;
1298     int ret;
1299 
1300     da7210 = devm_kzalloc(&spi->dev, sizeof(struct da7210_priv),
1301                   GFP_KERNEL);
1302     if (!da7210)
1303         return -ENOMEM;
1304 
1305     spi_set_drvdata(spi, da7210);
1306     da7210->regmap = devm_regmap_init_spi(spi, &da7210_regmap_config_spi);
1307     if (IS_ERR(da7210->regmap)) {
1308         ret = PTR_ERR(da7210->regmap);
1309         dev_err(&spi->dev, "Failed to register regmap: %d\n", ret);
1310         return ret;
1311     }
1312 
1313     ret = regmap_register_patch(da7210->regmap, da7210_regmap_spi_patch,
1314                     ARRAY_SIZE(da7210_regmap_spi_patch));
1315     if (ret != 0)
1316         dev_warn(&spi->dev, "Failed to apply regmap patch: %d\n", ret);
1317 
1318     ret = devm_snd_soc_register_component(&spi->dev,
1319             &soc_component_dev_da7210, &da7210_dai, 1);
1320 
1321     return ret;
1322 }
1323 
1324 static struct spi_driver da7210_spi_driver = {
1325     .driver = {
1326         .name = "da7210",
1327     },
1328     .probe = da7210_spi_probe,
1329 };
1330 #endif
1331 
1332 static int __init da7210_modinit(void)
1333 {
1334     int ret = 0;
1335 #if IS_ENABLED(CONFIG_I2C)
1336     ret = i2c_add_driver(&da7210_i2c_driver);
1337     if (ret)
1338         return ret;
1339 #endif
1340 #if defined(CONFIG_SPI_MASTER)
1341     ret = spi_register_driver(&da7210_spi_driver);
1342     if (ret) {
1343         printk(KERN_ERR "Failed to register da7210 SPI driver: %d\n",
1344                ret);
1345     }
1346 #endif
1347     return ret;
1348 }
1349 module_init(da7210_modinit);
1350 
1351 static void __exit da7210_exit(void)
1352 {
1353 #if IS_ENABLED(CONFIG_I2C)
1354     i2c_del_driver(&da7210_i2c_driver);
1355 #endif
1356 #if defined(CONFIG_SPI_MASTER)
1357     spi_unregister_driver(&da7210_spi_driver);
1358 #endif
1359 }
1360 module_exit(da7210_exit);
1361 
1362 MODULE_DESCRIPTION("ASoC DA7210 driver");
1363 MODULE_AUTHOR("David Chen, Kuninori Morimoto");
1364 MODULE_LICENSE("GPL");
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