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0010 #ifndef __CS4265_H__
0011 #define __CS4265_H__
0012
0013 #define CS4265_CHIP_ID 0x1
0014 #define CS4265_CHIP_ID_VAL 0xD0
0015 #define CS4265_CHIP_ID_MASK 0xF0
0016 #define CS4265_REV_ID_MASK 0x0F
0017
0018 #define CS4265_PWRCTL 0x02
0019 #define CS4265_PWRCTL_PDN 1
0020
0021 #define CS4265_DAC_CTL 0x3
0022 #define CS4265_DAC_CTL_MUTE (1 << 2)
0023 #define CS4265_DAC_CTL_DIF (3 << 4)
0024
0025 #define CS4265_ADC_CTL 0x4
0026 #define CS4265_ADC_MASTER 1
0027 #define CS4265_ADC_DIF (1 << 4)
0028 #define CS4265_ADC_FM (3 << 6)
0029
0030 #define CS4265_MCLK_FREQ 0x5
0031 #define CS4265_MCLK_FREQ_MASK (7 << 4)
0032
0033 #define CS4265_SIG_SEL 0x6
0034 #define CS4265_SIG_SEL_LOOP (1 << 1)
0035
0036 #define CS4265_CHB_PGA_CTL 0x7
0037 #define CS4265_CHA_PGA_CTL 0x8
0038
0039 #define CS4265_ADC_CTL2 0x9
0040
0041 #define CS4265_DAC_CHA_VOL 0xA
0042 #define CS4265_DAC_CHB_VOL 0xB
0043
0044 #define CS4265_DAC_CTL2 0xC
0045
0046 #define CS4265_INT_STATUS 0xD
0047 #define CS4265_INT_MASK 0xE
0048 #define CS4265_STATUS_MODE_MSB 0xF
0049 #define CS4265_STATUS_MODE_LSB 0x10
0050
0051 #define CS4265_SPDIF_CTL1 0x11
0052
0053 #define CS4265_SPDIF_CTL2 0x12
0054 #define CS4265_SPDIF_CTL2_MUTE (1 << 4)
0055 #define CS4265_SPDIF_CTL2_DIF (3 << 6)
0056
0057 #define CS4265_C_DATA_BUFF 0x13
0058 #define CS4265_MAX_REGISTER 0x2A
0059
0060 #endif