soc/codecs/cs35l32.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * cs35l32.h -- CS35L32 ALSA SoC audio driver
0004  *
0005  * Copyright 2014 CirrusLogic, Inc.
0006  *
0007  * Author: Brian Austin <brian.austin@cirrus.com>
0008  */
0009
0010 #ifndef __CS35L32_H__
0011 #define __CS35L32_H__
0012
0013 struct cs35l32_platform_data {
0014     /* Low Battery Threshold */
0015     unsigned int batt_thresh;
0016     /* Low Battery Recovery */
0017     unsigned int batt_recov;
0018     /* LED Current Management*/
0019     unsigned int led_mng;
0020     /* Audio Gain w/ LED */
0021     unsigned int audiogain_mng;
0022     /* Boost Management */
0023     unsigned int boost_mng;
0024     /* Data CFG for DUAL device */
0025     unsigned int sdout_datacfg;
0026     /* SDOUT Sharing */
0027     unsigned int sdout_share;
0028 };
0029
0030 #define CS35L32_CHIP_ID     0x00035A32
0031 #define CS35L32_DEVID_AB    0x01    /* Device ID A & B [RO] */
0032 #define CS35L32_DEVID_CD    0x02    /* Device ID C & D [RO] */
0033 #define CS35L32_DEVID_E     0x03    /* Device ID E [RO] */
0034 #define CS35L32_FAB_ID      0x04    /* Fab ID [RO] */
0035 #define CS35L32_REV_ID      0x05    /* Revision ID [RO] */
0036 #define CS35L32_PWRCTL1     0x06    /* Power Ctl 1 */
0037 #define CS35L32_PWRCTL2     0x07    /* Power Ctl 2 */
0038 #define CS35L32_CLK_CTL     0x08    /* Clock Ctl */
0039 #define CS35L32_BATT_THRESHOLD  0x09    /* Low Battery Threshold */
0040 #define CS35L32_VMON        0x0A    /* Voltage Monitor [RO] */
0041 #define CS35L32_BST_CPCP_CTL    0x0B    /* Conv Peak Curr Protection CTL */
0042 #define CS35L32_IMON_SCALING    0x0C    /* IMON Scaling */
0043 #define CS35L32_AUDIO_LED_MNGR  0x0D    /* Audio/LED Pwr Manager */
0044 #define CS35L32_ADSP_CTL    0x0F    /* Serial Port Control */
0045 #define CS35L32_CLASSD_CTL  0x10    /* Class D Amp CTL */
0046 #define CS35L32_PROTECT_CTL 0x11    /* Protection Release CTL */
0047 #define CS35L32_INT_MASK_1  0x12    /* Interrupt Mask 1 */
0048 #define CS35L32_INT_MASK_2  0x13    /* Interrupt Mask 2 */
0049 #define CS35L32_INT_MASK_3  0x14    /* Interrupt Mask 3 */
0050 #define CS35L32_INT_STATUS_1    0x15    /* Interrupt Status 1 [RO] */
0051 #define CS35L32_INT_STATUS_2    0x16    /* Interrupt Status 2 [RO] */
0052 #define CS35L32_INT_STATUS_3    0x17    /* Interrupt Status 3 [RO] */
0053 #define CS35L32_LED_STATUS  0x18    /* LED Lighting Status [RO] */
0054 #define CS35L32_FLASH_MODE  0x19    /* LED Flash Mode Current */
0055 #define CS35L32_MOVIE_MODE  0x1A    /* LED Movie Mode Current */
0056 #define CS35L32_FLASH_TIMER 0x1B    /* LED Flash Timer */
0057 #define CS35L32_FLASH_INHIBIT   0x1C    /* LED Flash Inhibit Current */
0058 #define CS35L32_MAX_REGISTER    0x1C
0059
0060 #define CS35L32_MCLK_DIV2   0x01
0061 #define CS35L32_MCLK_RATIO  0x01
0062 #define CS35L32_MCLKDIS     0x80
0063 #define CS35L32_PDN_ALL     0x01
0064 #define CS35L32_PDN_AMP     0x80
0065 #define CS35L32_PDN_BOOST   0x04
0066 #define CS35L32_PDN_IMON    0x40
0067 #define CS35L32_PDN_VMON    0x80
0068 #define CS35L32_PDN_VPMON   0x20
0069 #define CS35L32_PDN_ADSP    0x08
0070
0071 #define CS35L32_MCLK_DIV2_MASK      0x40
0072 #define CS35L32_MCLK_RATIO_MASK     0x01
0073 #define CS35L32_MCLK_MASK       0x41
0074 #define CS35L32_ADSP_MASTER_MASK    0x40
0075 #define CS35L32_BOOST_MASK      0x03
0076 #define CS35L32_GAIN_MGR_MASK       0x08
0077 #define CS35L32_ADSP_SHARE_MASK     0x08
0078 #define CS35L32_ADSP_DATACFG_MASK   0x30
0079 #define CS35L32_SDOUT_3ST       0x08
0080 #define CS35L32_BATT_REC_MASK       0x0E
0081 #define CS35L32_BATT_THRESH_MASK    0x30
0082
0083 #define CS35L32_RATES (SNDRV_PCM_RATE_48000)
0084 #define CS35L32_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \
0085             SNDRV_PCM_FMTBIT_S24_LE | \
0086             SNDRV_PCM_FMTBIT_S32_LE)
0087
0088
0089 #endif