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0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Copyright 2019 Google, Inc.
0004  *
0005  * ChromeOS Embedded Controller codec driver.
0006  *
0007  * This driver uses the cros-ec interface to communicate with the ChromeOS
0008  * EC for audio function.
0009  */
0010 
0011 #include <crypto/sha2.h>
0012 #include <linux/acpi.h>
0013 #include <linux/delay.h>
0014 #include <linux/device.h>
0015 #include <linux/io.h>
0016 #include <linux/jiffies.h>
0017 #include <linux/kernel.h>
0018 #include <linux/module.h>
0019 #include <linux/of.h>
0020 #include <linux/of_address.h>
0021 #include <linux/platform_data/cros_ec_commands.h>
0022 #include <linux/platform_data/cros_ec_proto.h>
0023 #include <linux/platform_device.h>
0024 #include <sound/pcm.h>
0025 #include <sound/pcm_params.h>
0026 #include <sound/soc.h>
0027 #include <sound/tlv.h>
0028 
0029 struct cros_ec_codec_priv {
0030     struct device *dev;
0031     struct cros_ec_device *ec_device;
0032 
0033     /* common */
0034     uint32_t ec_capabilities;
0035 
0036     uint64_t ec_shm_addr;
0037     uint32_t ec_shm_len;
0038 
0039     uint64_t ap_shm_phys_addr;
0040     uint32_t ap_shm_len;
0041     uint64_t ap_shm_addr;
0042     uint64_t ap_shm_last_alloc;
0043 
0044     /* DMIC */
0045     atomic_t dmic_probed;
0046 
0047     /* I2S_RX */
0048     uint32_t i2s_rx_bclk_ratio;
0049 
0050     /* WoV */
0051     bool wov_enabled;
0052     uint8_t *wov_audio_shm_p;
0053     uint32_t wov_audio_shm_len;
0054     uint8_t wov_audio_shm_type;
0055     uint8_t *wov_lang_shm_p;
0056     uint32_t wov_lang_shm_len;
0057     uint8_t wov_lang_shm_type;
0058 
0059     struct mutex wov_dma_lock;
0060     uint8_t wov_buf[64000];
0061     uint32_t wov_rp, wov_wp;
0062     size_t wov_dma_offset;
0063     bool wov_burst_read;
0064     struct snd_pcm_substream *wov_substream;
0065     struct delayed_work wov_copy_work;
0066     struct notifier_block wov_notifier;
0067 };
0068 
0069 static int ec_codec_capable(struct cros_ec_codec_priv *priv, uint8_t cap)
0070 {
0071     return priv->ec_capabilities & BIT(cap);
0072 }
0073 
0074 static int send_ec_host_command(struct cros_ec_device *ec_dev, uint32_t cmd,
0075                 uint8_t *out, size_t outsize,
0076                 uint8_t *in, size_t insize)
0077 {
0078     int ret;
0079     struct cros_ec_command *msg;
0080 
0081     msg = kmalloc(sizeof(*msg) + max(outsize, insize), GFP_KERNEL);
0082     if (!msg)
0083         return -ENOMEM;
0084 
0085     msg->version = 0;
0086     msg->command = cmd;
0087     msg->outsize = outsize;
0088     msg->insize = insize;
0089 
0090     if (outsize)
0091         memcpy(msg->data, out, outsize);
0092 
0093     ret = cros_ec_cmd_xfer_status(ec_dev, msg);
0094     if (ret < 0)
0095         goto error;
0096 
0097     if (in && insize)
0098         memcpy(in, msg->data, insize);
0099 
0100     ret = 0;
0101 error:
0102     kfree(msg);
0103     return ret;
0104 }
0105 
0106 static int dmic_get_gain(struct snd_kcontrol *kcontrol,
0107              struct snd_ctl_elem_value *ucontrol)
0108 {
0109     struct snd_soc_component *component =
0110         snd_soc_kcontrol_component(kcontrol);
0111     struct cros_ec_codec_priv *priv =
0112         snd_soc_component_get_drvdata(component);
0113     struct ec_param_ec_codec_dmic p;
0114     struct ec_response_ec_codec_dmic_get_gain_idx r;
0115     int ret;
0116 
0117     p.cmd = EC_CODEC_DMIC_GET_GAIN_IDX;
0118     p.get_gain_idx_param.channel = EC_CODEC_DMIC_CHANNEL_0;
0119     ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_DMIC,
0120                    (uint8_t *)&p, sizeof(p),
0121                    (uint8_t *)&r, sizeof(r));
0122     if (ret < 0)
0123         return ret;
0124     ucontrol->value.integer.value[0] = r.gain;
0125 
0126     p.cmd = EC_CODEC_DMIC_GET_GAIN_IDX;
0127     p.get_gain_idx_param.channel = EC_CODEC_DMIC_CHANNEL_1;
0128     ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_DMIC,
0129                    (uint8_t *)&p, sizeof(p),
0130                    (uint8_t *)&r, sizeof(r));
0131     if (ret < 0)
0132         return ret;
0133     ucontrol->value.integer.value[1] = r.gain;
0134 
0135     return 0;
0136 }
0137 
0138 static int dmic_put_gain(struct snd_kcontrol *kcontrol,
0139              struct snd_ctl_elem_value *ucontrol)
0140 {
0141     struct snd_soc_component *component =
0142         snd_soc_kcontrol_component(kcontrol);
0143     struct cros_ec_codec_priv *priv =
0144         snd_soc_component_get_drvdata(component);
0145     struct soc_mixer_control *control =
0146         (struct soc_mixer_control *)kcontrol->private_value;
0147     int max_dmic_gain = control->max;
0148     int left = ucontrol->value.integer.value[0];
0149     int right = ucontrol->value.integer.value[1];
0150     struct ec_param_ec_codec_dmic p;
0151     int ret;
0152 
0153     if (left > max_dmic_gain || right > max_dmic_gain)
0154         return -EINVAL;
0155 
0156     dev_dbg(component->dev, "set mic gain to %u, %u\n", left, right);
0157 
0158     p.cmd = EC_CODEC_DMIC_SET_GAIN_IDX;
0159     p.set_gain_idx_param.channel = EC_CODEC_DMIC_CHANNEL_0;
0160     p.set_gain_idx_param.gain = left;
0161     ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_DMIC,
0162                    (uint8_t *)&p, sizeof(p), NULL, 0);
0163     if (ret < 0)
0164         return ret;
0165 
0166     p.cmd = EC_CODEC_DMIC_SET_GAIN_IDX;
0167     p.set_gain_idx_param.channel = EC_CODEC_DMIC_CHANNEL_1;
0168     p.set_gain_idx_param.gain = right;
0169     return send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_DMIC,
0170                     (uint8_t *)&p, sizeof(p), NULL, 0);
0171 }
0172 
0173 static const DECLARE_TLV_DB_SCALE(dmic_gain_tlv, 0, 100, 0);
0174 
0175 enum {
0176     DMIC_CTL_GAIN = 0,
0177 };
0178 
0179 static struct snd_kcontrol_new dmic_controls[] = {
0180     [DMIC_CTL_GAIN] =
0181         SOC_DOUBLE_EXT_TLV("EC Mic Gain", SND_SOC_NOPM, SND_SOC_NOPM,
0182                    0, 0, 0, dmic_get_gain, dmic_put_gain,
0183                    dmic_gain_tlv),
0184 };
0185 
0186 static int dmic_probe(struct snd_soc_component *component)
0187 {
0188     struct cros_ec_codec_priv *priv =
0189         snd_soc_component_get_drvdata(component);
0190     struct device *dev = priv->dev;
0191     struct soc_mixer_control *control;
0192     struct ec_param_ec_codec_dmic p;
0193     struct ec_response_ec_codec_dmic_get_max_gain r;
0194     int ret;
0195 
0196     if (!atomic_add_unless(&priv->dmic_probed, 1, 1))
0197         return 0;
0198 
0199     p.cmd = EC_CODEC_DMIC_GET_MAX_GAIN;
0200 
0201     ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_DMIC,
0202                    (uint8_t *)&p, sizeof(p),
0203                    (uint8_t *)&r, sizeof(r));
0204     if (ret < 0) {
0205         dev_warn(dev, "get_max_gain() unsupported\n");
0206         return 0;
0207     }
0208 
0209     dev_dbg(dev, "max gain = %d\n", r.max_gain);
0210 
0211     control = (struct soc_mixer_control *)
0212         dmic_controls[DMIC_CTL_GAIN].private_value;
0213     control->max = r.max_gain;
0214     control->platform_max = r.max_gain;
0215 
0216     return snd_soc_add_component_controls(component,
0217             &dmic_controls[DMIC_CTL_GAIN], 1);
0218 }
0219 
0220 static int i2s_rx_hw_params(struct snd_pcm_substream *substream,
0221                 struct snd_pcm_hw_params *params,
0222                 struct snd_soc_dai *dai)
0223 {
0224     struct snd_soc_component *component = dai->component;
0225     struct cros_ec_codec_priv *priv =
0226         snd_soc_component_get_drvdata(component);
0227     struct ec_param_ec_codec_i2s_rx p;
0228     enum ec_codec_i2s_rx_sample_depth depth;
0229     uint32_t bclk;
0230     int ret;
0231 
0232     if (params_rate(params) != 48000)
0233         return -EINVAL;
0234 
0235     switch (params_width(params)) {
0236     case 16:
0237         depth = EC_CODEC_I2S_RX_SAMPLE_DEPTH_16;
0238         break;
0239     case 24:
0240         depth = EC_CODEC_I2S_RX_SAMPLE_DEPTH_24;
0241         break;
0242     default:
0243         return -EINVAL;
0244     }
0245 
0246     dev_dbg(component->dev, "set depth to %u\n", depth);
0247 
0248     p.cmd = EC_CODEC_I2S_RX_SET_SAMPLE_DEPTH;
0249     p.set_sample_depth_param.depth = depth;
0250     ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_I2S_RX,
0251                    (uint8_t *)&p, sizeof(p), NULL, 0);
0252     if (ret < 0)
0253         return ret;
0254 
0255     if (priv->i2s_rx_bclk_ratio)
0256         bclk = params_rate(params) * priv->i2s_rx_bclk_ratio;
0257     else
0258         bclk = snd_soc_params_to_bclk(params);
0259 
0260     dev_dbg(component->dev, "set bclk to %u\n", bclk);
0261 
0262     p.cmd = EC_CODEC_I2S_RX_SET_BCLK;
0263     p.set_bclk_param.bclk = bclk;
0264     return send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_I2S_RX,
0265                     (uint8_t *)&p, sizeof(p), NULL, 0);
0266 }
0267 
0268 static int i2s_rx_set_bclk_ratio(struct snd_soc_dai *dai, unsigned int ratio)
0269 {
0270     struct snd_soc_component *component = dai->component;
0271     struct cros_ec_codec_priv *priv =
0272         snd_soc_component_get_drvdata(component);
0273 
0274     priv->i2s_rx_bclk_ratio = ratio;
0275     return 0;
0276 }
0277 
0278 static int i2s_rx_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
0279 {
0280     struct snd_soc_component *component = dai->component;
0281     struct cros_ec_codec_priv *priv =
0282         snd_soc_component_get_drvdata(component);
0283     struct ec_param_ec_codec_i2s_rx p;
0284     enum ec_codec_i2s_rx_daifmt daifmt;
0285 
0286     switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
0287     case SND_SOC_DAIFMT_CBC_CFC:
0288         break;
0289     default:
0290         return -EINVAL;
0291     }
0292 
0293     switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
0294     case SND_SOC_DAIFMT_NB_NF:
0295         break;
0296     default:
0297         return -EINVAL;
0298     }
0299 
0300     switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
0301     case SND_SOC_DAIFMT_I2S:
0302         daifmt = EC_CODEC_I2S_RX_DAIFMT_I2S;
0303         break;
0304     case SND_SOC_DAIFMT_RIGHT_J:
0305         daifmt = EC_CODEC_I2S_RX_DAIFMT_RIGHT_J;
0306         break;
0307     case SND_SOC_DAIFMT_LEFT_J:
0308         daifmt = EC_CODEC_I2S_RX_DAIFMT_LEFT_J;
0309         break;
0310     default:
0311         return -EINVAL;
0312     }
0313 
0314     dev_dbg(component->dev, "set format to %u\n", daifmt);
0315 
0316     p.cmd = EC_CODEC_I2S_RX_SET_DAIFMT;
0317     p.set_daifmt_param.daifmt = daifmt;
0318     return send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_I2S_RX,
0319                     (uint8_t *)&p, sizeof(p), NULL, 0);
0320 }
0321 
0322 static const struct snd_soc_dai_ops i2s_rx_dai_ops = {
0323     .hw_params = i2s_rx_hw_params,
0324     .set_fmt = i2s_rx_set_fmt,
0325     .set_bclk_ratio = i2s_rx_set_bclk_ratio,
0326 };
0327 
0328 static int i2s_rx_event(struct snd_soc_dapm_widget *w,
0329             struct snd_kcontrol *kcontrol, int event)
0330 {
0331     struct snd_soc_component *component =
0332         snd_soc_dapm_to_component(w->dapm);
0333     struct cros_ec_codec_priv *priv =
0334         snd_soc_component_get_drvdata(component);
0335     struct ec_param_ec_codec_i2s_rx p = {};
0336 
0337     switch (event) {
0338     case SND_SOC_DAPM_PRE_PMU:
0339         dev_dbg(component->dev, "enable I2S RX\n");
0340         p.cmd = EC_CODEC_I2S_RX_ENABLE;
0341         break;
0342     case SND_SOC_DAPM_PRE_PMD:
0343         dev_dbg(component->dev, "disable I2S RX\n");
0344         p.cmd = EC_CODEC_I2S_RX_DISABLE;
0345         break;
0346     default:
0347         return 0;
0348     }
0349 
0350     return send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_I2S_RX,
0351                     (uint8_t *)&p, sizeof(p), NULL, 0);
0352 }
0353 
0354 static struct snd_soc_dapm_widget i2s_rx_dapm_widgets[] = {
0355     SND_SOC_DAPM_INPUT("DMIC"),
0356     SND_SOC_DAPM_SUPPLY("I2S RX Enable", SND_SOC_NOPM, 0, 0, i2s_rx_event,
0357                 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD),
0358     SND_SOC_DAPM_AIF_OUT("I2S RX", "I2S Capture", 0, SND_SOC_NOPM, 0, 0),
0359 };
0360 
0361 static struct snd_soc_dapm_route i2s_rx_dapm_routes[] = {
0362     {"I2S RX", NULL, "DMIC"},
0363     {"I2S RX", NULL, "I2S RX Enable"},
0364 };
0365 
0366 static struct snd_soc_dai_driver i2s_rx_dai_driver = {
0367     .name = "EC Codec I2S RX",
0368     .capture = {
0369         .stream_name = "I2S Capture",
0370         .channels_min = 2,
0371         .channels_max = 2,
0372         .rates = SNDRV_PCM_RATE_48000,
0373         .formats = SNDRV_PCM_FMTBIT_S16_LE |
0374             SNDRV_PCM_FMTBIT_S24_LE,
0375     },
0376     .ops = &i2s_rx_dai_ops,
0377 };
0378 
0379 static int i2s_rx_probe(struct snd_soc_component *component)
0380 {
0381     return dmic_probe(component);
0382 }
0383 
0384 static const struct snd_soc_component_driver i2s_rx_component_driver = {
0385     .probe          = i2s_rx_probe,
0386     .dapm_widgets       = i2s_rx_dapm_widgets,
0387     .num_dapm_widgets   = ARRAY_SIZE(i2s_rx_dapm_widgets),
0388     .dapm_routes        = i2s_rx_dapm_routes,
0389     .num_dapm_routes    = ARRAY_SIZE(i2s_rx_dapm_routes),
0390     .endianness     = 1,
0391 };
0392 
0393 static void *wov_map_shm(struct cros_ec_codec_priv *priv,
0394              uint8_t shm_id, uint32_t *len, uint8_t *type)
0395 {
0396     struct ec_param_ec_codec p;
0397     struct ec_response_ec_codec_get_shm_addr r;
0398     uint32_t req, offset;
0399 
0400     p.cmd = EC_CODEC_GET_SHM_ADDR;
0401     p.get_shm_addr_param.shm_id = shm_id;
0402     if (send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC,
0403                  (uint8_t *)&p, sizeof(p),
0404                  (uint8_t *)&r, sizeof(r)) < 0) {
0405         dev_err(priv->dev, "failed to EC_CODEC_GET_SHM_ADDR\n");
0406         return NULL;
0407     }
0408 
0409     dev_dbg(priv->dev, "phys_addr=%#llx, len=%#x\n", r.phys_addr, r.len);
0410 
0411     *len = r.len;
0412     *type = r.type;
0413 
0414     switch (r.type) {
0415     case EC_CODEC_SHM_TYPE_EC_RAM:
0416         return (void __force *)devm_ioremap_wc(priv->dev,
0417                 r.phys_addr + priv->ec_shm_addr, r.len);
0418     case EC_CODEC_SHM_TYPE_SYSTEM_RAM:
0419         if (r.phys_addr) {
0420             dev_err(priv->dev, "unknown status\n");
0421             return NULL;
0422         }
0423 
0424         req = round_up(r.len, PAGE_SIZE);
0425         dev_dbg(priv->dev, "round up from %u to %u\n", r.len, req);
0426 
0427         if (priv->ap_shm_last_alloc + req >
0428             priv->ap_shm_phys_addr + priv->ap_shm_len) {
0429             dev_err(priv->dev, "insufficient space for AP SHM\n");
0430             return NULL;
0431         }
0432 
0433         dev_dbg(priv->dev, "alloc AP SHM addr=%#llx, len=%#x\n",
0434             priv->ap_shm_last_alloc, req);
0435 
0436         p.cmd = EC_CODEC_SET_SHM_ADDR;
0437         p.set_shm_addr_param.phys_addr = priv->ap_shm_last_alloc;
0438         p.set_shm_addr_param.len = req;
0439         p.set_shm_addr_param.shm_id = shm_id;
0440         if (send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC,
0441                      (uint8_t *)&p, sizeof(p),
0442                      NULL, 0) < 0) {
0443             dev_err(priv->dev, "failed to EC_CODEC_SET_SHM_ADDR\n");
0444             return NULL;
0445         }
0446 
0447         /*
0448          * Note: EC codec only requests for `r.len' but we allocate
0449          * round up PAGE_SIZE `req'.
0450          */
0451         offset = priv->ap_shm_last_alloc - priv->ap_shm_phys_addr;
0452         priv->ap_shm_last_alloc += req;
0453 
0454         return (void *)(uintptr_t)(priv->ap_shm_addr + offset);
0455     default:
0456         return NULL;
0457     }
0458 }
0459 
0460 static bool wov_queue_full(struct cros_ec_codec_priv *priv)
0461 {
0462     return ((priv->wov_wp + 1) % sizeof(priv->wov_buf)) == priv->wov_rp;
0463 }
0464 
0465 static size_t wov_queue_size(struct cros_ec_codec_priv *priv)
0466 {
0467     if (priv->wov_wp >= priv->wov_rp)
0468         return priv->wov_wp - priv->wov_rp;
0469     else
0470         return sizeof(priv->wov_buf) - priv->wov_rp + priv->wov_wp;
0471 }
0472 
0473 static void wov_queue_dequeue(struct cros_ec_codec_priv *priv, size_t len)
0474 {
0475     struct snd_pcm_runtime *runtime = priv->wov_substream->runtime;
0476     size_t req;
0477 
0478     while (len) {
0479         req = min(len, runtime->dma_bytes - priv->wov_dma_offset);
0480         if (priv->wov_wp >= priv->wov_rp)
0481             req = min(req, (size_t)priv->wov_wp - priv->wov_rp);
0482         else
0483             req = min(req, sizeof(priv->wov_buf) - priv->wov_rp);
0484 
0485         memcpy(runtime->dma_area + priv->wov_dma_offset,
0486                priv->wov_buf + priv->wov_rp, req);
0487 
0488         priv->wov_dma_offset += req;
0489         if (priv->wov_dma_offset == runtime->dma_bytes)
0490             priv->wov_dma_offset = 0;
0491 
0492         priv->wov_rp += req;
0493         if (priv->wov_rp == sizeof(priv->wov_buf))
0494             priv->wov_rp = 0;
0495 
0496         len -= req;
0497     }
0498 
0499     snd_pcm_period_elapsed(priv->wov_substream);
0500 }
0501 
0502 static void wov_queue_try_dequeue(struct cros_ec_codec_priv *priv)
0503 {
0504     size_t period_bytes = snd_pcm_lib_period_bytes(priv->wov_substream);
0505 
0506     while (period_bytes && wov_queue_size(priv) >= period_bytes) {
0507         wov_queue_dequeue(priv, period_bytes);
0508         period_bytes = snd_pcm_lib_period_bytes(priv->wov_substream);
0509     }
0510 }
0511 
0512 static void wov_queue_enqueue(struct cros_ec_codec_priv *priv,
0513                   uint8_t *addr, size_t len, bool iomem)
0514 {
0515     size_t req;
0516 
0517     while (len) {
0518         if (wov_queue_full(priv)) {
0519             wov_queue_try_dequeue(priv);
0520 
0521             if (wov_queue_full(priv)) {
0522                 dev_err(priv->dev, "overrun detected\n");
0523                 return;
0524             }
0525         }
0526 
0527         if (priv->wov_wp >= priv->wov_rp)
0528             req = sizeof(priv->wov_buf) - priv->wov_wp;
0529         else
0530             /* Note: waste 1-byte to differentiate full and empty */
0531             req = priv->wov_rp - priv->wov_wp - 1;
0532         req = min(req, len);
0533 
0534         if (iomem)
0535             memcpy_fromio(priv->wov_buf + priv->wov_wp,
0536                       (void __force __iomem *)addr, req);
0537         else
0538             memcpy(priv->wov_buf + priv->wov_wp, addr, req);
0539 
0540         priv->wov_wp += req;
0541         if (priv->wov_wp == sizeof(priv->wov_buf))
0542             priv->wov_wp = 0;
0543 
0544         addr += req;
0545         len -= req;
0546     }
0547 
0548     wov_queue_try_dequeue(priv);
0549 }
0550 
0551 static int wov_read_audio_shm(struct cros_ec_codec_priv *priv)
0552 {
0553     struct ec_param_ec_codec_wov p;
0554     struct ec_response_ec_codec_wov_read_audio_shm r;
0555     int ret;
0556 
0557     p.cmd = EC_CODEC_WOV_READ_AUDIO_SHM;
0558     ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_WOV,
0559                    (uint8_t *)&p, sizeof(p),
0560                    (uint8_t *)&r, sizeof(r));
0561     if (ret) {
0562         dev_err(priv->dev, "failed to EC_CODEC_WOV_READ_AUDIO_SHM\n");
0563         return ret;
0564     }
0565 
0566     if (!r.len)
0567         dev_dbg(priv->dev, "no data, sleep\n");
0568     else
0569         wov_queue_enqueue(priv, priv->wov_audio_shm_p + r.offset, r.len,
0570             priv->wov_audio_shm_type == EC_CODEC_SHM_TYPE_EC_RAM);
0571     return -EAGAIN;
0572 }
0573 
0574 static int wov_read_audio(struct cros_ec_codec_priv *priv)
0575 {
0576     struct ec_param_ec_codec_wov p;
0577     struct ec_response_ec_codec_wov_read_audio r;
0578     int remain = priv->wov_burst_read ? 16000 : 320;
0579     int ret;
0580 
0581     while (remain >= 0) {
0582         p.cmd = EC_CODEC_WOV_READ_AUDIO;
0583         ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_WOV,
0584                        (uint8_t *)&p, sizeof(p),
0585                        (uint8_t *)&r, sizeof(r));
0586         if (ret) {
0587             dev_err(priv->dev,
0588                 "failed to EC_CODEC_WOV_READ_AUDIO\n");
0589             return ret;
0590         }
0591 
0592         if (!r.len) {
0593             dev_dbg(priv->dev, "no data, sleep\n");
0594             priv->wov_burst_read = false;
0595             break;
0596         }
0597 
0598         wov_queue_enqueue(priv, r.buf, r.len, false);
0599         remain -= r.len;
0600     }
0601 
0602     return -EAGAIN;
0603 }
0604 
0605 static void wov_copy_work(struct work_struct *w)
0606 {
0607     struct cros_ec_codec_priv *priv =
0608         container_of(w, struct cros_ec_codec_priv, wov_copy_work.work);
0609     int ret;
0610 
0611     mutex_lock(&priv->wov_dma_lock);
0612     if (!priv->wov_substream) {
0613         dev_warn(priv->dev, "no pcm substream\n");
0614         goto leave;
0615     }
0616 
0617     if (ec_codec_capable(priv, EC_CODEC_CAP_WOV_AUDIO_SHM))
0618         ret = wov_read_audio_shm(priv);
0619     else
0620         ret = wov_read_audio(priv);
0621 
0622     if (ret == -EAGAIN)
0623         schedule_delayed_work(&priv->wov_copy_work,
0624                       msecs_to_jiffies(10));
0625     else if (ret)
0626         dev_err(priv->dev, "failed to read audio data\n");
0627 leave:
0628     mutex_unlock(&priv->wov_dma_lock);
0629 }
0630 
0631 static int wov_enable_get(struct snd_kcontrol *kcontrol,
0632               struct snd_ctl_elem_value *ucontrol)
0633 {
0634     struct snd_soc_component *c = snd_soc_kcontrol_component(kcontrol);
0635     struct cros_ec_codec_priv *priv = snd_soc_component_get_drvdata(c);
0636 
0637     ucontrol->value.integer.value[0] = priv->wov_enabled;
0638     return 0;
0639 }
0640 
0641 static int wov_enable_put(struct snd_kcontrol *kcontrol,
0642               struct snd_ctl_elem_value *ucontrol)
0643 {
0644     struct snd_soc_component *c = snd_soc_kcontrol_component(kcontrol);
0645     struct cros_ec_codec_priv *priv = snd_soc_component_get_drvdata(c);
0646     int enabled = ucontrol->value.integer.value[0];
0647     struct ec_param_ec_codec_wov p;
0648     int ret;
0649 
0650     if (priv->wov_enabled != enabled) {
0651         if (enabled)
0652             p.cmd = EC_CODEC_WOV_ENABLE;
0653         else
0654             p.cmd = EC_CODEC_WOV_DISABLE;
0655 
0656         ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_WOV,
0657                        (uint8_t *)&p, sizeof(p), NULL, 0);
0658         if (ret) {
0659             dev_err(priv->dev, "failed to %s wov\n",
0660                 enabled ? "enable" : "disable");
0661             return ret;
0662         }
0663 
0664         priv->wov_enabled = enabled;
0665     }
0666 
0667     return 0;
0668 }
0669 
0670 static int wov_set_lang_shm(struct cros_ec_codec_priv *priv,
0671                 uint8_t *buf, size_t size, uint8_t *digest)
0672 {
0673     struct ec_param_ec_codec_wov p;
0674     struct ec_param_ec_codec_wov_set_lang_shm *pp = &p.set_lang_shm_param;
0675     int ret;
0676 
0677     if (size > priv->wov_lang_shm_len) {
0678         dev_err(priv->dev, "no enough SHM size: %d\n",
0679             priv->wov_lang_shm_len);
0680         return -EIO;
0681     }
0682 
0683     switch (priv->wov_lang_shm_type) {
0684     case EC_CODEC_SHM_TYPE_EC_RAM:
0685         memcpy_toio((void __force __iomem *)priv->wov_lang_shm_p,
0686                 buf, size);
0687         memset_io((void __force __iomem *)priv->wov_lang_shm_p + size,
0688               0, priv->wov_lang_shm_len - size);
0689         break;
0690     case EC_CODEC_SHM_TYPE_SYSTEM_RAM:
0691         memcpy(priv->wov_lang_shm_p, buf, size);
0692         memset(priv->wov_lang_shm_p + size, 0,
0693                priv->wov_lang_shm_len - size);
0694 
0695         /* make sure write to memory before calling host command */
0696         wmb();
0697         break;
0698     }
0699 
0700     p.cmd = EC_CODEC_WOV_SET_LANG_SHM;
0701     memcpy(pp->hash, digest, SHA256_DIGEST_SIZE);
0702     pp->total_len = size;
0703     ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_WOV,
0704                    (uint8_t *)&p, sizeof(p), NULL, 0);
0705     if (ret) {
0706         dev_err(priv->dev, "failed to EC_CODEC_WOV_SET_LANG_SHM\n");
0707         return ret;
0708     }
0709 
0710     return 0;
0711 }
0712 
0713 static int wov_set_lang(struct cros_ec_codec_priv *priv,
0714             uint8_t *buf, size_t size, uint8_t *digest)
0715 {
0716     struct ec_param_ec_codec_wov p;
0717     struct ec_param_ec_codec_wov_set_lang *pp = &p.set_lang_param;
0718     size_t i, req;
0719     int ret;
0720 
0721     for (i = 0; i < size; i += req) {
0722         req = min(size - i, ARRAY_SIZE(pp->buf));
0723 
0724         p.cmd = EC_CODEC_WOV_SET_LANG;
0725         memcpy(pp->hash, digest, SHA256_DIGEST_SIZE);
0726         pp->total_len = size;
0727         pp->offset = i;
0728         memcpy(pp->buf, buf + i, req);
0729         pp->len = req;
0730         ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_WOV,
0731                        (uint8_t *)&p, sizeof(p), NULL, 0);
0732         if (ret) {
0733             dev_err(priv->dev, "failed to EC_CODEC_WOV_SET_LANG\n");
0734             return ret;
0735         }
0736     }
0737 
0738     return 0;
0739 }
0740 
0741 static int wov_hotword_model_put(struct snd_kcontrol *kcontrol,
0742                  const unsigned int __user *bytes,
0743                  unsigned int size)
0744 {
0745     struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
0746     struct cros_ec_codec_priv *priv =
0747         snd_soc_component_get_drvdata(component);
0748     struct ec_param_ec_codec_wov p;
0749     struct ec_response_ec_codec_wov_get_lang r;
0750     uint8_t digest[SHA256_DIGEST_SIZE];
0751     uint8_t *buf;
0752     int ret;
0753 
0754     /* Skips the TLV header. */
0755     bytes += 2;
0756     size -= 8;
0757 
0758     dev_dbg(priv->dev, "%s: size=%d\n", __func__, size);
0759 
0760     buf = memdup_user(bytes, size);
0761     if (IS_ERR(buf))
0762         return PTR_ERR(buf);
0763 
0764     sha256(buf, size, digest);
0765     dev_dbg(priv->dev, "hash=%*phN\n", SHA256_DIGEST_SIZE, digest);
0766 
0767     p.cmd = EC_CODEC_WOV_GET_LANG;
0768     ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_WOV,
0769                    (uint8_t *)&p, sizeof(p),
0770                    (uint8_t *)&r, sizeof(r));
0771     if (ret)
0772         goto leave;
0773 
0774     if (memcmp(digest, r.hash, SHA256_DIGEST_SIZE) == 0) {
0775         dev_dbg(priv->dev, "not updated");
0776         goto leave;
0777     }
0778 
0779     if (ec_codec_capable(priv, EC_CODEC_CAP_WOV_LANG_SHM))
0780         ret = wov_set_lang_shm(priv, buf, size, digest);
0781     else
0782         ret = wov_set_lang(priv, buf, size, digest);
0783 
0784 leave:
0785     kfree(buf);
0786     return ret;
0787 }
0788 
0789 static struct snd_kcontrol_new wov_controls[] = {
0790     SOC_SINGLE_BOOL_EXT("Wake-on-Voice Switch", 0,
0791                 wov_enable_get, wov_enable_put),
0792     SND_SOC_BYTES_TLV("Hotword Model", 0x11000, NULL,
0793               wov_hotword_model_put),
0794 };
0795 
0796 static struct snd_soc_dai_driver wov_dai_driver = {
0797     .name = "Wake on Voice",
0798     .capture = {
0799         .stream_name = "WoV Capture",
0800         .channels_min = 1,
0801         .channels_max = 1,
0802         .rates = SNDRV_PCM_RATE_16000,
0803         .formats = SNDRV_PCM_FMTBIT_S16_LE,
0804     },
0805 };
0806 
0807 static int wov_host_event(struct notifier_block *nb,
0808               unsigned long queued_during_suspend, void *notify)
0809 {
0810     struct cros_ec_codec_priv *priv =
0811         container_of(nb, struct cros_ec_codec_priv, wov_notifier);
0812     u32 host_event;
0813 
0814     dev_dbg(priv->dev, "%s\n", __func__);
0815 
0816     host_event = cros_ec_get_host_event(priv->ec_device);
0817     if (host_event & EC_HOST_EVENT_MASK(EC_HOST_EVENT_WOV)) {
0818         schedule_delayed_work(&priv->wov_copy_work, 0);
0819         return NOTIFY_OK;
0820     } else {
0821         return NOTIFY_DONE;
0822     }
0823 }
0824 
0825 static int wov_probe(struct snd_soc_component *component)
0826 {
0827     struct cros_ec_codec_priv *priv =
0828         snd_soc_component_get_drvdata(component);
0829     int ret;
0830 
0831     mutex_init(&priv->wov_dma_lock);
0832     INIT_DELAYED_WORK(&priv->wov_copy_work, wov_copy_work);
0833 
0834     priv->wov_notifier.notifier_call = wov_host_event;
0835     ret = blocking_notifier_chain_register(
0836             &priv->ec_device->event_notifier, &priv->wov_notifier);
0837     if (ret)
0838         return ret;
0839 
0840     if (ec_codec_capable(priv, EC_CODEC_CAP_WOV_LANG_SHM)) {
0841         priv->wov_lang_shm_p = wov_map_shm(priv,
0842                 EC_CODEC_SHM_ID_WOV_LANG,
0843                 &priv->wov_lang_shm_len,
0844                 &priv->wov_lang_shm_type);
0845         if (!priv->wov_lang_shm_p)
0846             return -EFAULT;
0847     }
0848 
0849     if (ec_codec_capable(priv, EC_CODEC_CAP_WOV_AUDIO_SHM)) {
0850         priv->wov_audio_shm_p = wov_map_shm(priv,
0851                 EC_CODEC_SHM_ID_WOV_AUDIO,
0852                 &priv->wov_audio_shm_len,
0853                 &priv->wov_audio_shm_type);
0854         if (!priv->wov_audio_shm_p)
0855             return -EFAULT;
0856     }
0857 
0858     return dmic_probe(component);
0859 }
0860 
0861 static void wov_remove(struct snd_soc_component *component)
0862 {
0863     struct cros_ec_codec_priv *priv =
0864         snd_soc_component_get_drvdata(component);
0865 
0866     blocking_notifier_chain_unregister(
0867             &priv->ec_device->event_notifier, &priv->wov_notifier);
0868 }
0869 
0870 static int wov_pcm_open(struct snd_soc_component *component,
0871             struct snd_pcm_substream *substream)
0872 {
0873     static const struct snd_pcm_hardware hw_param = {
0874         .info = SNDRV_PCM_INFO_MMAP |
0875             SNDRV_PCM_INFO_INTERLEAVED |
0876             SNDRV_PCM_INFO_MMAP_VALID,
0877         .formats = SNDRV_PCM_FMTBIT_S16_LE,
0878         .rates = SNDRV_PCM_RATE_16000,
0879         .channels_min = 1,
0880         .channels_max = 1,
0881         .period_bytes_min = PAGE_SIZE,
0882         .period_bytes_max = 0x20000 / 8,
0883         .periods_min = 8,
0884         .periods_max = 8,
0885         .buffer_bytes_max = 0x20000,
0886     };
0887 
0888     return snd_soc_set_runtime_hwparams(substream, &hw_param);
0889 }
0890 
0891 static int wov_pcm_hw_params(struct snd_soc_component *component,
0892                  struct snd_pcm_substream *substream,
0893                  struct snd_pcm_hw_params *hw_params)
0894 {
0895     struct cros_ec_codec_priv *priv =
0896         snd_soc_component_get_drvdata(component);
0897 
0898     mutex_lock(&priv->wov_dma_lock);
0899     priv->wov_substream = substream;
0900     priv->wov_rp = priv->wov_wp = 0;
0901     priv->wov_dma_offset = 0;
0902     priv->wov_burst_read = true;
0903     mutex_unlock(&priv->wov_dma_lock);
0904 
0905     return 0;
0906 }
0907 
0908 static int wov_pcm_hw_free(struct snd_soc_component *component,
0909                struct snd_pcm_substream *substream)
0910 {
0911     struct cros_ec_codec_priv *priv =
0912         snd_soc_component_get_drvdata(component);
0913 
0914     mutex_lock(&priv->wov_dma_lock);
0915     wov_queue_dequeue(priv, wov_queue_size(priv));
0916     priv->wov_substream = NULL;
0917     mutex_unlock(&priv->wov_dma_lock);
0918 
0919     cancel_delayed_work_sync(&priv->wov_copy_work);
0920 
0921     return 0;
0922 }
0923 
0924 static snd_pcm_uframes_t wov_pcm_pointer(struct snd_soc_component *component,
0925                      struct snd_pcm_substream *substream)
0926 {
0927     struct snd_pcm_runtime *runtime = substream->runtime;
0928     struct cros_ec_codec_priv *priv =
0929         snd_soc_component_get_drvdata(component);
0930 
0931     return bytes_to_frames(runtime, priv->wov_dma_offset);
0932 }
0933 
0934 static int wov_pcm_new(struct snd_soc_component *component,
0935                struct snd_soc_pcm_runtime *rtd)
0936 {
0937     snd_pcm_set_managed_buffer_all(rtd->pcm, SNDRV_DMA_TYPE_VMALLOC,
0938                        NULL, 0, 0);
0939     return 0;
0940 }
0941 
0942 static const struct snd_soc_component_driver wov_component_driver = {
0943     .probe      = wov_probe,
0944     .remove     = wov_remove,
0945     .controls   = wov_controls,
0946     .num_controls   = ARRAY_SIZE(wov_controls),
0947     .open       = wov_pcm_open,
0948     .hw_params  = wov_pcm_hw_params,
0949     .hw_free    = wov_pcm_hw_free,
0950     .pointer    = wov_pcm_pointer,
0951     .pcm_construct  = wov_pcm_new,
0952 };
0953 
0954 static int cros_ec_codec_platform_probe(struct platform_device *pdev)
0955 {
0956     struct device *dev = &pdev->dev;
0957     struct cros_ec_device *ec_device = dev_get_drvdata(pdev->dev.parent);
0958     struct cros_ec_codec_priv *priv;
0959     struct ec_param_ec_codec p;
0960     struct ec_response_ec_codec_get_capabilities r;
0961     int ret;
0962 #ifdef CONFIG_OF
0963     struct device_node *node;
0964     struct resource res;
0965     u64 ec_shm_size;
0966     const __be32 *regaddr_p;
0967 #endif
0968 
0969     priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
0970     if (!priv)
0971         return -ENOMEM;
0972 
0973 #ifdef CONFIG_OF
0974     regaddr_p = of_get_address(dev->of_node, 0, &ec_shm_size, NULL);
0975     if (regaddr_p) {
0976         priv->ec_shm_addr = of_read_number(regaddr_p, 2);
0977         priv->ec_shm_len = ec_shm_size;
0978 
0979         dev_dbg(dev, "ec_shm_addr=%#llx len=%#x\n",
0980             priv->ec_shm_addr, priv->ec_shm_len);
0981     }
0982 
0983     node = of_parse_phandle(dev->of_node, "memory-region", 0);
0984     if (node) {
0985         ret = of_address_to_resource(node, 0, &res);
0986         if (!ret) {
0987             priv->ap_shm_phys_addr = res.start;
0988             priv->ap_shm_len = resource_size(&res);
0989             priv->ap_shm_addr =
0990                 (uint64_t)(uintptr_t)devm_ioremap_wc(
0991                     dev, priv->ap_shm_phys_addr,
0992                     priv->ap_shm_len);
0993             priv->ap_shm_last_alloc = priv->ap_shm_phys_addr;
0994 
0995             dev_dbg(dev, "ap_shm_phys_addr=%#llx len=%#x\n",
0996                 priv->ap_shm_phys_addr, priv->ap_shm_len);
0997         }
0998         of_node_put(node);
0999     }
1000 #endif
1001 
1002     priv->dev = dev;
1003     priv->ec_device = ec_device;
1004     atomic_set(&priv->dmic_probed, 0);
1005 
1006     p.cmd = EC_CODEC_GET_CAPABILITIES;
1007     ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC,
1008                    (uint8_t *)&p, sizeof(p),
1009                    (uint8_t *)&r, sizeof(r));
1010     if (ret) {
1011         dev_err(dev, "failed to EC_CODEC_GET_CAPABILITIES\n");
1012         return ret;
1013     }
1014     priv->ec_capabilities = r.capabilities;
1015 
1016     /* Reset EC codec i2s rx. */
1017     p.cmd = EC_CODEC_I2S_RX_RESET;
1018     ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_I2S_RX,
1019                    (uint8_t *)&p, sizeof(p), NULL, 0);
1020     if (ret == -ENOPROTOOPT) {
1021         dev_info(dev,
1022              "Missing reset command. Please update EC firmware.\n");
1023     } else if (ret) {
1024         dev_err(dev, "failed to EC_CODEC_I2S_RESET: %d\n", ret);
1025         return ret;
1026     }
1027 
1028     platform_set_drvdata(pdev, priv);
1029 
1030     ret = devm_snd_soc_register_component(dev, &i2s_rx_component_driver,
1031                           &i2s_rx_dai_driver, 1);
1032     if (ret)
1033         return ret;
1034 
1035     return devm_snd_soc_register_component(dev, &wov_component_driver,
1036                            &wov_dai_driver, 1);
1037 }
1038 
1039 #ifdef CONFIG_OF
1040 static const struct of_device_id cros_ec_codec_of_match[] = {
1041     { .compatible = "google,cros-ec-codec" },
1042     {},
1043 };
1044 MODULE_DEVICE_TABLE(of, cros_ec_codec_of_match);
1045 #endif
1046 
1047 #ifdef CONFIG_ACPI
1048 static const struct acpi_device_id cros_ec_codec_acpi_id[] = {
1049     { "GOOG0013", 0 },
1050     { }
1051 };
1052 MODULE_DEVICE_TABLE(acpi, cros_ec_codec_acpi_id);
1053 #endif
1054 
1055 static struct platform_driver cros_ec_codec_platform_driver = {
1056     .driver = {
1057         .name = "cros-ec-codec",
1058         .of_match_table = of_match_ptr(cros_ec_codec_of_match),
1059         .acpi_match_table = ACPI_PTR(cros_ec_codec_acpi_id),
1060     },
1061     .probe = cros_ec_codec_platform_probe,
1062 };
1063 
1064 module_platform_driver(cros_ec_codec_platform_driver);
1065 
1066 MODULE_LICENSE("GPL v2");
1067 MODULE_DESCRIPTION("ChromeOS EC codec driver");
1068 MODULE_AUTHOR("Cheng-Yi Chiang <cychiang@chromium.org>");
1069 MODULE_ALIAS("platform:cros-ec-codec");
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