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0001 // SPDX-License-Identifier: GPL-2.0
0002 //
0003 // ak4613.c  --  Asahi Kasei ALSA Soc Audio driver
0004 //
0005 // Copyright (C) 2015 Renesas Electronics Corporation
0006 // Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
0007 //
0008 // Based on ak4642.c by Kuninori Morimoto
0009 // Based on wm8731.c by Richard Purdie
0010 // Based on ak4535.c by Richard Purdie
0011 // Based on wm8753.c by Liam Girdwood
0012 
0013 /*
0014  *      +-------+
0015  *      |AK4613 |
0016  *  SDTO1 <-|   |
0017  *      |   |
0018  *  SDTI1 ->|   |
0019  *  SDTI2 ->|   |
0020  *  SDTI3 ->|   |
0021  *      +-------+
0022  *
0023  *    +---+
0024  * clk    |   |___________________________________________...
0025  *
0026  * [TDM512]
0027  * SDTO1  [L1][R1][L2][R2]
0028  * SDTI1  [L1][R1][L2][R2][L3][R3][L4][R4][L5][R5][L6][R6]
0029  *
0030  * [TDM256]
0031  * SDTO1  [L1][R1][L2][R2]
0032  * SDTI1  [L1][R1][L2][R2][L3][R3][L4][R4]
0033  * SDTI2  [L5][R5][L6][R6]
0034  *
0035  * [TDM128]
0036  * SDTO1  [L1][R1][L2][R2]
0037  * SDTI1  [L1][R1][L2][R2]
0038  * SDTI2  [L3][R3][L4][R4]
0039  * SDTI3  [L5][R5][L6][R6]
0040  *
0041  * [STEREO]
0042  *  Playback  2ch : SDTI1
0043  *  Capture   2ch : SDTO1
0044  *
0045  * [TDM512]
0046  *  Playback 12ch : SDTI1
0047  *  Capture   4ch : SDTO1
0048  *
0049  * [TDM256]
0050  *  Playback 12ch : SDTI1 + SDTI2
0051  *  Playback  8ch : SDTI1
0052  *  Capture   4ch : SDTO1
0053  *
0054  * [TDM128]
0055  *  Playback 12ch : SDTI1 + SDTI2 + SDTI3
0056  *  Playback  8ch : SDTI1 + SDTI2
0057  *  Playback  4ch : SDTI1
0058  *  Capture   4ch : SDTO1
0059  *
0060  *
0061  * !!! NOTE !!!
0062  *
0063  * Renesas is the only user of ak4613 on upstream so far,
0064  * but the chip connection is like below.
0065  * Thus, Renesas can't test all connection case.
0066  * Tested TDM is very limited.
0067  *
0068  * +-----+  +-----------+
0069  * | SoC |  |  AK4613   |
0070  * |     |<-----|SDTO1   IN1|<-- Mic
0071  * |     |  |    IN2|
0072  * |     |  |       |
0073  * |     |----->|SDTI1  OUT1|--> Headphone
0074  * +-----+  |SDTI2  OUT2|
0075  *      |SDTI3  OUT3|
0076  *      |   OUT4|
0077  *      |   OUT5|
0078  *      |   OUT6|
0079  *      +-----------+
0080  *
0081  * Renesas SoC can handle [2,  6,8]    channels.
0082  * Ak4613      can handle [2,4,  8,12] channels.
0083  *
0084  * Because of above HW connection and available channels number,
0085  * Renesas could test are ...
0086  *
0087  *  [STEREO] Playback  2ch : SDTI1
0088  *       Capture   2ch : SDTO1
0089  *  [TDM256] Playback  8ch : SDTI1 (*)
0090  *
0091  * (*) it used 8ch data between SoC <-> AK4613 on TDM256 mode,
0092  *     but could confirm is only first 2ch because only 1
0093  *     Headphone is connected.
0094  *
0095  * see
0096  *  AK4613_ENABLE_TDM_TEST
0097  */
0098 #include <linux/clk.h>
0099 #include <linux/delay.h>
0100 #include <linux/i2c.h>
0101 #include <linux/slab.h>
0102 #include <linux/of_device.h>
0103 #include <linux/of_graph.h>
0104 #include <linux/module.h>
0105 #include <linux/regmap.h>
0106 #include <sound/soc.h>
0107 #include <sound/pcm_params.h>
0108 #include <sound/tlv.h>
0109 
0110 #define PW_MGMT1    0x00 /* Power Management 1 */
0111 #define PW_MGMT2    0x01 /* Power Management 2 */
0112 #define PW_MGMT3    0x02 /* Power Management 3 */
0113 #define CTRL1       0x03 /* Control 1 */
0114 #define CTRL2       0x04 /* Control 2 */
0115 #define DEMP1       0x05 /* De-emphasis1 */
0116 #define DEMP2       0x06 /* De-emphasis2 */
0117 #define OFD     0x07 /* Overflow Detect */
0118 #define ZRD     0x08 /* Zero Detect */
0119 #define ICTRL       0x09 /* Input Control */
0120 #define OCTRL       0x0a /* Output Control */
0121 #define LOUT1       0x0b /* LOUT1 Volume Control */
0122 #define ROUT1       0x0c /* ROUT1 Volume Control */
0123 #define LOUT2       0x0d /* LOUT2 Volume Control */
0124 #define ROUT2       0x0e /* ROUT2 Volume Control */
0125 #define LOUT3       0x0f /* LOUT3 Volume Control */
0126 #define ROUT3       0x10 /* ROUT3 Volume Control */
0127 #define LOUT4       0x11 /* LOUT4 Volume Control */
0128 #define ROUT4       0x12 /* ROUT4 Volume Control */
0129 #define LOUT5       0x13 /* LOUT5 Volume Control */
0130 #define ROUT5       0x14 /* ROUT5 Volume Control */
0131 #define LOUT6       0x15 /* LOUT6 Volume Control */
0132 #define ROUT6       0x16 /* ROUT6 Volume Control */
0133 
0134 /* PW_MGMT1 */
0135 #define RSTN        BIT(0)
0136 #define PMDAC       BIT(1)
0137 #define PMADC       BIT(2)
0138 #define PMVR        BIT(3)
0139 
0140 /* PW_MGMT2 */
0141 #define PMAD_ALL    0x7
0142 
0143 /* PW_MGMT3 */
0144 #define PMDA_ALL    0x3f
0145 
0146 /* CTRL1 */
0147 #define DIF0        BIT(3)
0148 #define DIF1        BIT(4)
0149 #define DIF2        BIT(5)
0150 #define TDM0        BIT(6)
0151 #define TDM1        BIT(7)
0152 #define NO_FMT      (0xff)
0153 #define FMT_MASK    (0xf8)
0154 
0155 /* CTRL2 */
0156 #define DFS_MASK        (3 << 2)
0157 #define DFS_NORMAL_SPEED    (0 << 2)
0158 #define DFS_DOUBLE_SPEED    (1 << 2)
0159 #define DFS_QUAD_SPEED      (2 << 2)
0160 
0161 /* ICTRL */
0162 #define ICTRL_MASK  (0x3)
0163 
0164 /* OCTRL */
0165 #define OCTRL_MASK  (0x3F)
0166 
0167 /*
0168  * configs
0169  *
0170  * 0x000000BA
0171  *
0172  * B : AK4613_CONFIG_SDTI_x
0173  * A : AK4613_CONFIG_MODE_x
0174  */
0175 #define AK4613_CONFIG_SET(priv, x)   priv->configs |= AK4613_CONFIG_##x
0176 #define AK4613_CONFIG_GET(priv, x)  (priv->configs &  AK4613_CONFIG_##x##_MASK)
0177 
0178 /*
0179  * AK4613_CONFIG_SDTI_x
0180  *
0181  * It indicates how many SDTIx is connected.
0182  */
0183 #define AK4613_CONFIG_SDTI_MASK     (0xF << 4)
0184 #define AK4613_CONFIG_SDTI(x)       (((x) & 0xF) << 4)
0185 #define AK4613_CONFIG_SDTI_set(priv, x)   AK4613_CONFIG_SET(priv, SDTI(x))
0186 #define AK4613_CONFIG_SDTI_get(priv)    ((AK4613_CONFIG_GET(priv, SDTI) >> 4) & 0xF)
0187 
0188 /*
0189  * AK4613_CONFIG_MODE_x
0190  *
0191  * Same as Ctrl1 :: TDM1/TDM0
0192  * No shift is requested
0193  * see
0194  *  AK4613_CTRL1_TO_MODE()
0195  *  Table 11/12/13/14
0196  */
0197 #define AK4613_CONFIG_MODE_MASK     (0xF)
0198 #define AK4613_CONFIG_MODE_STEREO   (0x0)
0199 #define AK4613_CONFIG_MODE_TDM512   (0x1)
0200 #define AK4613_CONFIG_MODE_TDM256   (0x2)
0201 #define AK4613_CONFIG_MODE_TDM128   (0x3)
0202 
0203 /*
0204  * !!!! FIXME !!!!
0205  *
0206  * Because of testable HW limitation, TDM256 8ch TDM was only tested.
0207  * This driver uses AK4613_ENABLE_TDM_TEST instead of new DT property so far.
0208  * Don't hesitate to update driver, you don't need to care compatible
0209  * with Renesas.
0210  *
0211  * #define AK4613_ENABLE_TDM_TEST
0212  */
0213 
0214 struct ak4613_interface {
0215     unsigned int width;
0216     unsigned int fmt;
0217     u8 dif;
0218 };
0219 
0220 struct ak4613_priv {
0221     struct mutex lock;
0222     struct snd_pcm_hw_constraint_list constraint_rates;
0223     struct snd_pcm_hw_constraint_list constraint_channels;
0224     struct work_struct dummy_write_work;
0225     struct snd_soc_component *component;
0226     unsigned int rate;
0227     unsigned int sysclk;
0228 
0229     unsigned int fmt;
0230     unsigned int configs;
0231     int cnt;
0232     u8 ctrl1;
0233     u8 oc;
0234     u8 ic;
0235 };
0236 
0237 /*
0238  * Playback Volume
0239  *
0240  * max : 0x00 : 0 dB
0241  *       ( 0.5 dB step )
0242  * min : 0xFE : -127.0 dB
0243  * mute: 0xFF
0244  */
0245 static const DECLARE_TLV_DB_SCALE(out_tlv, -12750, 50, 1);
0246 
0247 static const struct snd_kcontrol_new ak4613_snd_controls[] = {
0248     SOC_DOUBLE_R_TLV("Digital Playback Volume1", LOUT1, ROUT1,
0249              0, 0xFF, 1, out_tlv),
0250     SOC_DOUBLE_R_TLV("Digital Playback Volume2", LOUT2, ROUT2,
0251              0, 0xFF, 1, out_tlv),
0252     SOC_DOUBLE_R_TLV("Digital Playback Volume3", LOUT3, ROUT3,
0253              0, 0xFF, 1, out_tlv),
0254     SOC_DOUBLE_R_TLV("Digital Playback Volume4", LOUT4, ROUT4,
0255              0, 0xFF, 1, out_tlv),
0256     SOC_DOUBLE_R_TLV("Digital Playback Volume5", LOUT5, ROUT5,
0257              0, 0xFF, 1, out_tlv),
0258     SOC_DOUBLE_R_TLV("Digital Playback Volume6", LOUT6, ROUT6,
0259              0, 0xFF, 1, out_tlv),
0260 };
0261 
0262 static const struct reg_default ak4613_reg[] = {
0263     { 0x0,  0x0f }, { 0x1,  0x07 }, { 0x2,  0x3f }, { 0x3,  0x20 },
0264     { 0x4,  0x20 }, { 0x5,  0x55 }, { 0x6,  0x05 }, { 0x7,  0x07 },
0265     { 0x8,  0x0f }, { 0x9,  0x07 }, { 0xa,  0x3f }, { 0xb,  0x00 },
0266     { 0xc,  0x00 }, { 0xd,  0x00 }, { 0xe,  0x00 }, { 0xf,  0x00 },
0267     { 0x10, 0x00 }, { 0x11, 0x00 }, { 0x12, 0x00 }, { 0x13, 0x00 },
0268     { 0x14, 0x00 }, { 0x15, 0x00 }, { 0x16, 0x00 },
0269 };
0270 
0271 /*
0272  * CTRL1 register
0273  * see
0274  *  Table 11/12/13/14
0275  */
0276 #define AUDIO_IFACE(_dif, _width, _fmt)     \
0277     {                   \
0278         .dif    = _dif,         \
0279         .width  = _width,       \
0280         .fmt    = SND_SOC_DAIFMT_##_fmt,\
0281     }
0282 static const struct ak4613_interface ak4613_iface[] = {
0283     /* It doesn't support asymmetric format */
0284 
0285     AUDIO_IFACE(0x03, 24, LEFT_J),
0286     AUDIO_IFACE(0x04, 24, I2S),
0287 };
0288 #define AK4613_CTRL1_TO_MODE(priv)  ((priv)->ctrl1 >> 6) /* AK4613_CONFIG_MODE_x */
0289 
0290 static const struct regmap_config ak4613_regmap_cfg = {
0291     .reg_bits       = 8,
0292     .val_bits       = 8,
0293     .max_register       = 0x16,
0294     .reg_defaults       = ak4613_reg,
0295     .num_reg_defaults   = ARRAY_SIZE(ak4613_reg),
0296     .cache_type     = REGCACHE_RBTREE,
0297 };
0298 
0299 static const struct of_device_id ak4613_of_match[] = {
0300     { .compatible = "asahi-kasei,ak4613",   .data = &ak4613_regmap_cfg },
0301     {},
0302 };
0303 MODULE_DEVICE_TABLE(of, ak4613_of_match);
0304 
0305 static const struct i2c_device_id ak4613_i2c_id[] = {
0306     { "ak4613", (kernel_ulong_t)&ak4613_regmap_cfg },
0307     { }
0308 };
0309 MODULE_DEVICE_TABLE(i2c, ak4613_i2c_id);
0310 
0311 static const struct snd_soc_dapm_widget ak4613_dapm_widgets[] = {
0312 
0313     /* Outputs */
0314     SND_SOC_DAPM_OUTPUT("LOUT1"),
0315     SND_SOC_DAPM_OUTPUT("LOUT2"),
0316     SND_SOC_DAPM_OUTPUT("LOUT3"),
0317     SND_SOC_DAPM_OUTPUT("LOUT4"),
0318     SND_SOC_DAPM_OUTPUT("LOUT5"),
0319     SND_SOC_DAPM_OUTPUT("LOUT6"),
0320 
0321     SND_SOC_DAPM_OUTPUT("ROUT1"),
0322     SND_SOC_DAPM_OUTPUT("ROUT2"),
0323     SND_SOC_DAPM_OUTPUT("ROUT3"),
0324     SND_SOC_DAPM_OUTPUT("ROUT4"),
0325     SND_SOC_DAPM_OUTPUT("ROUT5"),
0326     SND_SOC_DAPM_OUTPUT("ROUT6"),
0327 
0328     /* Inputs */
0329     SND_SOC_DAPM_INPUT("LIN1"),
0330     SND_SOC_DAPM_INPUT("LIN2"),
0331 
0332     SND_SOC_DAPM_INPUT("RIN1"),
0333     SND_SOC_DAPM_INPUT("RIN2"),
0334 
0335     /* DAC */
0336     SND_SOC_DAPM_DAC("DAC1", NULL, PW_MGMT3, 0, 0),
0337     SND_SOC_DAPM_DAC("DAC2", NULL, PW_MGMT3, 1, 0),
0338     SND_SOC_DAPM_DAC("DAC3", NULL, PW_MGMT3, 2, 0),
0339     SND_SOC_DAPM_DAC("DAC4", NULL, PW_MGMT3, 3, 0),
0340     SND_SOC_DAPM_DAC("DAC5", NULL, PW_MGMT3, 4, 0),
0341     SND_SOC_DAPM_DAC("DAC6", NULL, PW_MGMT3, 5, 0),
0342 
0343     /* ADC */
0344     SND_SOC_DAPM_ADC("ADC1", NULL, PW_MGMT2, 0, 0),
0345     SND_SOC_DAPM_ADC("ADC2", NULL, PW_MGMT2, 1, 0),
0346 };
0347 
0348 static const struct snd_soc_dapm_route ak4613_intercon[] = {
0349     {"LOUT1", NULL, "DAC1"},
0350     {"LOUT2", NULL, "DAC2"},
0351     {"LOUT3", NULL, "DAC3"},
0352     {"LOUT4", NULL, "DAC4"},
0353     {"LOUT5", NULL, "DAC5"},
0354     {"LOUT6", NULL, "DAC6"},
0355 
0356     {"ROUT1", NULL, "DAC1"},
0357     {"ROUT2", NULL, "DAC2"},
0358     {"ROUT3", NULL, "DAC3"},
0359     {"ROUT4", NULL, "DAC4"},
0360     {"ROUT5", NULL, "DAC5"},
0361     {"ROUT6", NULL, "DAC6"},
0362 
0363     {"DAC1", NULL, "Playback"},
0364     {"DAC2", NULL, "Playback"},
0365     {"DAC3", NULL, "Playback"},
0366     {"DAC4", NULL, "Playback"},
0367     {"DAC5", NULL, "Playback"},
0368     {"DAC6", NULL, "Playback"},
0369 
0370     {"Capture", NULL, "ADC1"},
0371     {"Capture", NULL, "ADC2"},
0372 
0373     {"ADC1", NULL, "LIN1"},
0374     {"ADC2", NULL, "LIN2"},
0375 
0376     {"ADC1", NULL, "RIN1"},
0377     {"ADC2", NULL, "RIN2"},
0378 };
0379 
0380 static void ak4613_dai_shutdown(struct snd_pcm_substream *substream,
0381                    struct snd_soc_dai *dai)
0382 {
0383     struct snd_soc_component *component = dai->component;
0384     struct ak4613_priv *priv = snd_soc_component_get_drvdata(component);
0385     struct device *dev = component->dev;
0386 
0387     mutex_lock(&priv->lock);
0388     priv->cnt--;
0389     if (priv->cnt < 0) {
0390         dev_err(dev, "unexpected counter error\n");
0391         priv->cnt = 0;
0392     }
0393     if (!priv->cnt)
0394         priv->ctrl1 = 0;
0395     mutex_unlock(&priv->lock);
0396 }
0397 
0398 static void ak4613_hw_constraints(struct ak4613_priv *priv,
0399                   struct snd_pcm_substream *substream)
0400 {
0401     struct snd_pcm_runtime *runtime = substream->runtime;
0402     static const unsigned int ak4613_rates[] = {
0403          32000,
0404          44100,
0405          48000,
0406          64000,
0407          88200,
0408          96000,
0409         176400,
0410         192000,
0411     };
0412 #define AK4613_CHANNEL_2     0
0413 #define AK4613_CHANNEL_4     1
0414 #define AK4613_CHANNEL_8     2
0415 #define AK4613_CHANNEL_12    3
0416 #define AK4613_CHANNEL_NONE -1
0417     static const unsigned int ak4613_channels[] = {
0418         [AK4613_CHANNEL_2]  =  2,
0419         [AK4613_CHANNEL_4]  =  4,
0420         [AK4613_CHANNEL_8]  =  8,
0421         [AK4613_CHANNEL_12] = 12,
0422     };
0423 #define MODE_MAX 4
0424 #define SDTx_MAX 4
0425 #define MASK(x) (1 << AK4613_CHANNEL_##x)
0426     static const int mask_list[MODE_MAX][SDTx_MAX] = {
0427         /*              SDTO     SDTIx1    SDTIx2       SDTIx3 */
0428         [AK4613_CONFIG_MODE_STEREO] = { MASK(2), MASK(2),  MASK(2),     MASK(2)},
0429         [AK4613_CONFIG_MODE_TDM512] = { MASK(4), MASK(12), MASK(12),        MASK(12)},
0430         [AK4613_CONFIG_MODE_TDM256] = { MASK(4), MASK(8),  MASK(8)|MASK(12),    MASK(8)|MASK(12)},
0431         [AK4613_CONFIG_MODE_TDM128] = { MASK(4), MASK(4),  MASK(4)|MASK(8), MASK(4)|MASK(8)|MASK(12)},
0432     };
0433     struct snd_pcm_hw_constraint_list *constraint;
0434     unsigned int mask;
0435     unsigned int mode;
0436     unsigned int fs;
0437     int is_play = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
0438     int sdti_num;
0439     int i;
0440 
0441     constraint      = &priv->constraint_rates;
0442     constraint->list    = ak4613_rates;
0443     constraint->mask    = 0;
0444     constraint->count   = 0;
0445 
0446     /*
0447      * Slave Mode
0448      *  Normal: [32kHz, 48kHz] : 256fs,384fs or 512fs
0449      *  Double: [64kHz, 96kHz] : 256fs
0450      *  Quad  : [128kHz,192kHz]: 128fs
0451      *
0452      * Master mode
0453      *  Normal: [32kHz, 48kHz] : 256fs or 512fs
0454      *  Double: [64kHz, 96kHz] : 256fs
0455      *  Quad  : [128kHz,192kHz]: 128fs
0456     */
0457     for (i = 0; i < ARRAY_SIZE(ak4613_rates); i++) {
0458         /* minimum fs on each range */
0459         fs = (ak4613_rates[i] <= 96000) ? 256 : 128;
0460 
0461         if (priv->sysclk >= ak4613_rates[i] * fs)
0462             constraint->count = i + 1;
0463     }
0464 
0465     snd_pcm_hw_constraint_list(runtime, 0,
0466                 SNDRV_PCM_HW_PARAM_RATE, constraint);
0467 
0468 
0469     sdti_num = AK4613_CONFIG_SDTI_get(priv);
0470     if (WARN_ON(sdti_num >= SDTx_MAX))
0471         return;
0472 
0473     if (priv->cnt) {
0474         /*
0475          * If it was already working,
0476          * the constraint is same as working mode.
0477          */
0478         mode = AK4613_CTRL1_TO_MODE(priv);
0479         mask = 0; /* no default */
0480     } else {
0481         /*
0482          * It is not yet working,
0483          * the constraint is based on board configs.
0484          * STEREO mask is default
0485          */
0486         mode = AK4613_CONFIG_GET(priv, MODE);
0487         mask = mask_list[AK4613_CONFIG_MODE_STEREO][is_play * sdti_num];
0488     }
0489 
0490     if (WARN_ON(mode >= MODE_MAX))
0491         return;
0492 
0493     /* add each mode mask */
0494     mask |= mask_list[mode][is_play * sdti_num];
0495 
0496     constraint      = &priv->constraint_channels;
0497     constraint->list    = ak4613_channels;
0498     constraint->mask    = mask;
0499     constraint->count   = sizeof(ak4613_channels);
0500     snd_pcm_hw_constraint_list(runtime, 0,
0501                    SNDRV_PCM_HW_PARAM_CHANNELS, constraint);
0502 }
0503 
0504 static int ak4613_dai_startup(struct snd_pcm_substream *substream,
0505                   struct snd_soc_dai *dai)
0506 {
0507     struct snd_soc_component *component = dai->component;
0508     struct ak4613_priv *priv = snd_soc_component_get_drvdata(component);
0509 
0510     mutex_lock(&priv->lock);
0511     ak4613_hw_constraints(priv, substream);
0512     priv->cnt++;
0513     mutex_unlock(&priv->lock);
0514 
0515     return 0;
0516 }
0517 
0518 static int ak4613_dai_set_sysclk(struct snd_soc_dai *codec_dai,
0519                  int clk_id, unsigned int freq, int dir)
0520 {
0521     struct snd_soc_component *component = codec_dai->component;
0522     struct ak4613_priv *priv = snd_soc_component_get_drvdata(component);
0523 
0524     priv->sysclk = freq;
0525 
0526     return 0;
0527 }
0528 
0529 static int ak4613_dai_set_fmt(struct snd_soc_dai *dai, unsigned int format)
0530 {
0531     struct snd_soc_component *component = dai->component;
0532     struct ak4613_priv *priv = snd_soc_component_get_drvdata(component);
0533     unsigned int fmt;
0534 
0535     fmt = format & SND_SOC_DAIFMT_FORMAT_MASK;
0536     switch (fmt) {
0537     case SND_SOC_DAIFMT_LEFT_J:
0538     case SND_SOC_DAIFMT_I2S:
0539         priv->fmt = fmt;
0540         break;
0541     default:
0542         return -EINVAL;
0543     }
0544 
0545     fmt = format & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK;
0546     switch (fmt) {
0547     case SND_SOC_DAIFMT_CBC_CFC:
0548         break;
0549     default:
0550         /*
0551          * SUPPORTME
0552          *
0553          * "clock provider" is not yet supperted
0554          */
0555         return -EINVAL;
0556     }
0557 
0558     return 0;
0559 }
0560 
0561 static int ak4613_dai_hw_params(struct snd_pcm_substream *substream,
0562                 struct snd_pcm_hw_params *params,
0563                 struct snd_soc_dai *dai)
0564 {
0565     struct snd_soc_component *component = dai->component;
0566     struct ak4613_priv *priv = snd_soc_component_get_drvdata(component);
0567     struct device *dev = component->dev;
0568     unsigned int width = params_width(params);
0569     unsigned int fmt = priv->fmt;
0570     unsigned int rate;
0571     int i, ret;
0572     u8 ctrl2;
0573 
0574     rate = params_rate(params);
0575     switch (rate) {
0576     case 32000:
0577     case 44100:
0578     case 48000:
0579         ctrl2 = DFS_NORMAL_SPEED;
0580         break;
0581     case 64000:
0582     case 88200:
0583     case 96000:
0584         ctrl2 = DFS_DOUBLE_SPEED;
0585         break;
0586     case 176400:
0587     case 192000:
0588         ctrl2 = DFS_QUAD_SPEED;
0589         break;
0590     default:
0591         return -EINVAL;
0592     }
0593     priv->rate = rate;
0594 
0595     /*
0596      * FIXME
0597      *
0598      * It doesn't have full TDM suppert yet
0599      */
0600     ret = -EINVAL;
0601 
0602     mutex_lock(&priv->lock);
0603     if (priv->cnt > 1) {
0604         /*
0605          * If it was already working, use current priv->ctrl1
0606          */
0607         ret = 0;
0608     } else {
0609         /*
0610          * It is not yet working,
0611          */
0612         unsigned int channel = params_channels(params);
0613         u8 tdm;
0614 
0615         /* STEREO or TDM */
0616         if (channel == 2)
0617             tdm = AK4613_CONFIG_MODE_STEREO;
0618         else
0619             tdm = AK4613_CONFIG_GET(priv, MODE);
0620 
0621         for (i = ARRAY_SIZE(ak4613_iface) - 1; i >= 0; i--) {
0622             const struct ak4613_interface *iface = ak4613_iface + i;
0623 
0624             if ((iface->fmt == fmt) && (iface->width == width)) {
0625                 /*
0626                  * Ctrl1
0627                  * | D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0  |
0628                  * |TDM1|TDM0|DIF2|DIF1|DIF0|ATS1|ATS0|SMUTE|
0629                  *  <  tdm  > < iface->dif >
0630                  */
0631                 priv->ctrl1 = (tdm << 6) | (iface->dif << 3);
0632                 ret = 0;
0633                 break;
0634             }
0635         }
0636     }
0637     mutex_unlock(&priv->lock);
0638 
0639     if (ret < 0)
0640         goto hw_params_end;
0641 
0642     snd_soc_component_update_bits(component, CTRL1, FMT_MASK, priv->ctrl1);
0643     snd_soc_component_update_bits(component, CTRL2, DFS_MASK, ctrl2);
0644 
0645     snd_soc_component_update_bits(component, ICTRL, ICTRL_MASK, priv->ic);
0646     snd_soc_component_update_bits(component, OCTRL, OCTRL_MASK, priv->oc);
0647 
0648 hw_params_end:
0649     if (ret < 0)
0650         dev_warn(dev, "unsupported data width/format combination\n");
0651 
0652     return ret;
0653 }
0654 
0655 static int ak4613_set_bias_level(struct snd_soc_component *component,
0656                  enum snd_soc_bias_level level)
0657 {
0658     u8 mgmt1 = 0;
0659 
0660     switch (level) {
0661     case SND_SOC_BIAS_ON:
0662         mgmt1 |= RSTN;
0663         fallthrough;
0664     case SND_SOC_BIAS_PREPARE:
0665         mgmt1 |= PMADC | PMDAC;
0666         fallthrough;
0667     case SND_SOC_BIAS_STANDBY:
0668         mgmt1 |= PMVR;
0669         fallthrough;
0670     case SND_SOC_BIAS_OFF:
0671     default:
0672         break;
0673     }
0674 
0675     snd_soc_component_write(component, PW_MGMT1, mgmt1);
0676 
0677     return 0;
0678 }
0679 
0680 static void ak4613_dummy_write(struct work_struct *work)
0681 {
0682     struct ak4613_priv *priv = container_of(work,
0683                         struct ak4613_priv,
0684                         dummy_write_work);
0685     struct snd_soc_component *component = priv->component;
0686     unsigned int mgmt1;
0687     unsigned int mgmt3;
0688 
0689     /*
0690      * PW_MGMT1 / PW_MGMT3 needs dummy write at least after 5 LR clocks
0691      *
0692      * Note
0693      *
0694      * To avoid extra delay, we want to avoid preemption here,
0695      * but we can't. Because it uses I2C access which is using IRQ
0696      * and sleep. Thus, delay might be more than 5 LR clocks
0697      * see also
0698      *  ak4613_dai_trigger()
0699      */
0700     udelay(5000000 / priv->rate);
0701 
0702     mgmt1 = snd_soc_component_read(component, PW_MGMT1);
0703     mgmt3 = snd_soc_component_read(component, PW_MGMT3);
0704 
0705     snd_soc_component_write(component, PW_MGMT1, mgmt1);
0706     snd_soc_component_write(component, PW_MGMT3, mgmt3);
0707 }
0708 
0709 static int ak4613_dai_trigger(struct snd_pcm_substream *substream, int cmd,
0710                   struct snd_soc_dai *dai)
0711 {
0712     struct snd_soc_component *component = dai->component;
0713     struct ak4613_priv *priv = snd_soc_component_get_drvdata(component);
0714 
0715     /*
0716      * FIXME
0717      *
0718      * PW_MGMT1 / PW_MGMT3 needs dummy write at least after 5 LR clocks
0719      * from Power Down Release. Otherwise, Playback volume will be 0dB.
0720      * To avoid complex multiple delay/dummy_write method from
0721      * ak4613_set_bias_level() / SND_SOC_DAPM_DAC_E("DACx", ...),
0722      * call it once here.
0723      *
0724      * But, unfortunately, we can't "write" here because here is atomic
0725      * context (It uses I2C access for writing).
0726      * Thus, use schedule_work() to switching to normal context
0727      * immediately.
0728      *
0729      * Note
0730      *
0731      * Calling ak4613_dummy_write() function might be delayed.
0732      * In such case, ak4613 volume might be temporarily 0dB when
0733      * beggining of playback.
0734      * see also
0735      *  ak4613_dummy_write()
0736      */
0737 
0738     if ((cmd != SNDRV_PCM_TRIGGER_START) &&
0739         (cmd != SNDRV_PCM_TRIGGER_RESUME))
0740         return 0;
0741 
0742     if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK)
0743         return  0;
0744 
0745     priv->component = component;
0746     schedule_work(&priv->dummy_write_work);
0747 
0748     return 0;
0749 }
0750 
0751 /*
0752  * Select below from Sound Card, not Auto
0753  *  SND_SOC_DAIFMT_CBC_CFC
0754  *  SND_SOC_DAIFMT_CBP_CFP
0755  */
0756 static u64 ak4613_dai_formats =
0757     SND_SOC_POSSIBLE_DAIFMT_I2S |
0758     SND_SOC_POSSIBLE_DAIFMT_LEFT_J;
0759 
0760 static const struct snd_soc_dai_ops ak4613_dai_ops = {
0761     .startup    = ak4613_dai_startup,
0762     .shutdown   = ak4613_dai_shutdown,
0763     .set_sysclk = ak4613_dai_set_sysclk,
0764     .set_fmt    = ak4613_dai_set_fmt,
0765     .trigger    = ak4613_dai_trigger,
0766     .hw_params  = ak4613_dai_hw_params,
0767     .auto_selectable_formats    = &ak4613_dai_formats,
0768     .num_auto_selectable_formats    = 1,
0769 };
0770 
0771 #define AK4613_PCM_RATE     (SNDRV_PCM_RATE_32000  |\
0772                  SNDRV_PCM_RATE_44100  |\
0773                  SNDRV_PCM_RATE_48000  |\
0774                  SNDRV_PCM_RATE_64000  |\
0775                  SNDRV_PCM_RATE_88200  |\
0776                  SNDRV_PCM_RATE_96000  |\
0777                  SNDRV_PCM_RATE_176400 |\
0778                  SNDRV_PCM_RATE_192000)
0779 #define AK4613_PCM_FMTBIT   (SNDRV_PCM_FMTBIT_S24_LE)
0780 
0781 static struct snd_soc_dai_driver ak4613_dai = {
0782     .name = "ak4613-hifi",
0783     .playback = {
0784         .stream_name    = "Playback",
0785         .channels_min   = 2,
0786         .channels_max   = 12,
0787         .rates      = AK4613_PCM_RATE,
0788         .formats    = AK4613_PCM_FMTBIT,
0789     },
0790     .capture = {
0791         .stream_name    = "Capture",
0792         .channels_min   = 2,
0793         .channels_max   = 4,
0794         .rates      = AK4613_PCM_RATE,
0795         .formats    = AK4613_PCM_FMTBIT,
0796     },
0797     .ops = &ak4613_dai_ops,
0798     .symmetric_rate = 1,
0799 };
0800 
0801 static int ak4613_suspend(struct snd_soc_component *component)
0802 {
0803     struct regmap *regmap = dev_get_regmap(component->dev, NULL);
0804 
0805     regcache_cache_only(regmap, true);
0806     regcache_mark_dirty(regmap);
0807     return 0;
0808 }
0809 
0810 static int ak4613_resume(struct snd_soc_component *component)
0811 {
0812     struct regmap *regmap = dev_get_regmap(component->dev, NULL);
0813 
0814     regcache_cache_only(regmap, false);
0815     return regcache_sync(regmap);
0816 }
0817 
0818 static const struct snd_soc_component_driver soc_component_dev_ak4613 = {
0819     .suspend        = ak4613_suspend,
0820     .resume         = ak4613_resume,
0821     .set_bias_level     = ak4613_set_bias_level,
0822     .controls       = ak4613_snd_controls,
0823     .num_controls       = ARRAY_SIZE(ak4613_snd_controls),
0824     .dapm_widgets       = ak4613_dapm_widgets,
0825     .num_dapm_widgets   = ARRAY_SIZE(ak4613_dapm_widgets),
0826     .dapm_routes        = ak4613_intercon,
0827     .num_dapm_routes    = ARRAY_SIZE(ak4613_intercon),
0828     .idle_bias_on       = 1,
0829     .endianness     = 1,
0830 };
0831 
0832 static void ak4613_parse_of(struct ak4613_priv *priv,
0833                 struct device *dev)
0834 {
0835     struct device_node *np = dev->of_node;
0836     char prop[32];
0837     int sdti_num;
0838     int i;
0839 
0840     /* Input 1 - 2 */
0841     for (i = 0; i < 2; i++) {
0842         snprintf(prop, sizeof(prop), "asahi-kasei,in%d-single-end", i + 1);
0843         if (!of_get_property(np, prop, NULL))
0844             priv->ic |= 1 << i;
0845     }
0846 
0847     /* Output 1 - 6 */
0848     for (i = 0; i < 6; i++) {
0849         snprintf(prop, sizeof(prop), "asahi-kasei,out%d-single-end", i + 1);
0850         if (!of_get_property(np, prop, NULL))
0851             priv->oc |= 1 << i;
0852     }
0853 
0854     /*
0855      * enable TDM256 test
0856      *
0857      * !!! FIXME !!!
0858      *
0859      * It should be configured by DT or other way
0860      * if it was full supported.
0861      * But it is using ifdef style for now for test
0862      * purpose.
0863      */
0864 #if defined(AK4613_ENABLE_TDM_TEST)
0865     AK4613_CONFIG_SET(priv, MODE_TDM256);
0866 #endif
0867 
0868     /*
0869      * connected STDI
0870      * TDM support is assuming it is probed via Audio-Graph-Card style here.
0871      * Default is SDTIx1 if it was probed via Simple-Audio-Card for now.
0872      */
0873     sdti_num = of_graph_get_endpoint_count(np);
0874     if ((sdti_num >= SDTx_MAX) || (sdti_num < 1))
0875         sdti_num = 1;
0876 
0877     AK4613_CONFIG_SDTI_set(priv, sdti_num);
0878 }
0879 
0880 static int ak4613_i2c_probe(struct i2c_client *i2c)
0881 {
0882     struct device *dev = &i2c->dev;
0883     struct device_node *np = dev->of_node;
0884     const struct regmap_config *regmap_cfg;
0885     struct regmap *regmap;
0886     struct ak4613_priv *priv;
0887 
0888     regmap_cfg = NULL;
0889     if (np)
0890         regmap_cfg = of_device_get_match_data(dev);
0891     else {
0892         const struct i2c_device_id *id =
0893             i2c_match_id(ak4613_i2c_id, i2c);
0894         regmap_cfg = (const struct regmap_config *)id->driver_data;
0895     }
0896 
0897     if (!regmap_cfg)
0898         return -EINVAL;
0899 
0900     priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
0901     if (!priv)
0902         return -ENOMEM;
0903 
0904     ak4613_parse_of(priv, dev);
0905 
0906     priv->ctrl1     = 0;
0907     priv->cnt       = 0;
0908     priv->sysclk        = 0;
0909     INIT_WORK(&priv->dummy_write_work, ak4613_dummy_write);
0910 
0911     mutex_init(&priv->lock);
0912 
0913     i2c_set_clientdata(i2c, priv);
0914 
0915     regmap = devm_regmap_init_i2c(i2c, regmap_cfg);
0916     if (IS_ERR(regmap))
0917         return PTR_ERR(regmap);
0918 
0919     return devm_snd_soc_register_component(dev, &soc_component_dev_ak4613,
0920                       &ak4613_dai, 1);
0921 }
0922 
0923 static struct i2c_driver ak4613_i2c_driver = {
0924     .driver = {
0925         .name = "ak4613-codec",
0926         .of_match_table = ak4613_of_match,
0927     },
0928     .probe_new  = ak4613_i2c_probe,
0929     .id_table   = ak4613_i2c_id,
0930 };
0931 
0932 module_i2c_driver(ak4613_i2c_driver);
0933 
0934 MODULE_DESCRIPTION("Soc AK4613 driver");
0935 MODULE_AUTHOR("Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>");
0936 MODULE_LICENSE("GPL v2");
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