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0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * Driver for ADAU1701 SigmaDSP processor
0004  *
0005  * Copyright 2011 Analog Devices Inc.
0006  * Author: Lars-Peter Clausen <lars@metafoo.de>
0007  *  based on an inital version by Cliff Cai <cliff.cai@analog.com>
0008  */
0009 
0010 #include <linux/module.h>
0011 #include <linux/init.h>
0012 #include <linux/i2c.h>
0013 #include <linux/delay.h>
0014 #include <linux/slab.h>
0015 #include <linux/of.h>
0016 #include <linux/of_device.h>
0017 #include <linux/gpio/consumer.h>
0018 #include <linux/regulator/consumer.h>
0019 #include <linux/regmap.h>
0020 #include <sound/core.h>
0021 #include <sound/pcm.h>
0022 #include <sound/pcm_params.h>
0023 #include <sound/soc.h>
0024 
0025 #include <asm/unaligned.h>
0026 
0027 #include "sigmadsp.h"
0028 #include "adau1701.h"
0029 
0030 #define ADAU1701_SAFELOAD_DATA(i) (0x0810 + (i))
0031 #define ADAU1701_SAFELOAD_ADDR(i) (0x0815 + (i))
0032 
0033 #define ADAU1701_DSPCTRL    0x081c
0034 #define ADAU1701_SEROCTL    0x081e
0035 #define ADAU1701_SERICTL    0x081f
0036 
0037 #define ADAU1701_AUXNPOW    0x0822
0038 #define ADAU1701_PINCONF_0  0x0820
0039 #define ADAU1701_PINCONF_1  0x0821
0040 #define ADAU1701_AUXNPOW    0x0822
0041 
0042 #define ADAU1701_OSCIPOW    0x0826
0043 #define ADAU1701_DACSET     0x0827
0044 
0045 #define ADAU1701_MAX_REGISTER   0x0828
0046 
0047 #define ADAU1701_DSPCTRL_CR     (1 << 2)
0048 #define ADAU1701_DSPCTRL_DAM        (1 << 3)
0049 #define ADAU1701_DSPCTRL_ADM        (1 << 4)
0050 #define ADAU1701_DSPCTRL_IST        (1 << 5)
0051 #define ADAU1701_DSPCTRL_SR_48      0x00
0052 #define ADAU1701_DSPCTRL_SR_96      0x01
0053 #define ADAU1701_DSPCTRL_SR_192     0x02
0054 #define ADAU1701_DSPCTRL_SR_MASK    0x03
0055 
0056 #define ADAU1701_SEROCTL_INV_LRCLK  0x2000
0057 #define ADAU1701_SEROCTL_INV_BCLK   0x1000
0058 #define ADAU1701_SEROCTL_MASTER     0x0800
0059 
0060 #define ADAU1701_SEROCTL_OBF16      0x0000
0061 #define ADAU1701_SEROCTL_OBF8       0x0200
0062 #define ADAU1701_SEROCTL_OBF4       0x0400
0063 #define ADAU1701_SEROCTL_OBF2       0x0600
0064 #define ADAU1701_SEROCTL_OBF_MASK   0x0600
0065 
0066 #define ADAU1701_SEROCTL_OLF1024    0x0000
0067 #define ADAU1701_SEROCTL_OLF512     0x0080
0068 #define ADAU1701_SEROCTL_OLF256     0x0100
0069 #define ADAU1701_SEROCTL_OLF_MASK   0x0180
0070 
0071 #define ADAU1701_SEROCTL_MSB_DEALY1 0x0000
0072 #define ADAU1701_SEROCTL_MSB_DEALY0 0x0004
0073 #define ADAU1701_SEROCTL_MSB_DEALY8 0x0008
0074 #define ADAU1701_SEROCTL_MSB_DEALY12    0x000c
0075 #define ADAU1701_SEROCTL_MSB_DEALY16    0x0010
0076 #define ADAU1701_SEROCTL_MSB_DEALY_MASK 0x001c
0077 
0078 #define ADAU1701_SEROCTL_WORD_LEN_24    0x0000
0079 #define ADAU1701_SEROCTL_WORD_LEN_20    0x0001
0080 #define ADAU1701_SEROCTL_WORD_LEN_16    0x0002
0081 #define ADAU1701_SEROCTL_WORD_LEN_MASK  0x0003
0082 
0083 #define ADAU1701_AUXNPOW_VBPD       0x40
0084 #define ADAU1701_AUXNPOW_VRPD       0x20
0085 
0086 #define ADAU1701_SERICTL_I2S        0
0087 #define ADAU1701_SERICTL_LEFTJ      1
0088 #define ADAU1701_SERICTL_TDM        2
0089 #define ADAU1701_SERICTL_RIGHTJ_24  3
0090 #define ADAU1701_SERICTL_RIGHTJ_20  4
0091 #define ADAU1701_SERICTL_RIGHTJ_18  5
0092 #define ADAU1701_SERICTL_RIGHTJ_16  6
0093 #define ADAU1701_SERICTL_MODE_MASK  7
0094 #define ADAU1701_SERICTL_INV_BCLK   BIT(3)
0095 #define ADAU1701_SERICTL_INV_LRCLK  BIT(4)
0096 
0097 #define ADAU1701_OSCIPOW_OPD        0x04
0098 #define ADAU1701_DACSET_DACINIT     1
0099 
0100 #define ADAU1707_CLKDIV_UNSET       (-1U)
0101 
0102 #define ADAU1701_FIRMWARE "adau1701.bin"
0103 
0104 static const char * const supply_names[] = {
0105     "dvdd", "avdd"
0106 };
0107 
0108 struct adau1701 {
0109     struct gpio_desc  *gpio_nreset;
0110     struct gpio_descs *gpio_pll_mode;
0111     unsigned int dai_fmt;
0112     unsigned int pll_clkdiv;
0113     unsigned int sysclk;
0114     struct regmap *regmap;
0115     struct i2c_client *client;
0116     u8 pin_config[12];
0117 
0118     struct sigmadsp *sigmadsp;
0119     struct regulator_bulk_data supplies[ARRAY_SIZE(supply_names)];
0120 };
0121 
0122 static const struct snd_kcontrol_new adau1701_controls[] = {
0123     SOC_SINGLE("Master Capture Switch", ADAU1701_DSPCTRL, 4, 1, 0),
0124 };
0125 
0126 static const struct snd_soc_dapm_widget adau1701_dapm_widgets[] = {
0127     SND_SOC_DAPM_DAC("DAC0", "Playback", ADAU1701_AUXNPOW, 3, 1),
0128     SND_SOC_DAPM_DAC("DAC1", "Playback", ADAU1701_AUXNPOW, 2, 1),
0129     SND_SOC_DAPM_DAC("DAC2", "Playback", ADAU1701_AUXNPOW, 1, 1),
0130     SND_SOC_DAPM_DAC("DAC3", "Playback", ADAU1701_AUXNPOW, 0, 1),
0131     SND_SOC_DAPM_ADC("ADC", "Capture", ADAU1701_AUXNPOW, 7, 1),
0132 
0133     SND_SOC_DAPM_OUTPUT("OUT0"),
0134     SND_SOC_DAPM_OUTPUT("OUT1"),
0135     SND_SOC_DAPM_OUTPUT("OUT2"),
0136     SND_SOC_DAPM_OUTPUT("OUT3"),
0137     SND_SOC_DAPM_INPUT("IN0"),
0138     SND_SOC_DAPM_INPUT("IN1"),
0139 };
0140 
0141 static const struct snd_soc_dapm_route adau1701_dapm_routes[] = {
0142     { "OUT0", NULL, "DAC0" },
0143     { "OUT1", NULL, "DAC1" },
0144     { "OUT2", NULL, "DAC2" },
0145     { "OUT3", NULL, "DAC3" },
0146 
0147     { "ADC", NULL, "IN0" },
0148     { "ADC", NULL, "IN1" },
0149 };
0150 
0151 static unsigned int adau1701_register_size(struct device *dev,
0152         unsigned int reg)
0153 {
0154     switch (reg) {
0155     case ADAU1701_PINCONF_0:
0156     case ADAU1701_PINCONF_1:
0157         return 3;
0158     case ADAU1701_DSPCTRL:
0159     case ADAU1701_SEROCTL:
0160     case ADAU1701_AUXNPOW:
0161     case ADAU1701_OSCIPOW:
0162     case ADAU1701_DACSET:
0163         return 2;
0164     case ADAU1701_SERICTL:
0165         return 1;
0166     }
0167 
0168     dev_err(dev, "Unsupported register address: %d\n", reg);
0169     return 0;
0170 }
0171 
0172 static bool adau1701_volatile_reg(struct device *dev, unsigned int reg)
0173 {
0174     switch (reg) {
0175     case ADAU1701_DACSET:
0176     case ADAU1701_DSPCTRL:
0177         return true;
0178     default:
0179         return false;
0180     }
0181 }
0182 
0183 static int adau1701_reg_write(void *context, unsigned int reg,
0184                   unsigned int value)
0185 {
0186     struct i2c_client *client = context;
0187     unsigned int i;
0188     unsigned int size;
0189     uint8_t buf[5];
0190     int ret;
0191 
0192     size = adau1701_register_size(&client->dev, reg);
0193     if (size == 0)
0194         return -EINVAL;
0195 
0196     buf[0] = reg >> 8;
0197     buf[1] = reg & 0xff;
0198 
0199     for (i = size + 1; i >= 2; --i) {
0200         buf[i] = value;
0201         value >>= 8;
0202     }
0203 
0204     ret = i2c_master_send(client, buf, size + 2);
0205     if (ret == size + 2)
0206         return 0;
0207     else if (ret < 0)
0208         return ret;
0209     else
0210         return -EIO;
0211 }
0212 
0213 static int adau1701_reg_read(void *context, unsigned int reg,
0214                  unsigned int *value)
0215 {
0216     int ret;
0217     unsigned int i;
0218     unsigned int size;
0219     uint8_t send_buf[2], recv_buf[3];
0220     struct i2c_client *client = context;
0221     struct i2c_msg msgs[2];
0222 
0223     size = adau1701_register_size(&client->dev, reg);
0224     if (size == 0)
0225         return -EINVAL;
0226 
0227     send_buf[0] = reg >> 8;
0228     send_buf[1] = reg & 0xff;
0229 
0230     msgs[0].addr = client->addr;
0231     msgs[0].len = sizeof(send_buf);
0232     msgs[0].buf = send_buf;
0233     msgs[0].flags = 0;
0234 
0235     msgs[1].addr = client->addr;
0236     msgs[1].len = size;
0237     msgs[1].buf = recv_buf;
0238     msgs[1].flags = I2C_M_RD;
0239 
0240     ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
0241     if (ret < 0)
0242         return ret;
0243     else if (ret != ARRAY_SIZE(msgs))
0244         return -EIO;
0245 
0246     *value = 0;
0247 
0248     for (i = 0; i < size; i++) {
0249         *value <<= 8;
0250         *value |= recv_buf[i];
0251     }
0252 
0253     return 0;
0254 }
0255 
0256 static int adau1701_safeload(struct sigmadsp *sigmadsp, unsigned int addr,
0257     const uint8_t bytes[], size_t len)
0258 {
0259     struct i2c_client *client = to_i2c_client(sigmadsp->dev);
0260     struct adau1701 *adau1701 = i2c_get_clientdata(client);
0261     unsigned int val;
0262     unsigned int i;
0263     uint8_t buf[10];
0264     int ret;
0265 
0266     ret = regmap_read(adau1701->regmap, ADAU1701_DSPCTRL, &val);
0267     if (ret)
0268         return ret;
0269 
0270     if (val & ADAU1701_DSPCTRL_IST)
0271         msleep(50);
0272 
0273     for (i = 0; i < len / 4; i++) {
0274         put_unaligned_le16(ADAU1701_SAFELOAD_DATA(i), buf);
0275         buf[2] = 0x00;
0276         memcpy(buf + 3, bytes + i * 4, 4);
0277         ret = i2c_master_send(client, buf, 7);
0278         if (ret < 0)
0279             return ret;
0280         else if (ret != 7)
0281             return -EIO;
0282 
0283         put_unaligned_le16(ADAU1701_SAFELOAD_ADDR(i), buf);
0284         put_unaligned_le16(addr + i, buf + 2);
0285         ret = i2c_master_send(client, buf, 4);
0286         if (ret < 0)
0287             return ret;
0288         else if (ret != 4)
0289             return -EIO;
0290     }
0291 
0292     return regmap_update_bits(adau1701->regmap, ADAU1701_DSPCTRL,
0293         ADAU1701_DSPCTRL_IST, ADAU1701_DSPCTRL_IST);
0294 }
0295 
0296 static const struct sigmadsp_ops adau1701_sigmadsp_ops = {
0297     .safeload = adau1701_safeload,
0298 };
0299 
0300 static int adau1701_reset(struct snd_soc_component *component, unsigned int clkdiv,
0301     unsigned int rate)
0302 {
0303     struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
0304     int ret;
0305 
0306     DECLARE_BITMAP(values, 2);
0307     sigmadsp_reset(adau1701->sigmadsp);
0308 
0309     if (clkdiv != ADAU1707_CLKDIV_UNSET && adau1701->gpio_pll_mode) {
0310         switch (clkdiv) {
0311         case 64:
0312             __assign_bit(0, values, 0);
0313             __assign_bit(1, values, 0);
0314             break;
0315         case 256:
0316             __assign_bit(0, values, 0);
0317             __assign_bit(1, values, 1);
0318             break;
0319         case 384:
0320             __assign_bit(0, values, 1);
0321             __assign_bit(1, values, 0);
0322             break;
0323         case 0: /* fallback */
0324         case 512:
0325             __assign_bit(0, values, 1);
0326             __assign_bit(1, values, 1);
0327             break;
0328         }
0329         gpiod_set_array_value_cansleep(adau1701->gpio_pll_mode->ndescs,
0330                 adau1701->gpio_pll_mode->desc, adau1701->gpio_pll_mode->info,
0331                 values);
0332     }
0333 
0334     adau1701->pll_clkdiv = clkdiv;
0335 
0336     if (adau1701->gpio_nreset) {
0337         gpiod_set_value_cansleep(adau1701->gpio_nreset, 0);
0338         /* minimum reset time is 20ns */
0339         udelay(1);
0340         gpiod_set_value_cansleep(adau1701->gpio_nreset, 1);
0341         /* power-up time may be as long as 85ms */
0342         mdelay(85);
0343     }
0344 
0345     /*
0346      * Postpone the firmware download to a point in time when we
0347      * know the correct PLL setup
0348      */
0349     if (clkdiv != ADAU1707_CLKDIV_UNSET) {
0350         ret = sigmadsp_setup(adau1701->sigmadsp, rate);
0351         if (ret) {
0352             dev_warn(component->dev, "Failed to load firmware\n");
0353             return ret;
0354         }
0355     }
0356 
0357     regmap_write(adau1701->regmap, ADAU1701_DACSET, ADAU1701_DACSET_DACINIT);
0358     regmap_write(adau1701->regmap, ADAU1701_DSPCTRL, ADAU1701_DSPCTRL_CR);
0359 
0360     regcache_mark_dirty(adau1701->regmap);
0361     regcache_sync(adau1701->regmap);
0362 
0363     return 0;
0364 }
0365 
0366 static int adau1701_set_capture_pcm_format(struct snd_soc_component *component,
0367                        struct snd_pcm_hw_params *params)
0368 {
0369     struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
0370     unsigned int mask = ADAU1701_SEROCTL_WORD_LEN_MASK;
0371     unsigned int val;
0372 
0373     switch (params_width(params)) {
0374     case 16:
0375         val = ADAU1701_SEROCTL_WORD_LEN_16;
0376         break;
0377     case 20:
0378         val = ADAU1701_SEROCTL_WORD_LEN_20;
0379         break;
0380     case 24:
0381         val = ADAU1701_SEROCTL_WORD_LEN_24;
0382         break;
0383     default:
0384         return -EINVAL;
0385     }
0386 
0387     if (adau1701->dai_fmt == SND_SOC_DAIFMT_RIGHT_J) {
0388         switch (params_width(params)) {
0389         case 16:
0390             val |= ADAU1701_SEROCTL_MSB_DEALY16;
0391             break;
0392         case 20:
0393             val |= ADAU1701_SEROCTL_MSB_DEALY12;
0394             break;
0395         case 24:
0396             val |= ADAU1701_SEROCTL_MSB_DEALY8;
0397             break;
0398         }
0399         mask |= ADAU1701_SEROCTL_MSB_DEALY_MASK;
0400     }
0401 
0402     regmap_update_bits(adau1701->regmap, ADAU1701_SEROCTL, mask, val);
0403 
0404     return 0;
0405 }
0406 
0407 static int adau1701_set_playback_pcm_format(struct snd_soc_component *component,
0408                         struct snd_pcm_hw_params *params)
0409 {
0410     struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
0411     unsigned int val;
0412 
0413     if (adau1701->dai_fmt != SND_SOC_DAIFMT_RIGHT_J)
0414         return 0;
0415 
0416     switch (params_width(params)) {
0417     case 16:
0418         val = ADAU1701_SERICTL_RIGHTJ_16;
0419         break;
0420     case 20:
0421         val = ADAU1701_SERICTL_RIGHTJ_20;
0422         break;
0423     case 24:
0424         val = ADAU1701_SERICTL_RIGHTJ_24;
0425         break;
0426     default:
0427         return -EINVAL;
0428     }
0429 
0430     regmap_update_bits(adau1701->regmap, ADAU1701_SERICTL,
0431         ADAU1701_SERICTL_MODE_MASK, val);
0432 
0433     return 0;
0434 }
0435 
0436 static int adau1701_hw_params(struct snd_pcm_substream *substream,
0437         struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
0438 {
0439     struct snd_soc_component *component = dai->component;
0440     struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
0441     unsigned int clkdiv = adau1701->sysclk / params_rate(params);
0442     unsigned int val;
0443     int ret;
0444 
0445     /*
0446      * If the mclk/lrclk ratio changes, the chip needs updated PLL
0447      * mode GPIO settings, and a full reset cycle, including a new
0448      * firmware upload.
0449      */
0450     if (clkdiv != adau1701->pll_clkdiv) {
0451         ret = adau1701_reset(component, clkdiv, params_rate(params));
0452         if (ret < 0)
0453             return ret;
0454     }
0455 
0456     switch (params_rate(params)) {
0457     case 192000:
0458         val = ADAU1701_DSPCTRL_SR_192;
0459         break;
0460     case 96000:
0461         val = ADAU1701_DSPCTRL_SR_96;
0462         break;
0463     case 48000:
0464         val = ADAU1701_DSPCTRL_SR_48;
0465         break;
0466     default:
0467         return -EINVAL;
0468     }
0469 
0470     regmap_update_bits(adau1701->regmap, ADAU1701_DSPCTRL,
0471         ADAU1701_DSPCTRL_SR_MASK, val);
0472 
0473     if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
0474         return adau1701_set_playback_pcm_format(component, params);
0475     else
0476         return adau1701_set_capture_pcm_format(component, params);
0477 }
0478 
0479 static int adau1701_set_dai_fmt(struct snd_soc_dai *codec_dai,
0480         unsigned int fmt)
0481 {
0482     struct snd_soc_component *component = codec_dai->component;
0483     struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
0484     unsigned int serictl = 0x00, seroctl = 0x00;
0485     bool invert_lrclk;
0486 
0487     switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
0488     case SND_SOC_DAIFMT_CBP_CFP:
0489         /* master, 64-bits per sample, 1 frame per sample */
0490         seroctl |= ADAU1701_SEROCTL_MASTER | ADAU1701_SEROCTL_OBF16
0491                 | ADAU1701_SEROCTL_OLF1024;
0492         break;
0493     case SND_SOC_DAIFMT_CBC_CFC:
0494         break;
0495     default:
0496         return -EINVAL;
0497     }
0498 
0499     /* clock inversion */
0500     switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
0501     case SND_SOC_DAIFMT_NB_NF:
0502         invert_lrclk = false;
0503         break;
0504     case SND_SOC_DAIFMT_NB_IF:
0505         invert_lrclk = true;
0506         break;
0507     case SND_SOC_DAIFMT_IB_NF:
0508         invert_lrclk = false;
0509         serictl |= ADAU1701_SERICTL_INV_BCLK;
0510         seroctl |= ADAU1701_SEROCTL_INV_BCLK;
0511         break;
0512     case SND_SOC_DAIFMT_IB_IF:
0513         invert_lrclk = true;
0514         serictl |= ADAU1701_SERICTL_INV_BCLK;
0515         seroctl |= ADAU1701_SEROCTL_INV_BCLK;
0516         break;
0517     default:
0518         return -EINVAL;
0519     }
0520 
0521     switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
0522     case SND_SOC_DAIFMT_I2S:
0523         break;
0524     case SND_SOC_DAIFMT_LEFT_J:
0525         serictl |= ADAU1701_SERICTL_LEFTJ;
0526         seroctl |= ADAU1701_SEROCTL_MSB_DEALY0;
0527         invert_lrclk = !invert_lrclk;
0528         break;
0529     case SND_SOC_DAIFMT_RIGHT_J:
0530         serictl |= ADAU1701_SERICTL_RIGHTJ_24;
0531         seroctl |= ADAU1701_SEROCTL_MSB_DEALY8;
0532         invert_lrclk = !invert_lrclk;
0533         break;
0534     default:
0535         return -EINVAL;
0536     }
0537 
0538     if (invert_lrclk) {
0539         seroctl |= ADAU1701_SEROCTL_INV_LRCLK;
0540         serictl |= ADAU1701_SERICTL_INV_LRCLK;
0541     }
0542 
0543     adau1701->dai_fmt = fmt & SND_SOC_DAIFMT_FORMAT_MASK;
0544 
0545     regmap_write(adau1701->regmap, ADAU1701_SERICTL, serictl);
0546     regmap_update_bits(adau1701->regmap, ADAU1701_SEROCTL,
0547         ~ADAU1701_SEROCTL_WORD_LEN_MASK, seroctl);
0548 
0549     return 0;
0550 }
0551 
0552 static int adau1701_set_bias_level(struct snd_soc_component *component,
0553         enum snd_soc_bias_level level)
0554 {
0555     unsigned int mask = ADAU1701_AUXNPOW_VBPD | ADAU1701_AUXNPOW_VRPD;
0556     struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
0557 
0558     switch (level) {
0559     case SND_SOC_BIAS_ON:
0560         break;
0561     case SND_SOC_BIAS_PREPARE:
0562         break;
0563     case SND_SOC_BIAS_STANDBY:
0564         /* Enable VREF and VREF buffer */
0565         regmap_update_bits(adau1701->regmap,
0566                    ADAU1701_AUXNPOW, mask, 0x00);
0567         break;
0568     case SND_SOC_BIAS_OFF:
0569         /* Disable VREF and VREF buffer */
0570         regmap_update_bits(adau1701->regmap,
0571                    ADAU1701_AUXNPOW, mask, mask);
0572         break;
0573     }
0574 
0575     return 0;
0576 }
0577 
0578 static int adau1701_mute_stream(struct snd_soc_dai *dai, int mute, int direction)
0579 {
0580     struct snd_soc_component *component = dai->component;
0581     unsigned int mask = ADAU1701_DSPCTRL_DAM;
0582     struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
0583     unsigned int val;
0584 
0585     if (mute)
0586         val = 0;
0587     else
0588         val = mask;
0589 
0590     regmap_update_bits(adau1701->regmap, ADAU1701_DSPCTRL, mask, val);
0591 
0592     return 0;
0593 }
0594 
0595 static int adau1701_set_sysclk(struct snd_soc_component *component, int clk_id,
0596     int source, unsigned int freq, int dir)
0597 {
0598     unsigned int val;
0599     struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
0600 
0601     switch (clk_id) {
0602     case ADAU1701_CLK_SRC_OSC:
0603         val = 0x0;
0604         break;
0605     case ADAU1701_CLK_SRC_MCLK:
0606         val = ADAU1701_OSCIPOW_OPD;
0607         break;
0608     default:
0609         return -EINVAL;
0610     }
0611 
0612     regmap_update_bits(adau1701->regmap, ADAU1701_OSCIPOW,
0613                ADAU1701_OSCIPOW_OPD, val);
0614     adau1701->sysclk = freq;
0615 
0616     return 0;
0617 }
0618 
0619 static int adau1701_startup(struct snd_pcm_substream *substream,
0620     struct snd_soc_dai *dai)
0621 {
0622     struct adau1701 *adau1701 = snd_soc_component_get_drvdata(dai->component);
0623 
0624     return sigmadsp_restrict_params(adau1701->sigmadsp, substream);
0625 }
0626 
0627 #define ADAU1701_RATES (SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 | \
0628     SNDRV_PCM_RATE_192000)
0629 
0630 #define ADAU1701_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
0631     SNDRV_PCM_FMTBIT_S24_LE)
0632 
0633 static const struct snd_soc_dai_ops adau1701_dai_ops = {
0634     .set_fmt    = adau1701_set_dai_fmt,
0635     .hw_params  = adau1701_hw_params,
0636     .mute_stream    = adau1701_mute_stream,
0637     .startup    = adau1701_startup,
0638     .no_capture_mute = 1,
0639 };
0640 
0641 static struct snd_soc_dai_driver adau1701_dai = {
0642     .name = "adau1701",
0643     .playback = {
0644         .stream_name = "Playback",
0645         .channels_min = 2,
0646         .channels_max = 8,
0647         .rates = ADAU1701_RATES,
0648         .formats = ADAU1701_FORMATS,
0649     },
0650     .capture = {
0651         .stream_name = "Capture",
0652         .channels_min = 2,
0653         .channels_max = 8,
0654         .rates = ADAU1701_RATES,
0655         .formats = ADAU1701_FORMATS,
0656     },
0657     .ops = &adau1701_dai_ops,
0658     .symmetric_rate = 1,
0659 };
0660 
0661 #ifdef CONFIG_OF
0662 static const struct of_device_id adau1701_dt_ids[] = {
0663     { .compatible = "adi,adau1701", },
0664     { }
0665 };
0666 MODULE_DEVICE_TABLE(of, adau1701_dt_ids);
0667 #endif
0668 
0669 static int adau1701_probe(struct snd_soc_component *component)
0670 {
0671     int i, ret;
0672     unsigned int val;
0673     struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
0674 
0675     ret = sigmadsp_attach(adau1701->sigmadsp, component);
0676     if (ret)
0677         return ret;
0678 
0679     ret = regulator_bulk_enable(ARRAY_SIZE(adau1701->supplies),
0680                     adau1701->supplies);
0681     if (ret < 0) {
0682         dev_err(component->dev, "Failed to enable regulators: %d\n", ret);
0683         return ret;
0684     }
0685 
0686     /*
0687      * Let the pll_clkdiv variable default to something that won't happen
0688      * at runtime. That way, we can postpone the firmware download from
0689      * adau1701_reset() to a point in time when we know the correct PLL
0690      * mode parameters.
0691      */
0692     adau1701->pll_clkdiv = ADAU1707_CLKDIV_UNSET;
0693 
0694     /* initalize with pre-configured pll mode settings */
0695     ret = adau1701_reset(component, adau1701->pll_clkdiv, 0);
0696     if (ret < 0)
0697         goto exit_regulators_disable;
0698 
0699     /* set up pin config */
0700     val = 0;
0701     for (i = 0; i < 6; i++)
0702         val |= adau1701->pin_config[i] << (i * 4);
0703 
0704     regmap_write(adau1701->regmap, ADAU1701_PINCONF_0, val);
0705 
0706     val = 0;
0707     for (i = 0; i < 6; i++)
0708         val |= adau1701->pin_config[i + 6] << (i * 4);
0709 
0710     regmap_write(adau1701->regmap, ADAU1701_PINCONF_1, val);
0711 
0712     return 0;
0713 
0714 exit_regulators_disable:
0715 
0716     regulator_bulk_disable(ARRAY_SIZE(adau1701->supplies), adau1701->supplies);
0717     return ret;
0718 }
0719 
0720 static void adau1701_remove(struct snd_soc_component *component)
0721 {
0722     struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
0723 
0724     if (adau1701->gpio_nreset)
0725         gpiod_set_value_cansleep(adau1701->gpio_nreset, 0);
0726 
0727     regulator_bulk_disable(ARRAY_SIZE(adau1701->supplies), adau1701->supplies);
0728 }
0729 
0730 #ifdef CONFIG_PM
0731 static int adau1701_suspend(struct snd_soc_component *component)
0732 {
0733     struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
0734 
0735     regulator_bulk_disable(ARRAY_SIZE(adau1701->supplies),
0736                    adau1701->supplies);
0737 
0738     return 0;
0739 }
0740 
0741 static int adau1701_resume(struct snd_soc_component *component)
0742 {
0743     struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
0744     int ret;
0745 
0746         ret = regulator_bulk_enable(ARRAY_SIZE(adau1701->supplies),
0747                     adau1701->supplies);
0748     if (ret < 0) {
0749         dev_err(component->dev, "Failed to enable regulators: %d\n", ret);
0750         return ret;
0751     }
0752 
0753     return adau1701_reset(component, adau1701->pll_clkdiv, 0);
0754 }
0755 #else
0756 #define adau1701_resume     NULL
0757 #define adau1701_suspend    NULL
0758 #endif /* CONFIG_PM */
0759 
0760 static const struct snd_soc_component_driver adau1701_component_drv = {
0761     .probe          = adau1701_probe,
0762     .remove         = adau1701_remove,
0763     .resume         = adau1701_resume,
0764     .suspend        = adau1701_suspend,
0765     .set_bias_level     = adau1701_set_bias_level,
0766     .controls       = adau1701_controls,
0767     .num_controls       = ARRAY_SIZE(adau1701_controls),
0768     .dapm_widgets       = adau1701_dapm_widgets,
0769     .num_dapm_widgets   = ARRAY_SIZE(adau1701_dapm_widgets),
0770     .dapm_routes        = adau1701_dapm_routes,
0771     .num_dapm_routes    = ARRAY_SIZE(adau1701_dapm_routes),
0772     .set_sysclk     = adau1701_set_sysclk,
0773     .use_pmdown_time    = 1,
0774     .endianness     = 1,
0775 };
0776 
0777 static const struct regmap_config adau1701_regmap = {
0778     .reg_bits       = 16,
0779     .val_bits       = 32,
0780     .max_register       = ADAU1701_MAX_REGISTER,
0781     .cache_type     = REGCACHE_RBTREE,
0782     .volatile_reg       = adau1701_volatile_reg,
0783     .reg_write      = adau1701_reg_write,
0784     .reg_read       = adau1701_reg_read,
0785 };
0786 
0787 static int adau1701_i2c_probe(struct i2c_client *client)
0788 {
0789     struct adau1701 *adau1701;
0790     struct device *dev = &client->dev;
0791     int ret, i;
0792 
0793     adau1701 = devm_kzalloc(dev, sizeof(*adau1701), GFP_KERNEL);
0794     if (!adau1701)
0795         return -ENOMEM;
0796 
0797     for (i = 0; i < ARRAY_SIZE(supply_names); i++)
0798         adau1701->supplies[i].supply = supply_names[i];
0799 
0800     ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(adau1701->supplies),
0801             adau1701->supplies);
0802     if (ret < 0) {
0803         dev_err(dev, "Failed to get regulators: %d\n", ret);
0804         return ret;
0805     }
0806 
0807     ret = regulator_bulk_enable(ARRAY_SIZE(adau1701->supplies),
0808             adau1701->supplies);
0809     if (ret < 0) {
0810         dev_err(dev, "Failed to enable regulators: %d\n", ret);
0811         return ret;
0812     }
0813 
0814     adau1701->client = client;
0815     adau1701->regmap = devm_regmap_init(dev, NULL, client,
0816                         &adau1701_regmap);
0817     if (IS_ERR(adau1701->regmap)) {
0818         ret = PTR_ERR(adau1701->regmap);
0819         goto exit_regulators_disable;
0820     }
0821 
0822 
0823     if (dev->of_node) {
0824         of_property_read_u32(dev->of_node, "adi,pll-clkdiv",
0825                      &adau1701->pll_clkdiv);
0826 
0827         of_property_read_u8_array(dev->of_node, "adi,pin-config",
0828                       adau1701->pin_config,
0829                       ARRAY_SIZE(adau1701->pin_config));
0830     }
0831 
0832     adau1701->gpio_nreset = devm_gpiod_get_optional(dev, "reset", GPIOD_IN);
0833 
0834     if (IS_ERR(adau1701->gpio_nreset)) {
0835         ret = PTR_ERR(adau1701->gpio_nreset);
0836         goto exit_regulators_disable;
0837     }
0838 
0839     adau1701->gpio_pll_mode = devm_gpiod_get_array_optional(dev, "adi,pll-mode", GPIOD_OUT_LOW);
0840 
0841     if (IS_ERR(adau1701->gpio_pll_mode)) {
0842         ret = PTR_ERR(adau1701->gpio_pll_mode);
0843         goto exit_regulators_disable;
0844     }
0845 
0846     i2c_set_clientdata(client, adau1701);
0847 
0848     adau1701->sigmadsp = devm_sigmadsp_init_i2c(client,
0849         &adau1701_sigmadsp_ops, ADAU1701_FIRMWARE);
0850     if (IS_ERR(adau1701->sigmadsp)) {
0851         ret = PTR_ERR(adau1701->sigmadsp);
0852         goto exit_regulators_disable;
0853     }
0854 
0855     ret = devm_snd_soc_register_component(&client->dev,
0856             &adau1701_component_drv,
0857             &adau1701_dai, 1);
0858 
0859 exit_regulators_disable:
0860 
0861     regulator_bulk_disable(ARRAY_SIZE(adau1701->supplies), adau1701->supplies);
0862     return ret;
0863 }
0864 
0865 static const struct i2c_device_id adau1701_i2c_id[] = {
0866     { "adau1401", 0 },
0867     { "adau1401a", 0 },
0868     { "adau1701", 0 },
0869     { "adau1702", 0 },
0870     { }
0871 };
0872 MODULE_DEVICE_TABLE(i2c, adau1701_i2c_id);
0873 
0874 static struct i2c_driver adau1701_i2c_driver = {
0875     .driver = {
0876         .name   = "adau1701",
0877         .of_match_table = of_match_ptr(adau1701_dt_ids),
0878     },
0879     .probe_new  = adau1701_i2c_probe,
0880     .id_table   = adau1701_i2c_id,
0881 };
0882 
0883 module_i2c_driver(adau1701_i2c_driver);
0884 
0885 MODULE_DESCRIPTION("ASoC ADAU1701 SigmaDSP driver");
0886 MODULE_AUTHOR("Cliff Cai <cliff.cai@analog.com>");
0887 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
0888 MODULE_LICENSE("GPL");
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