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0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 /*
0003  * File:         sound/soc/codec/ad73311.h
0004  * Based on:
0005  * Author:       Cliff Cai <cliff.cai@analog.com>
0006  *
0007  * Created:      Thur Sep 25, 2008
0008  * Description:  definitions for AD73311 registers
0009  *
0010  * Modified:
0011  *               Copyright 2006 Analog Devices Inc.
0012  *
0013  * Bugs:         Enter bugs at http://blackfin.uclinux.org/
0014  */
0015 
0016 #ifndef __AD73311_H__
0017 #define __AD73311_H__
0018 
0019 #define AD_CONTROL  0x8000
0020 #define AD_DATA     0x0000
0021 #define AD_READ     0x4000
0022 #define AD_WRITE    0x0000
0023 
0024 /* Control register A */
0025 #define CTRL_REG_A  (0 << 8)
0026 
0027 #define REGA_MODE_PRO   0x00
0028 #define REGA_MODE_DATA  0x01
0029 #define REGA_MODE_MIXED 0x03
0030 #define REGA_DLB        0x04
0031 #define REGA_SLB        0x08
0032 #define REGA_DEVC(x)        ((x & 0x7) << 4)
0033 #define REGA_RESET      0x80
0034 
0035 /* Control register B */
0036 #define CTRL_REG_B  (1 << 8)
0037 
0038 #define REGB_DIRATE(x)  (x & 0x3)
0039 #define REGB_SCDIV(x)   ((x & 0x3) << 2)
0040 #define REGB_MCDIV(x)   ((x & 0x7) << 4)
0041 #define REGB_CEE        (1 << 7)
0042 
0043 /* Control register C */
0044 #define CTRL_REG_C  (2 << 8)
0045 
0046 #define REGC_PUDEV      (1 << 0)
0047 #define REGC_PUADC      (1 << 3)
0048 #define REGC_PUDAC      (1 << 4)
0049 #define REGC_PUREF      (1 << 5)
0050 #define REGC_REFUSE     (1 << 6)
0051 
0052 /* Control register D */
0053 #define CTRL_REG_D  (3 << 8)
0054 
0055 #define REGD_IGS(x)     (x & 0x7)
0056 #define REGD_RMOD       (1 << 3)
0057 #define REGD_OGS(x)     ((x & 0x7) << 4)
0058 #define REGD_MUTE       (1 << 7)
0059 
0060 /* Control register E */
0061 #define CTRL_REG_E  (4 << 8)
0062 
0063 #define REGE_DA(x)      (x & 0x1f)
0064 #define REGE_IBYP       (1 << 5)
0065 
0066 /* Control register F */
0067 #define CTRL_REG_F  (5 << 8)
0068 
0069 #define REGF_SEEN       (1 << 5)
0070 #define REGF_INV        (1 << 6)
0071 #define REGF_ALB        (1 << 7)
0072 
0073 #endif