soc/bcm/bcm63xx-i2s.h

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 // linux/sound/soc/bcm/bcm63xx-i2s.h
0003 // Copyright (c) 2020 Broadcom Corporation
0004 // Author: Kevin-Ke Li <kevin-ke.li@broadcom.com>
0005
0006 #ifndef __BCM63XX_I2S_H
0007 #define __BCM63XX_I2S_H
0008
0009 #define I2S_DESC_FIFO_DEPTH     8
0010 #define I2S_MISC_CFG            (0x003C)
0011 #define I2S_PAD_LVL_LOOP_DIS_MASK   (1 << 2)
0012 #define I2S_PAD_LVL_LOOP_DIS_ENABLE I2S_PAD_LVL_LOOP_DIS_MASK
0013
0014 #define I2S_TX_ENABLE_MASK      (1 << 31)
0015 #define I2S_TX_ENABLE           I2S_TX_ENABLE_MASK
0016 #define I2S_TX_OUT_R            (1 << 19)
0017 #define I2S_TX_DATA_ALIGNMENT       (1 << 2)
0018 #define I2S_TX_DATA_ENABLE      (1 << 1)
0019 #define I2S_TX_CLOCK_ENABLE     (1 << 0)
0020
0021 #define I2S_TX_DESC_OFF_LEVEL_SHIFT 12
0022 #define I2S_TX_DESC_OFF_LEVEL_MASK  (0x0F << I2S_TX_DESC_OFF_LEVEL_SHIFT)
0023 #define I2S_TX_DESC_IFF_LEVEL_SHIFT 8
0024 #define I2S_TX_DESC_IFF_LEVEL_MASK  (0x0F << I2S_TX_DESC_IFF_LEVEL_SHIFT)
0025 #define I2S_TX_DESC_OFF_INTR_EN_MSK (1 << 1)
0026 #define I2S_TX_DESC_OFF_INTR_EN I2S_TX_DESC_OFF_INTR_EN_MSK
0027
0028 #define I2S_TX_CFG          (0x0000)
0029 #define I2S_TX_IRQ_CTL          (0x0004)
0030 #define I2S_TX_IRQ_EN           (0x0008)
0031 #define I2S_TX_IRQ_IFF_THLD     (0x000c)
0032 #define I2S_TX_IRQ_OFF_THLD     (0x0010)
0033 #define I2S_TX_DESC_IFF_ADDR        (0x0014)
0034 #define I2S_TX_DESC_IFF_LEN     (0x0018)
0035 #define I2S_TX_DESC_OFF_ADDR        (0x001C)
0036 #define I2S_TX_DESC_OFF_LEN     (0x0020)
0037 #define I2S_TX_CFG_2            (0x0024)
0038 #define I2S_TX_SLAVE_MODE_SHIFT 13
0039 #define I2S_TX_SLAVE_MODE_MASK      (1 << I2S_TX_SLAVE_MODE_SHIFT)
0040 #define I2S_TX_SLAVE_MODE       I2S_TX_SLAVE_MODE_MASK
0041 #define I2S_TX_MASTER_MODE      0
0042 #define I2S_TX_INTR_MASK        0x0F
0043
0044 #define I2S_RX_ENABLE_MASK      (1 << 31)
0045 #define I2S_RX_ENABLE           I2S_RX_ENABLE_MASK
0046 #define I2S_RX_IN_R         (1 << 19)
0047 #define I2S_RX_DATA_ALIGNMENT       (1 << 2)
0048 #define I2S_RX_CLOCK_ENABLE     (1 << 0)
0049
0050 #define I2S_RX_DESC_OFF_LEVEL_SHIFT 12
0051 #define I2S_RX_DESC_OFF_LEVEL_MASK  (0x0F << I2S_RX_DESC_OFF_LEVEL_SHIFT)
0052 #define I2S_RX_DESC_IFF_LEVEL_SHIFT 8
0053 #define I2S_RX_DESC_IFF_LEVEL_MASK  (0x0F << I2S_RX_DESC_IFF_LEVEL_SHIFT)
0054 #define I2S_RX_DESC_OFF_INTR_EN_MSK (1 << 1)
0055 #define I2S_RX_DESC_OFF_INTR_EN I2S_RX_DESC_OFF_INTR_EN_MSK
0056
0057 #define I2S_RX_CFG          (0x0040) /* 20c0 */
0058 #define I2S_RX_IRQ_CTL          (0x0044)
0059 #define I2S_RX_IRQ_EN           (0x0048)
0060 #define I2S_RX_IRQ_IFF_THLD     (0x004C)
0061 #define I2S_RX_IRQ_OFF_THLD     (0x0050)
0062 #define I2S_RX_DESC_IFF_ADDR        (0x0054)
0063 #define I2S_RX_DESC_IFF_LEN     (0x0058)
0064 #define I2S_RX_DESC_OFF_ADDR        (0x005C)
0065 #define I2S_RX_DESC_OFF_LEN     (0x0060)
0066 #define I2S_RX_CFG_2            (0x0064)
0067 #define I2S_RX_SLAVE_MODE_SHIFT 13
0068 #define I2S_RX_SLAVE_MODE_MASK      (1 << I2S_RX_SLAVE_MODE_SHIFT)
0069 #define I2S_RX_SLAVE_MODE       I2S_RX_SLAVE_MODE_MASK
0070 #define I2S_RX_MASTER_MODE      0
0071 #define I2S_RX_INTR_MASK        0x0F
0072
0073 #define I2S_REG_MAX         0x007C
0074
0075 struct bcm_i2s_priv {
0076     struct device *dev;
0077     struct regmap *regmap_i2s;
0078     struct clk *i2s_clk;
0079     struct snd_pcm_substream    *play_substream;
0080     struct snd_pcm_substream    *capture_substream;
0081     struct i2s_dma_desc *play_dma_desc;
0082     struct i2s_dma_desc *capture_dma_desc;
0083 };
0084
0085 extern int bcm63xx_soc_platform_probe(struct platform_device *pdev,
0086                       struct bcm_i2s_priv *i2s_priv);
0087 extern int bcm63xx_soc_platform_remove(struct platform_device *pdev);
0088
0089 #endif