soc/atmel/atmel_ssc_dai.h

0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 /*
0003  * atmel_ssc_dai.h - ALSA SSC interface for the Atmel  SoC
0004  *
0005  * Copyright (C) 2005 SAN People
0006  * Copyright (C) 2008 Atmel
0007  *
0008  * Author: Sedji Gaouaou <sedji.gaouaou@atmel.com>
0009  *         ATMEL CORP.
0010  *
0011  * Based on at91-ssc.c by
0012  * Frank Mandarino <fmandarino@endrelia.com>
0013  * Based on pxa2xx Platform drivers by
0014  * Liam Girdwood <lrg@slimlogic.co.uk>
0015  */
0016
0017 #ifndef _ATMEL_SSC_DAI_H
0018 #define _ATMEL_SSC_DAI_H
0019
0020 #include <linux/types.h>
0021 #include <linux/atmel-ssc.h>
0022
0023 #include "atmel-pcm.h"
0024
0025 /* SSC system clock ids */
0026 #define ATMEL_SYSCLK_MCK    0 /* SSC uses AT91 MCK as system clock */
0027
0028 /* SSC divider ids */
0029 #define ATMEL_SSC_CMR_DIV   0 /* MCK divider for BCLK */
0030 #define ATMEL_SSC_TCMR_PERIOD   1 /* BCLK divider for transmit FS */
0031 #define ATMEL_SSC_RCMR_PERIOD   2 /* BCLK divider for receive FS */
0032 /*
0033  * SSC direction masks
0034  */
0035 #define SSC_DIR_MASK_UNUSED 0
0036 #define SSC_DIR_MASK_PLAYBACK   1
0037 #define SSC_DIR_MASK_CAPTURE    2
0038
0039 /*
0040  * SSC register values that Atmel left out of <linux/atmel-ssc.h>.  These
0041  * are expected to be used with SSC_BF
0042  */
0043 /* START bit field values */
0044 #define SSC_START_CONTINUOUS    0
0045 #define SSC_START_TX_RX     1
0046 #define SSC_START_LOW_RF    2
0047 #define SSC_START_HIGH_RF   3
0048 #define SSC_START_FALLING_RF    4
0049 #define SSC_START_RISING_RF 5
0050 #define SSC_START_LEVEL_RF  6
0051 #define SSC_START_EDGE_RF   7
0052 #define SSS_START_COMPARE_0 8
0053
0054 /* CKI bit field values */
0055 #define SSC_CKI_FALLING     0
0056 #define SSC_CKI_RISING      1
0057
0058 /* CKO bit field values */
0059 #define SSC_CKO_NONE        0
0060 #define SSC_CKO_CONTINUOUS  1
0061 #define SSC_CKO_TRANSFER    2
0062
0063 /* CKS bit field values */
0064 #define SSC_CKS_DIV     0
0065 #define SSC_CKS_CLOCK       1
0066 #define SSC_CKS_PIN     2
0067
0068 /* FSEDGE bit field values */
0069 #define SSC_FSEDGE_POSITIVE 0
0070 #define SSC_FSEDGE_NEGATIVE 1
0071
0072 /* FSOS bit field values */
0073 #define SSC_FSOS_NONE       0
0074 #define SSC_FSOS_NEGATIVE   1
0075 #define SSC_FSOS_POSITIVE   2
0076 #define SSC_FSOS_LOW        3
0077 #define SSC_FSOS_HIGH       4
0078 #define SSC_FSOS_TOGGLE     5
0079
0080 #define START_DELAY     1
0081
0082 struct atmel_ssc_state {
0083     u32 ssc_cmr;
0084     u32 ssc_rcmr;
0085     u32 ssc_rfmr;
0086     u32 ssc_tcmr;
0087     u32 ssc_tfmr;
0088     u32 ssc_sr;
0089     u32 ssc_imr;
0090 };
0091
0092
0093 struct atmel_ssc_info {
0094     char *name;
0095     struct ssc_device *ssc;
0096     unsigned short dir_mask;    /* 0=unused, 1=playback, 2=capture */
0097     unsigned short initialized; /* true if SSC has been initialized */
0098     unsigned short daifmt;
0099     unsigned short cmr_div;
0100     unsigned short tcmr_period;
0101     unsigned short rcmr_period;
0102     unsigned int forced_divider;
0103     struct atmel_pcm_dma_params *dma_params[2];
0104     struct atmel_ssc_state ssc_state;
0105     unsigned long mck_rate;
0106 };
0107
0108 int atmel_ssc_set_audio(int ssc_id);
0109 void atmel_ssc_put_audio(int ssc_id);
0110
0111 #endif /* _AT91_SSC_DAI_H */