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0001 /* SPDX-License-Identifier: GPL-2.0-or-later */ 0002 /* 0003 * at91-pcm.h - ALSA PCM interface for the Atmel AT91 SoC. 0004 * 0005 * Copyright (C) 2005 SAN People 0006 * Copyright (C) 2008 Atmel 0007 * 0008 * Authors: Sedji Gaouaou <sedji.gaouaou@atmel.com> 0009 * 0010 * Based on at91-pcm. by: 0011 * Frank Mandarino <fmandarino@endrelia.com> 0012 * Copyright 2006 Endrelia Technologies Inc. 0013 * 0014 * Based on pxa2xx-pcm.c by: 0015 * 0016 * Author: Nicolas Pitre 0017 * Created: Nov 30, 2004 0018 * Copyright: (C) 2004 MontaVista Software, Inc. 0019 */ 0020 0021 #ifndef _ATMEL_PCM_H 0022 #define _ATMEL_PCM_H 0023 0024 #include <linux/atmel-ssc.h> 0025 0026 #define ATMEL_SSC_DMABUF_SIZE (64 * 1024) 0027 0028 /* 0029 * Registers and status bits that are required by the PCM driver. 0030 */ 0031 struct atmel_pdc_regs { 0032 unsigned int xpr; /* PDC recv/trans pointer */ 0033 unsigned int xcr; /* PDC recv/trans counter */ 0034 unsigned int xnpr; /* PDC next recv/trans pointer */ 0035 unsigned int xncr; /* PDC next recv/trans counter */ 0036 unsigned int ptcr; /* PDC transfer control */ 0037 }; 0038 0039 struct atmel_ssc_mask { 0040 u32 ssc_enable; /* SSC recv/trans enable */ 0041 u32 ssc_disable; /* SSC recv/trans disable */ 0042 u32 ssc_error; /* SSC error conditions */ 0043 u32 ssc_endx; /* SSC ENDTX or ENDRX */ 0044 u32 ssc_endbuf; /* SSC TXBUFE or RXBUFF */ 0045 u32 pdc_enable; /* PDC recv/trans enable */ 0046 u32 pdc_disable; /* PDC recv/trans disable */ 0047 }; 0048 0049 /* 0050 * This structure, shared between the PCM driver and the interface, 0051 * contains all information required by the PCM driver to perform the 0052 * PDC DMA operation. All fields except dma_intr_handler() are initialized 0053 * by the interface. The dma_intr_handler() pointer is set by the PCM 0054 * driver and called by the interface SSC interrupt handler if it is 0055 * non-NULL. 0056 */ 0057 struct atmel_pcm_dma_params { 0058 char *name; /* stream identifier */ 0059 int pdc_xfer_size; /* PDC counter increment in bytes */ 0060 struct ssc_device *ssc; /* SSC device for stream */ 0061 struct atmel_pdc_regs *pdc; /* PDC receive or transmit registers */ 0062 struct atmel_ssc_mask *mask; /* SSC & PDC status bits */ 0063 struct snd_pcm_substream *substream; 0064 void (*dma_intr_handler)(u32, struct snd_pcm_substream *); 0065 }; 0066 0067 /* 0068 * SSC register access (since ssc_writel() / ssc_readl() require literal name) 0069 */ 0070 #define ssc_readx(base, reg) (__raw_readl((base) + (reg))) 0071 #define ssc_writex(base, reg, value) __raw_writel((value), (base) + (reg)) 0072 0073 #if IS_ENABLED(CONFIG_SND_ATMEL_SOC_PDC) 0074 int atmel_pcm_pdc_platform_register(struct device *dev); 0075 #else 0076 static inline int atmel_pcm_pdc_platform_register(struct device *dev) 0077 { 0078 return 0; 0079 } 0080 #endif 0081 0082 #if IS_ENABLED(CONFIG_SND_ATMEL_SOC_DMA) 0083 int atmel_pcm_dma_platform_register(struct device *dev); 0084 #else 0085 static inline int atmel_pcm_dma_platform_register(struct device *dev) 0086 { 0087 return 0; 0088 } 0089 #endif 0090 0091 #endif /* _ATMEL_PCM_H */
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