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OSCL-LXR

 
 

    


0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 /*
0003  * Driver for Digigram VXpocket soundcards
0004  *
0005  * Copyright (c) 2002 by Takashi Iwai <tiwai@suse.de>
0006  */
0007 
0008 #ifndef __VXPOCKET_H
0009 #define __VXPOCKET_H
0010 
0011 #include <sound/vx_core.h>
0012 
0013 #include <pcmcia/cistpl.h>
0014 #include <pcmcia/ds.h>
0015 
0016 struct snd_vxpocket {
0017 
0018     struct vx_core core;
0019 
0020     unsigned long port;
0021 
0022     int mic_level;  /* analog mic level (or boost) */
0023 
0024     unsigned int regCDSP;   /* current CDSP register */
0025     unsigned int regDIALOG; /* current DIALOG register */
0026 
0027     int index;  /* card index */
0028 
0029     /* pcmcia stuff */
0030     struct pcmcia_device    *p_dev;
0031 };
0032 
0033 #define to_vxpocket(x)  container_of(x, struct snd_vxpocket, core)
0034 
0035 extern const struct snd_vx_ops snd_vxpocket_ops;
0036 
0037 void vx_set_mic_boost(struct vx_core *chip, int boost);
0038 void vx_set_mic_level(struct vx_core *chip, int level);
0039 
0040 int vxp_add_mic_controls(struct vx_core *chip);
0041 
0042 /* Constants used to access the CDSP register (0x08). */
0043 #define CDSP_MAGIC  0xA7    /* magic value (for read) */
0044 /* for write */
0045 #define VXP_CDSP_CLOCKIN_SEL_MASK   0x80    /* 0 (internal), 1 (AES/EBU) */
0046 #define VXP_CDSP_DATAIN_SEL_MASK    0x40    /* 0 (analog), 1 (UER) */
0047 #define VXP_CDSP_SMPTE_SEL_MASK     0x20
0048 #define VXP_CDSP_RESERVED_MASK      0x10
0049 #define VXP_CDSP_MIC_SEL_MASK       0x08
0050 #define VXP_CDSP_VALID_IRQ_MASK     0x04
0051 #define VXP_CDSP_CODEC_RESET_MASK   0x02
0052 #define VXP_CDSP_DSP_RESET_MASK     0x01
0053 /* VXPOCKET 240/440 */
0054 #define P24_CDSP_MICS_SEL_MASK      0x18
0055 #define P24_CDSP_MIC20_SEL_MASK     0x10
0056 #define P24_CDSP_MIC38_SEL_MASK     0x08
0057 
0058 /* Constants used to access the MEMIRQ register (0x0C). */
0059 #define P44_MEMIRQ_MASTER_SLAVE_SEL_MASK 0x08
0060 #define P44_MEMIRQ_SYNCED_ALONE_SEL_MASK 0x04
0061 #define P44_MEMIRQ_WCLK_OUT_IN_SEL_MASK  0x02 /* Not used */
0062 #define P44_MEMIRQ_WCLK_UER_SEL_MASK     0x01 /* Not used */
0063 
0064 /* Micro levels (0x0C) */
0065 
0066 /* Constants used to access the DIALOG register (0x0D). */
0067 #define VXP_DLG_XILINX_REPROG_MASK  0x80    /* W */
0068 #define VXP_DLG_DATA_XICOR_MASK     0x80    /* R */
0069 #define VXP_DLG_RESERVED4_0_MASK    0x40
0070 #define VXP_DLG_RESERVED2_0_MASK    0x20
0071 #define VXP_DLG_RESERVED1_0_MASK    0x10
0072 #define VXP_DLG_DMAWRITE_SEL_MASK   0x08    /* W */
0073 #define VXP_DLG_DMAREAD_SEL_MASK    0x04    /* W */
0074 #define VXP_DLG_MEMIRQ_MASK     0x02    /* R */
0075 #define VXP_DLG_DMA16_SEL_MASK      0x02    /* W */
0076 #define VXP_DLG_ACK_MEMIRQ_MASK     0x01    /* R/W */
0077 
0078 
0079 #endif /* __VXPOCKET_H */